WO1995034000A1 - Connecting device and its manufacture - Google Patents

Connecting device and its manufacture Download PDF

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Publication number
WO1995034000A1
WO1995034000A1 PCT/JP1995/001058 JP9501058W WO9534000A1 WO 1995034000 A1 WO1995034000 A1 WO 1995034000A1 JP 9501058 W JP9501058 W JP 9501058W WO 9534000 A1 WO9534000 A1 WO 9534000A1
Authority
WO
WIPO (PCT)
Prior art keywords
connection device
manufacturing
base material
hole
forming
Prior art date
Application number
PCT/JP1995/001058
Other languages
French (fr)
Japanese (ja)
Inventor
Susumu Kasukabe
Mitsuo Usami
Keijiro Uehara
Takashi Tase
Original Assignee
Hitachi, Ltd.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi, Ltd. filed Critical Hitachi, Ltd.
Publication of WO1995034000A1 publication Critical patent/WO1995034000A1/en

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R3/00Apparatus or processes specially adapted for the manufacture or maintenance of measuring instruments, e.g. of probe tips
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/073Multiple probes
    • G01R1/07307Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card
    • G01R1/07314Multiple probes with individual probe elements, e.g. needles, cantilever beams or bump contacts, fixed in relation to each other, e.g. bed of nails fixture or probe card the body of the probe being perpendicular to test object, e.g. bed of nails or probe with bump contacts on a rigid support
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06711Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • G01R1/06733Geometry aspects
    • G01R1/06744Microprobes, i.e. having dimensions as IC details
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/02General constructional details
    • G01R1/06Measuring leads; Measuring probes
    • G01R1/067Measuring probes
    • G01R1/06711Probe needles; Cantilever beams; "Bump" contacts; Replaceable probe pins
    • G01R1/06755Material aspects
    • G01R1/06761Material aspects related to layers

Definitions

  • the present invention relates to a connection device having a contact terminal for transmitting an electric signal by contacting an opposing electrode, a method of manufacturing the same, and a test device using the same, and particularly to a large number of high-performance semiconductor device inspections.
  • the present invention relates to a connection device suitable for contacting an electrode having a high density.
  • a large number of semiconductor elements for LSI are provided on a semiconductor wafer, and each is cut into chips.
  • a large number of semiconductor elements (chips) 2 for LSI are provided on the surface thereof, and they are separated and used as LSIs.
  • FIG. 28 (B) is an enlarged perspective view of one of the semiconductor elements 2 c .
  • a large number of electrodes 3 are arranged along the periphery thereof. It has been.
  • connection device having a structure as shown in FIGS. 29 and 30 is used.
  • This connection device is composed of a probe card 4 and a probe 5 made of a tungsten needle which is inclined from the probe card 4.
  • a method is used in which the electrode 3 is rubbed by a contact pressure utilizing the deflection of the probe 5 to make contact, and the electrical characteristics thereof are inspected.
  • FIG. 31 a chip-shaped semiconductor element having solder bumps 6 for solder connection on its electrodes, as shown in FIG. Child 2 is being developed.
  • As a method for connecting the semiconductor element 2 as shown in FIG. 32, there is a method in which the semiconductor element 2 faces the electrode 8 on the surface of the wiring board 7 and is connected via the solder bump 6. .
  • This method is suitable for high-density mounting and high-yield batch connection, and its application is expanding.
  • FIG. 33 is a schematic view of the structure
  • FIG. 34 is an enlarged perspective view of the main part.
  • the conductor inspection probe used here is formed by forming wiring 11 on the upper surface of a flexible dielectric film 1.0 using lithography technology, and providing the wiring at a position corresponding to the electrode of the semiconductor to be inspected.
  • a semicircular bump 13 formed on the via 12 of the body film 10 by plating is used as a contact terminal.
  • a bump 13 connected to an inspection circuit (not shown) through a wiring 11 formed on the surface of a dielectric film 10 and a wiring board 14 is formed by a leaf spring 15 by a leaf spring 15.
  • signals are transmitted and received by pressing against the electrodes of the semiconductor element to be inspected for inspection.
  • a depression tool that has a metal plate, for example, a stainless steel plate, partially covered with a non-conductive film such as Teflon, and a metal part that is not covered with a projection with a sharp pointed tip.
  • a depression having a shape corresponding to the shape of the protrusion is formed, and a metal layer is formed by plating a metal thereon, and further, a dielectric substrate is laminated thereon. Then, the dielectric substrate including the metal layer is peeled off from the metal plate. That is, this is one in which a plurality of connector pads having sharp contact portions are arranged on a base. Then, this sharp contact portion is pressed against the integrated circuit pad to perform an inspection.
  • the method using a spring probe consisting of two movable pins can inspect high-speed electrical characteristics because the length of the probe is relatively short. is there.
  • self-inductance is almost proportional to bare probe length. Therefore, for a probe with a diameter of 0.2 mm and a length of 10 mm, its inductance is about 9 nH.
  • Crosstalk noise and ground level fluctuations (ground return current) that disturb high-speed electrical signals are functions of the self-inductance described above, and are almost proportional to the bare probe length. Therefore, when using a high-speed signal of several hundred MHz or more, a short probe of 10 mm or less is required. However, producing such a spring probe is difficult and impractical.
  • the method of using a bump formed by plating a part of the copper wiring as a probe shown in FIGS. 31 and 32 as a probe has a flat or semi-circular shape at the tip of the bump, so that the aluminum electrode or solder
  • the contact resistance becomes unstable for contacted materials that generate oxides on the surfaces of materials such as electrodes, and the load at the time of contact must be several hundred mN or more.
  • the method disclosed in Japanese Patent Application Laid-Open No. H5-22-1118 discloses that the hole is mechanically formed by pressing a dent tool against a metal plate as a molding die, so that the hole forming accuracy is poor. There's a problem. In other words, the positioning is limited by the mechanical operation. In addition, variations occur in the way the holes are drilled. As a result, there is a problem that the positions, shapes and sizes of the projections vary.
  • a first object of the present invention is to provide a connection device having a contact terminal capable of contacting an object to be inspected at multiple points and at a high density, and a method of manufacturing the same.
  • a second object of the present invention is to provide a connection device having electrical characteristics that can reduce the length of a probe and can handle high frequencies, and a method of manufacturing the same.
  • a third object of the present invention is to provide a connection device which has high processing accuracy and can be manufactured without requiring a fine assembling operation, and a method of manufacturing the same.
  • a fourth object of the present invention is to provide a connection device which realizes a contact terminal having stable contact characteristics with a small contact pressure, and a method of manufacturing the same.
  • a fifth object of the present invention is to provide an inspection device having a connection device having high density, many pins, and excellent electrical characteristics. Disclosure of the invention
  • a connection device for making electrical contact with an object to be inspected and transmitting and receiving an electric signal comprising a plurality of contact terminals for making electrical contact with the object to be inspected, and a lead-out wire drawn from each contact terminal. And a first base material that supports the contact terminals and the lead-out wiring,
  • the contact terminal is obtained by anisotropically etching a crystalline second base material. Projections, and an insulating layer supporting the projections,
  • connection device wherein the projection has a conductive portion at least on a tip side thereof, and the conductive portion is connected to the corresponding lead-out wiring.
  • the projection has a ridge, and is formed in a shape having a cone or a truncated cone at least at a tip end so that the tip has a pointed shape.
  • connection device for making electrical contact with an object to be inspected and transmitting and receiving an electrical signal
  • the method includes the steps of: Anisotropically etching the base material to form projections each having a pointed tip, and forming a conductive film and a lead-out wiring on the tip end side for each of the contact terminal projections. And a method for manufacturing the connection device.
  • the contact terminal is further formed on a contact terminal portion made of a cantilever.
  • a film can be provided as appropriate according to the size of flexibility, the size of rigidity, and the like.
  • connection device having a configuration in which the contact terminal is formed on a surface of an insulating thin film, in addition to the first aspect.
  • the substrate according to the first aspect further comprising a buffer layer and a substrate, wherein the base material constituting the contact terminal is provided with a buffer layer interposed therebetween.
  • a connection device configured to be fixed to the connection device is provided.
  • the step of forming the contact terminal further includes a step of fixing the contact terminal to a substrate via a buffer layer.
  • a method for manufacturing a connection device is provided.
  • each of the electrodes to be inspected on which a large number of electrodes are arranged is contacted to transmit and receive an electric signal to perform an inspection.
  • a featured inspection device is provided.
  • an inspection apparatus for performing an inspection by sending and receiving an electric signal by contacting each electrode to be inspected on which a large number of electrodes are arranged, the inspection object is supported.
  • a connection device according to any one of the third to fifth aspects, wherein the connection device is arranged such that a surface having the contact terminal faces an inspection object of the sample support portion.
  • the contact terminal can be configured by forming a projection formed by anisotropic etching of the base material and coating the projection with a conductive material.
  • anisotropic etching for example, a pyramid shape or a truncated pyramid shape having a sharp tip is obtained.
  • a large number of fine and high-density contact terminals can be arranged with high accuracy. Therefore, it is possible to cope with an increase in the density of an object to be measured.
  • contact terminals can be formed as short as the contact terminals can be formed in the etching process (0.001 to 0.5 mm). Thereby, disturbance of the high-speed signal can be reduced.
  • the insulating film In the insulating film, a hole is provided in a portion behind the protrusion at a portion supporting the protrusion. Therefore, the insulating film is easily bent since the rear portion of the protrusion is located at the opening of the hole and is not supported by the second base material. Therefore, when a plurality of projections are provided in the connection device, the insulating film is bent at each projection, and variations in the distance between the electrode and the projection can be absorbed.
  • a cantilever-shaped insulating film with one end supported at the edge of the hole, a prism-shaped insulating film with both ends supported at the edge of the hole, and an insulating film supported all around the hole edge By forming a film on the surface of a cantilever or an insulating film and providing a buffer layer as necessary, variations in the distance between the electrode and the contact terminal can be absorbed.
  • the contact terminal can be used to probe the electrode and the active electrode immediately below it during probing. It can be easily set to an appropriate value that does not damage the element. Further, even if the electrode to be contacted has some steps, the cantilever or the bending of the insulating film and the elasticity of the buffer layer can make contact with the electrode with a predetermined force.
  • a capacitor, resistor or integrated circuit is formed on the surface of the silicon on which the contact terminals are formed by applying the general semiconductor device manufacturing process.
  • the electrical characteristics can be improved and an inspection circuit can be formed, and high-speed AC inspection with less signal disturbance can be performed.
  • the inspection target is a silicon-based semiconductor device
  • a connection device with less displacement due to a difference in linear expansion coefficient can be realized.
  • even a wafer state can be easily inspected at a high temperature. It is possible. Therefore, high-speed, high-speed operation tests can be performed with high-density, ultra-high pin counts for semiconductor device electrodes, and even at high temperatures, the contact terminal tip position accuracy is good and the electrode pattern can be easily changed.
  • a possible contact device can be manufactured.
  • connection device of the present invention is not limited to a semiconductor element, but can be used as a contact device for opposing electrodes, and can be manufactured even with a narrow pitch and a large number of pins.
  • FIG. 1 is an end view showing a main part of a configuration of a first embodiment of a connection device of the present invention
  • FIG. 2 is an end surface showing a main portion of a configuration of a second embodiment of the connection device of the present invention.
  • FIG. 3 is an end view showing a main part of the configuration of a connection device according to a third embodiment of the present invention
  • FIG. 4 is a main view showing the configuration of a connection device according to a fourth embodiment of the present invention. It is an end view showing a part,
  • FIG. 5 (a)-(f) is an end view showing the first stage of the steps of one embodiment of the manufacturing process for forming the connection device of the first embodiment
  • FIG. 6 (g)-(i ") shows the latter stage of the manufacturing process shown in Fig. 5, Fig. 6 (g) shows an end view, and Fig. 6 (g ') shows a contact terminal.
  • flat 6 (h) and (i) are end views
  • FIG. 6 (i ') is a plan view showing a contact terminal
  • FIG. 6 (i''') is a perspective view.
  • FIG. 7 is an end view showing a detailed structure of the configuration of the first embodiment of the connection device of the present invention.
  • FIG. 8 (a)-(c) and (d) are end views showing the first stage of the steps of another embodiment of the manufacturing process for forming the connection device of the present invention, and FIG. 8 (c ') is the contact terminal.
  • FIG. 8 (c ') is the contact terminal.
  • FIG. 9 (e) and (e ′ ′) are end views showing the latter stage of the process of another embodiment of the manufacturing process for forming the connection device of the present invention, and FIG. 9 (e ′) is the contact terminal.
  • FIG. 9 (e ′) is the contact terminal.
  • FIGS. 10 (a) to (d) are end views showing steps of another embodiment of a manufacturing process for forming a connection device according to the present invention
  • FIG. 10 (d ') is a main part of the connection device. It is a perspective view
  • Fig. 11 (a)-(d) is an end view showing another embodiment of a manufacturing process for forming a connection device according to the present invention
  • Fig. 11 (d ') is a perspective view of a main part of the connection device.
  • Fig. 12 (a)-(f ') is an end view showing the first stage of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention
  • FIGS. 13 (g) and (h) are end views showing the interruption of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention
  • FIGS. 13 (h ') and (h'). ') Is a plan view showing an example of the structure of a contact terminal formed by this method.
  • FIG. 14 (i) — (I) is an end view showing the latter stage of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention
  • FIGS. 15 (a) to (d) are end views showing another embodiment of the manufacturing process for forming the connection device according to the present invention.
  • FIGS. 16 (a) and (b) are end views showing the first stage of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention, and FIGS. 16 (b ′) and (b ′).
  • ') Is a plan view of a contact terminal formed by this method, and
  • Figs. 17 (c) and 1 (f) show another embodiment of a manufacturing process for forming a connection device according to the present invention. It is an end view showing the latter stage of the process,
  • FIGS. 18 (a), (b) and (c) are end views showing the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention
  • FIG. 18 (b ') is FIG. 18 (b) is a plan view of FIG.
  • FIG. 19 (a)-(f) is an end view showing the first stage of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention
  • FIGS. 20 (g)-(h) are end views showing the latter stage of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention.
  • FIGS. 21 (a) to (d) are end views showing steps of another embodiment of the manufacturing process for forming the connection device according to the present invention.
  • FIGS. 22 (a) to (d) are end views showing the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention, and FIG. 22 (d ') is a pattern formed by this method.
  • FIG. 22 (d ') is a pattern formed by this method.
  • FIGS. 23 (a), (b) and (c) are end views showing the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention, and FIGS. A plan view of a contact terminal formed by this method,
  • FIGS. 24 (a) and (b) are plan views showing an embodiment of forming a silicon dioxide mask for forming contact terminals of the connection device according to the present invention
  • FIG. 25 is a plan view of the present invention.
  • FIG. 2 is a configuration diagram illustrating an outline of a driving unit of a semiconductor device inspection device equipped with a connection device
  • FIG. 26 is a perspective view showing a main part of a burn-in semiconductor device inspection device equipped with the connection device of the present invention
  • FIG. 27 is a cross-sectional view of a semiconductor device inspection apparatus for burn-in
  • FIG. 28 (A) is a perspective view of a wafer
  • FIG. 28 (B) is a perspective view of a semiconductor device
  • FIG. 29 is a cross-sectional view of a conventional inspection probe.
  • FIG. 30 is a plan view of a conventional inspection probe
  • FIG. 31 is a perspective view showing a semiconductor device having solder balls on electrodes
  • FIG. 32 is a perspective view showing a mounted state of a semiconductor element which has been subjected to solder fusion connection.
  • FIG. 33 is a cross-sectional view of a main part of a conventional semiconductor device inspection apparatus using a bump formed by plating.
  • FIG. 34 is a perspective view showing a bump portion formed by plating shown in FIG. 33, and FIGS. 35 (a) to (d) show a connecting device according to the present invention.
  • FIG. 4 is an end view showing an example in which a hole is formed in a size located on the opening surface;
  • FIGS. 36 (a) to (d) are end views showing another example of a connection device according to the present invention, in which a plurality of protrusions are formed in a hole having a size located at the opening surface thereof. Yes,
  • FIGS. 37 (a) to (c) are plan views showing examples of how a plurality of projections are arranged in the connection device according to the present invention.
  • connection device a contact terminal, and an inspection device according to the present invention will be described based on examples.
  • FIG. 1 shows a main part of a first embodiment of the connection device of the present invention.
  • the connection device of the present embodiment includes a terminal array 20 on which a plurality of contact terminals 42 are arranged, a support member 45 supporting the terminal array 20, a support member 45, and a terminal array.
  • a buffer layer 46 mounted between the body 20 and the wiring board 70 on which the support member 45 is mounted, and an extended wiring system for connecting each contact terminal 42 to the wiring of the wiring board 70. It is provided with a unit 7 1.
  • the terminal array 20 includes a silicon wafer 28 constituting the first base material, silicon dioxide films 26 and 30 constituting the insulating film, contact terminals 42 and a silicon dioxide film 2 6 and a lead wire 40 drawn out from the contact terminal 42.
  • the contact terminal 42 includes a projection 35 serving as a contact terminal and a projection support 43 supporting the projection.
  • the protrusion 35 includes a protrusion 34 formed by anisotropically etching the first substrate silicon wafer, an insulating film 36 covering the protrusion 34, and And a conductive coating 37 provided on the insulating film 36.
  • the projection support portion 43 is composed of a silicon dioxide film 26.
  • a hole 28 a is provided in the silicon wafer 28 at the rear part of the protrusion 35.
  • the projection support portion 43 is located at the opening of the hole so as to cover a part of the hole 28a.
  • the projection support portion 43 is fixed to one location around the hole 28a and is formed in a cantilever shape. Therefore, the projection 35 is supported by the projection support 43 in a state where it is located on the opening surface of the hole 28a.
  • the extension wiring sheet 71 is composed of an insulating film 71a and a drawing extension wiring 72 provided thereon.
  • the extension wiring sheet 71 is smoothly bent outside the silicon wafer 28, one end is fixed to the peripheral portion of the terminal array 20, and the other end is fixed on the wiring board 70.
  • the extension wiring 72 is electrically connected to the wiring 40 and the electrode 73 provided on the wiring board 70, respectively. The connection is made using, for example, solder 74.
  • connection between the periphery of the lead-out wiring 40 and the electrode 73 is made by an insulating film.
  • connection may be made by wire bonding instead of the extension wiring 72 provided for the drawer provided in the room 71a.
  • the wiring board 70 is made of, for example, a resin material such as polyimide or glass epoxy, and has, in addition to the electrodes 73 described above, internal wiring 70 a, connection terminals 70 b, and the like.
  • the wiring substrate 70 and the support member 4 ⁇ are bonded using, for example, a silicon-based adhesive.
  • the insulating film 71a is formed of a flexible and preferably heat-resistant resin.
  • polyimide resin is used.
  • the buffer layer 46 is made of an elastic material such as an elastomer. Specifically, silicon rubber or the like is used.
  • the contact terminals 42 and the lead wires 40 are made of a conductive coating. Details of these will be described later. In FIG. 1, only one contact terminal is shown for the contact terminal 42 and the lead-out wiring 40 for the sake of simplicity, but of course, a plurality of contact terminals are arranged as described later. .
  • FIG. 2 shows a main part of a second embodiment of the connection device of the present invention.
  • the etching shape of the hole 28a provided in the silicon wafer 28 is different, and the structure of the contact terminal 75 is related to this.
  • the configuration is the same as that of the connection device shown in FIG. That is, in the present embodiment, in the terminal array 20, the hole 28 a is provided so as to penetrate the silicon wafer 28 and the silicon dioxide film 30. Further, in the present embodiment, the projection support portion 43 is fixedly supported on the entire periphery of the opening of the hole 28a. Therefore, the contact terminal 75 is provided so as to close the opening of the hole 28a.
  • FIG. 3 shows a main part of a third embodiment of the connection device of the present invention.
  • the connection device shown in FIG. 3 has the structure of the hole 28 a and the contact end of the terminal array 20. It has the same configuration as the connection device shown in FIG. 2 except that the structure of the child 76 is different. Details of the contact terminal 76 will be described later.
  • FIG. 4 shows a main part of a fourth embodiment of the connection device of the present invention.
  • the connecting device shown in FIG. 4 is the same as that shown in FIGS. 1, 2 and 3 except that the structure of the contact terminal 79 provided with an insulating material 78 on the surface of the lead-out wiring 77 is different. It is configured similarly to the connection device.
  • an extension wire 72 for drawing provided on the insulating film 71a is connected to a peripheral portion of the drawing wire 77, and the wiring is provided through a via 80 provided on the insulating film 71a.
  • the extension wiring 72 is electrically connected to the electrode 73 provided on the wiring board 70. Details of the contact terminal 79 will be described later.
  • FIG. 1 shows a main part of a fourth embodiment of the connection device of the present invention.
  • the connecting device shown in FIG. 4 is the same as that shown in FIGS. 1, 2 and 3 except that the structure of the contact terminal 79 provided with an insulating material 78 on the surface of the lead-out wiring 77 is
  • FIG. 23 (b ') shows a main part of a fifth embodiment of the present invention.
  • the basic structure of the connection device shown in FIG. 23 (b ') is the same as that of the third embodiment shown in FIG. The difference is that the projection support portion 43 is supported by two opposing sides of the periphery of the opening of the force hole 26a, and the contact terminal 76a has a bridge structure. Details of the contact terminal 76a of this embodiment will be described later. Next, the structure and manufacturing method of the contact terminal portion of the connection device of the first embodiment will be described.
  • the connecting device shown in FIG. 7 has a silicon dioxide film 26 as a projecting support portion 43 of a cantilever structure, and is provided with a contact terminal 42.
  • the contact terminal 42 includes a protrusion 34 and a protrusion formed of silicon dioxide 36 covering the protrusion 34, and a conductive film 39 and a plating film 44 attached to the tip of the protrusion. And a conductive coating.
  • this connecting device is configured such that a lead wire 40 is connected to the surface of the silicon dioxide film 26 and one end thereof is connected to a conductive film 39 attached to the tip of the contact terminal 42. , It is formed integrally. Further, the other surface of the silicon wafer 28 having the projection support portion 43 formed on the surface thereof is formed with an elastic layer constituting the buffer layer 46.
  • the conductive film 39 has a two-layer structure in which a gold film 39b is applied to a chromium film .39a.
  • the plating film 44 is formed of a rhodium film. The reason why rhodium is used as the plating film 44 is that the hardness of the orifice is higher than that of gold.
  • FIG. 7 shows typical dimensions of each part of the connection device of this embodiment.
  • a quadrangular pyramid-shaped contact terminal having a bottom surface of 30 / m can be realized.
  • this quadrangular pyramid is formed by patterning silicon wafers by photolithography, the position and size can be determined with high precision.
  • it is formed by anisotropic etching a sharp shape can be formed. In particular, the tip can be pointed.
  • the electrode to be measured is aluminum, an oxide film is formed on the surface, and the contact resistance becomes unstable.
  • the tip of the contact terminal breaks through the oxide film on the electrode surface, Good contact needs to be ensured.
  • the tips of the contact terminals are semicircular, it is necessary to rub each contact terminal against the electrode with a contact pressure that causes a load of 300 mN or more per pin.
  • the tip of the contact terminal has a diameter of 10 ⁇ !
  • each contact terminal In the case of a shape with a flat portion in the range of ⁇ 30 m, each contact terminal must be rubbed against the electrode with a contact pressure that will result in a load of 100 mN or more per pin.
  • the contact terminal of the connection device of the present embodiment having the shape indicated by the above numerical values, if there is a contact pressure that causes a load of 5 mN or more per pin, the contact terminal is simply Electric current can be supplied with stable contact resistance just by pressing.
  • the electrode since the electrode only needs to be contacted with a low needle pressure, it is possible to prevent the electrode or the element immediately below the electrode from being damaged. Also, the force required to apply pin pressure to all contact terminals can be reduced. As a result, it is possible to reduce the withstand load of the probe driving device in the test device using this connection device, and to reduce the manufacturing cost.
  • the contact terminal is a projection of a truncated pyramid
  • one side of the flat end of the truncated pyramid is 30 m
  • the area of the tip portion be as small as possible.
  • FIGS. 5 and 6 show, in the order of steps, a manufacturing process for forming a terminal array 20 having cantilever contact terminals in the connection device of the first embodiment of the present invention. Things.
  • an S0I substrate having a structure in which silicon dioxide 26 is sandwiched between single-crystal silicon wafers 27 and 28 is used. That is, protrusions 34 are formed on silicon wafer 27 by anisotropic etching, holes 28a are formed on silicon wafer 28 by etching, and silicon dioxide is formed on the opening of hole 28a.
  • the projecting support portion 43 is formed while leaving the film 26 in a cantilever shape, and the contact terminal 42 is formed.
  • Fig. 5 (a) shows an S0I substrate with a structure in which silicon dioxide 26 having a thickness of about 0.5 to 5m is sandwiched between silicon single crystals 27 and 28.
  • the step of forming silicon dioxide films 29 and 30 on the (100) plane of silicon single crystals 27 and 28 by thermal oxidation will be described. Oxidation of the silicon single crystals 27 and 28 is performed, for example, by subjecting the silicon dioxide films 29 and 30 to 0.5 by thermal oxidation at 100.degree. ⁇ m is formed.
  • FIG. 5 (b) shows that the photoresist masks 31 and 32 are formed on the surfaces of the silicon dioxide films 29 and 30 and the silicon dioxide film 29 is etched to form the silicon dioxide film 33.
  • 4 shows a step of forming a mask.
  • the formation of the photoresist masks 31 and 32 is performed as follows. First, OFPR 800 (manufactured by Tokyo Ohka Kogyo Co., Ltd.) is applied as a photoresist on the surfaces of the silicon dioxide films 29 and 30. Next, a square pattern having a side of about 10 to 40 m is exposed at a position where the contact terminal is to be formed, and developed with a developing solution MD3 (manufactured by Tokyo Ohka Kogyo Co., Ltd.). Next, the silicon dioxide film 29 exposed from the photoresist masks 31 and 32 is immersed and etched in a 1: 7 mixed solution of hydrofluoric acid and ammonium fluoride solution.
  • the photoresist masks 31 and 32 are removed, and the (100) plane of silicon single crystal 27 is anisotropically etched using silicon dioxide film 33 as a mask.
  • a step in the middle of forming a projection 34 having a pointed shape is shown.
  • Etching of the silicon single crystal 27 is performed, for example, by immersion in a mixed solution of lithium hydroxide, isopropanol, and water.
  • the photoresist masks 31 and 32 are removed with a stripping solution S502a (manufactured by Tokyo Ohka Kogyo Co., Ltd.).
  • FIG. 5 (d) shows anisotropic etching to form a projection 34 having a sharp tip, and then forming a silicon dioxide film 36 on the surface of the projection 34 by thermal oxidation.
  • the step of forming the part 36 is shown.
  • Oxidation of the protrusion 34 made of silicon is performed by, for example, thermal oxidation in a jet oxygen. This Thereby, a silicon dioxide film 36 is formed at about 0.5 / zm.
  • FIG. 5 (d ') is a plan view of the projection 35 shown in FIG. 5 (d) when viewed from below.
  • FIG. 5 (e) shows that a conductive coating 37 is formed on the surface of the silicon dioxide film 36 on the surface of the protrusion 35, and the pattern and the pattern for forming the surface of the protrusion 35 and the wiring are formed.
  • a step of forming a photoresist mask 38 so as to cover the surface of the conductive coating 37 as much as possible will be described.
  • the conductive coating 37 for example, a chromium having good adhesion to silicon dioxide is applied to a thickness of 0.02 m by a sputtering method or a vapor deposition method, and then gold is applied to a thickness of 0.2 to 0.5 mm. It is sufficient to form a deposited film, or to form a film by depositing 0.2 to 0.5 m of gold after depositing 0.02 m of titanium by sputtering or vapor deposition. .
  • FIG. 5 (f) shows that the conductive coating 37 is etched with the photoresist mask 38 to form the conductive film 39 of the projection 35 and the wiring 40, and then the photoresist mask 41 is formed. Removing the portion of the silicon dioxide 26 that should be left as an insulating film supporting the protrusions 35 from the other silicon dioxide film 26 as a groove 26 a by etching. Is shown. In this process, OFPR 800 (manufactured by Tokyo Ohka Kogyo) is applied as a photoresist, and OFPR 800 (manufactured by Tokyo Ohka Kogyo) on the surface of silicon dioxide 26 around the projection 35 is transformed into a rectangle.
  • OFPR 800 manufactured by Tokyo Ohka Kogyo
  • a strip shape The two sides in the longitudinal direction and the short side perpendicular to this are exposed in a strip shape. That is, an exposure pattern having a shape similar to a U-shape (in this specification, this shape is referred to as a U-shape for convenience of explanation) is formed.
  • a photoresist mask 41 is formed by developing with NMD 3 (manufactured by Tokyo Ohka Kogyo Co., Ltd.). Next, the silicon dioxide film 26 exposed from the photoresist mask 41 is converted into a 1: 7 mixture of hydrofluoric acid and ammonium fluoride. Etch and etch.
  • FIGS. 6 (g), (h) and (i) show the steps of forming the projection support portion 43 of the cantilever structure step by step. That is, here, the photoresist mask 41 is removed, and the (100) plane of the silicon single crystal 28 is etched from the groove 26a using the remaining silicon dioxide film 26 as a mask. Thereby, the silicon dioxide film 26 is formed, and the conductive film is formed.
  • a cantilever-shaped projection support that supports the projection 3 5 on its surface
  • FIG. 6 (g ') is a plan view of (g) viewed from below
  • Fig. 6 (i') is a plan view of (i) viewed from below
  • Fig. 6 '') is (i)
  • FIG. 3 is a perspective view of the device viewed from below.
  • the photo resist mask 41 is removed using S502a (manufactured by Tokyo Ohka Kogyo Co., Ltd.).
  • Etching of the silicon single crystal 28 is performed, for example, by immersion in a mixed solution of potassium hydroxide and water. Instead of this solution, a mixed solution of potassium hydroxide, isopropanol and water may be used.
  • a plating film 44 is provided by plating gold or rhodium or the like on the surface of the conductive film 39 having a quadrangular pyramid shape at the tip of the contact terminal with 0.2 to 2 m of gold or rhodium. Can stabilize the electrical contact characteristics
  • FIG. 7 shows a step of fixing the substrate made of the silicon single crystal 28 and the silicon dioxides 26 and 30 on which the contact terminals 42 are formed, to the support member 45.
  • a silicon substrate is used as the support member 45.
  • the buffer layer 46 is interposed between the surface of the silicon dioxide film 30 and the support member 45 to be integrated.
  • a silicon rubber having a thickness of 0.2 to 3 mm and a hardness (JISA) of about 15 to 70 is used as the buffer layer 46.
  • JISA hardness
  • the buffer layer 46 is not limited to this.
  • the bonding between the silicon dioxide film 30 and the silicon support member 45 is performed by using a silicon Since the rubber itself has adhesive strength, no special adhesive is required. In addition, you may make it adhere
  • the contact terminal having a pitch of about 10 m as a pitch of the electrode pad portion.
  • the accuracy of the height of the contact terminal can be achieved within ⁇ 2 m.
  • the contact terminal since the contact terminal is formed in a cantilever shape, its flexibility is increased. Therefore, it absorbs the influence of the unevenness of the electrode of the measurement object.
  • connection device shown in FIG. 1 Next, another manufacturing process for forming the connection device shown in FIG. 1 will be described with reference to FIG. 8 and FIG.
  • This embodiment is an example using an SOI substrate having a structure in which a plurality of insulating layers are sandwiched between layers. The description of the same steps as those shown in FIGS. 5 and 6 is omitted.
  • Fig. 8 (a) shows an S0I substrate with a structure in which silicon dioxides 26 and 47 with a thickness of 0.5 to 5 m are sandwiched between silicon single crystals 27, 28 and 48.
  • the process of forming silicon dioxide films 29 and 30 on the (100) plane of silicon single crystals 27 and 48 by thermal oxidation is shown. Oxidation of silicon single crystals 27 and 48 forms silicon dioxide films 29 and 30 to a thickness of about 0.5 m, for example, by thermal oxidation in wet oxygen.
  • the silicon dioxide film 29, the silicon single crystal 27, and the silicon dioxide 26 are subjected to the same steps as those shown in FIGS. 5 (b) to 5 (e) to form the conductive film of the projection 35. 39 and wiring 40 are formed.
  • FIG. 8 (b) shows a portion of the silicon dioxide 26 that should be left as an insulating film supporting the protrusion 35, and a portion that becomes a groove 26a for separating the silicon dioxide 26 from the other silicon dioxide film 26.
  • An opening is formed by a photoresist mask 41, and the silicon dioxide 26 in that portion is removed by photoetching.
  • FIGS. 8 (c), (d) and 9 (e) show that the photoresist mask 41 is removed and the (100) plane of the silicon single crystal 28 is exposed to the silicon dioxide layer 47.
  • the step of forming a projection support portion 43 having a cantilever structure of a silicon dioxide film 26 having a projection portion 35 on the surface by etching until the etching is completed is shown in a stepwise manner.
  • FIG. 8 (c ′) is a plan view of (c) viewed from below
  • FIG. 9 (e ′) is a plan view of (e) viewed from below
  • FIG. 9 (e ′ ′) is ( FIG. 3 is a perspective view of e) viewed from below.
  • the electrical contact characteristics can be stabilized by depositing gold or rhodium on the surface of the conductive film 39 having a quadrangular pyramid shape at the tip of the contact terminal.
  • the presence of the silicon dioxide layer 47 can reliably stop the anisotropic etching of the silicon single crystal 28 at the silicon dioxide layer 47.
  • the processing accuracy is improved and the etching process management becomes easier as compared with the manufacturing methods shown in FIGS. 5 and 6.
  • connection device shown in FIG. 1 Next, still another manufacturing process for forming the connection device shown in FIG. 1 will be described with reference to FIG. The description of the same steps as those shown in FIGS. 5 and 6 will be omitted.
  • FIG. 10 (a) shows the same steps as the steps from FIG. 5 (a) to (f).
  • FIG. 10 (a) shows the same steps as the steps from FIG. 5 (a) to (f).
  • FIGS. 10 (b), (c) and (d) show the hole 28a by removing the photoresist mask 41 and etching the (100) plane of the silicon single crystal 28. And a step of forming a projection support portion 43 having a cantilever structure of the silicon dioxide film 26.
  • FIG. 10 (d ') is a perspective view of (d) viewed from below. Etching of the silicon single crystal 28 is performed, for example, by immersion in a mixed solution of ethylenediamine, pyrocatechol and water. Note that a mixture of potassium hydroxide and water may be used instead of this solution. Alternatively, a mixture of potassium hydroxide, isopropanol and water may be used.
  • the electrical contact characteristics can be stabilized by depositing gold or rhodium on the surface of the conductive film 39 having a quadrangular pyramid shape at the tip of the contact terminal.
  • connection device shown in FIG. 1 Next, another manufacturing process for forming the connection device shown in FIG. 1 will be described with reference to FIG. The description of the same steps as those shown in FIGS. 5 and 6 will be omitted.
  • FIG. 11 (a) shows an SOI substrate having a structure in which silicon dioxide 26 having a thickness of 1 to LO ⁇ m is sandwiched between silicon single crystals 27 and 28, and FIG.
  • the (100) plane of the silicon single crystal 27 is anisotropically etched using the silicon dioxide film 33 as a mask to form a projection 34 having a substantially pointed tip.
  • the steps will be described. That is, the present embodiment is an example in which a truncated quadrangular pyramid-shaped projection is formed.
  • FIG. 11 (b) shows that the silicon single crystal 27 is anisotropically etched while the mask of the silicon dioxide film 33 is still attached to the protrusions 34, A step of removing the silicon dioxide film 33 by etching will be described. In this etching, the silicon dioxide film 26 and the silicon dioxide film 30 are also partially or entirely etched at the same time.
  • FIG. 11 (c) shows the projection 34 and the silicon single crystal 2 8 shows a step of forming silicon dioxide films 49 and 50 on the surface of FIG. The silicon is oxidized by, for example, forming a silicon dioxide film of about 0.5 / m by thermal oxidation in wet oxygen.
  • FIG. 11 (d) shows a step of forming a projection support portion 43 having a cantilever structure.
  • FIG. 11 (d ′) is a perspective view of FIG. 11 (d) as viewed from below.
  • the electrical contact characteristics can be stabilized by depositing gold or rhodium on the surface of the conductive film 39 at the tip of the contact terminal.
  • a flat portion of an arbitrary size can be formed at the tip of the protrusion 34 as compared with the manufacturing method of FIG. 5 and FIG.
  • This method is not limited to the substrate configuration shown in FIG. 11, but has a flat portion of an arbitrary size by anisotropically etching a silicon single crystal using a silicon dioxide film as a mask. This is effective in the step of forming the projection.
  • connection device shown in FIG. 2 Next, a manufacturing process for forming the connection device shown in FIG. 2 will be described with reference to FIG. 12, FIG. 13 and FIG.
  • Fig. 12 (a) shows the SOI substrate 27 with a structure in which silicon dioxide 26 with a thickness of 0.5 to 5 m is sandwiched between single crystal silicon wafers 27 and 51.
  • the steps of forming silicon dioxide films 29 and 30 on the (100) plane and the (110) plane of silicon wafer 51 by thermal oxidation are shown. Oxidation of the silicon wafers 27 and 51 forms, for example, silicon dioxide films 29 and 30 to a thickness of about 0.5 ⁇ m by thermal oxidation in dilute oxygen.
  • FIG. 12 (b) shows that the surface of the silicon dioxide films 29 and 30 is A step of forming the resist masks 31 and 32 and etching the silicon dioxide film 29 will be described.
  • FIG. 12 (c) shows that the photoresist masks 31 and 32 are removed, and the (100) plane of the silicon wafer 27 is anisotropically etched using the silicon dioxide film 33 as a mask. A step in the process of forming a projection 34 having a sharp pointed end is shown.
  • FIG. 12 (d) shows anisotropic etching to form a projection 34 having a pointed tip, and then forming a silicon dioxide film 36 on the surface of the projection 34 by thermal oxidation.
  • the step of forming the projection 35 will be described.
  • the projection 34 made of silicon is oxidized by, for example, thermal oxidation in jet oxygen to form a silicon dioxide film 36 of about 0.5 m.
  • FIG. 12 (e) shows that the photoresist masks 52 and 53 are formed on the surfaces of the silicon dioxide film 36 and the silicon dioxide film 30 on which the projections 35 are formed, and the silicon dioxide film 30 is etched. The following shows the steps performed.
  • FIG. 12 (f) shows that the photoresist masks 52 and 53 are removed and the silicon dioxide film 30 is used as a mask to make the (110) surface of the silicon wafer 51 a silicon dioxide layer 26.
  • the step of forming a hole 51a by anisotropic etching until the process is described.
  • the (110) plane of the silicon wafer 51 is slightly left on the surface of the silicon dioxide layer 26, and the silicon dioxide layer 26 and The projection support portion 43 can be formed by a film made of the silicon wafer 51. In this case, the strength and flexibility of the protruding support portion 43 may be adjusted by the thickness of the silicon wafer 51. Subsequent steps are the same as the steps subsequent to FIG. 12 (f), and a description thereof will not be repeated.
  • the method described above is not limited to the substrate configuration shown in FIG.
  • the (110) plane of silicon wafer 51 or (100) plane of silicon wafer 28 described below is anisotropically etched in the direction of silicon dioxide layer 26 to obtain an arbitrary thickness. This is effective in the step of forming a film composed of the silicon wafer and the silicon dioxide layer 26.
  • FIG. 13 (g) shows that a conductive coating 37 is formed on the surface of the silicon dioxide film 36 on the surface of the protrusion 3 ⁇ so as to form a pattern for the surface of the protrusion 35 and the wiring.
  • the step of forming a photoresist mask 38 covering the surface of the conductive coating 37 will be described.
  • the conductive coating 37 for example, a film formed by depositing 0.02 m of chromium and then depositing 0.2 to 0.5 m of gold by a sputtering ring method or a vapor deposition method is formed. Alternatively, a film may be formed by depositing 0.02 m of titanium and then depositing 0.2 to 0.5 zm of gold by sputtering or vapor deposition.
  • FIG. 13 (h) shows a process of forming the conductive film 39 of the protrusion 35 and the wiring 40 by etching the conductive coating 37 with the photoresist mask 38.
  • FIG. 13 (h ′) and (h ′′) are plan views of (h) viewed from below.
  • FIG. 13 (h ') shows that the silicon conductive layer 51 is anisotropically etched to a part of the silicon dioxide layer 26 where the protrusions 35 are formed, and a conductive film 39 is formed. This is an example of forming.
  • (H ′ ′) is an example in which the conductive film 39 is formed so as to cover the entire anisotropically etched portion.
  • the silicon dioxide film 26 is supported all around the opening of the hole 51 a provided in the silicon wafer 51, and the opening of the hole 51 a is closed by the silicon dioxide film 26. .
  • this example is characterized in that the projection support portion 43 has a lower flexibility but a higher rigidity as compared with the case of the cantilever structure.
  • the conductive film 3 having a quadrangular pyramid shape at the tip of the contact terminal was used.
  • the electrical contact characteristics can be stabilized by plating gold or rhodium, etc., on the surface of 9 about 0.2 to 2 m.
  • FIGS. 14 (i) and (j) show the above-mentioned silicon wafer 51 and silicon dioxide 30 on which a silicon dioxide film 26 having the above-mentioned projections 35 on the surface is formed.
  • a step of sandwiching a buffer layer 46 between a surface of a silicon dioxide film 30 of a substrate and a support member 45 to integrate them will be described.
  • the buffer layer 46 is also filled in the hole 51a provided in the silicon wafer 51.
  • the buffer layer 46 for example, a silicon rubber having a thickness of 0.2 to 3 mm and a hardness (JISA) of about 15 to 70 is used.
  • JISA hardness
  • the material for the buffer layer is not limited to this.
  • the silicon dioxide film 30 and the support member 45 need not be specially bonded to each other because the silicon rubber 46 itself has an adhesive force. In addition, you may make it adhere using an adhesive agent.
  • a silicon substrate is used as the support member 45.
  • FIG. 14 (k) shows the surface of the silicon dioxide film 51 and silicon dioxide 30 on which the silicon dioxide film 26 having the above-mentioned projections 35 formed on the surface is formed.
  • This is an example in which an insulating film 54 is attached and used.
  • FIG. 14 (1) shows an example in which the insulating film 54 is sandwiched between the silicon dioxide film 30 and the support member 45, and used integrally.
  • a polyimide having a thickness of 5 to 20 m is used as the insulating film 54.
  • the insulating film is not limited to this.
  • a structure in which a buffer layer is interposed between the insulating film 54 and the support member 45 may be adopted. As described above, by adopting a structure with an elastomer and a silicon substrate or a structure with an insulating film, it is possible to improve the strength of the contact terminal portion and control the elastic modulus.
  • connection device shown in FIG. 2 Next, another manufacturing process for forming the connection device shown in FIG. 2 will be described. This will be described with reference to FIG. The description of the same steps as those shown in FIGS. 12 to 14 will be omitted.
  • FIG. 15 (a) shows anisotropic etching of the (100) plane of silicon wafer 27 using silicon dioxide film 33 as a mask to form projections 34 having a substantially pointed tip.
  • the following shows the steps performed.
  • an S0I substrate having a structure in which silicon dioxide 26 having a thickness of 1 to 10 m is sandwiched between silicon wafers 27 and 51 made of a silicon single crystal is used.
  • Anisotropic etching is performed by the same process as the process from (a) to (c).
  • FIG. 15 (b) shows that the silicon dioxide film 33 mask is still adhered to the protrusions 34 and the silicon wafer 27 is stopped from being anisotropically etched. A step of removing the silicon dioxide film 33 by etching will be described. In this etching, the silicon dioxide 26 and the silicon dioxide film 30 are also partially or entirely etched at the same time.
  • FIG. 15 (c) shows a step of forming projections 35 by forming silicon dioxide 49 and 50 on the surface of projections 34 and silicon single crystal 51 by thermal oxidation. The silicon is oxidized by, for example, forming a silicon dioxide film of about 0.5 m by thermal oxidation in cut oxygen.
  • FIG. 15 (d) shows an etching of the (110) surface of the silicon wafer 51 by the same steps as those in FIGS. 12 (e) to 13 (h). Then, a step of forming the hole 51a and forming the conductive film 39 and the wiring 40 on the silicon dioxide film 49 on the surface of the protruding portion 35 having a substantially sharp tip is shown.
  • a flat portion of an arbitrary size can be formed at the tip of the protrusion 34 as compared with the manufacturing method shown in FIGS. 12 to 14.
  • This method is not limited to the substrate configuration shown in FIG. 15, but may be used in a process of forming a projection by anisotropically etching a silicon single crystal using a silicon dioxide film as a mask. It is valid. Further, in this embodiment, the entire opening of the hole 51 a is covered with the silicon dioxide film 26. Therefore, it has the same features as the structure shown in FIG.
  • connection device shown in FIG. 3 Next, a manufacturing process for forming the connection device shown in FIG. 3 will be described with reference to FIG. 16 and FIG. The description of the same steps as those shown in FIGS. 12 to 14 will be omitted.
  • Fig. 16 (a) shows the S01 substrate with a structure in which silicon dioxide 26 with a thickness of 0.5 to 5 m is sandwiched between silicon wafers 27 and 28.
  • the steps of forming silicon dioxide films 29 and 30 on the (100) plane and the (100) plane of the silicon wafer 28 by thermal oxidation are shown.
  • the oxidation of the silicon wafers 27 and 28 forms the silicon dioxide films 29 and 30 to about 0.5 ⁇ m by, for example, thermal oxidation in wet oxygen.
  • FIG. 16 (b) shows a process of forming projections 34 on silicon dioxide film 26, forming holes 28a in silicon wafer 28, and forming a conductive coating on projections 35. Is shown. That is, in this step, a projection 34 having a pointed tip is formed on the silicon dioxide film 26 by the same steps as those shown in FIGS. 12 (b) to (d). , Fig. 12 (e)-Fig. 13 A hole 28a is formed in the silicon wafer 28 by etching the (100) plane of the silicon wafer 28 by a process similar to the process up to (h). The opening of the hole 28 a is covered with the silicon dioxide film 26. Then, a step of forming a conductive film 39 and a lead wire 40 on the projections 34 formed on the silicon dioxide film 26 covering the opening and the silicon dioxide film 26 will be described.
  • FIG. 16 (b ′) and (b ′ ′) are plan views of (b) viewed from below.
  • FIG. 16 (b ′) shows that the silicon wafer 28 is anisotropically etched to the silicon dioxide layer 26 where the projections 34 are formed, and the conductive film 39 This is an example of forming.
  • FIG. 16 (b ′ ′′) shows an example in which a conductive film 39 is formed so as to cover the entire anisotropically etched portion.
  • gold or rhodium or the like is attached to the surface of the conductive film 39 having a quadrangular pyramid shape at the tip of the contact terminal for about 0.2 to 2 m, so that electrical contact characteristics can be stably maintained. can do.
  • FIG. 18 shows a manufacturing method for forming the silicon dioxide layer 26 supporting the projection 35 of FIG. 16 (b) into a cantilever structure. The description of the same steps as the processes shown in FIGS. 16 and 17 will be omitted.
  • FIG. 18 shows a manufacturing method for forming the silicon dioxide layer 26 supporting the projection 35 of FIG. 16 (b) into a cantilever structure. The description of the same steps as the processes shown in FIGS. 16 and 17 will be omitted.
  • c forms a ho Torejisu mask 5 5 by, not covered by the host Torejisu mask 5 5, i.e., a diacid of silicon film 2 6 exposed, of hydrofluoric acid and fluoride Anmoniumu solution 1: 7 Etch by dipping in the mixed solution.
  • FIG. 18 (b) the photoresist masks 55 and 56 are removed to form a projection support 43 of a cantilever structure of a silicon dioxide film 26 having a projection 35 on the surface.
  • FIG. FIG. 18 (b ′) is a plan view of FIG. 18 (b) viewed from below.
  • the photoresist masks 55 and 56 are removed using S502a (Tokyo Ohka Kogyo).
  • gold or a mouth jam is attached to the surface of the conductive film 39 having a quadrangular pyramid shape at the tip of the contact terminal for about 0.2 to 2 // m to make electrical contact. Characteristics can be stabilized.
  • FIG. 18 (c) shows the surface of the silicon dioxide film 30 of the silicon wafer 28 and the silicon dioxide 26, 30 substrate on which the projection support portions 43 of the cantilever structure are formed and the silicon dioxide film 30. The step of sandwiching the buffer layer 46 between the substrate 45 and the substrate to integrate them will be described.
  • connection device shown in FIG. 4 Next, a manufacturing process for forming the connection device shown in FIG. 4 will be described with reference to FIG.
  • Fig. 19 shows a method for forming square pyramid holes by anisotropic etching in a silicon wafer as a base material, and using this silicon wafer as a mold to form the contact end of the square pyramid with a thin film.
  • the manufacturing process is shown in the order of steps.
  • FIG. 19 (a) shows an SOI substrate having a structure in which silicon dioxide 26 of about 0.5 to 5 m is sandwiched between silicon wafers 27 and 28.
  • the step of forming silicon dioxide films 29 and 30 on the (100) planes of silicon wafers 27 and 28 by thermal oxidation is shown. Oxidation of the silicon wafers 27 and 28 forms the silicon dioxide films 29 and 30 to a thickness of about 0.5 m, for example, by thermal oxidation in dilute oxygen.
  • FIG. 19 (b) shows a step of forming photoresist masks 31 and 32 on the surfaces of the silicon dioxide films 29 and 30 and etching the silicon dioxide film 30.
  • FIG. 19 (c) shows that the photoresist masks 31 and 32 are removed and the (100) plane of the silicon wafer 28 is changed to the silicon dioxide layer 26 using the silicon dioxide film 30 as a mask.
  • a process of forming a silicon dioxide film 57 on the surface of the silicon wafer 28 by thermal oxidation will be described.
  • the silicon dioxide film 57 is formed to a thickness of about 0.5 m by thermal oxidation in wet oxygen.
  • FIG. 19 (d) shows that a photoresist mask 58 is formed on the surface of the silicon dioxide film 57, and the silicon dioxide film 26 is etched to form the opening 2.
  • 6B shows a step of forming b.
  • FIG. 19 (e) shows that the photoresist mask 58 was removed and the silicon dioxide film 26 was used as a mask to make the silicon wafer and the (100) plane 27 anisotropic from the opening 26b.
  • a step of forming an etching hole 59 in the shape of a quadrangular pyramid by etching will be described.
  • FIG. 19 (f) shows a step of forming a conductive coating 37. That is, in this step, first, the etching hole 59 and the silicon dioxide film 2
  • a conductive coating 37 is formed on the surfaces of 6, 57 and 30. Thereafter, a photoresist mask 60 is formed on the surface of the conductive coating 37 so as to cover the surface of the etching hole 59 and form a wiring pattern.
  • the conductive coating 37 exposed from the photoresist mask 60 is etched.
  • the conductive coating 37 is formed, for example, by depositing gold in a thickness of 0.2 to 0.5 m by a sputtering method or a vapor deposition method.
  • the conductive coating 37 is formed by depositing nickel on a gold film by a thickness of about 1 to 2 m by a sputtering method or a vapor deposition method. It may be about 40 m.
  • a noble metal such as gold or rhodium is applied in a thickness of about 0.1 to 0.1.
  • Sputtering or vapor deposition is applied to a film, and nickel is applied in a thickness of about 1 to 2 m.
  • a film deposited by a vapor deposition method may be used.
  • FIG. 20 (g) shows that the surface of the photoresist mask 60 and the silicon dioxide film 30 attached to the surface of the conductive coating 37 and the silicon substrate as the support member 45.
  • the process of filling the buffer layer 46 and integrating it is shown.
  • the buffer layer 46 for example, silicon rubber is used.
  • a material formed by applying a polyimide and curing by heating can be used.
  • a two-layer polyimide film obtained by applying polyimide before heat curing to the lower surface of the thermally cured polyimide was adhered to the surface of the conductive coating 37, and was formed by heat curing. Can be used.
  • FIG. 20 (h) shows a step of forming the protrusion 35 by etching and removing the silicon dioxide film 31 and the silicon wafer 27, respectively.
  • the protrusion 35 is not formed of the silicon single crystal.
  • the electrical contact characteristics were improved by attaching gold or a mouthpiece to the surface of the conductive coating 37 having a quadrangular pyramid shape at the tip of the contact terminal for about 0.2 to 2 m. Can be stable.
  • FIG. 4 shows a step of forming the protrusion 35 by etching and removing the silicon dioxide film 31 and the silicon wafer 27, respectively.
  • the protrusion 35 is not formed of the silicon single crystal.
  • the electrical contact characteristics were improved by attaching gold or a mouthpiece to the surface of the conductive coating 37 having a quadrangular pyramid shape at the tip of the contact terminal for about 0.2 to 2 m. Can be stable.
  • FIG. 21 (a) shows an SOI substrate having a structure in which silicon dioxide 26 having a thickness of about 0.5 to 5 m is sandwiched between silicon wafers 27 and 28 until FIG.
  • the (100) plane of the silicon wafer 27 is anisotropically etched to form a square pyramid-shaped etching hole 59, A step of forming a silicon dioxide film 61 on the surface of the etching hole 59 of the silicon wafer 27 will be described.
  • FIG. 21 (b) shows a step of forming a conductive coating 37.
  • a base film 37 a and a conductive coating 37 are formed on the surfaces of the silicon dioxide films 61, 26, 57 and 30.
  • a photoresist mask 62 covering the surface of the conductive coating 37 is formed so as to cover the surface of the silicon dioxide film 61 in the etching hole 59 and form a pattern for forming a wiring.
  • the conductive coating 37 and the base film 37a exposed from the photoresist mask 62 are etched.
  • the base film 37a is formed by, for example, applying 0.02 m of chromium by a sputtering method or a vapor deposition method.
  • the conductive coating 37 is formed, for example, by depositing 0.2 to 0.5 m of gold on the base film 37a by a sputtering method or a vapor deposition method.
  • titanium may be applied to the base film 37a in a thickness of 0.02 m in place of chromium by sputtering or vapor deposition.
  • the conductive coating 37 is formed by forming a nickel film of about 1 to 2 m on a gold film by a sputtering method or a vapor deposition method, and coating Nigel, copper or both on the surface with 2 to 4 m. About 0 m may be plated.
  • a noble metal such as gold or rhodium is applied to a film formed by sputtering or vapor deposition in a thickness of about 0.1 to 0.5 m.
  • a film in which nickel is applied by about 1 to 2 m by a sputtering method or a vapor deposition method may be used.
  • FIG. 21 (c) shows the photo resist mask 62 and the surface of the silicon dioxide film 30 attached to the surface of the conductive coating 37 and the silicon substrate as the support member 45. During this step, the process of filling the buffer layer 46 and integrating it is shown.
  • the buffer layer 46 for example, silicon rubber is used.
  • FIG. 21 (d) shows a step of forming the protrusion 35. That is, first, the silicon dioxide film 31 and the silicon wafer 27 are respectively removed by etching. Thereafter, the silicon dioxide 61 covering the protrusions 35 is removed by etching, and then the base film 37a is removed by etching. In this example, gold or rhodium was applied to the surface of the conductive coating 37 having a quadrangular pyramid shape at the tip of the contact terminal for about 0.2 to 2 m to stabilize the electrical contact characteristics.
  • FIG. 22 shows a method of forming the silicon dioxide layer 26 having the projections 35 of FIG. 20 (h) into a cantilever structure. The description of the same steps as those shown in FIGS. 19 and 20 will be omitted.
  • FIG. 22 (a) shows a photo resist mask 63 after a silicon dioxide layer 57 is formed by the same steps as those in FIG. 19 (a) to (c). Then, the silicon dioxide film 26 at the position 64 where the protrusion is formed and the silicon dioxide layer 26 around the protrusion are formed into a U-shape 65 by the photoresist mask 63.
  • Figure 3 shows the process of removing by etching. 0 FPR 800 0 0 (Tokyo The silicon dioxide film 26 at the protrusion formation position 64 is formed into a square, and the FDP 800 of the surface of the silicon dioxide film 26 around the protrusion formation position is applied (Tokyo Ohka Kogyo Co., Ltd.).
  • the photoresist mask 63 is removed and the (100) plane of the silicon wafer 27 is anisotropically etched using the silicon dioxide film 26 as a mask to form a square pyramid.
  • the silicon wafer 27 is etched into a U-shape 66, and a conductive coating is formed on the etching surface of the silicon wafer 27 and the surfaces of the silicon dioxide films 26, 57 and 30.
  • 37 shows a step of forming 37.
  • the conductive coating 37 may be formed of the same material as in FIG. 19 (f).
  • the etched surface of the silicon wafer 27 is formed by forming a silicon dioxide film 61 by thermal oxidation in the same manner as in FIG. 21 (a) to form a base film 37a and a conductive coating 37. May be formed.
  • FIG. 22 (c) shows a pattern for wiring formation which covers the surface of the above-mentioned square pyramid etching hole 59, does not cover the conductive coating 37 of the U-shaped etching surface 66.
  • a step of forming the photoresist mask 67 covering the surface of the conductive coating 37 and then removing the conductive coating 37 will be described.
  • FIG. 22 (d) shows the relationship between the surface of the photoresist mask 67 and the surface of the silicon dioxide film 30 applied to the surface of the conductive coating 37 and the silicon substrate as the support member 45.
  • a step of removing the silicon dioxide film 29 and the silicon wafer 27 after integrating them with the buffer layer 46 interposed therebetween is shown.
  • FIG. 22 (d ′) is a plan view of (d) viewed from below.
  • FIG. 23 shows a part of the manufacturing process of the fifth embodiment of the connection device of the present invention.
  • C This embodiment is basically manufactured by the same process as the embodiment shown in FIG. can do. The difference is that, in the example of FIG. 18, the protrusion support portions 43 are formed in a cantilever structure, but in the present embodiment, the protrusion support portions 43 are formed in a bridge structure, that is, a double-supported structure. The point is that it is formed into a structure. Therefore, the difference in the process is that the silicon dioxide film 26 around the projection support 43 is etched in a U-shape or etched in two parallel grooves. It is. Therefore, since the details of the manufacturing process have already been described, including the example of FIG. 18, the description is omitted here.
  • this embodiment has an intermediate property between that of the cantilever structure and that of the structure that covers the entire opening of the hole 28a (or 51a).
  • FIGS. 1 to 23 uses a silicon single crystal silicon mask 68 as shown in FIGS. 24 (a) and (b) to form a silicon single crystal.
  • the (100) plane is anisotropically etched to form a contact terminal having a quadrangular pyramid contact tip.
  • a square mask of a silicon dioxide film for forming the tip of the contact terminal is formed on the (100) plane of the silicon wafer 27 as shown in FIG. Either place the sides at an angle of 45 degrees with the ⁇ 110> direction or, as shown in Fig. 24 (b), place one side parallel to the ⁇ 110> direction. It is desirable to place them.
  • silicon wafers are used as the base material for forming the contact terminals.
  • the present invention is not limited to this.
  • a crystal that can form a sharp-pointed hole by anisotropic etching If so, another crystal may be used.
  • anisotropic etching is necessary for the second base material on which the projections are formed, for example, silicon wafer 27.
  • the first substrate that is not directly used for forming the protrusions for example, silicon wafers 28 or 51, does not necessarily need to be anisotropically etched. Normal etching may be used. Therefore, the silicon substrates 28 and 51 as the first base material need not be single crystals. For example, polycrystalline silicon or amorphous silicon may be used.
  • the base material is a convenience silicon wafer, but this is not intended to limit the invention to a wafer manufactured as a wafer. What is necessary is just to be able to form a projection by the above-mentioned process.
  • the terminals provided as the contact terminals are connected to the wiring and can be used effectively.
  • the cantilever-shaped projection support portion 43 has a rectangular shape, but is not limited thereto.
  • the shape may be a trapezoid or a parallelogram.
  • the present invention is not limited to this. That is, one hole 28a or hole 51a may be provided for each of the plurality of protrusions 35. That is, a structure in which one projection supporting portion supports a plurality of projections 35 can be provided. In this case, pull out independently for each protrusion.
  • the contact terminal 42 can be formed for each projection 35.
  • one or more common electrodes may be provided for a plurality of projections supported by one projection support.
  • FIGS. 35 (a) to (d) are an examples in which a silicon wafer 51 is used as a first base material and a silicon wafer 27 is used as a second base material.
  • the projection 35 is formed in the same manner as the steps shown in FIGS. 12 (a) to 12 (d). Then, similarly to the steps shown in FIGS. 12 (e) and (f), a hole 51a is opened by anisotropic etching. However, in this example, the holes 51a are provided in such a size that the plurality of protrusions 35 are located on the opening surface. Therefore, the mask is opened to the size. The hole 51 a is formed until the silicon dioxide film 26 is reached. Note that a part of the silicon wafer 51 may be left as shown in FIG. 12 (f,).
  • FIGS. 13 (g) and (h) a conductive film 39 covering the protrusion 35 and a lead wire 40 are provided. Further, the support member 45 is fixed to a silicon substrate as in the example shown in FIG. 14 (i) -1 (1). Since this is the same as FIG. 14 (i)-(1) except for the size of the hole 51a, the description is omitted.
  • FIGS. 36 (a) to (d) is an example using silicon wafer 28 as the first base material and silicon wafer 27 as the second base material.
  • the projection 35 is formed in the same manner as in the steps shown in FIGS. 6 (a) and 6 (b). Then, similarly to the process shown in FIGS. 12 (e) and ( ⁇ ), a hole 28a is opened by anisotropic etching. However, in this example, a hole 28a is provided with a size such that the plurality of protrusions 35 are located on the opening surface. Therefore, the mask is opened to the size. The hole 28 a is formed until the silicon dioxide film 26 is reached. Note that a part of the silicon wafer 28 may be left as shown in FIG. 12 (f ').
  • a conductive film 39 covering the protrusion 35 and a lead wire 40 are provided. Further, as in the example shown in FIG. 17 (c)-(f), it is fixed to the silicon substrate which is the support member 45. Since this is the same as FIG. 17 (c)-(f) except for the size of the hole 28a, the description is omitted.
  • the arrangement of the projections 35 of the contact terminals is made to correspond to each chip to be measured. That is, a plurality of protrusions 35 are arranged for each block 201 assumed on the silicon wafer 28 in correspondence with a chip to be measured.
  • the number of chips to be measured two in this example is shown
  • the number of blocks 201 assumed on silicon wafer 28 are shown.
  • a plurality of protrusions 35 are arranged. In the example shown in FIG.
  • a row of blocks is assumed on a silicon wafer 28, and a plurality of protrusions are arranged for each block.
  • An example of use is a semiconductor inspection device. Further, the present invention can be applied to an inspection apparatus for a TFT type liquid crystal display.
  • FIG. 25 is an explanatory view showing a main part of an inspection apparatus which is an embodiment using the connection device of the present invention.
  • the inspection apparatus is a wafer processing device in the manufacture of semiconductor devices. It is configured as a rover.
  • This inspection apparatus is composed of a sample support system 120 that supports the test object, a probe system 100 that contacts the test object to transmit and receive electrical signals, and an operation of the sample support system 120. And a tester 170 that performs measurement.
  • the semiconductor device to be inspected is the semiconductor device 1.
  • a plurality of electrodes 1a are formed as external contact electrodes.
  • the sample support system 120 includes a substantially horizontally provided sample stage 122 on which the semiconductor wafer 1 is detachably mounted, and a vertically arranged elevating shaft supporting the sample stage 122. It comprises an elevating drive unit 125 that drives the elevating shaft 124 up and down, and an XY stage 127 that supports the elevating drive unit 125.
  • the X—Y stage 127 is fixed on the housing 126.
  • the elevating drive unit 125 includes, for example, a stepping motor.
  • the horizontal and vertical positioning of the sample stage 122 is performed by combining the movement of the X-Y stage 127 in the horizontal plane with the vertical movement of the elevation drive unit 125.
  • the sample stage 122 is provided with a rotating mechanism (not shown) so that the sample stage 122 can be rotated and displaced in a horizontal plane.
  • a probe system 100 is arranged above the sample stage 122. That is, the connection device 100a and the wiring board 70 are provided in a posture facing the sample table 122 in parallel.
  • a terminal array 20 having a plurality of contact terminals 42 is provided at a position opposing an object to be inspected.
  • the terminal array 20 the one shown in FIG. 1 described above is used. That is, the terminal array 20 is constituted by a silicon substrate 28, a group of contact terminals 42 supported by the silicon substrate 28, a buffer layer 46 and a support member 45 provided physically.
  • Each contact terminal 42 is connected via an extension wiring 72 provided on an extension wiring sheet # 1 of the connection device 100a, Through the lower electrode 73 of the wiring board 70 and the internal wiring 70 a, it is connected to the connection terminal 70 b provided on the wiring board 70.
  • the connection terminal 70b is constituted by a coaxial connector.
  • the tester 1 ⁇ 0 is connected via a cable 171, which is connected to the connection terminal 70b.
  • connection device used here is not limited to the one having the structure shown in FIG.
  • the structure shown in FIG. 2, FIG. 3, FIG. 4, etc. can be used.
  • the drive control system 150 is connected to the tester 170 via a cable 170.
  • the drive control system 150 sends a control signal to the actuator of each drive unit of the sample support system 120 to control its operation.
  • the drive control system 150 has a computer inside, and operates the sample support system 120 in accordance with the test operation progress information of the tester 170 transmitted via the cable 170. Control.
  • the drive control system 150 includes an operation unit 151, and receives input of various instructions related to drive control, for example, receives an instruction of a manual operation.
  • the semiconductor wafer 1 is fixed on the sample table 122, and the electrode 1a formed on the semiconductor wafer 1 is connected to the connection device 100a by using the XY stage 127 and the rotating mechanism. Adjust so that it can be positioned directly below the contact terminal 42 formed on the substrate.
  • the drive control system 150 operates the lifting / lowering drive unit 125 to raise the sample table 122 to a predetermined height, so that the tip of each of the plurality of contact terminals 42 is aimed at.
  • Each of the plurality of electrodes 1a of the semiconductor element is brought into contact with a predetermined pressure. Up to this point, the operation is performed by the drive control system 150 in accordance with the operation instruction from the operation unit 151.
  • these adjustments may be automatically performed.
  • the reference position on semiconductor wafer 1 The mark can be attached in advance and read by a reading device to set the origin of the coordinates.
  • the position of the electrode is known in the drive control system 150 by receiving design data in advance.
  • the operation is performed between the semiconductor element formed on the semiconductor wafer 1 and the tester 170 via the cable 171, the wiring board 70, the extension wiring sheet 71, and the contact terminals 42. Transmission and reception of power, an operation test signal, and the like are performed to determine whether or not the semiconductor device has operating characteristics.
  • the above-described series of test operations is performed for each of the plurality of semiconductor elements formed on the semiconductor wafer 1 to determine whether or not the operation characteristics are acceptable.
  • FIG. 26 is a perspective view showing an essential part of an inspection device in a burn-in process of a semiconductor device which is an embodiment using the connection device of the present invention
  • FIG. 27 is a semiconductor device inspection for burn-in. It is sectional drawing of an apparatus.
  • the present embodiment is configured as a wafer prober for applying a characteristic test of a semiconductor element by applying an electric and temperature stress to a semiconductor element in a wafer state at a high temperature.
  • the characteristic inspection can be performed while a plurality of wafers 1 are put in a thermostat (not shown) at a time.
  • this embodiment comprises a mother board 18 1 vertically attached to a support 190 placed in a thermostat (not shown), and That is, a plurality of the support members 190 are attached to the mother board 18 1 in parallel with the support members 190.
  • the mother board 18 1 communicates with the connector 18 3 provided for each individual probe system 180 and the connector 18 3 via the mother board 18 1.
  • the cable 182 is connected to a tester similar to the tester 170 shown in FIG.
  • the individual probe system 180 includes a connection device 100 a described above, a wiring board 70 to which the connection device is fixed, and a wafer support substrate 18 that supports the semiconductor wafer 1 as an object to be inspected. 5, a support board 184 on which the wafer support substrate 185 is mounted, and an individual probe system itself is mounted on the motherboard 181, and the connection device 100a is connected to the semiconductor wafer 1 And a holding substrate 186 for making contact with the substrate.
  • the wafer support substrate 185 has the structure shown in FIG. That is, the wafer support substrate 185 is formed of, for example, a metal plate, and has a concave portion 185 a for detachably housing the semiconductor wafer 1 and a knock pin 187 for positioning.
  • connection device 100a includes the terminal array body 20 provided with the contact terminals 42, the buffer layer 46 and the support member 45, and the extension wiring sheet 71. Be composed.
  • the connection device 100a is mounted on a wiring board 70, and wiring drawn from each contact terminal 42 is connected to a connector terminal 70c via a wiring 70d.
  • the connector terminal 70c is adapted to fit with the connector 183.
  • the connection device 100a shown in FIG. 1 is used, but the connection device 100a is not limited to this.
  • FIG. 2, FIG. 3, Ru can be used as shown in FIG. 4, etc. 0
  • connection device 100a a holding substrate 186 is mounted.
  • the holding substrate 186 is formed in a channel shape, and the wiring substrate 70 is accommodated in the channel 186a.
  • the circumference of The edge is provided with a hole 188 to be fitted with the knock pin 187.
  • the semiconductor substrate 1 is fixed to the concave portion 180a of the substrate support substrate 85, and the respective electrodes formed on the semiconductor substrate 1 are connected to the connection device 100a using the knock pins 187. Is positioned immediately below each of the contact terminals 42 formed at a predetermined position, and the tip of each of the plurality of contact terminals 42 is brought into contact with each of the target electrodes of the plurality of electrodes of the semiconductor element at a predetermined pressure.
  • cable 18 2, mother board 18 1, connector 18 3, wiring board ⁇ 0, drawer not shown in Fig. 26 provided on extension wiring sheet 7 1 Transfer of operating power and operation test signals between the semiconductor element formed on the semiconductor wafer 1 and the tester via the extension wiring 72 2 (see FIG.
  • the contact terminals of the connection device are brought into contact with the electrodes
  • the contact terminals and the electrodes are connected in a one-to-one correspondence in the above-described embodiment. That is, a plurality of contact terminals may be brought into contact with one electrode. Thereby, more reliable contact can be secured.
  • each of the lead-out wiring 40 and the lead-out extension wiring 72 have been treated as ordinary single-line wiring, but the present invention is not limited to this.
  • each of the lead-out wiring 40 and the lead-out extension wiring 72 may be configured as a microstrip line.
  • projections having uniform height and shape can be formed by anisotropic etching, and the contact terminals can be formed by the projections.
  • a hole is formed at the rear of the projection to increase the flexibility of the projection support portion, so that good contact with the inspection target can be achieved.
  • the contact terminals can be formed with high density and high precision by photolithographic technology. In addition, a large number of contact terminals can be formed collectively with high positional accuracy.
  • connection device is mounted on the wiring board via the support member 45, but without the support member.
  • the connection device may be fixed to the wiring board via a buffer layer.
  • the cantilever-shaped contact terminal is constituted by the rectangular projection support portion 43, but the planar shape of the projection support portion is not limited to a rectangle. For example, it may be trapezoidal. Also, it can be formed in a U-shape. Industrial applicability
  • the number of contact terminals of the connection device can be increased at multiple points and the density can be increased. Since the connection terminals can be formed at once, there is an effect that the assemblability of the connection device is greatly improved.
  • the length of the probe can be reduced, and it is possible to cope with high frequencies.
  • the variation in the height of the connection terminals is caused by the formation of a quadrangular pyramid surrounded by the (111) plane by anisotropic etching of the (100) plane of the silicon.
  • the silicon dioxide layer serves as a stop during anisotropic etching, so that anisotropic etching process control is easy. This has the effect of significantly improving the positional accuracy of the tip of the connection terminal.
  • it since it is formed by a thin film process, it can be manufactured with high processing accuracy and without the need for fine assembly work.
  • connection device in which the connection terminal is brought into contact with the facing electrode by the elastic force of the buffer layer or the cantilever structure, the dispersion of the distance between the contact terminal and the electrode is absorbed.
  • even pressure can be applied to each contact terminal with a small load. This ensures that all pins are in contact. Also, it is possible to prevent an excessive load from being applied to the inspection object.
  • the silicon and silicon dioxide layers have heat resistance and can be burned in (up to 200 ° C).
  • applying the LSI manufacturing process to the silicon single crystal substrate, which is a component of the contact device improves the high-frequency characteristics by forming a capacitor or resistor near the contact terminal and matching the impedance. be able to. Also, by forming an active element near the contact terminal and having an inspection function, the load on the tester for inspection can be reduced.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
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Abstract

A connecting device provided with contact terminals (42) which are brought into contact with an object to be inspected. The contact area is small and accordingly the contact point density is high. Projections for forming the terminals (42) are formed by anisotropically etching a silicon wafer (28) using a silicon dioxide film as a mask, and cantilevers having the projections of U-shape cross section are formed by anisotropically etching the silicon dioxide film around the projections. The terminals (42) and lead-out wiring (40) are formed using a conductive coating film. The wafer (28) and a wiring board (70) are united in one body with a buffer layer (46) in between. Thereafter, the lead-out wiring (72) is connected to electrodes (73) on the board (70).

Description

明 細 書  Specification
接続装置およびその製造方法 技術分野 CONNECTION DEVICE AND ITS MANUFACTURING METHOD
本発明は、 対接する電極に接触して電気信号を伝送する接触端子を有 する接続装置およびその製造方法、 並びに、 それを用いた試験装置に関 し、 特に、 半導体素子検査用の多数で高密度の電極に対して接触するこ とに好適な接続装置に関するものである。 背景技術  The present invention relates to a connection device having a contact terminal for transmitting an electric signal by contacting an opposing electrode, a method of manufacturing the same, and a test device using the same, and particularly to a large number of high-performance semiconductor device inspections. The present invention relates to a connection device suitable for contacting an electrode having a high density. Background art
L S I用の半導体素子は、 半導体ウェハ上に、 多数個が設けられ、 そ れぞれがチップに切り別けられる。 例えば、 第 2 8図 (A ) に示したゥ ェハ 1は、 その面上に多数の L S I用の半導体素子 (チップ) 2が設け られ、 切り離して、 それぞれが L S I として使用に供される。 第 2 8図 ( B ) は、 上記半導体素子 2の内の 1個を拡大して示した斜視図である c 該半導体素子 2の表面には、 その周囲に沿って多数の電極 3が列設され ている。 A large number of semiconductor elements for LSI are provided on a semiconductor wafer, and each is cut into chips. For example, in the wafer 1 shown in FIG. 28 (A), a large number of semiconductor elements (chips) 2 for LSI are provided on the surface thereof, and they are separated and used as LSIs. FIG. 28 (B) is an enlarged perspective view of one of the semiconductor elements 2 c . On the surface of the semiconductor element 2, a large number of electrodes 3 are arranged along the periphery thereof. It has been.
こう した半導体素子 2を工業的に多数生産し、 その電気的性能を検査 するには、 第 2 9図および第 3 0図に示すような構造の接続装置が用い られている。 この接続装置は、 プローブカー ド 4 と、 これから斜めに出 たタングステン針からなるプローブ 5 とで構成される。 この接続装置に よる検査では、 プローブ 5のたわみを利用した接触圧により前記電極 3 をこすって接触をとり、 その電気特性を検査する方法が用いられている。 また、 半導体素子の高密度化が進み、 第 3 1図に示したように、 はんだ 接続に供するはんだバンプ 6をその電極上に有するチップ状の半導体素 子 2が開発されている。 このような半導体素子 2の接続方法として、 第 3 2図に示すように、 半導体素子 2を、 配線基板 7の表面の電極 8に対 向させ、 上記はんだバンプ 6を介して接続する方法がある。 この方法は、 高密度実装、 歩留まりの高い一括接続に適することから、 その応用が拡 大している。 In order to industrially produce a large number of such semiconductor elements 2 and inspect their electrical performance, a connection device having a structure as shown in FIGS. 29 and 30 is used. This connection device is composed of a probe card 4 and a probe 5 made of a tungsten needle which is inclined from the probe card 4. In the inspection using this connection device, a method is used in which the electrode 3 is rubbed by a contact pressure utilizing the deflection of the probe 5 to make contact, and the electrical characteristics thereof are inspected. In addition, as the density of semiconductor elements has increased, as shown in FIG. 31, a chip-shaped semiconductor element having solder bumps 6 for solder connection on its electrodes, as shown in FIG. Child 2 is being developed. As a method for connecting the semiconductor element 2, as shown in FIG. 32, there is a method in which the semiconductor element 2 faces the electrode 8 on the surface of the wiring board 7 and is connected via the solder bump 6. . This method is suitable for high-density mounting and high-yield batch connection, and its application is expanding.
上記のような半導体素子の高密度化、 狭ピッチ化がさらに進み、 高速 信号による動作試験が必要になつた場合の半導体素子の特性検査を可能 とする検査方法および検査装置として、 特開昭 6 4— 7 1 1 4 1号公報 に記載された技術がある。 この技術は、 互いに反対方向に突出するよう にパネで付勢された 2本の可動ピンを、 チューブに出没自在に嵌め込ん だ形状のスプリ ングプローブを用いるものである。 すなわち、 このスプ リ ングプローブの一端側の可動ピンを、 検査対象物の電極に当接させ、 他端側の可動ピンを、 測定回路側の基板に設けられた端子に当接するこ とにより、 検査を行う。  As an inspection method and an inspection apparatus capable of performing a characteristic inspection of a semiconductor element when an operation test using a high-speed signal becomes necessary when the density and pitch of the semiconductor element are further advanced as described above, There is a technique described in Japanese Patent Publication No. 4-7141. This technology uses a spring probe that has two movable pins urged by a panel so as to protrude in opposite directions to each other so that they can be inserted into and retracted from a tube. In other words, the movable pin at one end of the spring probe is brought into contact with the electrode of the inspection object, and the movable pin at the other end is brought into contact with the terminal provided on the substrate on the measurement circuit side. Perform an inspection.
スプリ ングプローブ以外の極細プローブの例として、 1 9 8 8年度の I T C (インターナショナル テス ト コンファ レンス) の講演論文集 の 6 0 1頁から 6 0 7頁に記載された技術がある。 第 3 3図は、 その構 造概略図、 第 3 4図は同じく要部拡大斜視図である。 ここで用いられる 導体検査用のプローブは、 フレキシブルな誘電体膜 1. 0の上面にリ ソグ ラフ技術で配線 1 1を形成し、 被検査対象の半導体の電極に対応する位 置に設けた誘電体膜 1 0のビア 1 2に、 めっきにより、 半円形のバンプ 1 3を形成したものを接触端子として用いるものである。 この技術は、 誘電体膜 1 0の表面に形成した配線 1 1および配線基板 1 4を通じて検 査回路 (図示せず) に接続されているバンプ 1 3を、 板ばね 1 5によつ て、 検査対象の半導体素子の電極に押し当てて、 信号の授受を行って検 査する方法である。 また、 特開平 5— 2 1 1 2 1 8号公報 (対応米国出願 1 9 9 1年 7 5 0 8 4 2号) に記載されるものがある。 これは、 金属板、 例えば、 ステ ンレス板に、 テフロン等の非導電皮膜物で部分的に覆い、 覆われていな い金属部分に、 先端が尖った形状である突起を有する窪みツールを用い て、 その突起を押しつけることにより、 突起の形状に相当する形状の窪 みを形成し、 これに、 金属を鍍金して金属層を形成し、 さらに、 それに、 誘電体基体が積層される。 そして、 金属層を含む誘電体基体を金属板か ら剥がして、 構成される。 すなわち、 このものは、 基体上に、 尖った接 触部分を有するコネクタパッ ドが複数個配置されたものである。 そして、 この尖った接触部分を集積回路パッ ドに押しつけて、 検査を行う。 As an example of an ultra-fine probe other than a spring probe, there is a technology described on pages 601 to 607 of the collection of lecture papers of ITC (International Test Conference) in 1998. FIG. 33 is a schematic view of the structure, and FIG. 34 is an enlarged perspective view of the main part. The conductor inspection probe used here is formed by forming wiring 11 on the upper surface of a flexible dielectric film 1.0 using lithography technology, and providing the wiring at a position corresponding to the electrode of the semiconductor to be inspected. A semicircular bump 13 formed on the via 12 of the body film 10 by plating is used as a contact terminal. According to this technique, a bump 13 connected to an inspection circuit (not shown) through a wiring 11 formed on the surface of a dielectric film 10 and a wiring board 14 is formed by a leaf spring 15 by a leaf spring 15. In this method, signals are transmitted and received by pressing against the electrodes of the semiconductor element to be inspected for inspection. Further, there is one described in Japanese Patent Application Laid-Open No. 5-212118 (corresponding U.S. application Ser. No. 1991, 750842). This is done by using a depression tool that has a metal plate, for example, a stainless steel plate, partially covered with a non-conductive film such as Teflon, and a metal part that is not covered with a projection with a sharp pointed tip. By pressing the protrusion, a depression having a shape corresponding to the shape of the protrusion is formed, and a metal layer is formed by plating a metal thereon, and further, a dielectric substrate is laminated thereon. Then, the dielectric substrate including the metal layer is peeled off from the metal plate. That is, this is one in which a plurality of connector pads having sharp contact portions are arranged on a base. Then, this sharp contact portion is pressed against the integrated circuit pad to perform an inspection.
ところで、 近年、 半導体素子の高密度化に伴って、 検査用のプローブ の高密度多ピン化が進み、 半導体素子の電極と検査回路間で電気信号を 伝送するための簡便な接続装置の開発が望まれている。 そこで、 このよ うな観点から、 上記従来の技術について検討する。  By the way, in recent years, with the increase in the density of semiconductor elements, the number of pins for inspection probes has increased, and the development of simple connection devices for transmitting electric signals between the electrodes of the semiconductor element and the inspection circuit has been developed. Is desired. Therefore, from such a viewpoint, the above-described conventional technology will be examined.
第 2 9図、 第 3 0図に示した従来のプローブカー ドの検査方法では、 プローブ 5の形状から、 そこでの集中インダクタンスが大きく、 高速信 号での検査に限界がある。 すなわち、 プローブカー ド上での信号線の特 性インピーダンスを R、 プローブの集中インダクタンスを Lとすると、 時定数は L Z Rとなる。 従って、 R = 5 0 o h m、 L = 5 0 n Hの場合 で、 時定数は 1 n s となる。 この程度の高速信号を扱う と、 波形がなま り、 正確な検査ができない。 従って、 通常は、 直流的な特性検査に限ら れている。 また、 上記のプロ一ビング方式では、 プローブの空間的な配 置に限界があり、 半導体素子の電極の高密度化、 総数の増大に対応でき なくなつている。  In the conventional probe card inspection method shown in FIGS. 29 and 30, due to the shape of the probe 5, the concentrated inductance there is large, and there is a limit to the inspection with high-speed signals. That is, assuming that the characteristic impedance of the signal line on the probe card is R and the concentrated inductance of the probe is L, the time constant is LZR. Therefore, in the case of R = 50 o hm and L = 50 n H, the time constant is 1 ns. When handling such a high-speed signal, the waveform becomes dull and accurate inspection cannot be performed. Therefore, it is usually limited to DC characteristics inspection. Further, in the above-described probing method, there is a limit in the spatial arrangement of the probes, and it is impossible to cope with an increase in the density of the electrodes of the semiconductor element and an increase in the total number.
一方、 2個の可動ピンからなるスプリ ングプローブを用いる方法は、 プローブの長さが比較的短いため高速電気特性を検査することが可能で ある。 但し、 自己インダクタンスは、 裸のプローブ長にほぼ比例する。 したがって、 直径 0 . 2 m m、 長さ 1 0 m mのプローブの場合、 そのィ ンダクタンスは、 9 n H程度となる。 高速電気信号を乱すクロス トーク ノィズおよびグラン ドレベルの変動 (グラン ドのリタ一ン電流) は、 上 記自己ィンダクタンスの関数となり、 裸のプローブ長にほぼ比例する。 このため、 数百 M H z以上の高速信号を用いる場合は、 1 0 m m以下の 短いプローブが必要である。 しかし、 このようなスプリ ングプローブを 製作することは、 困難であり、 現実的ではない。 On the other hand, the method using a spring probe consisting of two movable pins can inspect high-speed electrical characteristics because the length of the probe is relatively short. is there. However, self-inductance is almost proportional to bare probe length. Therefore, for a probe with a diameter of 0.2 mm and a length of 10 mm, its inductance is about 9 nH. Crosstalk noise and ground level fluctuations (ground return current) that disturb high-speed electrical signals are functions of the self-inductance described above, and are almost proportional to the bare probe length. Therefore, when using a high-speed signal of several hundred MHz or more, a short probe of 10 mm or less is required. However, producing such a spring probe is difficult and impractical.
また、 第 3 1図、 第 3 2図に示した銅配線の一部にめっきにより形成 したバンプをプローブとする方法は、 バンプの先端部が平坦あるいは半 円形となるため、 アルミニゥ厶電極やはんだ電極などの材料表面に酸化 物を生成する被接触材料に対しては、 接触抵抗が不安定になり、 接触時 の荷重を数百 m N以上にする必要がある。 しかし、 接触時の荷重を大き く しすぎることには問題がある。 すなわち、 半導体素子の高集積化が進 み、 高密度多ピン、 狭ピッチの電極が半導体素子表面に形成されている。 そのため、 電極直下に多数の能動素子が形成されているため、 半導体素 子検査時のプローブの電極への接触圧が大き過ぎると、 電極およびその 直下の能動素子に損傷を与えるおそれがある。  In addition, the method of using a bump formed by plating a part of the copper wiring as a probe shown in FIGS. 31 and 32 as a probe has a flat or semi-circular shape at the tip of the bump, so that the aluminum electrode or solder The contact resistance becomes unstable for contacted materials that generate oxides on the surfaces of materials such as electrodes, and the load at the time of contact must be several hundred mN or more. However, there is a problem with making the contact load too large. In other words, high integration of semiconductor devices is progressing, and high-density multi-pin, narrow-pitch electrodes are formed on the surface of the semiconductor device. Therefore, since a large number of active elements are formed immediately below the electrodes, if the contact pressure of the probe with the electrodes during semiconductor element inspection is too high, the electrodes and the active elements immediately below the electrodes may be damaged.
また、 特開平 5— 2 1 1 2 1 8号公報に開示される方法は、 成形型と する金属板に、 窪みツールを押しつけることにより、 機械的に穴をあけ るため、 穴あけ精度が悪いという問題がある。 すなわち、 機械的な操作 で行われるため、 位置決め精度に限界がある。 また、 穴のあき方にもば らっきを生じる。 この結果、 突起の位置、 形状および大きさにばらつき が生じるという問題がある。  In addition, the method disclosed in Japanese Patent Application Laid-Open No. H5-22-1118 discloses that the hole is mechanically formed by pressing a dent tool against a metal plate as a molding die, so that the hole forming accuracy is poor. There's a problem. In other words, the positioning is limited by the mechanical operation. In addition, variations occur in the way the holes are drilled. As a result, there is a problem that the positions, shapes and sizes of the projections vary.
さらに、 特開平 5— 2 1 1 2 1 8号公報に開示される方法は、 各突起 の接触圧を適度な値とすることが配慮されていない。 特に、 特開平 5— 2 1 1 2 1 8号公報に開示される方法は、 突起の形状等にばらつきが生 じることが予想されるため、 接触が不十分な突起を完全に接触させるに は、 全体として大きな接触圧が必要となり、 部分的には、 過大な接触圧 となってしまう という問題が^)る。 Furthermore, in the method disclosed in Japanese Patent Application Laid-Open No. 5-212118, no consideration is given to making the contact pressure of each projection an appropriate value. In particular, JP The method disclosed in Japanese Patent Publication No. 2111218 is expected to cause unevenness in the shape of the projections, etc. Pressure is required, and in part, the problem is that the contact pressure becomes excessively large ^).
本発明の第 1の目的は、 被検査対象について、 多点かつ高密度で接触 できる接触端子を有する接続装置およびその製造方法を提供することに あ o  A first object of the present invention is to provide a connection device having a contact terminal capable of contacting an object to be inspected at multiple points and at a high density, and a method of manufacturing the same.
本発明の第 2の目的は、 プローブの長さを短くできて、 高周波数まで 対応できる電気特性を有する接続装置およびその製造方法を提供するこ とにある。  A second object of the present invention is to provide a connection device having electrical characteristics that can reduce the length of a probe and can handle high frequencies, and a method of manufacturing the same.
本発明の第 3の目的は、 加工精度が高く、 しかも、 微細な組立て作業 を要せずに製造できる接続装置およびその製造方法を提供することにあ る。  A third object of the present invention is to provide a connection device which has high processing accuracy and can be manufactured without requiring a fine assembling operation, and a method of manufacturing the same.
本発明の第 4の目的は、 小さな接触圧で、 接触特性が安定な接触端子 を実現させる接続装置およびその製造方法を提供することにある。  A fourth object of the present invention is to provide a connection device which realizes a contact terminal having stable contact characteristics with a small contact pressure, and a method of manufacturing the same.
また、 本発明の第 5の目的は、 高密度かつ多ピンで、 電気特性の優れ た接続装置を有する検査装置を提供することにある。 発明の開示  Further, a fifth object of the present invention is to provide an inspection device having a connection device having high density, many pins, and excellent electrical characteristics. Disclosure of the invention
上記第 1ないし第 3の目的を達成するため、 本発明の第 1の態様によ れば、  In order to achieve the first to third objects, according to the first aspect of the present invention,
検査対象と電気的に接触して、 電気信号を授受するための接続装置で あって、 検査対象と電気的に接触するための複数個の接触端子と、 各 接触端子から引き出される引き出し用配線と、 接触端子および引出し用 配線を支持する第 1の基材とを備え、  A connection device for making electrical contact with an object to be inspected and transmitting and receiving an electric signal, comprising a plurality of contact terminals for making electrical contact with the object to be inspected, and a lead-out wire drawn from each contact terminal. And a first base material that supports the contact terminals and the lead-out wiring,
前記接触端子は、 結晶性の第 2の基材を異方性ェッチングして得られ る突起と、 この突起を支持する絶縁層とを備え、 The contact terminal is obtained by anisotropically etching a crystalline second base material. Projections, and an insulating layer supporting the projections,
前記突起は、 少なく ともその先端側に、 導電性部分を有し、 この導線 性部分は、 対応する前記引出し用配線と接続されることを特徴とする接 続装置が提供される。 ,  The connection device is provided, wherein the projection has a conductive portion at least on a tip side thereof, and the conductive portion is connected to the corresponding lead-out wiring. ,
前記突起は、 稜を有し、 先端が尖った形状となるように、 少なく とも 先端部において、 錐または錐台形状を有する形状に形成される。 例えば、 角錐、 角錐台、 より具体的には、 四角錐、 四角錐台が挙げられる。  The projection has a ridge, and is formed in a shape having a cone or a truncated cone at least at a tip end so that the tip has a pointed shape. For example, pyramids, truncated pyramids, and more specifically, square pyramids and truncated square pyramids.
また、 本発明の第 2の態様によれば、 検査対象と電気的に接触して、 電気信号を授受するための接続装置の製造方法であって、 基材の予め定 めた複数箇所で、 該基材を異方性エッチングして、 先端が尖った形状の 突起をそれぞれ形成する工程と、 該各接触端子用の突起ごとに、 その先 端側に導電性皮膜および引き出し用配線を形成する工程とを有すること を特徴とする接続装置の製造方法が提供される。  Further, according to a second aspect of the present invention, there is provided a method of manufacturing a connection device for making electrical contact with an object to be inspected and transmitting and receiving an electrical signal, wherein the method includes the steps of: Anisotropically etching the base material to form projections each having a pointed tip, and forming a conductive film and a lead-out wiring on the tip end side for each of the contact terminal projections. And a method for manufacturing the connection device.
上記本発明の第 4の目的を達成するため、 本発明の第 3の態様によれ ば、 前記第 1の態様にさらに、 前記接触端子が、 片持ち梁からなる接触 端子部に形成される構成の接続装置が提供される。 穴の縁で一端が支持 される片持ち梁状に形成された絶縁膜、 穴の縁で両端が支持されるブリ ッジ状に形成された絶縁膜、 穴の縁全周で支持される絶縁膜を、 可撓性 の大きさ、 剛性の大きさ等に合わせて、 適宜設けることができる。  In order to achieve the fourth object of the present invention, according to a third aspect of the present invention, in the first aspect, the contact terminal is further formed on a contact terminal portion made of a cantilever. Is provided. A cantilever-shaped insulating film with one end supported at the edge of the hole, a bridge-shaped insulating film with both ends supported at the edge of the hole, and an insulating film supported all around the hole edge A film can be provided as appropriate according to the size of flexibility, the size of rigidity, and the like.
また、 本発明の第 4の態様によれば、 前記第 1の態様にさらに、 前記 接触端子が、 絶縁薄膜の表面に形成される構成の接続装置が提供される。 さらには、 本発明の第 5の態様によれば、 前記第 1の態様にさらに、 緩 衝層と、 基板とをさらに有し、 前記接触端子を構成した基材は、 緩衝層 を挟んで基板に固定される構成の接続装置が提供される。  Further, according to a fourth aspect of the present invention, there is provided a connection device having a configuration in which the contact terminal is formed on a surface of an insulating thin film, in addition to the first aspect. Further, according to a fifth aspect of the present invention, the substrate according to the first aspect, further comprising a buffer layer and a substrate, wherein the base material constituting the contact terminal is provided with a buffer layer interposed therebetween. A connection device configured to be fixed to the connection device is provided.
また、 本発明の第 6の態様によれば、 前記第 2の態様にさらに、 前記 接触端子を形成する工程は、 緩衝層を介して基板に固定する工程をさら に含むことを特徴とする接続装置の製造方法が提供される。 According to a sixth aspect of the present invention, in the second aspect, the step of forming the contact terminal further includes a step of fixing the contact terminal to a substrate via a buffer layer. A method for manufacturing a connection device is provided.
また、 本発明の第 5の目的を達成するため、 本発明の第 7の態様によ れば、 多数の電極が配置された検査対象の各電極に接触して、 電気信号 を授受して検査を行う検査装置において、 検査対象物を変位自在に支持 する試料支持系と、 第 3の態様ないし第 5の態様の接続装置を有し、 該 接続装置の接触端子のある面が、 試料支持系の検査対象物と対向するよ うに配置されるプローブ系と、 前記試料支持系の検査対象の変位駆動を 制御する駆動制御系と、 前記プローブ系と接続されて検査を行うテスタ とを有することを特徴とする検査装置が提供される。  According to a seventh aspect of the present invention, to achieve the fifth object of the present invention, each of the electrodes to be inspected on which a large number of electrodes are arranged is contacted to transmit and receive an electric signal to perform an inspection. A sample support system for supporting an object to be inspected in a displaceable manner, and a connection device according to any one of the third to fifth aspects, wherein a surface of the connection device having a contact terminal is provided with a sample support system. A probe system arranged to face the test object, a drive control system for controlling the displacement drive of the test object on the sample support system, and a tester connected to the probe system for testing. A featured inspection device is provided.
また、 本発明の第 8の態様によれば、 多数の電極が配置された検査対 象の各電極に接触して、 電気信号を授受して検査を行う検査装置におい て、 検査対象物を支持する試料支持部、 および、 第 3の態様ないし第 5 の態様の接続装置を有し、 該接続装置は、 その接触端子のある面が、 試 料支持部の検査対象物と対向するように配置される、 少なく とも 1の個 別プローブ系と、 前記個別プローブ系と接続されて検査を行うテスタと を有し、 前記個別プローブ系は、 マザ一ボー ドに装着され、 該マザーボ ー ドを介して、 テスタと接続されることを特徴とする検査装置が提供さ れる。  Further, according to the eighth aspect of the present invention, in an inspection apparatus for performing an inspection by sending and receiving an electric signal by contacting each electrode to be inspected on which a large number of electrodes are arranged, the inspection object is supported. And a connection device according to any one of the third to fifth aspects, wherein the connection device is arranged such that a surface having the contact terminal faces an inspection object of the sample support portion. At least one individual probe system, and a tester connected to the individual probe system to perform an inspection, wherein the individual probe system is mounted on a motherboard and connected via the motherboard. Thus, an inspection apparatus characterized by being connected to a tester is provided.
上記の構成によれば、 接触端子を、 基材の異方性エッチングにより形 成される突起と、 この突起に導電性材料で被覆することにより構成する ことができる。 異方性エッチングによれば、 例えば、 角錐形状ないし角 錐台形状の先端が尖った形状が得られる。 しかも、 エッチング条件を管 理することにより、 微細で、 高密度の接触端子を、 多数個、 高精度に配 置することができる。 従って、 測定対象物の高密度化に対応することが できる。  According to the above configuration, the contact terminal can be configured by forming a projection formed by anisotropic etching of the base material and coating the projection with a conductive material. According to the anisotropic etching, for example, a pyramid shape or a truncated pyramid shape having a sharp tip is obtained. In addition, by controlling the etching conditions, a large number of fine and high-density contact terminals can be arranged with high accuracy. Therefore, it is possible to cope with an increase in the density of an object to be measured.
また、 異方性エッチングによる突起を利用することにより、 接触端子 の長さを、 接触端子をエッチング工程で形成しうる程度に短く ( 0 . 0 0 1〜0 . 5 m m ) 形成することができる。 これにより、 高速信号の乱 れを小さくすることができる。 In addition, by using protrusions by anisotropic etching, contact terminals Can be formed as short as the contact terminals can be formed in the etching process (0.001 to 0.5 mm). Thereby, disturbance of the high-speed signal can be reduced.
また、 高密度多ピン、 狭ピッチの半導体素子の表面電極を全ピン接触 することにより、 半導体素子全面で電源供給可能な電圧変動の少ない安 定した動作状態での検査が実現できる。 その結果、 高速 A C検査が可能 となり、 半導体素子の高速動作の確認と出力波形の詳細な観察が可能と なり、 半導体素子の特性マージンを把握することができることにより、 半導体素子の設計への効率の良いフィ一ドバックが可能となる。  In addition, by contacting all the surface electrodes of a high-density multi-pin, narrow-pitch semiconductor device with the surface electrodes, a test can be performed in a stable operating state with little voltage fluctuation that can supply power over the entire semiconductor device. As a result, high-speed AC inspection is possible, high-speed operation confirmation of semiconductor devices and detailed observation of output waveforms are possible, and the characteristic margin of semiconductor devices can be grasped, thereby improving the efficiency of semiconductor device design. Good feedback is possible.
また、 前記絶縁膜は、 突起を支持する部分の突起後方部分に穴が設け られている。 そのため、 絶縁膜は、 突起後方部分が穴の開口部に位置し て、 第 2の基材により支持されないため、 たわみやすくなる。 そのため、 接続装置に複数個の突起が設けられる場合に、 それぞれの突起において、 絶縁膜がたわんで、 電極と突起の間隔のばらつきを吸収することができ る。 穴の縁で一端が支持される片持ち梁状に形成された絶縁膜、 穴の縁 で両端が支持されるプリ ッジ状に形成された絶縁膜、 穴の縁全周で支持 される絶縁膜を、 片持ち梁、 あるいは、 絶縁膜の表面に形成し、 必要に 応じて、 緩衝層を設けることにより、 電極と接触端子の間隔のばらつき を吸収することができる。 すなわち、 片持ち梁あるいは、 絶縁性膜の材 料、 膜厚、 サイズ、 および、 緩衝層の弾性率を適宜に設定することによ り、 接触端子は、 プロ一ビング時に電極およびその直下の能動素子に損 傷を与えない適度な値に、 容易に設定することが可能である。 また、 接 触対象である電極に多少の段差があっても、 片持ち梁あるいは、 絶縁性 膜のたわみ、 および、 緩衝層の弾性により、 所定の力にて電極に接触す ることができる。  In the insulating film, a hole is provided in a portion behind the protrusion at a portion supporting the protrusion. Therefore, the insulating film is easily bent since the rear portion of the protrusion is located at the opening of the hole and is not supported by the second base material. Therefore, when a plurality of projections are provided in the connection device, the insulating film is bent at each projection, and variations in the distance between the electrode and the projection can be absorbed. A cantilever-shaped insulating film with one end supported at the edge of the hole, a prism-shaped insulating film with both ends supported at the edge of the hole, and an insulating film supported all around the hole edge By forming a film on the surface of a cantilever or an insulating film and providing a buffer layer as necessary, variations in the distance between the electrode and the contact terminal can be absorbed. In other words, by appropriately setting the material, thickness, and size of the cantilever or the insulating film, and the elastic modulus of the buffer layer, the contact terminal can be used to probe the electrode and the active electrode immediately below it during probing. It can be easily set to an appropriate value that does not damage the element. Further, even if the electrode to be contacted has some steps, the cantilever or the bending of the insulating film and the elasticity of the buffer layer can make contact with the electrode with a predetermined force.
電極パターンの変更に対しては、 エッチングパターンを取り換えるの みで電極パターンの変更に容易に対応することができる。 For changing the electrode pattern, we need to change the etching pattern. It is possible to easily cope with the change of the electrode pattern only by the above.
基材として、 シリコンゥヱハを用いた場合は、 必要に応じて、 一般の 半導体素子の製造工程を応用して、 上記接触端子を形成したシリコンの 表面に、 コンデンサ、 抵抗あるいは集積回路を形成して、 電気特性を改 善したり、 検査回路を形成することができ、 信号の乱れの少ない高速の , A C検査が可能になる。  If silicon is used as the base material, if necessary, a capacitor, resistor or integrated circuit is formed on the surface of the silicon on which the contact terminals are formed by applying the general semiconductor device manufacturing process. The electrical characteristics can be improved and an inspection circuit can be formed, and high-speed AC inspection with less signal disturbance can be performed.
基材として、 シリ コンウェハを用いることにより、 検査対象がシリ コ ン系の半導体素子の場合は、 線膨張率の差による変位が少ない接続装置 が実現でき、 例えば、 ウェハ状態でも容易に高温で検査可能である。 従って、 半導体素子の電極を被接触対象とした高密度、 超多ピンで高 速信号による動作試験が可能で、 高温でも接触端子の先端位置精度が良 好で電極パターンの変更にも容易に対応できる接触装置が製作可能であ る。  By using a silicon wafer as the base material, if the inspection target is a silicon-based semiconductor device, a connection device with less displacement due to a difference in linear expansion coefficient can be realized.For example, even a wafer state can be easily inspected at a high temperature. It is possible. Therefore, high-speed, high-speed operation tests can be performed with high-density, ultra-high pin counts for semiconductor device electrodes, and even at high temperatures, the contact terminal tip position accuracy is good and the electrode pattern can be easily changed. A possible contact device can be manufactured.
なお、 本発明の接続装置は、 接触対象が半導体素子に限定されること なく、 対向する電極の接触装置としても対応でき、 狭ピッチ、 多ピンで あっても製作可能である。  The connection device of the present invention is not limited to a semiconductor element, but can be used as a contact device for opposing electrodes, and can be manufactured even with a narrow pitch and a large number of pins.
図面の簡単な説明  BRIEF DESCRIPTION OF THE FIGURES
第 1図は、 本発明の接続装置の第 1実施例の構成の要部を示す端面図 であり、 第 2図は、 本発明の接続装置の第 2実施例の構成の要部を示す 端面図であり、 第 3図は、 本発明の接続装置の第 3実施例の構成の要部 を示す端面図であり、 第 4図は、 本発明の接続装置の第 4実施例の構成 の要部を示す端面図であり、  FIG. 1 is an end view showing a main part of a configuration of a first embodiment of a connection device of the present invention, and FIG. 2 is an end surface showing a main portion of a configuration of a second embodiment of the connection device of the present invention. FIG. 3 is an end view showing a main part of the configuration of a connection device according to a third embodiment of the present invention, and FIG. 4 is a main view showing the configuration of a connection device according to a fourth embodiment of the present invention. It is an end view showing a part,
第 5図 ( a ) — ( f ) は、 上記第 1実施例の接続装置を形成する製造 プロセスの一実施例の工程の前段を示す端面図であり、  FIG. 5 (a)-(f) is an end view showing the first stage of the steps of one embodiment of the manufacturing process for forming the connection device of the first embodiment,
第 6図 ( g ) - ( i " ) は、 上記第 5図に示す製造プロセスの工程の 後段を示し、 第 6図 ( g ) は端面図、 第 6図 ( g ' ) は接触端子を示す平 面図、 第 6図 ( h ) 、 ( i ) は端面図、 第 6図 ( i ' ) は接触端子を示す 平面図、 第 6図 ( i ' ' ) は斜視図であり、 Fig. 6 (g)-(i ") shows the latter stage of the manufacturing process shown in Fig. 5, Fig. 6 (g) shows an end view, and Fig. 6 (g ') shows a contact terminal. flat 6 (h) and (i) are end views, FIG. 6 (i ') is a plan view showing a contact terminal, and FIG. 6 (i''') is a perspective view.
第 7図は、 本発明の接続装置の第 1実施例の構成の詳細な構造を示す 端面図であり、  FIG. 7 is an end view showing a detailed structure of the configuration of the first embodiment of the connection device of the present invention,
第 8図 ( a ) — ( c ) および ( d ) は、 本発明の接続装置を形成する 製造プロセスの他の実施例の工程の前段を示す端面図、 第 8図( c ' ) は 接触端子の平面図であり、  8 (a)-(c) and (d) are end views showing the first stage of the steps of another embodiment of the manufacturing process for forming the connection device of the present invention, and FIG. 8 (c ') is the contact terminal. FIG.
第 9図 ( e ) および ( e ' ' )は、 本発明の接続装置を形成する製造プロ セスの他の実施例の工程の後段を示す端面図、 第 9図 ( e ' )は接触端子 の平面図であり、  9 (e) and (e ′ ′) are end views showing the latter stage of the process of another embodiment of the manufacturing process for forming the connection device of the present invention, and FIG. 9 (e ′) is the contact terminal. FIG.
第 1 0図 ( a ) — ( d ) は、 本発明に関わる接続装置を形成する製造 プロセスの他の実施例の工程を示す端面図、 第 1 0図 ( d ' )は接続装置 の要部斜視図であり、  FIGS. 10 (a) to (d) are end views showing steps of another embodiment of a manufacturing process for forming a connection device according to the present invention, and FIG. 10 (d ') is a main part of the connection device. It is a perspective view,
第 1 1図 ( a ) — ( d ) は、 本発明に関わる接続装置を形成する製造 プロセスの他の実施例を示す端面図、 第 1 1図 ( d ' )は接続装置の要部 斜視図であり、  Fig. 11 (a)-(d) is an end view showing another embodiment of a manufacturing process for forming a connection device according to the present invention, and Fig. 11 (d ') is a perspective view of a main part of the connection device. And
第 1 2図 ( a ) — ( f ' ) は、 本発明に関わる接続装置を形成する製造 プロセスの他の実施例の工程の前段を示す端面図であり、  Fig. 12 (a)-(f ') is an end view showing the first stage of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention,
第 1 3図 ( g ) および ( h ) は、 本発明に関わる接続装置を形成する 製造プロセスの他の実施例の工程の中断を示す端面図、 第 1 3図 ( h' ) および ( h '' ) は、 この方法により形成される接触端子の構造の例を示 す平面図であり、  FIGS. 13 (g) and (h) are end views showing the interruption of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention, and FIGS. 13 (h ') and (h'). ') Is a plan view showing an example of the structure of a contact terminal formed by this method.
第 1 4図 ( i ) — ( I ) は、 本発明に関わる接続装置を形成する製造 プロセスの他の実施例の工程の後段を示す端面図であり、  FIG. 14 (i) — (I) is an end view showing the latter stage of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention,
第 1 5図 ( a ) — ( d ) は、 本発明に関わる接続装置を形成する製造 プロセスの他の実施例を示す端面図であり、 第 1 6図 ( a ) および ( b ) は、 本発明に関わる接続装置を形成する 製造プロセスの他の実施例の工程の前段を示す端面図、 第 1 6図 ( b ' ) および ( b '' ) は、 この方法により形成される接触端子の平面図であり、 第 1 7図 ( c ) 一 ( f ) は、 本発明に関わる接続装置を形成する製造プ 口セスの他の実施例の工程の後段を示す端面図であり、 FIGS. 15 (a) to (d) are end views showing another embodiment of the manufacturing process for forming the connection device according to the present invention. FIGS. 16 (a) and (b) are end views showing the first stage of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention, and FIGS. 16 (b ′) and (b ′). ') Is a plan view of a contact terminal formed by this method, and Figs. 17 (c) and 1 (f) show another embodiment of a manufacturing process for forming a connection device according to the present invention. It is an end view showing the latter stage of the process,
第 1 8図 ( a ) 、 (b ) および ( c ) は、 本発明に関わる接続装置を形 成する製造プロセスの他の実施例の工程を示す端面図、 第 1 8図 ( b ' ) は、 第 1 8図(b ) を下方から見た平面図であり、  FIGS. 18 (a), (b) and (c) are end views showing the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention, and FIG. 18 (b ') is FIG. 18 (b) is a plan view of FIG.
第 1 9図 ( a ) — ( f ) は、 本発明に関わる接続装置を形成する製造 プロセスの他の実施例の工程の前段を示す端面図であり、  FIG. 19 (a)-(f) is an end view showing the first stage of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention,
第 2 0図 ( g ) - ( h ) は、 本発明に関わる接続装置を形成する製造 プロセスの他の実施例の工程の後段を示す端面図であり、  FIGS. 20 (g)-(h) are end views showing the latter stage of the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention;
第 2 1図 ( a ) — ( d ) は、 本発明に関わる接続装置を形成する製造 プロセスの他の実施例の工程を示す端面図であり、  FIGS. 21 (a) to (d) are end views showing steps of another embodiment of the manufacturing process for forming the connection device according to the present invention.
第 2 2図 ( a ) — ( d ) は、 本発明に関わる接続装置を形成する製造 プロセスの他の実施例の工程を示す端面図、 第 2 2図 ( d ' ) は、 この方 法によって形成される接触端子の平面図であり、  FIGS. 22 (a) to (d) are end views showing the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention, and FIG. 22 (d ') is a pattern formed by this method. FIG.
第 2 3図 ( a ) 、 (b ) および ( c ) は、 本発明に関わる接続装置を形 成する製造プロセスの他の実施例の工程を示す端面図、第 2 3図 ( b ' ) は、 この方法によって形成される接触端子の平面図であり、  FIGS. 23 (a), (b) and (c) are end views showing the steps of another embodiment of the manufacturing process for forming the connection device according to the present invention, and FIGS. A plan view of a contact terminal formed by this method,
第 2 4図 ( a ) - ( b ) は、 本発明に関わる接続装置の接触端子形成 用の二酸化シリコンのマスクを形成する実施例を示す平面図であり、 第 2 5図は、 本発明の接続装置を搭載した半導体素子検査装置の駆動 部の概要を示す構成図であり、  FIGS. 24 (a) and (b) are plan views showing an embodiment of forming a silicon dioxide mask for forming contact terminals of the connection device according to the present invention, and FIG. 25 is a plan view of the present invention. FIG. 2 is a configuration diagram illustrating an outline of a driving unit of a semiconductor device inspection device equipped with a connection device,
第 2 6図は、 本発明の接続装置を搭載したバーンイン用の半導体素子 検査装置の要部を示す斜視図であり、 第 2 7図は、 バーンィン用の半導体素子検査装置の断面図であり、 第 2 8図 (A ) はウェハの斜視図および第 2 8図 (B ) は半導体素子 の斜視図であり、 FIG. 26 is a perspective view showing a main part of a burn-in semiconductor device inspection device equipped with the connection device of the present invention, FIG. 27 is a cross-sectional view of a semiconductor device inspection apparatus for burn-in, FIG. 28 (A) is a perspective view of a wafer, and FIG. 28 (B) is a perspective view of a semiconductor device;
第 2 9図は、 従来の検査用プローブの断面図であり、  FIG. 29 is a cross-sectional view of a conventional inspection probe.
第 3 0図は、 従来の検査用プローブの平面図であり、  FIG. 30 is a plan view of a conventional inspection probe,
第 3 1図は、 はんだボールを電極上に有する半導体素子を示す斜視図 であり、  FIG. 31 is a perspective view showing a semiconductor device having solder balls on electrodes,
第 3 2図は、 はんだ溶融接続をした半導体素子の実装状態を示す斜視 図であり、  FIG. 32 is a perspective view showing a mounted state of a semiconductor element which has been subjected to solder fusion connection.
第 3 3図は、 従来のめっきによるバンプを用いた半導体素子検査装置 の要部断面図であり、  FIG. 33 is a cross-sectional view of a main part of a conventional semiconductor device inspection apparatus using a bump formed by plating.
第 3 4図は、 第 3 3図のめっきによるバンプ部分を示す斜視図であり、 第 3 5図 ( a ) — ( d ) は、 本発明に関わる接続装置において、 複数個 の突起部がその開口面に位置する大きさで穴が形成されている例を示す 端面図であり、  FIG. 34 is a perspective view showing a bump portion formed by plating shown in FIG. 33, and FIGS. 35 (a) to (d) show a connecting device according to the present invention. FIG. 4 is an end view showing an example in which a hole is formed in a size located on the opening surface;
第 3 6図 ( a ) — ( d ) は、 本発明に関わる接続装置において、 複数 個の突起部がその開口面に位置する大きさで穴が形成されている他の例 を示す端面図であり、  FIGS. 36 (a) to (d) are end views showing another example of a connection device according to the present invention, in which a plurality of protrusions are formed in a hole having a size located at the opening surface thereof. Yes,
第 3 7図 ( a ) — ( c ) は、 本発明に関わる接続装置において、 複数 個の突起部をどのように配列するかの例を示す平面図である。  FIGS. 37 (a) to (c) are plan views showing examples of how a plurality of projections are arranged in the connection device according to the present invention.
発明を実施するための最良の形態 BEST MODE FOR CARRYING OUT THE INVENTION
以下、 本発明に関わる接続装置、 接触端子、 および、 検査装置につい て、 実施例に基づいて説明する。  Hereinafter, a connection device, a contact terminal, and an inspection device according to the present invention will be described based on examples.
第 1図は、 本発明の接続装置の第 1実施例の要部を示す。 本実施例の 接続装置は、 複数個の接触端子 4 2が配置された端子配列体 2 0と、 こ の端子配列体 2 0を支持する支持部材 4 5 と、 支持部材 4 5 と端子配列 体 2 0 との間に装填される緩衝層 4 6 と、 支持部材 4 5を搭載する配線 基板 7 0 と、 各接触端子 4 2を配線基板 7 0の配線と接続するための延 長配線シ一 卜 7 1 とを備える。 FIG. 1 shows a main part of a first embodiment of the connection device of the present invention. The connection device of the present embodiment includes a terminal array 20 on which a plurality of contact terminals 42 are arranged, a support member 45 supporting the terminal array 20, a support member 45, and a terminal array. A buffer layer 46 mounted between the body 20 and the wiring board 70 on which the support member 45 is mounted, and an extended wiring system for connecting each contact terminal 42 to the wiring of the wiring board 70. It is provided with a unit 7 1.
端子配列体 2 0は、 第 1の基材を構成するシリ コンウェハ 2 8 と、 絶 緣膜を構成する二酸化シリコン膜 2 6、 3 0 と、 接触端子 4 2 と、 二酸 化シリ コン膜 2 6に設けられ、 該接触端子 4 2から引き出された引き出 し用配線 4 0 とを有する。 接触端子 4 2は、 接触端子となる突起部 3 5 と、 これを支持する突起支持部 4 3 とで構成される。 突起部 3 5は、 後 述するように、 第 1の基材であるシリ コンゥェハを異方性ェッチングす ることにより形成される突起 3 4 と、 この突起 3 4を覆う絶縁膜 3 6 と、 絶縁膜 3 6上に設けられる導電性被覆 3 7 とで構成される。 突起支持部 4 3は、 二酸化シリコン膜 2 6で構成される。  The terminal array 20 includes a silicon wafer 28 constituting the first base material, silicon dioxide films 26 and 30 constituting the insulating film, contact terminals 42 and a silicon dioxide film 2 6 and a lead wire 40 drawn out from the contact terminal 42. The contact terminal 42 includes a projection 35 serving as a contact terminal and a projection support 43 supporting the projection. As will be described later, the protrusion 35 includes a protrusion 34 formed by anisotropically etching the first substrate silicon wafer, an insulating film 36 covering the protrusion 34, and And a conductive coating 37 provided on the insulating film 36. The projection support portion 43 is composed of a silicon dioxide film 26.
シリコンゥヱハ 2 8の、 突起部 3 5の後方部分に、 穴 2 8 aが設けら れている。 上記突起支持部 4 3は、 この穴 2 8 aの一部を覆うように、 穴の開口に位置する。 この実施例では、 突起支持部 4 3は、 穴 2 8 aの 周辺の 1 ケ所に固定され、 片持ち梁状に形成されている。 従って、 突起 部 3 5は、 穴 2 8 aの開口面部に位置する状態で、 突起支持部 4 3によ り支持される。  A hole 28 a is provided in the silicon wafer 28 at the rear part of the protrusion 35. The projection support portion 43 is located at the opening of the hole so as to cover a part of the hole 28a. In this embodiment, the projection support portion 43 is fixed to one location around the hole 28a and is formed in a cantilever shape. Therefore, the projection 35 is supported by the projection support 43 in a state where it is located on the opening surface of the hole 28a.
延長配線シー 卜 7 1 は、 絶縁フイルム 7 l a と、 この上に設けられた 引き出し用延長配線 7 2とで構成される。 この延長配線シー 卜 7 1は、 シリコンウェハ 2 8の外側で滑らかに折り曲げられて、 一端が端子配列 体 2 0の周縁部に固定され、 他端が、 配線基板 7 0の上に固定される。 引き出し用延長配線 7 2は、 引き出し用配線 4 0、 および、 配線基板 7 0に設けられている電極 7 3に、 それぞれ電気的に接続される。 接続は、 例えば、 はんだ 7 4を用いて行われる。  The extension wiring sheet 71 is composed of an insulating film 71a and a drawing extension wiring 72 provided thereon. The extension wiring sheet 71 is smoothly bent outside the silicon wafer 28, one end is fixed to the peripheral portion of the terminal array 20, and the other end is fixed on the wiring board 70. . The extension wiring 72 is electrically connected to the wiring 40 and the electrode 73 provided on the wiring board 70, respectively. The connection is made using, for example, solder 74.
なお、 引き出し用配線 4 0の周縁部と電極 7 3 との接続は、 絶縁フィ 4 The connection between the periphery of the lead-out wiring 40 and the electrode 73 is made by an insulating film. Four
ルム 7 1 aに設けられた引き出し用延長配線 7 2ではなく、 ワイヤボン ディ ングによって、 接続するようにしてもよい。 The connection may be made by wire bonding instead of the extension wiring 72 provided for the drawer provided in the room 71a.
配線基板 7 0は、 例えば、 ポリイ ミ ド、 ガラスエポキシ等の樹脂材料 からなり、 上述した電極 7 3の他、 内部配線 7 0 a、 接続端子 7 0 b等 を有している。 配線基板 7 0 と支持部材 4 δ とは、 例えば、 シリコン系 接着剤を用いて接着される。  The wiring board 70 is made of, for example, a resin material such as polyimide or glass epoxy, and has, in addition to the electrodes 73 described above, internal wiring 70 a, connection terminals 70 b, and the like. The wiring substrate 70 and the support member 4δ are bonded using, for example, a silicon-based adhesive.
絶縁フイルム 7 1 aは、 可撓性があり、 好ましくは、 耐熱性がある樹 脂で形成する。 本実施例では、 ポリイ ミ ド樹脂が用いられる。 緩衝層 4 6は、 エラス トマ等の弾性を有する物質で構成される。 具体的には、 シ リ コンゴム等が用いられる。 接触端子 4 2および引き出し用配線 4 0は、 導電性被覆で構成される。 これらの詳細については、 後述する。 また、 第 1図では、 接触端子 4 2および引き出し用配線 4 0は、 説明の簡単の ため、 1つの接触端子分のみ示すが、 もちろん、 実際には、 後述するよ うに複数個が配置される。  The insulating film 71a is formed of a flexible and preferably heat-resistant resin. In this embodiment, polyimide resin is used. The buffer layer 46 is made of an elastic material such as an elastomer. Specifically, silicon rubber or the like is used. The contact terminals 42 and the lead wires 40 are made of a conductive coating. Details of these will be described later. In FIG. 1, only one contact terminal is shown for the contact terminal 42 and the lead-out wiring 40 for the sake of simplicity, but of course, a plurality of contact terminals are arranged as described later. .
第 2図に、 本発明の接続装置の第 2実施例の要部を示す。 第 2図に示 す接続装置は、 シ リ コ ンゥヱハ 2 8に設けられている穴 2 8 aのェッチ ング形状が異なること、 および、 これに関連して、 接触端子 7 5の構造 が異なることの他は、 上記第 1図に示す接続装置と同様に構成される。 すなわち、 本実施例では、 端子配列体 2 0において、 穴 2 8 aがシリコ ンウェハ 2 8および二酸化シリコン膜 3 0を貫通する状態で設けられて いる。 また、 本実施例では、 突起支持部 4 3は、 穴 2 8 aの開口部の全 周で固定支持される。 従って、 接触端子 7 5は、 穴 2 8 aの開口部をふ さぐ状態で設けられている。  FIG. 2 shows a main part of a second embodiment of the connection device of the present invention. In the connection device shown in FIG. 2, the etching shape of the hole 28a provided in the silicon wafer 28 is different, and the structure of the contact terminal 75 is related to this. Other than the above, the configuration is the same as that of the connection device shown in FIG. That is, in the present embodiment, in the terminal array 20, the hole 28 a is provided so as to penetrate the silicon wafer 28 and the silicon dioxide film 30. Further, in the present embodiment, the projection support portion 43 is fixedly supported on the entire periphery of the opening of the hole 28a. Therefore, the contact terminal 75 is provided so as to close the opening of the hole 28a.
この接触端子 7 5の詳細については、 後述する。 Details of the contact terminal 75 will be described later.
第 3図に、 本発明の接続装置の第 3実施例の要部を示す。 第 3図に示 す接続装置は、 端子配列体 2 0における、 穴 2 8 aの構造および接触端 子 7 6の構造が異なる他は、 上記第 2図に示す接続装置と同様に構成さ れる。 この接触端子 7 6の詳細については、 後述する。 FIG. 3 shows a main part of a third embodiment of the connection device of the present invention. The connection device shown in FIG. 3 has the structure of the hole 28 a and the contact end of the terminal array 20. It has the same configuration as the connection device shown in FIG. 2 except that the structure of the child 76 is different. Details of the contact terminal 76 will be described later.
第 4図に、 本発明の接続装置の第 4実施例の要部を示す。 第 4図に示 す接続装置は、 引き出し用配線 7 7の表面に絶縁材料 7 8を設けた接触 端子 7 9の構造が異なる他は、 上記第 1図および第 2図および第 3図に 示す接続装置と同様に構成される。 ただし、 引き出し用配線 7 7の周縁 部には、 絶縁フィルム 7 1 aに設けられた引き出し用延長配線 7 2が接 続され、 該絶縁フイルム 7 1 aに設けられたビア 8 0を通して、 該引き 出し用延長配線 7 2が、 配線基板 7 0に設けられている電極 7 3に、 電 気的に接続される。 この接触端子 7 9の詳細については、 後述する。 第 2 3図( b ' )に、本発明の第 5実施例の要部を示す。第 2 3図( b ' ) に示す接続装置は、 基本的な構造は、 第 3図に示す第 3実施例と同じで ある。 相違する点は、 突起支持部 4 3力 穴 2 6 aの開口部周縁の対向 する 2辺で支持され、 接触端子 7 6 aがプリ ッジ構造となっている点で ある。 本実施例の接触端子 7 6 aの詳細については、 後述する。 次に、 上記第 1実施例の接続装置の接触端子部分の構造および製造方法につい て説明する。  FIG. 4 shows a main part of a fourth embodiment of the connection device of the present invention. The connecting device shown in FIG. 4 is the same as that shown in FIGS. 1, 2 and 3 except that the structure of the contact terminal 79 provided with an insulating material 78 on the surface of the lead-out wiring 77 is different. It is configured similarly to the connection device. However, an extension wire 72 for drawing provided on the insulating film 71a is connected to a peripheral portion of the drawing wire 77, and the wiring is provided through a via 80 provided on the insulating film 71a. The extension wiring 72 is electrically connected to the electrode 73 provided on the wiring board 70. Details of the contact terminal 79 will be described later. FIG. 23 (b ') shows a main part of a fifth embodiment of the present invention. The basic structure of the connection device shown in FIG. 23 (b ') is the same as that of the third embodiment shown in FIG. The difference is that the projection support portion 43 is supported by two opposing sides of the periphery of the opening of the force hole 26a, and the contact terminal 76a has a bridge structure. Details of the contact terminal 76a of this embodiment will be described later. Next, the structure and manufacturing method of the contact terminal portion of the connection device of the first embodiment will be described.
第 7図に示す接続装置は、 片持ち梁構造の突起支持部 4 3 としての二 酸化シリコン膜 2 6を有し、 かつ、 これに接触端子 4 2 とが設けられて いる。 接触端子 4 2は、 突起 3 4 と、 これを被覆する二酸化シリコン 3 6 とからなる突起状形成物と、 その先端部に被着された、 導電膜 3 9お よびめつき膜 4 4 とからなる導電性被覆とで構成される。 また、 この接 続装置は、 二酸化シリコン膜 2 6の表面に、 引き出し用配線 4 0が、 そ の一端を接触端子 4 2の先端部に被着された導電膜 3 9 と接続されると 共に、 一体に形成されている。 さらに、 この突起支持部 4 3を表面に形 成したシリ コンゥヱハ 2 8の他方の面に、 緩衝層 4 6を構成するエラス トマとしてのシリコンゴムと、 支持部材 4 5を構成するシリコンゥェハ とが配置される。 導電膜 3 9は、 本実施例では、 クロム膜.3 9 aに金膜 3 9 bを被着した二層構造で構成される。 また、 めっき膜 4 4は、 ロジ ゥム膜で構成される。 めっき膜 4 4 として、 ロジウムを用いる理由は、 口ジゥムの硬度が金の硬度より大きいことによる。 The connecting device shown in FIG. 7 has a silicon dioxide film 26 as a projecting support portion 43 of a cantilever structure, and is provided with a contact terminal 42. The contact terminal 42 includes a protrusion 34 and a protrusion formed of silicon dioxide 36 covering the protrusion 34, and a conductive film 39 and a plating film 44 attached to the tip of the protrusion. And a conductive coating. Also, this connecting device is configured such that a lead wire 40 is connected to the surface of the silicon dioxide film 26 and one end thereof is connected to a conductive film 39 attached to the tip of the contact terminal 42. , It is formed integrally. Further, the other surface of the silicon wafer 28 having the projection support portion 43 formed on the surface thereof is formed with an elastic layer constituting the buffer layer 46. A silicon rubber as a tomograph and a silicon wafer forming the support member 45 are arranged. In this embodiment, the conductive film 39 has a two-layer structure in which a gold film 39b is applied to a chromium film .39a. The plating film 44 is formed of a rhodium film. The reason why rhodium is used as the plating film 44 is that the hardness of the orifice is higher than that of gold.
また、 第 7図に、 本実施例の接続装置の各部の代表的な寸法を示す。 第 7図に示す寸法例から明かなように、 本実施例では、 底面の一辺が 3 0 / mの四角錐形状の接触端子が実現できる。 しかも、 この四角錐は、 シリコンゥヱハをフォ 卜リ ソグラフ技術によりパターニングして形成さ れるので、 位置および大きさが高精度に決められる。 また、 異方性エツ チングにより形成されるので、 形状がシャープに形成できる。 特に、 先 端を、 尖った形状とすることができる。 これらの特徴は、 他の実施例に おいても共通する。 なお、 寸法および配置は、 一例であって、 本発明は、 これに限定されるものではない。 また、 本実施例に限らず、 他の実施例 においても、 同程度の寸法および加工精度が実現できる。  FIG. 7 shows typical dimensions of each part of the connection device of this embodiment. As is clear from the example of dimensions shown in FIG. 7, in this embodiment, a quadrangular pyramid-shaped contact terminal having a bottom surface of 30 / m can be realized. In addition, since this quadrangular pyramid is formed by patterning silicon wafers by photolithography, the position and size can be determined with high precision. In addition, since it is formed by anisotropic etching, a sharp shape can be formed. In particular, the tip can be pointed. These features are common to other embodiments. Note that the dimensions and arrangement are merely examples, and the present invention is not limited to these. Further, not only in this embodiment but also in other embodiments, similar dimensions and processing accuracy can be realized.
接触端子の先端を尖った形状とするのは、 次の理由からである。  The reason why the tip of the contact terminal is pointed is as follows.
測定対象の電極がアルミ二ゥムの場合、 表面に酸化膜が形成されてい て、 接触時の抵抗が不安定となる。 このような電極に対して、 接触時の 抵抗値の変動が 0 . 5 Ω以下の安定した抵抗値を得るためには、 接触端 子の先端部が、 電極表面の酸化膜をつき破って、 良好な接触を確保する 必要がある。 そのためには、 例えば、 接触端子の先端が、 半円形の場合、 1 ピン当たり 3 0 0 m N以上の荷重となる接触圧で、 各接触端子を電極 - に擦りつける必要がある。 一方、 接触端子の先端部が、 直径 1 0 π!〜 3 0 mの範囲の平坦部を有する形状の場合には、 1 ピン当たり 1 0 0 m N以上の荷重となる接触圧で、 各接触端子を電極に擦りつける必要が あ O o 一方、 上記した数値で示される形状を持つ本実施例の接続装置の接触 端子の場合には、 1 ピン当たり 5 m N以上の荷重となる接触圧があれば、 電極に擦りつけることなく、 単に押圧するだけで、 安定した接触抵抗で、 通電を行うことができる。 その結果、 低針圧で電極に接触すればよいた め、 電極、 または、 その直下にある素子に損傷を与えることが防止でき る。 また、 全接触端子にピン圧をかけるために必要な力を小さ くするこ とができる。 その結果、 この接続装置を用いる試験装置におけるプロ一 バ駆動装置の耐荷重を軽減し、 製造コス トを低減することができる。 When the electrode to be measured is aluminum, an oxide film is formed on the surface, and the contact resistance becomes unstable. In order to obtain a stable resistance value of 0.5 Ω or less during contact with such an electrode, the tip of the contact terminal breaks through the oxide film on the electrode surface, Good contact needs to be ensured. For this purpose, for example, when the tips of the contact terminals are semicircular, it is necessary to rub each contact terminal against the electrode with a contact pressure that causes a load of 300 mN or more per pin. On the other hand, the tip of the contact terminal has a diameter of 10π! In the case of a shape with a flat portion in the range of ~ 30 m, each contact terminal must be rubbed against the electrode with a contact pressure that will result in a load of 100 mN or more per pin. On the other hand, in the case of the contact terminal of the connection device of the present embodiment having the shape indicated by the above numerical values, if there is a contact pressure that causes a load of 5 mN or more per pin, the contact terminal is simply Electric current can be supplied with stable contact resistance just by pressing. As a result, since the electrode only needs to be contacted with a low needle pressure, it is possible to prevent the electrode or the element immediately below the electrode from being damaged. Also, the force required to apply pin pressure to all contact terminals can be reduced. As a result, it is possible to reduce the withstand load of the probe driving device in the test device using this connection device, and to reduce the manufacturing cost.
なお、 1 ピン当たり 1 0 0 m N以上の荷重をかけることができる場合 は、 例えば、 接触端子が四角錐台の突起であれば、 該四角錐台の先端平 坦部の一辺を 3 0 mより小さくするならば、 点のように尖ってなくて もよい。 ただし、 上述した理由から、 可能な限り、 先端部の面積は、 小 さくすることが好ましい。  When a load of 100 mN or more can be applied per pin, for example, if the contact terminal is a projection of a truncated pyramid, one side of the flat end of the truncated pyramid is 30 m To make it smaller, it doesn't have to be sharp like a dot. However, for the reasons described above, it is preferable that the area of the tip portion be as small as possible.
次に、 第 1図に示す接続装置を形成するための製造プロセスについて、 第 5図および第 6図を参照して説明する。 第 5図および第 6図は、 本発 明の第 1実施例の接続装置について、 片持ち梁からなる接触端子を有す る端子配列体 2 0を形成するための製造プロセスを工程順に示したもの である。  Next, a manufacturing process for forming the connection device shown in FIG. 1 will be described with reference to FIG. 5 and FIG. FIGS. 5 and 6 show, in the order of steps, a manufacturing process for forming a terminal array 20 having cantilever contact terminals in the connection device of the first embodiment of the present invention. Things.
本実施例では、 二酸化シリコン 2 6を、 単結晶のシリコンゥヱハ 2 7 および 2 8に挟みこんだ構造の S 0 I基板を用いて構成される。 すなわ ち、 シリコンウェハ 2 7に異方性エッチングで突起 3 4を形成して、 シ リコンゥヱハ 2 8にエツチングで穴 2 8 aを形成し、 かつ、 穴 2 8 aの 開口部に、 二酸化シリコン膜 2 6を片持ち梁状に残して、 突起支持部 4 3を形成して、 接触端子 4 2を形成する。  In this embodiment, an S0I substrate having a structure in which silicon dioxide 26 is sandwiched between single-crystal silicon wafers 27 and 28 is used. That is, protrusions 34 are formed on silicon wafer 27 by anisotropic etching, holes 28a are formed on silicon wafer 28 by etching, and silicon dioxide is formed on the opening of hole 28a. The projecting support portion 43 is formed while leaving the film 26 in a cantilever shape, and the contact terminal 42 is formed.
第 5図 ( a ) は、 厚さ 0 . 5〜 5 m程度の二酸化シリコン 2 6をシ リコン単結晶 2 7および 2 8に挟みこんだ構造の S 0 I基板において、 シリコン単結晶 2 7および 2 8の ( 1 0 0 ) 面に熱酸化により二酸化シ リコン膜 2 9および 3 0を形成する工程を示す。 シリコン単結晶 2 7お よび 2 8の酸化は、 例えば、 ゥヱッ ト酸素中で酸化温度 1 0 0 0 °Cで 1 0 0分の熱酸化により、 二酸化シリコン膜 2 9および 3 0を 0 . 5 ^ m 程度形成する。 Fig. 5 (a) shows an S0I substrate with a structure in which silicon dioxide 26 having a thickness of about 0.5 to 5m is sandwiched between silicon single crystals 27 and 28. The step of forming silicon dioxide films 29 and 30 on the (100) plane of silicon single crystals 27 and 28 by thermal oxidation will be described. Oxidation of the silicon single crystals 27 and 28 is performed, for example, by subjecting the silicon dioxide films 29 and 30 to 0.5 by thermal oxidation at 100.degree. ^ m is formed.
第 5図 ( b ) は、 上記二酸化シリコン膜 2 9および 3 0の表面にホ 卜 レジス トマスク 3 1および 3 2を形成し、 二酸化シリコン膜 2 9をエツ チングして、 二酸化シリコン膜 3 3のマスクを形成する工程を示す。 ホ トレジス トマスク 3 1および 3 2の形成は、 次のように行う。 まず、 二 酸化シリ コン膜 2 9および 3 0の表面に、 ホ トレジス トとして O F P R 8 0 0 (東京応化工業製) を塗布する。 ついで、 接触端子を形成する位 置に、 一辺が 1 0〜 4 0 m程度の正方形のパターンを露光し、 現像液 M D 3 (東京応化工業製) により現像する。 次に、 ホトレジス 卜マス ク 3 1および 3 2から露出した二酸化シリコン膜 2 9を、 フッ化水素酸 とフッ化アンモニゥム液の 1 : 7混液に浸析してエッチングする。  FIG. 5 (b) shows that the photoresist masks 31 and 32 are formed on the surfaces of the silicon dioxide films 29 and 30 and the silicon dioxide film 29 is etched to form the silicon dioxide film 33. 4 shows a step of forming a mask. The formation of the photoresist masks 31 and 32 is performed as follows. First, OFPR 800 (manufactured by Tokyo Ohka Kogyo Co., Ltd.) is applied as a photoresist on the surfaces of the silicon dioxide films 29 and 30. Next, a square pattern having a side of about 10 to 40 m is exposed at a position where the contact terminal is to be formed, and developed with a developing solution MD3 (manufactured by Tokyo Ohka Kogyo Co., Ltd.). Next, the silicon dioxide film 29 exposed from the photoresist masks 31 and 32 is immersed and etched in a 1: 7 mixed solution of hydrofluoric acid and ammonium fluoride solution.
第 5図 ( c ) は、 上記ホトレジス トマスク 3 1および 3 2を除去し、 二酸化シリコン膜 3 3をマスクとして、 シリ コン単結晶 2 7の( 1 0 0 ) 面を異方性ェッチングして先端が尖つた形状の突起部 3 4を形成する途 中の段階の工程を示す。 シリコン単結晶 2 7のエツチングは、 例えば、 水酸化力リウムとィソプロパノールと水の混液に浸析することにより行 う。 エツチング終了後、 ホ トレジス トマスク 3 1および 3 2は、 剥離液 S 5 0 2 a (東京応化工業製) で除去する。  In FIG. 5 (c), the photoresist masks 31 and 32 are removed, and the (100) plane of silicon single crystal 27 is anisotropically etched using silicon dioxide film 33 as a mask. A step in the middle of forming a projection 34 having a pointed shape is shown. Etching of the silicon single crystal 27 is performed, for example, by immersion in a mixed solution of lithium hydroxide, isopropanol, and water. After the etching is completed, the photoresist masks 31 and 32 are removed with a stripping solution S502a (manufactured by Tokyo Ohka Kogyo Co., Ltd.).
第 5図 ( d ) は、 異方性エッチングして、 先端が尖った形状の突起 3 4を形成した後、 突起 3 4の表面に熱酸化により、 二酸化シリコン膜 3 6を形成して、 突起部 3 6を形成する工程を示す。 シリコンから成る突 起 3 4の酸化は、 例えば、 ゥエ ツ 卜酸素中での熱酸化により行なう。 こ れによって、 二酸化シリコン膜 3 6を 0. 5 /z m程度形成する。 なお、 第 5図 ( d ' ) は、 第 5図 ( d ) の突起部 3 5を下方より見た場合の平 面図である。 FIG. 5 (d) shows anisotropic etching to form a projection 34 having a sharp tip, and then forming a silicon dioxide film 36 on the surface of the projection 34 by thermal oxidation. The step of forming the part 36 is shown. Oxidation of the protrusion 34 made of silicon is performed by, for example, thermal oxidation in a jet oxygen. This Thereby, a silicon dioxide film 36 is formed at about 0.5 / zm. FIG. 5 (d ') is a plan view of the projection 35 shown in FIG. 5 (d) when viewed from below.
第 5図 ( e ) は、 上記突起部 3 5の表面の二酸化シリ コン膜 3 6の表 面に、 導電性被覆 3 7を形成し、 突起部 3 5の表面および配線形成用の 、パターンとなるように導電性被覆 3 7の表面を覆うようにホ トレジス ト マスク 3 8を形成した工程を示す。 導電性被覆 3 7 としては、 例えば、 スパッタ リ ング法あるいは蒸着法で、 二酸化シリコンと密着性のよいク ロムを 0. 0 2 m被着した後、 金を 0. 2〜 0. 5 ΠΙ被着した膜を 形成するか、 または、 スパッタ リ ング法あるいは蒸着法で、 チタンを 0. 0 2 m被着した後、 金を 0. 2〜 0. 5 m被着した膜を形成すれば よい。  FIG. 5 (e) shows that a conductive coating 37 is formed on the surface of the silicon dioxide film 36 on the surface of the protrusion 35, and the pattern and the pattern for forming the surface of the protrusion 35 and the wiring are formed. A step of forming a photoresist mask 38 so as to cover the surface of the conductive coating 37 as much as possible will be described. As the conductive coating 37, for example, a chromium having good adhesion to silicon dioxide is applied to a thickness of 0.02 m by a sputtering method or a vapor deposition method, and then gold is applied to a thickness of 0.2 to 0.5 mm. It is sufficient to form a deposited film, or to form a film by depositing 0.2 to 0.5 m of gold after depositing 0.02 m of titanium by sputtering or vapor deposition. .
第 5図 ( f ) は、 上記導電性被覆 3 7を上記ホ トレジス トマスク 3 8 でエッチングして、 突起部 3 5の導電膜 3 9および配線 4 0を形成した 後、 ホ トレジス 卜マスク 4 1により、 二酸化シリコン 2 6の、 突起部 3 5を支持する絶縁膜として残すべき部分を、 他の二酸化シリコン膜 2 6 から分離するための溝部 2 6 a となる部分を、 エッチングにより除去す る工程を示す。 この工程では、 ホトレジス トとして O F P R 8 0 0 (東 京応化工業製) を塗布して、 突起部 3 5の周辺の二酸化シリコン 2 6の 表面の O F P R 8 0 0 (東京応化工業製) を、 長方形の長手方向の 2辺 と、 これと直交する短い 1辺の部分を帯状に露光する。 すなわち、 コの 字に似た形状 (なお、 本明細書では、 説明の便宜上、 この形状をコ字形 状ということにする。 ) の露光パターンを形成する。 そして、 NMD 3 (東京応化工業製) によって現像することにより、 ホ トレジス トマスク 4 1を形成する。 次に、 ホトレジス トマスク 4 1から露出した二酸化シ リコン膜 2 6を、 フッ化水素酸とフッ化アンモニゥム液の 1 : 7混液に 浸析してエツチングする。 FIG. 5 (f) shows that the conductive coating 37 is etched with the photoresist mask 38 to form the conductive film 39 of the projection 35 and the wiring 40, and then the photoresist mask 41 is formed. Removing the portion of the silicon dioxide 26 that should be left as an insulating film supporting the protrusions 35 from the other silicon dioxide film 26 as a groove 26 a by etching. Is shown. In this process, OFPR 800 (manufactured by Tokyo Ohka Kogyo) is applied as a photoresist, and OFPR 800 (manufactured by Tokyo Ohka Kogyo) on the surface of silicon dioxide 26 around the projection 35 is transformed into a rectangle. The two sides in the longitudinal direction and the short side perpendicular to this are exposed in a strip shape. That is, an exposure pattern having a shape similar to a U-shape (in this specification, this shape is referred to as a U-shape for convenience of explanation) is formed. Then, a photoresist mask 41 is formed by developing with NMD 3 (manufactured by Tokyo Ohka Kogyo Co., Ltd.). Next, the silicon dioxide film 26 exposed from the photoresist mask 41 is converted into a 1: 7 mixture of hydrofluoric acid and ammonium fluoride. Etch and etch.
第 6図 (g) 、 (h) および ( i ) は、 片持ち梁構造の突起支持部 4 3を形成する工程を段階的に示したものである。 すなわち、 ここでは、 ホ トレジス トマスク 4 1を除去し、 残った二酸化シリ コン膜 2 6をマス クとして、 溝部 2 6 aから上記シリコン単結晶 28の ( 1 0 0 ) 面をェ ツチングする。 これにより、 二酸化シリコン膜 2 6で構成され、 導電膜 FIGS. 6 (g), (h) and (i) show the steps of forming the projection support portion 43 of the cantilever structure step by step. That is, here, the photoresist mask 41 is removed, and the (100) plane of the silicon single crystal 28 is etched from the groove 26a using the remaining silicon dioxide film 26 as a mask. Thereby, the silicon dioxide film 26 is formed, and the conductive film is formed.
3 9を設けた突起部 3 5をその表面で支持する片持ち梁状の突起支持部A cantilever-shaped projection support that supports the projection 3 5 on its surface
4 3が得られる。 なお、 第 6図 (g') は (g) を下方から見た平面図、 第 6図 ( i ') は ( i ) を下方から見た平面図、 第 6図 '') は ( i ) を下方から見た斜視図である。 4 3 is obtained. Fig. 6 (g ') is a plan view of (g) viewed from below, Fig. 6 (i') is a plan view of (i) viewed from below, and Fig. 6 '') is (i) FIG. 3 is a perspective view of the device viewed from below.
ここで、 ホ 卜レジス トマスク 4 1は、 S 5 0 2 a (東京応化工業製) を用いて除去する。 シリコン単結晶 2 8のエツチングは、 例えば、 水酸 化カリウムと水の混液に浸析することにより行う。 なお、 この液に代え て、 水酸化カリウムとイソプロパノールと水の混液を用いてもよい。 ま た、 この工程に、 接触端子先端部の四角錐形状を有した導電膜 3 9の表 面に、 金あるいはロジウム等を 0. 2〜 2 m程度めつきして、 めっき 膜 44を設けることにより、 電気的な接触特性を安定にすることができ o  Here, the photo resist mask 41 is removed using S502a (manufactured by Tokyo Ohka Kogyo Co., Ltd.). Etching of the silicon single crystal 28 is performed, for example, by immersion in a mixed solution of potassium hydroxide and water. Instead of this solution, a mixed solution of potassium hydroxide, isopropanol and water may be used. In this step, a plating film 44 is provided by plating gold or rhodium or the like on the surface of the conductive film 39 having a quadrangular pyramid shape at the tip of the contact terminal with 0.2 to 2 m of gold or rhodium. Can stabilize the electrical contact characteristics
第 7図は、 接触端子 4 2を形成した上記シリコン単結晶 2 8および二 酸化シリ コン 2 6、 3 0からなる基板を、 支持部材 4 5に固定する工程 を示す。 ここでは、 支持部材 4 5として、 シリコン基板が用いられる。 二酸化シリコン膜 3 0の表面と支持部材 4 5との間に緩衝層 4 6を挟み こんで、 一体化する。 本実施例では、 例えば、 厚さが 0. 2〜 3 mmで、 硬さ ( J I S A) が 1 5〜 7 0程度のシリ コンゴムを、 緩衝層 4 6とし て用いている。 しかし、 緩衝層 4 6は、 これに限定されない。 なお、 二 酸化シリコン膜 3 0およびシリコン支持部材 45の接着は、 シリコンゴ ム自体に接着力があるので、 格別に接着剤を必要としない。 なお、 接着 剤を用いて接着するようにしてもよい。 FIG. 7 shows a step of fixing the substrate made of the silicon single crystal 28 and the silicon dioxides 26 and 30 on which the contact terminals 42 are formed, to the support member 45. Here, a silicon substrate is used as the support member 45. The buffer layer 46 is interposed between the surface of the silicon dioxide film 30 and the support member 45 to be integrated. In the present embodiment, for example, a silicon rubber having a thickness of 0.2 to 3 mm and a hardness (JISA) of about 15 to 70 is used as the buffer layer 46. However, the buffer layer 46 is not limited to this. The bonding between the silicon dioxide film 30 and the silicon support member 45 is performed by using a silicon Since the rubber itself has adhesive strength, no special adhesive is required. In addition, you may make it adhere | attach using an adhesive agent.
本実施例によれば、 電極パッ ド部のピッチとして 1 0 m程度の接触 端子まで容易に形成できる。 また、 接触端子の高さの精度として、 ± 2 m以内の精度を達成できる。 また、 本実施例では、 接触端子が片持ち 梁状に構成されているので、 その可撓性が大きくなる。 そのため、 測定 対象物の電極の凹凸の影響を吸収しゃすい。  According to this embodiment, it is possible to easily form a contact terminal having a pitch of about 10 m as a pitch of the electrode pad portion. In addition, the accuracy of the height of the contact terminal can be achieved within ± 2 m. Further, in this embodiment, since the contact terminal is formed in a cantilever shape, its flexibility is increased. Therefore, it absorbs the influence of the unevenness of the electrode of the measurement object.
次に、 第 1図に示す接続装置を形成するための他の製造プロセスにつ いて、 第 8図および第 9図を参照して説明する。 本実施例は、 複数絶縁 層を 1層ずつ間に挟んだ構造の S O I基板を用いた例である。 なお、 第 5図および第 6図に示すプロセスと同じ工程については、 説明を省略す o  Next, another manufacturing process for forming the connection device shown in FIG. 1 will be described with reference to FIG. 8 and FIG. This embodiment is an example using an SOI substrate having a structure in which a plurality of insulating layers are sandwiched between layers. The description of the same steps as those shown in FIGS. 5 and 6 is omitted.
第 8図(a ) は、 厚さ 0 . 5〜 5 mの二酸化シリコン 2 6および 4 7 をシ リ コ ン単結晶 2 7、 2 8および 4 8に挟みこんだ構造の S 0 I基板 において、 シリコン単結晶 2 7および 4 8の ( 1 0 0 ) 面に、 熱酸化に より二酸化シリコン膜 2 9および 3 0を形成した工程を示す。 シ リ コ ン 単結晶 2 7および 4 8の酸化は、 例えば、 ゥエツ ト酸素中での熱酸化に より、 二酸化シリコン膜 2 9および 3 0を 0 . 5 m程度形成する。 こ の後、 二酸化シリコン膜 2 9およびシリコン単結晶 2 7および二酸化シ リコン 2 6について、 前記第 5図 ( b ) から ( e ) までの工程と同様の 工程により、 突起部 3 5の導電膜 3 9および配線 4 0を形成する。  Fig. 8 (a) shows an S0I substrate with a structure in which silicon dioxides 26 and 47 with a thickness of 0.5 to 5 m are sandwiched between silicon single crystals 27, 28 and 48. The process of forming silicon dioxide films 29 and 30 on the (100) plane of silicon single crystals 27 and 48 by thermal oxidation is shown. Oxidation of silicon single crystals 27 and 48 forms silicon dioxide films 29 and 30 to a thickness of about 0.5 m, for example, by thermal oxidation in wet oxygen. Thereafter, the silicon dioxide film 29, the silicon single crystal 27, and the silicon dioxide 26 are subjected to the same steps as those shown in FIGS. 5 (b) to 5 (e) to form the conductive film of the projection 35. 39 and wiring 40 are formed.
第 8図 ( b ) は、 二酸化シリコン 2 6の、 突起部 3 5を支持する絶縁 膜として残すべき部分を、 他の二酸化シリコン膜 2 6から分離するため の溝部 2 6 a となる部分を、 ホ トレジス トマスク 4 1 により開口させ、 その部分の二酸化シリコン 2 6を、 ホ トエッチングにより除去する工程 を示す。 第 8図 ( c ) 、 ( d ) および第 9図 ( e ) は、 ホ トレジス 卜マスク 4 1を除去し、 上記シリコン単結晶 2 8の ( 1 0 0 ) 面を二酸化シリコン 層 4 7が露出するまでエッチングすることにより、 突起部 3 5を表面に 有する、 二酸化シリコン膜 2 6の片持ち梁構造の突起支持部 4 3を形成 する工程を段階的に示したものである。 なお、 第 8図 ( c ' ) は ( c ) を 下方から見た平面図、 第 9図 ( e ' ) は ( e ) を下方から見た平面図、 第 9図 ( e ' ' ) は ( e ) を下方から見た斜視図である。 FIG. 8 (b) shows a portion of the silicon dioxide 26 that should be left as an insulating film supporting the protrusion 35, and a portion that becomes a groove 26a for separating the silicon dioxide 26 from the other silicon dioxide film 26. An opening is formed by a photoresist mask 41, and the silicon dioxide 26 in that portion is removed by photoetching. FIGS. 8 (c), (d) and 9 (e) show that the photoresist mask 41 is removed and the (100) plane of the silicon single crystal 28 is exposed to the silicon dioxide layer 47. The step of forming a projection support portion 43 having a cantilever structure of a silicon dioxide film 26 having a projection portion 35 on the surface by etching until the etching is completed is shown in a stepwise manner. In addition, FIG. 8 (c ′) is a plan view of (c) viewed from below, FIG. 9 (e ′) is a plan view of (e) viewed from below, and FIG. 9 (e ′ ′) is ( FIG. 3 is a perspective view of e) viewed from below.
なお、 この実施例において、 接触端子先端部の四角錐形状を有した導 電膜 3 9の表面に金あるいはロジウム等をめつきすることにより、 電気 的な接触特性を安定にすることができる。  In this embodiment, the electrical contact characteristics can be stabilized by depositing gold or rhodium on the surface of the conductive film 39 having a quadrangular pyramid shape at the tip of the contact terminal.
なお、 本製造方法は、 二酸化シリコン層 4 7が存在することにより、 シリ コン単結晶 2 8の異方性ェッチングを、 該ニ酸化シリコン層 4 7で 確実に停止させることができる。 これにより、 第 5図および第 6図の製 造方法と比較して、 加工精度の向上と、 エッチング工程管理が容易とな る利点がある。  In the present manufacturing method, the presence of the silicon dioxide layer 47 can reliably stop the anisotropic etching of the silicon single crystal 28 at the silicon dioxide layer 47. As a result, there is an advantage that the processing accuracy is improved and the etching process management becomes easier as compared with the manufacturing methods shown in FIGS. 5 and 6.
次に、 第 1図に示す接続装置を形成するための、 さらに他の製造プロ セスについて、 第 1 0図を参照して説明する。 なお、 第 5図および第 6 図に示すプロセスと同じ工程については、 説明を省略する。  Next, still another manufacturing process for forming the connection device shown in FIG. 1 will be described with reference to FIG. The description of the same steps as those shown in FIGS. 5 and 6 will be omitted.
第 1 0図 ( a ) は、 前記の第 5図 ( a ) から ( f ).までの工程と同様 の工程により、 突起部 3 5の導電膜 3 9および配線 4 0を形成した後、 ホ 卜レジス トマスク 4 1により、 突起部 3 5の周辺の二酸化シリコン 2 6をコの字形にエツチングにより除去した工程を示す。  FIG. 10 (a) shows the same steps as the steps from FIG. 5 (a) to (f). After forming the conductive film 39 of the protrusion 35 and the wiring 40, FIG. A process in which the silicon dioxide 26 around the protrusion 35 is removed by etching using a resist mask 41 in a U-shape is shown.
第 1 0図 ( b ) 、 ( c ) および ( d ) は、 ホ 卜レジス トマスク 4 1を 除去し、 上記シリコン単結晶 2 8の ( 1 0 0 ) 面をエッチングすること により、 穴 2 8 aを形成する工程、 および、 二酸化シリコン膜 2 6の片 持ち梁構造の突起支持部 4 3を形成する工程を段階的に示したものであ る。 なお、 第 1 0図 ( d ' ) は ( d ) を下方から見た斜視図である。 シリ コン単結晶 2 8のエツチングは、 例えば、 ェチレンジアミ ンとピロカテ コールと水の混液に浸析することにより行う。 なお、 この液に代えて、 水酸化カリウムと水の混液を用いてもよい。 あるいは、 水酸化カリウム とイソプロパノールと水の混液を用いてもよい。 FIGS. 10 (b), (c) and (d) show the hole 28a by removing the photoresist mask 41 and etching the (100) plane of the silicon single crystal 28. And a step of forming a projection support portion 43 having a cantilever structure of the silicon dioxide film 26. You. FIG. 10 (d ') is a perspective view of (d) viewed from below. Etching of the silicon single crystal 28 is performed, for example, by immersion in a mixed solution of ethylenediamine, pyrocatechol and water. Note that a mixture of potassium hydroxide and water may be used instead of this solution. Alternatively, a mixture of potassium hydroxide, isopropanol and water may be used.
なお、 この実施例において、 接触端子先端部の四角錐形状を有した導 電膜 3 9の表面に金あるいはロジウム等をめつきすることにより、 電気 的な接触特性を安定にすることができる。  In this embodiment, the electrical contact characteristics can be stabilized by depositing gold or rhodium on the surface of the conductive film 39 having a quadrangular pyramid shape at the tip of the contact terminal.
次に、 第 1図に示す接続装置を形成するための他の製造プロセスにつ いて、 第 1 1図を参照して説明する。 なお、 第 5図および第 6図に示す プロセスと同じ工程については、 説明を省略する。  Next, another manufacturing process for forming the connection device shown in FIG. 1 will be described with reference to FIG. The description of the same steps as those shown in FIGS. 5 and 6 will be omitted.
第 1 1図 ( a ) は、 厚さ 1〜: L O ^ mの二酸化シリ コン 2 6をシリコ ン単結晶 2 7および 2 8に挟みこんだ構造の S O I基板において、 前記 第 5図 ( c ) までの工程と同様な工程により、 二酸化シリコン膜 3 3を マスクとして、 シリコン単結晶 2 7の ( 1 0 0 ) 面を異方性ェッチング して先端が概ね尖った形状の突起 3 4を形成する工程を示す。 すなわち、 本実施例は、 四角錐台状の突起を形成する例である。  FIG. 11 (a) shows an SOI substrate having a structure in which silicon dioxide 26 having a thickness of 1 to LO ^ m is sandwiched between silicon single crystals 27 and 28, and FIG. Using the same process as above, the (100) plane of the silicon single crystal 27 is anisotropically etched using the silicon dioxide film 33 as a mask to form a projection 34 having a substantially pointed tip. The steps will be described. That is, the present embodiment is an example in which a truncated quadrangular pyramid-shaped projection is formed.
第 1 1図 ( b ) は、 上記二酸化シリコン膜 3 3のマスクが、 まだ突起 部 3 4に付着して残っている状態で、 シリコン単結晶 2 7の異方性ェッ チングを中止し、 上記二酸化シリコン膜 3 3をエッチングにより除去す る工程を示す。 なお、 本エッチングでは、 二酸化シリ コン膜 2 6および 二酸化シリコン膜 3 0 も同時に部分的あるいは全体がエッチングされる c 第 1 1図 ( c ) は、 熱酸化により、 突起 3 4およびシリコン単結晶 2 8 の表面に二酸化シリコン膜 4 9および 5 0を形成した工程を示す。 シリ コンの酸化は、 例えば、 ゥヱッ ト酸素中での熱酸化により、 二酸化シリ コン膜を 0 . 5 / m程度形成する。 第 1 1図 ( d ) は、 片持ち梁構造の突起支持部 4 3を形成する工程で ある。 すなわち、 この工程では、 前記の第 5図 ( e ) 〜第 6図 ( i ) ま での工程と同様な工程により、 シリ コン単結晶 2 8の ( 1 0 0 ) 面をェ ツチングすることにより、 穴 2 8 aを形成する。 これにより、 先端が概 ね尖った形状の突起部 3 5を表面に有する、 二酸化シリコン膜 4 9の片 持ち梁構造の突起支持部 4 3を形成する。 なお、 第 1 1図 ( d ' ) は、 第 1 1図 ( d ) を下方から見た斜視図である。 FIG. 11 (b) shows that the silicon single crystal 27 is anisotropically etched while the mask of the silicon dioxide film 33 is still attached to the protrusions 34, A step of removing the silicon dioxide film 33 by etching will be described. In this etching, the silicon dioxide film 26 and the silicon dioxide film 30 are also partially or entirely etched at the same time. C FIG. 11 (c) shows the projection 34 and the silicon single crystal 2 8 shows a step of forming silicon dioxide films 49 and 50 on the surface of FIG. The silicon is oxidized by, for example, forming a silicon dioxide film of about 0.5 / m by thermal oxidation in wet oxygen. FIG. 11 (d) shows a step of forming a projection support portion 43 having a cantilever structure. That is, in this step, the (100) plane of the silicon single crystal 28 is etched by the same steps as the steps shown in FIGS. 5 (e) to 6 (i). Forming a hole 28a. As a result, a projection support portion 43 having a cantilever structure of a silicon dioxide film 49 having a projection portion 35 having a substantially pointed shape on the surface is formed. FIG. 11 (d ′) is a perspective view of FIG. 11 (d) as viewed from below.
なお、 この実施例において、 接触端子先端部の導電膜 3 9の表面に金 あるいはロジウム等をめつきすることにより、 電気的な接触特性を安定 にすることができる。  In this embodiment, the electrical contact characteristics can be stabilized by depositing gold or rhodium on the surface of the conductive film 39 at the tip of the contact terminal.
なお、 本製造方法は、 第 5図および第 6図の製造方法と比較して、 突 起部 3 4の先端部に、 任意の大きさの平坦部を形成することができる。 この手法は、 第 1 1図に示した基板構成に限定されることなく、 二酸化 シリコン膜をマスクにして、 シリコン単結晶を異方性エッチングするこ とにより、 任意の大きさの平坦部を有する突起部を形成する工程におい て有効である。  Note that, in the present manufacturing method, a flat portion of an arbitrary size can be formed at the tip of the protrusion 34 as compared with the manufacturing method of FIG. 5 and FIG. This method is not limited to the substrate configuration shown in FIG. 11, but has a flat portion of an arbitrary size by anisotropically etching a silicon single crystal using a silicon dioxide film as a mask. This is effective in the step of forming the projection.
次に、 第 2図に示す接続装置を形成するための製造プロセスについて、 第 1 2図、 第 1 3図および第 1 4図を参照して説明する。  Next, a manufacturing process for forming the connection device shown in FIG. 2 will be described with reference to FIG. 12, FIG. 13 and FIG.
第 1 2図 ( a ) は、 厚さ 0 . 5〜 5 mの二酸化シリコン 2 6を、 単 結晶のシリコンゥヱハ 2 7および 5 1に挟みこんだ構造の S O I基板に おいて、 シリコンゥヱノヽ 2 7の ( 1 0 0 ) 面およびシリコンゥヱハ 5 1 の ( 1 1 0 ) 面に、 熱酸化により二酸化シリコン膜 2 9および 3 0を形 成する工程を示す。 シリ コンウェハ 2 7および 5 1の酸化は、 例えば、 ゥエツ ト酸素中での熱酸化により、 二酸化シリコン膜 2 9および 3 0を 0 . 5 μ m程度形成する。  Fig. 12 (a) shows the SOI substrate 27 with a structure in which silicon dioxide 26 with a thickness of 0.5 to 5 m is sandwiched between single crystal silicon wafers 27 and 51. The steps of forming silicon dioxide films 29 and 30 on the (100) plane and the (110) plane of silicon wafer 51 by thermal oxidation are shown. Oxidation of the silicon wafers 27 and 51 forms, for example, silicon dioxide films 29 and 30 to a thickness of about 0.5 μm by thermal oxidation in dilute oxygen.
第 1 2図 ( b ) は、 上記二酸化シリコン膜 2 9および 3 0の表面にホ トレジス トマスク 3 1および 3 2を形成し、 二酸化シリコン膜 2 9をェ ッチングする工程を示す。 FIG. 12 (b) shows that the surface of the silicon dioxide films 29 and 30 is A step of forming the resist masks 31 and 32 and etching the silicon dioxide film 29 will be described.
第 1 2図 ( c ) は、 上記ホ 卜レジス トマスク 3 1および 3 2を除去し、 二酸化シリコン膜 3 3をマスクとして、 シリ コンウェハ 2 7の( 1 0 0 ) 面を異方性ェッチングして先端が尖った形状の突起部 3 4を形成する途 中の段階の工程を示す。  FIG. 12 (c) shows that the photoresist masks 31 and 32 are removed, and the (100) plane of the silicon wafer 27 is anisotropically etched using the silicon dioxide film 33 as a mask. A step in the process of forming a projection 34 having a sharp pointed end is shown.
第 1 2図 ( d ) は、 異方性エッチングして、 先端が尖った形状の突起 3 4を形成した後、 突起 3 4の表面に熱酸化により、 二酸化シリコン膜 3 6を形成して、 突起部 3 5を形成する工程を示す。 シリコンから成る 突起 3 4の酸化は、 例えば、 ゥュッ ト酸素中での熱酸化により、 二酸化 シリコン膜 3 6を 0 . 5 m程度形成する。  FIG. 12 (d) shows anisotropic etching to form a projection 34 having a pointed tip, and then forming a silicon dioxide film 36 on the surface of the projection 34 by thermal oxidation. The step of forming the projection 35 will be described. The projection 34 made of silicon is oxidized by, for example, thermal oxidation in jet oxygen to form a silicon dioxide film 36 of about 0.5 m.
第 1 2図 ( e ) は、 突起部 3 5を形成した上記二酸化シリコン膜 3 6 および二酸化シリコン膜 3 0の表面にホ トレジス トマスク 5 2および 5 3を形成し、 二酸化シリコン膜 3 0をエッチングする工程を示す。  FIG. 12 (e) shows that the photoresist masks 52 and 53 are formed on the surfaces of the silicon dioxide film 36 and the silicon dioxide film 30 on which the projections 35 are formed, and the silicon dioxide film 30 is etched. The following shows the steps performed.
第 1 2図 ( f ) は、 上記ホ トレジス トマスク 5 2および 5 3を除去し、 二酸化シリコン膜 3 0をマスクとして、 シリ コンゥヱハ 5 1の( 1 1 0 ) 面を、 二酸化シリコン層 2 6に至るまで異方性エッチングして穴 5 1 a を形成する工程を示す。  FIG. 12 (f) shows that the photoresist masks 52 and 53 are removed and the silicon dioxide film 30 is used as a mask to make the (110) surface of the silicon wafer 51 a silicon dioxide layer 26. The step of forming a hole 51a by anisotropic etching until the process is described.
なお、第 1 2図( f ' )に示したように、上記シリコンウェハ 5 1の( 1 1 0 ) 面を、 二酸化シリコン層 2 6の表面に若干残して、 二酸化シリ コ ン層 2 6およびシリコンウェハ 5 1からなる膜で突起支持部 4 3を形成 することができる。 この場合、 シリコンウェハ 5 1の厚さによって、 突 起支持部 4 3の強さおよび可撓性を調節するようにしてもよい。 その後 の工程は、 第 1 2図 ( f ) に引き続いた工程と同様であるため、 説明を 省略する。  As shown in FIG. 12 (f ′), the (110) plane of the silicon wafer 51 is slightly left on the surface of the silicon dioxide layer 26, and the silicon dioxide layer 26 and The projection support portion 43 can be formed by a film made of the silicon wafer 51. In this case, the strength and flexibility of the protruding support portion 43 may be adjusted by the thickness of the silicon wafer 51. Subsequent steps are the same as the steps subsequent to FIG. 12 (f), and a description thereof will not be repeated.
上記した手法は、 第 1 2図に示した基板構成に限定されることなく、 以下に述べるシリコンゥヱハ 5 1の ( 1 1 0 ) 面あるいは、 シリコンゥ ェハ 2 8の ( 1 0 0 ) 面を、 二酸化シリコン層 2 6の方向へ異方性エツ チングすることにより、 任意の厚さのシリ コンゥ ハおよび二酸化シリ コン層 2 6からなる膜を形成する工程において有効である。 The method described above is not limited to the substrate configuration shown in FIG. The (110) plane of silicon wafer 51 or (100) plane of silicon wafer 28 described below is anisotropically etched in the direction of silicon dioxide layer 26 to obtain an arbitrary thickness. This is effective in the step of forming a film composed of the silicon wafer and the silicon dioxide layer 26.
第 1 3図 ( g ) は、 上記突起部 3 δの表面の二酸化シリコン膜 3 6の 表面に導電性被覆 3 7を形成し、 突起部 3 5の表面および配線形成用の パターンとなるように、 導電性被覆 3 7の表面を覆うホ トレジス トマス ク 3 8を形成する工程を示す。 導電性被覆 3 7 としては、 例えば、 スパ ッ夕 リ ング法あるいは蒸着法で、 クロムを 0. 0 2 m被着した後、 金 を 0. 2〜 0. 5 m被着した膜を形成するか、 または、 スパッタリ ン グ法あるいは蒸着法で、 チタンを 0. 0 2 m被着した後、 金を 0. 2 〜 0. 5 z m被着した膜を形成すればよい。  FIG. 13 (g) shows that a conductive coating 37 is formed on the surface of the silicon dioxide film 36 on the surface of the protrusion 3δ so as to form a pattern for the surface of the protrusion 35 and the wiring. The step of forming a photoresist mask 38 covering the surface of the conductive coating 37 will be described. As the conductive coating 37, for example, a film formed by depositing 0.02 m of chromium and then depositing 0.2 to 0.5 m of gold by a sputtering ring method or a vapor deposition method is formed. Alternatively, a film may be formed by depositing 0.02 m of titanium and then depositing 0.2 to 0.5 zm of gold by sputtering or vapor deposition.
第 1 3図 ( h ) は、 上記導電性被覆 3 7を上記ホ 卜レジス トマスク 3 8でエッチングして、 突起部 3 5の導電膜 3 9および配線 4 0を形成す る工程を示す。 なお、 第 1 3図 ( h ' ) および ( h'' ) は ( h ) を下方か ら見た平面図である。 ここで、 第 1 3図 ( h ' ) は、 シリコンゥヱハ 5 1 を、 突起部 3 5を形成した二酸化シリコン層 2 6に至るまで異方性エツ チングした部分の一部に、 導電膜 3 9を形成した例である。 ( h' ' ) は、 該異方性エッチングした部分の全部を覆おうように導電膜 3 9を形 成した例である。  FIG. 13 (h) shows a process of forming the conductive film 39 of the protrusion 35 and the wiring 40 by etching the conductive coating 37 with the photoresist mask 38. FIG. 13 (h ′) and (h ″) are plan views of (h) viewed from below. Here, FIG. 13 (h ') shows that the silicon conductive layer 51 is anisotropically etched to a part of the silicon dioxide layer 26 where the protrusions 35 are formed, and a conductive film 39 is formed. This is an example of forming. (H ′ ′) is an example in which the conductive film 39 is formed so as to cover the entire anisotropically etched portion.
また、 この例では、 シリコンウェハ 5 1に設けられた穴 5 1 aの開口 部全周で二酸化シリコン膜 2 6が支持され、 穴 5 1 aの開口が、 二酸化 シリコン膜 2 6で塞がれる。 このため、 この例は、 突起支持部 4 3につ いて、 片持ち梁構造の場合と比べて、 可撓性が小さいが、 逆に、 剛性が 大きくなるという特徴がある。  In this example, the silicon dioxide film 26 is supported all around the opening of the hole 51 a provided in the silicon wafer 51, and the opening of the hole 51 a is closed by the silicon dioxide film 26. . For this reason, this example is characterized in that the projection support portion 43 has a lower flexibility but a higher rigidity as compared with the case of the cantilever structure.
なお、 この工程後に、 接触端子先端部の四角錐形状を有した導電膜 3 9の表面に、 金あるいはロジウム等を 0 . 2 〜 2 m程度めつきするこ とにより、 電気的な接触特性を安定にすることができる。 After this step, the conductive film 3 having a quadrangular pyramid shape at the tip of the contact terminal was used. The electrical contact characteristics can be stabilized by plating gold or rhodium, etc., on the surface of 9 about 0.2 to 2 m.
第 1 4図 ( i ) および ( j ) は、 上記の突起部 3 5を表面に有した二 酸化シ リ コ ン膜 2 6を形成した上記シ リ コ ンウェハ 5 1および二酸化シ リコン 3 0からなる基板の二酸化シリ コン膜 3 0の表面と支持部材 4 5 との間に緩衝層 4 6を挟みこんで、 一体化する工程を示す。 第 1 4図 ( j ) の実施例では、 緩衝層 4 6は、 シ リ コ ンウェハ 5 1 に設けられる 穴 5 1 aにも充填される。 緩衝層 4 6 としては、 例えば、 厚さが 0 . 2 〜 3 m mで、 硬さ ( J I S A ) が 1 5 〜 7 0程度のシリ コンゴムが用い られる。 しかし、 緩衝層用の材料は、 これに限定されない。 なお、 二酸 化シリコン膜 3 0および支持部材 4 5の接着は、 シリコンゴム 4 6 自体 に接着力があるので、 格別に接着剤を必要としない。 なお、 接着剤を用 いて接着するようにしてもよい。 また、 本実施例では、 他の実施例と同 様に、 支持部材 4 5 として、 シリコン基板を用いる。  FIGS. 14 (i) and (j) show the above-mentioned silicon wafer 51 and silicon dioxide 30 on which a silicon dioxide film 26 having the above-mentioned projections 35 on the surface is formed. A step of sandwiching a buffer layer 46 between a surface of a silicon dioxide film 30 of a substrate and a support member 45 to integrate them will be described. In the embodiment shown in FIG. 14 (j), the buffer layer 46 is also filled in the hole 51a provided in the silicon wafer 51. As the buffer layer 46, for example, a silicon rubber having a thickness of 0.2 to 3 mm and a hardness (JISA) of about 15 to 70 is used. However, the material for the buffer layer is not limited to this. Note that the silicon dioxide film 30 and the support member 45 need not be specially bonded to each other because the silicon rubber 46 itself has an adhesive force. In addition, you may make it adhere using an adhesive agent. In the present embodiment, as in the other embodiments, a silicon substrate is used as the support member 45.
第 1 4図 ( k ) は、 上記の突起部 3 5を表面に有した二酸化シリコン 膜 2 6を形成した上記シ リ コ ンゥヱハ 5 1および二酸化シ リ コ ン 3 0か らなる基板の表面に絶縁膜 5 4を被着して用いる例である。  FIG. 14 (k) shows the surface of the silicon dioxide film 51 and silicon dioxide 30 on which the silicon dioxide film 26 having the above-mentioned projections 35 formed on the surface is formed. This is an example in which an insulating film 54 is attached and used.
また、 第 1 4図 ( 1 ) は、 この絶縁膜 5 4を、 二酸化シリコン膜 3 0 と支持部材 4 5 との間に挟みこんで、 一体化して用いる例である。 本実 施例では、 例えば、 厚さが 5〜 2 0 mのポリイ ミ ドを、 絶縁膜 5 4 と して用いている。 しかし、 絶縁膜は、 これに限定されない。 なお、 該絶 縁膜 5 4 と支持部材 4 5の間に緩衝層を挟み込む構造にしてもよい。 上記のように、 エラス トマおよびシリコン基板を付けた構造、 あるい は、 絶縁膜を付けた構造にすることにより、 接触端子部分の強度向上と、 弾性率の制御ができる。  FIG. 14 (1) shows an example in which the insulating film 54 is sandwiched between the silicon dioxide film 30 and the support member 45, and used integrally. In this embodiment, for example, a polyimide having a thickness of 5 to 20 m is used as the insulating film 54. However, the insulating film is not limited to this. Note that a structure in which a buffer layer is interposed between the insulating film 54 and the support member 45 may be adopted. As described above, by adopting a structure with an elastomer and a silicon substrate or a structure with an insulating film, it is possible to improve the strength of the contact terminal portion and control the elastic modulus.
次に、 第 2図に示す接続装置を形成するための他の製造プロセスにつ いて、 第 1 5図を参照して説明する。 なお、 第 1 2図〜第 1 4図に示す プロセスと同じ工程については、 説明を省略する。 Next, another manufacturing process for forming the connection device shown in FIG. 2 will be described. This will be described with reference to FIG. The description of the same steps as those shown in FIGS. 12 to 14 will be omitted.
第 1 5図 ( a ) は、 二酸化シリコン膜 3 3をマスクとして、 シリコン ウェハ 2 7の ( 1 0 0 ) 面を、 異方性ェッチングして先端が概ね尖った 形状の突起部 3 4を形成する工程を示す。 基板として、 厚さ 1〜 1 0 mの二酸化シリ コン 2 6を、 シリ コン単結晶からなるシリ コンゥヱハ 2 7および 5 1の間に挟みこんだ構造の S 0 I基板を用いて、 前記の第 1 2図 ( a ) — ( c ) までの工程と同様な工程により、 異方性エッチング を行う。  FIG. 15 (a) shows anisotropic etching of the (100) plane of silicon wafer 27 using silicon dioxide film 33 as a mask to form projections 34 having a substantially pointed tip. The following shows the steps performed. As the substrate, an S0I substrate having a structure in which silicon dioxide 26 having a thickness of 1 to 10 m is sandwiched between silicon wafers 27 and 51 made of a silicon single crystal is used. 1 2 Anisotropic etching is performed by the same process as the process from (a) to (c).
第 1 5図 ( b ) は、 上記二酸化シリコン膜 3 3のマスクが、 まだ突起 部 3 4に付着して残っている状態で、 シリ コンゥヱハ 2 7の異方性ェッ チングを中止し、 上記二酸化シリコン膜 3 3をエッチングにより除去す る工程を示す。 なお、 本エッチングでは、 二酸化シリ コン 2 6および二 酸化シリ コン膜 3 0 も同時に部分的あるいは全体がェツチングされる。 第 1 5図 ( c ) は、 熱酸化により、 突起 3 4およびシリコン単結晶 5 1の表面に二酸化シリコン 4 9および 5 0を形成して、 突起部 3 5を形 成する工程を示す。 シリ コンの酸化は、 例えば、 ゥュッ ト酸素中での熱 酸化により、 二酸化シリコン膜を 0. 5 m程度形成する。  FIG. 15 (b) shows that the silicon dioxide film 33 mask is still adhered to the protrusions 34 and the silicon wafer 27 is stopped from being anisotropically etched. A step of removing the silicon dioxide film 33 by etching will be described. In this etching, the silicon dioxide 26 and the silicon dioxide film 30 are also partially or entirely etched at the same time. FIG. 15 (c) shows a step of forming projections 35 by forming silicon dioxide 49 and 50 on the surface of projections 34 and silicon single crystal 51 by thermal oxidation. The silicon is oxidized by, for example, forming a silicon dioxide film of about 0.5 m by thermal oxidation in cut oxygen.
第 1 5図 ( d ) は、 前記の第 1 2図 ( e ) 〜第 1 3図 ( h ) までのェ 程と同様な工程により、 シリ コンゥヱハ 5 1の ( 1 1 0 ) 面をエツチン グすることにより、 穴 5 1 aを形成すると共に、 先端が概ね尖った形状 の突起部 3 5の表面の二酸化シリコン膜 4 9に、 導電膜 3 9および配線 4 0を形成する工程を示す。  FIG. 15 (d) shows an etching of the (110) surface of the silicon wafer 51 by the same steps as those in FIGS. 12 (e) to 13 (h). Then, a step of forming the hole 51a and forming the conductive film 39 and the wiring 40 on the silicon dioxide film 49 on the surface of the protruding portion 35 having a substantially sharp tip is shown.
なお、 この工程後に、 接触端子先端部の導電膜 3 9の表面に金あるい はロジウム等をめつきすることにより、 電気的な接触特性を安定にする ことができる。 なお、 本製造方法は、 第 1 2図〜第 1 4図の製造方法と比較して、 突 起 3 4の先端部に、 任意の大きさの平坦部を形成することができる。 こ の手法は、 第 1 5図に示した基板構成に限定されることなく、 二酸化シ リ コン膜をマスクにして、 シリコン単結晶を異方性ェッチングすること により突起部を形成する工程において、 有効である。 また、 本実施例で は、 穴 5 1 aの開口の全体が、 二酸化シリ コン膜 2 6で覆われる構造と なる。 従って、 上記第 1 3図 ( h ' ) または ( h ' ' ) で示した構造と同じ 特徴を有する。 特に、 この例では、 突起部 3 5が四角錐台形状であるの で、 先端の面積が、 四角錐形状のものと比べて大きい。 したがって、 突 起支持部 4 3の剛性が大きいことは、 突起の接触圧を上げることに役立 つことが期待できる。 After this step, gold or rhodium or the like is applied to the surface of the conductive film 39 at the tip of the contact terminal, so that the electrical contact characteristics can be stabilized. In the present manufacturing method, a flat portion of an arbitrary size can be formed at the tip of the protrusion 34 as compared with the manufacturing method shown in FIGS. 12 to 14. This method is not limited to the substrate configuration shown in FIG. 15, but may be used in a process of forming a projection by anisotropically etching a silicon single crystal using a silicon dioxide film as a mask. It is valid. Further, in this embodiment, the entire opening of the hole 51 a is covered with the silicon dioxide film 26. Therefore, it has the same features as the structure shown in FIG. 13 (h ′) or (h ′ ″). In particular, in this example, since the protrusion 35 has a truncated quadrangular pyramid shape, the area of the tip is larger than that of the quadrangular pyramid shape. Therefore, it can be expected that the high rigidity of the projection support portions 43 will be useful for increasing the contact pressure of the projections.
次に、 第 3図に示す接続装置を形成するための製造プロセスについて、 第 1 6図および第 1 7図を参照して説明する。 なお、 第 1 2図〜第 1 4 図に示すプロセスと同じ工程については、 説明を省略する。  Next, a manufacturing process for forming the connection device shown in FIG. 3 will be described with reference to FIG. 16 and FIG. The description of the same steps as those shown in FIGS. 12 to 14 will be omitted.
第 1 6図 ( a ) は、 厚さ 0. 5〜 5 mの二酸化シ リ コン 2 6をシリ コンウェハ 2 7および 2 8に挟みこんだ構造の S 0 1基板において、 シ リコンウェハ 2 7の ( 1 0 0 )面およびシ リ コ ンウェハ 2 8の ( 1 0 0 ) 面に熱酸化により二酸化シリコン膜 2 9および 3 0を形成する工程を示 す。 シリコンゥヱハ 2 7および 2 8の酸化は、 例えば、 ゥヱッ ト酸素中 での熱酸化により、 二酸化シリコン膜 2 9および 3 0を 0. 5 β m程度 形成する。  Fig. 16 (a) shows the S01 substrate with a structure in which silicon dioxide 26 with a thickness of 0.5 to 5 m is sandwiched between silicon wafers 27 and 28. The steps of forming silicon dioxide films 29 and 30 on the (100) plane and the (100) plane of the silicon wafer 28 by thermal oxidation are shown. The oxidation of the silicon wafers 27 and 28 forms the silicon dioxide films 29 and 30 to about 0.5 βm by, for example, thermal oxidation in wet oxygen.
第 1 6図 ( b ) は、 二酸化シリコン膜 2 6上に突起 3 4を形成し、 シ リコンウェハ 2 8に穴 2 8 aを形成すると共に、 突起部 3 5に導電性被 覆を形成する工程を示す。 すなわち、 この工程では、 第 1 2図 ( b ) 〜 ( d ) までの工程と同様な工程により、 二酸化シリコン膜 2 6上に、 先 端が尖った形状の突起 3 4を形成し、 次に、 第 1 2図 ( e ) 〜第 1 3図 ( h ) までの工程と同様な工程により、 シリ コンゥヱハ 2 8の ( 1 0 0 ) 面をエッチングすることにより、 シリコンゥヱハ 2 8に、 穴 2 8 aを形 成する。 この穴 2 8 aの開口部は、 二酸化シリ コン膜 2 6で覆われた状 態にある。 そして、 開口部を覆っている二酸化シリコン膜 2 6上に形成 した突起 3 4および二酸化シリコン膜 2 6上に、 導電膜 3 9および引き 出し用配線 4 0を形成する工程を示す。 FIG. 16 (b) shows a process of forming projections 34 on silicon dioxide film 26, forming holes 28a in silicon wafer 28, and forming a conductive coating on projections 35. Is shown. That is, in this step, a projection 34 having a pointed tip is formed on the silicon dioxide film 26 by the same steps as those shown in FIGS. 12 (b) to (d). , Fig. 12 (e)-Fig. 13 A hole 28a is formed in the silicon wafer 28 by etching the (100) plane of the silicon wafer 28 by a process similar to the process up to (h). The opening of the hole 28 a is covered with the silicon dioxide film 26. Then, a step of forming a conductive film 39 and a lead wire 40 on the projections 34 formed on the silicon dioxide film 26 covering the opening and the silicon dioxide film 26 will be described.
なお、 第 1 6図 ( b ' ) および ( b ' ' ) は、 ( b ) を下方から見た平面 図である。 ここで、 第 1 6図 ( b ' ) は、 シリ コンウェハ 2 8を、 突起 3 4を形成した二酸化シリコン層 2 6に至るまで異方性エッチングした部 分の一部に、 導電膜 3 9を形成した例である。 第 1 6図 ( b ' ' ) は、 該 異方性エッチングした部分の全部を覆おうように導電膜 3 9を形成した 例である。  FIG. 16 (b ′) and (b ′ ′) are plan views of (b) viewed from below. Here, FIG. 16 (b ′) shows that the silicon wafer 28 is anisotropically etched to the silicon dioxide layer 26 where the projections 34 are formed, and the conductive film 39 This is an example of forming. FIG. 16 (b ′ ″) shows an example in which a conductive film 39 is formed so as to cover the entire anisotropically etched portion.
なお、 この工程後に、 接触端子先端部の四角錐形状を有した導電膜 3 9の表面に金あるいはロジウム等を 0 . 2〜 2 m程度めつきすること により、 電気的な接触特性を安定にすることができる。  After this step, gold or rhodium or the like is attached to the surface of the conductive film 39 having a quadrangular pyramid shape at the tip of the contact terminal for about 0.2 to 2 m, so that electrical contact characteristics can be stably maintained. can do.
なお、 前記の第 1 4図 ( i ) ~ ( I ) までの工程と同様に、 第 1 7図 ( c ) 〜 ( f ) に示したように、 緩衝層 4 6、 および、 支持部材 4 5 と してシリコン基板を付けた構造、 あるいは、 絶緣膜 5 4を付けた構造に することにより、 接触端子部分の強度向上と、 弾性率の制御ができる。 第 1 8図に、 第 1 6図 ( b ) の突起部 3 5を支持する二酸化シリコン 層 2 6を、 片持ち梁の構造にするための製法を示す。 なお、 第 1 6図お よび第 1 7図に示すプロセスと同じ工程については、 説明を省略する。 第 1 8図 ( a ) は、 突起部 3 5を形成した二酸化シリコン層 2 6を、 ホ トレジス トマスク 5 5および 5 6により、 突起部 3 5の周辺の二酸化 シリ コン 2 6を、 上述したように、 コ字形状にエツチングすることによ り除去する工程を示す。 ホトレジストとして O F P R 8 0 0 (東京応化 工業) を塗布し、 突起部 3 5の周辺の二酸化シリコン 2 6の表面の 0 F P R 8 0 0 (東京応化工業) を、 コ字形状に露光し、 N M D 3 (東京応 化工業) により現像することによりホ トレジス トマスク 5 5を形成する c 次に、 ホ トレジス トマスク 5 5に覆われない、 すなわち、 露出した二酸 化シリ コン膜 2 6を、 フッ化水素酸とフッ化アンモニゥム液の 1 : 7混 液に浸析してエッチングする。 In addition, similarly to the above-mentioned steps of FIGS. 14 (i) to (I), as shown in FIGS. 17 (c) to (f), the buffer layer 46 and the support member 45 By using a structure with a silicon substrate or a structure with an insulating film 54, the strength of the contact terminal portion can be improved and the elastic modulus can be controlled. FIG. 18 shows a manufacturing method for forming the silicon dioxide layer 26 supporting the projection 35 of FIG. 16 (b) into a cantilever structure. The description of the same steps as the processes shown in FIGS. 16 and 17 will be omitted. FIG. 18 (a) shows that the silicon dioxide layer 26 on which the projections 35 are formed and the silicon dioxide 26 around the projections 35 are formed by the photoresist masks 55 and 56 as described above. Next, a process of removing the U-shaped portion by etching is shown. OFPR 800 as a photoresist (Tokyo Co., Ltd. is applied, and 0 FPR 800 (Tokyo Ohka Kogyo) on the surface of silicon dioxide 26 around the projections 35 is exposed in a U-shape and developed by NMD 3 (Tokyo Ohka Kogyo). then c forms a ho Torejisu mask 5 5 by, not covered by the host Torejisu mask 5 5, i.e., a diacid of silicon film 2 6 exposed, of hydrofluoric acid and fluoride Anmoniumu solution 1: 7 Etch by dipping in the mixed solution.
第 1 8図 ( b ) は、 ホ トレジス トマスク 5 5および 5 6を除去し、 突 起部 3 5を表面に有した二酸化シリコン膜 2 6の片持ち梁構造の突起支 持部 4 3を形成する工程を示したものである。 なお、 第 1 8図 ( b ' ) は 第 1 8図 ( b ) を下方から見た平面図である。 ホ トレジス トマスク 5 5 および 5 6は、 S 5 0 2 a (東京応化工業) を用いて除去する。  In FIG. 18 (b), the photoresist masks 55 and 56 are removed to form a projection support 43 of a cantilever structure of a silicon dioxide film 26 having a projection 35 on the surface. FIG. FIG. 18 (b ′) is a plan view of FIG. 18 (b) viewed from below. The photoresist masks 55 and 56 are removed using S502a (Tokyo Ohka Kogyo).
なお、 この例において、 接触端子先端部の四角錐形状を有した導電膜 3 9の表面に金あるいは口ジゥム等を 0 . 2〜 2 // m程度めつきするこ とにより、 電気的な接触特性を安定にすることができる。  In this example, gold or a mouth jam is attached to the surface of the conductive film 39 having a quadrangular pyramid shape at the tip of the contact terminal for about 0.2 to 2 // m to make electrical contact. Characteristics can be stabilized.
第 1 8図 ( c ) は、 片持ち梁構造の突起支持部 4 3を形成した上記シ リコンウェハ 2 8および二酸化シリコン 2 6、 3 0からなる基板の二酸 化シリコン膜 3 0の表面とシリコン基板 4 5 との間に緩衝層 4 6を挟み こんで、 一体化する工程を示す。  FIG. 18 (c) shows the surface of the silicon dioxide film 30 of the silicon wafer 28 and the silicon dioxide 26, 30 substrate on which the projection support portions 43 of the cantilever structure are formed and the silicon dioxide film 30. The step of sandwiching the buffer layer 46 between the substrate 45 and the substrate to integrate them will be described.
次に、 第 4図に示す接続装置を形成するための製造プロセスについて、 第 1 9図を参照して説明する。  Next, a manufacturing process for forming the connection device shown in FIG. 4 will be described with reference to FIG.
第 1 9図は、 基材となるシリコンゥヱハに異方性ェツチングにより四 角錐の穴を形成し、 このシ リ コ ンウェハを型として用いて、 四角錐の接 触端子先端部を薄膜で形成するための製造プロセスを工程順に示したも のである。  Fig. 19 shows a method for forming square pyramid holes by anisotropic etching in a silicon wafer as a base material, and using this silicon wafer as a mold to form the contact end of the square pyramid with a thin film. The manufacturing process is shown in the order of steps.
第 1 9図 ( a ) は、 厚さ 0 . 5〜 5 m程度の二酸化シ リ コ ン 2 6を シリコンゥヱハ 2 7および 2 8に挟みこんだ構造の S O I基板において、 シ リ コ ンゥヱハ 2 7および 2 8の ( 1 0 0 ) 面に、 熱酸化により二酸化 シ リ コ ン膜 2 9および 3 0を形成する工程を示す。 シ リ コ ンゥヱハ 2 7 および 2 8の酸化は、 例えば、 ゥエツ ト酸素中での熱酸化により、 二酸 化シ リ コ ン膜 2 9および 3 0を 0 . 5 m程度形成する。 FIG. 19 (a) shows an SOI substrate having a structure in which silicon dioxide 26 of about 0.5 to 5 m is sandwiched between silicon wafers 27 and 28. The step of forming silicon dioxide films 29 and 30 on the (100) planes of silicon wafers 27 and 28 by thermal oxidation is shown. Oxidation of the silicon wafers 27 and 28 forms the silicon dioxide films 29 and 30 to a thickness of about 0.5 m, for example, by thermal oxidation in dilute oxygen.
第 1 9図 ( b ) は、 上記二酸化シリ コン膜 2 9および 3 0の表面にホ トレジス トマスク 3 1および 3 2を形成し、 二酸化シリコン膜 3 0をェ ッチングする工程を示す。  FIG. 19 (b) shows a step of forming photoresist masks 31 and 32 on the surfaces of the silicon dioxide films 29 and 30 and etching the silicon dioxide film 30.
第 1 9図 ( c ) は、 上記ホ トレジス トマスク 3 1および 3 2を除去し、 二酸化シリコン膜 3 0をマスクとして、 シリコンウェハ 2 8の( 1 0 0 ) 面を、 二酸化シリコン層 2 6に至るまで異方性ェツチングして穴 2 8 a を形成した後、 シ リ コ ンウェハ 2 8の表面に熱酸化により、 二酸化シリ コン膜 5 7を形成する工程を示す。 シリコンの酸化は、 例えば、 ゥヱッ 卜酸素中での熱酸化により、 二酸化シリコン膜 5 7を 0 . 5 m程度形 成する。  FIG. 19 (c) shows that the photoresist masks 31 and 32 are removed and the (100) plane of the silicon wafer 28 is changed to the silicon dioxide layer 26 using the silicon dioxide film 30 as a mask. After forming holes 28a by anisotropic etching to the extent, a process of forming a silicon dioxide film 57 on the surface of the silicon wafer 28 by thermal oxidation will be described. In the oxidation of silicon, for example, the silicon dioxide film 57 is formed to a thickness of about 0.5 m by thermal oxidation in wet oxygen.
第 1 9図 ( d ) は、 上記二酸化シリコン膜 5 7の表面にホ トレジス ト マスク 5 8を形成し、 二酸化シリコン膜 2 6をエッチングして、 開口 2 FIG. 19 (d) shows that a photoresist mask 58 is formed on the surface of the silicon dioxide film 57, and the silicon dioxide film 26 is etched to form the opening 2.
6 bを形成する工程を示す。 6B shows a step of forming b.
第 1 9図 ( e ) は、 上記ホトレジス 卜マスク 5 8を除去し、 二酸化シ リコン膜 2 6をマスクとして、開口 2 6 bからシリコンウエノ、 2 7 の( 1 0 0 ) 面を異方性エッチングして、 四角錐の形状のエッチング穴 5 9を 形成する工程を示す。  FIG. 19 (e) shows that the photoresist mask 58 was removed and the silicon dioxide film 26 was used as a mask to make the silicon wafer and the (100) plane 27 anisotropic from the opening 26b. A step of forming an etching hole 59 in the shape of a quadrangular pyramid by etching will be described.
第 1 9図 ( f ) は、 導電性被覆 3 7を形成する工程を示す。 すなわち、 この工程では、 まず、 前記ェッチング穴 5 9および二酸化シリコン膜 2 FIG. 19 (f) shows a step of forming a conductive coating 37. That is, in this step, first, the etching hole 59 and the silicon dioxide film 2
6、 5 7および 3 0の表面に、 導電性被覆 3 7を形成する。 この後、 上 記エッチング穴 5 9の表面を覆う と共に、 配線形成用のパターンとなる ように、 該導電性被覆 3 7の表面にホ 卜レジストマスク 6 0を形成して、 該ホ 卜レジス トマスク 6 0から露出している該導電性被覆 3 7をエッチ ングする。 導電性被覆 3 7は、 例えば、 スパッタ リ ング法あるいは蒸着 法で、 金を 0 . 2〜 0 . 5 m被着して形成される。 また、 導電性被覆 3 7は、 金膜上に、 二ッケルを 1 〜 2 m程度、 スパッタ リ ング法ある いは蒸着法で成膜し、 その表面に、 ニッケル、 銅または両者を、 2〜 4 0 m程度めつきするようにしてもよい。 A conductive coating 37 is formed on the surfaces of 6, 57 and 30. Thereafter, a photoresist mask 60 is formed on the surface of the conductive coating 37 so as to cover the surface of the etching hole 59 and form a wiring pattern. The conductive coating 37 exposed from the photoresist mask 60 is etched. The conductive coating 37 is formed, for example, by depositing gold in a thickness of 0.2 to 0.5 m by a sputtering method or a vapor deposition method. The conductive coating 37 is formed by depositing nickel on a gold film by a thickness of about 1 to 2 m by a sputtering method or a vapor deposition method. It may be about 40 m.
なお、 導電性被覆 3 7 として、 金、 ロジウムなどの貴金属を、 0 . 1 〜 0 . 程度、 スパッタリ ング法あるいは蒸着法で被着した膜に、 ニッケルを 1 〜 2 m程度、 スパッタリ ング法あるいは蒸着法で被着し た膜を用いてもよい。  As the conductive coating 37, a noble metal such as gold or rhodium is applied in a thickness of about 0.1 to 0.1. Sputtering or vapor deposition is applied to a film, and nickel is applied in a thickness of about 1 to 2 m. A film deposited by a vapor deposition method may be used.
第 2 0図 ( g ) は、 上記の導電性被覆 3 7の表面に被着したホトレジ ス トマスク 6 0および二酸化シリコン膜 3 0の表面と、 支持部材 4 5で あるシリコン基板との間に、 緩衝層 4 6を充填して、 一体化する工程を 示す。 緩衝層 4 6 としては、 例えば、 シリコンゴムを使用する。 また、 ポリイ ミ ドを塗布して、 加熱硬化して形成したものを用いることができ る。 また、 熱硬化したポリィ ミ ドの下面に熱硬化前のポリイ ミ ドを塗布 した二層のポリィ ミ ド膜を、 上記導電性被覆 3 7の表面に接着して、 加 熱硬化して形成したものを用いることができる。  FIG. 20 (g) shows that the surface of the photoresist mask 60 and the silicon dioxide film 30 attached to the surface of the conductive coating 37 and the silicon substrate as the support member 45. The process of filling the buffer layer 46 and integrating it is shown. As the buffer layer 46, for example, silicon rubber is used. Further, a material formed by applying a polyimide and curing by heating can be used. Further, a two-layer polyimide film obtained by applying polyimide before heat curing to the lower surface of the thermally cured polyimide was adhered to the surface of the conductive coating 37, and was formed by heat curing. Can be used.
第 2 0図 ( h ) は、 二酸化シリコン膜 3 1およびシリ コンウェハ 2 7 を、 それぞれエッチングして除去して、 突起部 3 5を形成する工程を示 す。 この例は、 突起部 3 5をシリコンの単結晶の突起 3 4で構成される 上記した例と異なり、 突起部 3 5は、 シリコン単結晶では構成されてい ない。 なお、 この例において、 接触端子先端部の四角錐形状を有した 導電性被覆 3 7の表面に金あるいは口ジゥム等を 0 . 2〜 2 m程度め つきすることにより、 電気的な接触特性を安定にすることができる。 次に、 第 4図に示す接続装置を形成するための他の製造プロセスにつ いて、 第 2 1図を参照して説明する。 なお、 第 1 9図および第 2 0図に 示すプロセスと同じ工程については、 説明を省略する。 FIG. 20 (h) shows a step of forming the protrusion 35 by etching and removing the silicon dioxide film 31 and the silicon wafer 27, respectively. In this example, unlike the above-described example in which the protrusion 35 is formed of the silicon single crystal protrusion 34, the protrusion 35 is not formed of the silicon single crystal. In this example, the electrical contact characteristics were improved by attaching gold or a mouthpiece to the surface of the conductive coating 37 having a quadrangular pyramid shape at the tip of the contact terminal for about 0.2 to 2 m. Can be stable. Next, another manufacturing process for forming the connection device shown in FIG. 4 will be described. This will be described with reference to FIG. The description of the same steps as those shown in FIGS. 19 and 20 will be omitted.
第 2 1図 ( a ) は、 厚さ 0. 5〜 5 m程度の二酸化シリコン 2 6を シリ コンゥヱハ 2 7および 2 8に挟みこんだ構造の S O I基板において 前記の第 1 9図 ( e ) までの工程と同様な工程により、 二酸化シリコン 膜 2 6をマスクとして、 シリコンゥヱハ 2 7の ( 1 0 0 ) 面を異方性ェ ツチングして、 四角錐の形状のエツチング穴 5 9を形成した後、 該シリ コンゥヱハ 2 7のエッチング穴 5 9の表面に、 二酸化シリコン膜 6 1を 形成する工程を示す。  FIG. 21 (a) shows an SOI substrate having a structure in which silicon dioxide 26 having a thickness of about 0.5 to 5 m is sandwiched between silicon wafers 27 and 28 until FIG. By a process similar to the above process, using the silicon dioxide film 26 as a mask, the (100) plane of the silicon wafer 27 is anisotropically etched to form a square pyramid-shaped etching hole 59, A step of forming a silicon dioxide film 61 on the surface of the etching hole 59 of the silicon wafer 27 will be described.
第 2 1図 ( b ) は、 導電性被覆 3 7を形成する工程を示す。 まず、 二 酸化シリコン膜 6 1、 2 6、 5 7および 3 0の表面に、 下地膜 3 7 aお よび導電性被覆 3 7を形成する。 この後、 上記エッチング穴 5 9の二酸 化シリコン膜 6 1の表面を覆い、 配線形成用のパターンとなるように、 前記導電性被覆 3 7の表面を覆うホ トレジス トマスク 6 2を形成して、 該ホ トレジス トマスク 6 2から露出している該導電性被覆 3 7および該 下地膜 3 7 aをエッチングする。 下地膜 3 7 aは、 例えば、 スパッタ リ ング法あるいは蒸着法で、 クロムを 0. 0 2 m被着して形成する。 導 電性被覆 3 7は、 例えば、 スパッタ リ ング法あるいは蒸着法で、 下地膜 3 7 a上に、 金を 0. 2〜 0. 5 m被着して形成される。 また、 下地 膜 3 7 aは、 クロムに代えて、 チタンを、 スパッタ リ ング法あるいは蒸 着法で、 0. 0 2 m被着してもよい。 さらに、 導電性被覆 3 7は、 金 膜上に、 ニッケルを 1 ~ 2 m程度、 スパッ夕リ ング法あるいは蒸着法 で成膜し、 その表面に、 二ッゲル、 銅または両者を、 2〜 4 0 m程度 めっきするようにしてもよい。  FIG. 21 (b) shows a step of forming a conductive coating 37. First, a base film 37 a and a conductive coating 37 are formed on the surfaces of the silicon dioxide films 61, 26, 57 and 30. Thereafter, a photoresist mask 62 covering the surface of the conductive coating 37 is formed so as to cover the surface of the silicon dioxide film 61 in the etching hole 59 and form a pattern for forming a wiring. Then, the conductive coating 37 and the base film 37a exposed from the photoresist mask 62 are etched. The base film 37a is formed by, for example, applying 0.02 m of chromium by a sputtering method or a vapor deposition method. The conductive coating 37 is formed, for example, by depositing 0.2 to 0.5 m of gold on the base film 37a by a sputtering method or a vapor deposition method. In addition, titanium may be applied to the base film 37a in a thickness of 0.02 m in place of chromium by sputtering or vapor deposition. Further, the conductive coating 37 is formed by forming a nickel film of about 1 to 2 m on a gold film by a sputtering method or a vapor deposition method, and coating Nigel, copper or both on the surface with 2 to 4 m. About 0 m may be plated.
なお、 導電性被覆 3 7として、 金、 ロジウムなどの貴金属を、 0. 1 〜 0. 5 m程度、 スパッタリ ング法あるいは蒸着法で被着した膜に、 ニッケルを 1 〜 2 m程度、 スパッタ リ ング法あるいは蒸着法で被着し た膜を用いてもよい。 In addition, as the conductive coating 37, a noble metal such as gold or rhodium is applied to a film formed by sputtering or vapor deposition in a thickness of about 0.1 to 0.5 m. A film in which nickel is applied by about 1 to 2 m by a sputtering method or a vapor deposition method may be used.
第 2 1図 ( c ) は、 上記の導電性被覆 3 7の表面に被着したホ 卜レジ ス トマスク 6 2および二酸化シリ コン膜 3 0の表面と、 支持部材 4 5で あるシリ コン基板との間に、 緩衝層 4 6を充填して一体化する工程を示 す。 緩衝層 4 6 としては、 例えば、 シリ コンゴムを使用する。 また、 ポ リィ ミ ドを塗布して、 加熱硬化して形成したものを用いることができる また、 熱硬化したポリィ ミ ドの下面に熱硬化前のポリィ ミ ドを塗布した 二層のポリイ ミ ド膜を、 上記導電性被覆 3 7の表面に接着して、 加熱硬 化して形成したものを用いることができる。  FIG. 21 (c) shows the photo resist mask 62 and the surface of the silicon dioxide film 30 attached to the surface of the conductive coating 37 and the silicon substrate as the support member 45. During this step, the process of filling the buffer layer 46 and integrating it is shown. As the buffer layer 46, for example, silicon rubber is used. In addition, it is possible to use a material formed by applying a polyimide and heat-curing. A two-layer polyimide obtained by applying the polyimide before the heat curing to the lower surface of the thermoset polyimide is used. A film formed by bonding a film to the surface of the conductive coating 37 and heat-hardening the film can be used.
第 2 1図 ( d ) は、 突起部 3 5を形成する工程を示す。 すなわち、 ま ず、 二酸化シリ コン膜 3 1およびシリ コンゥヱハ 2 7を、 それぞれェッ チングして除去する。 この後、 突起部 3 5を覆っている二酸化シリコン 6 1をエッチングして除去した後、 下地膜 3 7 aをエッチングして除去 する。 なお、 この例において、 接触端子先端部の四角錐形状を有した 導電性被覆 3 7の表面に金あるいはロジウム等を 0 . 2〜 2 m程度め つきすることにより、 電気的な接触特性を安定にすることができる。 第 2 2図に、 第 2 0図 ( h ) の突起部 3 5を形成した二酸化シリコン 層 2 6を、 片持ち梁の構造にする製法を示す。 なお、 第 1 9図および第 2 0図に示すプロセスと同じ工程については、 説明を省略する。  FIG. 21 (d) shows a step of forming the protrusion 35. That is, first, the silicon dioxide film 31 and the silicon wafer 27 are respectively removed by etching. Thereafter, the silicon dioxide 61 covering the protrusions 35 is removed by etching, and then the base film 37a is removed by etching. In this example, gold or rhodium was applied to the surface of the conductive coating 37 having a quadrangular pyramid shape at the tip of the contact terminal for about 0.2 to 2 m to stabilize the electrical contact characteristics. Can be FIG. 22 shows a method of forming the silicon dioxide layer 26 having the projections 35 of FIG. 20 (h) into a cantilever structure. The description of the same steps as those shown in FIGS. 19 and 20 will be omitted.
第 2 2図 ( a ) は、 前記の第 1 9図 ( a ) 〜 ( c ) までの工程と同様 な工程により、 二酸化シリコン層 5 7を形成した後、 ホ 卜レジス トマス ク 6 3を形成し、 二酸化シリコン層 2 6を、 該ホ トレジス トマスク 6 3 により、 突起部を形成する位置 6 4の二酸化シリコン膜 2 6、 および該 突起部の周辺の二酸化シリコン層 2 6をコ字形状 6 5にエッチングによ り除去する工程を示す。 ホトレジス トとして 0 F P R 8 0 0 (東京応化 工業) を塗布し、 突起部形成位置 6 4の二酸化シリコン膜 2 6を正方形 に、 また、 該突起部形成位置の周辺の二酸化シリコン膜 2 6の表面の 0 F P R 8 0 0 (東京応化工業) を、 コ字形状に露光し、 NMD 3 (東京 応化工業) により現像することによりホ トレジス トマスク 6 3を形成す る。 次に、 ホ トレジス トマスク 6 3から露出した二酸化シリ コン膜 2 6 を、 フッ化水素酸とフッ化アンモニゥム液の 1 : 7混液に浸析してエツ チングする。 FIG. 22 (a) shows a photo resist mask 63 after a silicon dioxide layer 57 is formed by the same steps as those in FIG. 19 (a) to (c). Then, the silicon dioxide film 26 at the position 64 where the protrusion is formed and the silicon dioxide layer 26 around the protrusion are formed into a U-shape 65 by the photoresist mask 63. Figure 3 shows the process of removing by etching. 0 FPR 800 0 0 (Tokyo The silicon dioxide film 26 at the protrusion formation position 64 is formed into a square, and the FDP 800 of the surface of the silicon dioxide film 26 around the protrusion formation position is applied (Tokyo Ohka Kogyo Co., Ltd.). Is exposed in a U-shape and developed by NMD 3 (Tokyo Ohka Kogyo) to form a photoresist mask 63. Next, the silicon dioxide film 26 exposed from the photoresist mask 63 is immersed and etched in a 1: 7 mixture of hydrofluoric acid and ammonium fluoride.
第 2 2図 ( b ) は、 ホ トレジス トマスク 6 3を除去し、 二酸化シリ コ ン膜 2 6をマスクとして、 シリコンゥヱハ 2 7の ( 1 0 0 ) 面を異方性 ェッチングして、 四角錐のエッチング穴 5 9を形成すると同時に、 シリ コンゥヱハ 2 7をコ字形状 6 6にエッチングし、 該シリコンウェハ 2 7 のェッチング面および二酸化シリコン膜 2 6、 5 7および 3 0の表面に、 導電性被覆 3 7を形成する工程を示したものである。 導電性被覆 3 7は、 第 1 9図 ( f ) と同様な材料で形成すればよい。 なお、 該シリコンゥェ ハ 2 7のエッチング面は、 第 2 1図 ( a ) と同様に熱酸化により、 二酸 化シリ コン膜 6 1を形成して、 下地膜 3 7 aおよび導電性被覆 3 7を形 成してもよい。  In FIG. 22 (b), the photoresist mask 63 is removed and the (100) plane of the silicon wafer 27 is anisotropically etched using the silicon dioxide film 26 as a mask to form a square pyramid. Simultaneously with the formation of the etching hole 59, the silicon wafer 27 is etched into a U-shape 66, and a conductive coating is formed on the etching surface of the silicon wafer 27 and the surfaces of the silicon dioxide films 26, 57 and 30. 37 shows a step of forming 37. The conductive coating 37 may be formed of the same material as in FIG. 19 (f). The etched surface of the silicon wafer 27 is formed by forming a silicon dioxide film 61 by thermal oxidation in the same manner as in FIG. 21 (a) to form a base film 37a and a conductive coating 37. May be formed.
第 2 2図 ( c ) は、 上記の四角錐のエツチング穴 5 9の表面を覆い、 コ字形状のエッチング面 6 6の導電性被覆 3 7を被覆せず、 配線形成用 のパターンを形成するように、 導電性被覆 3 7の表面を覆うホ トレジス 卜マスク 6 7を形成した後、 該導電性被覆 3 7を除去する工程を示す。 第 2 2図 ( d ) は、 上記の導電性被覆 3 7の表面に被着したホ 卜レジ ス トマスク 6 7および二酸化シリコン膜 3 0の表面と、 支持部材 4 5で あるシリ コン基板との間に、 緩衝層 4 6を挟みこんで一体化した後、 二 酸化シリコン膜 2 9およびシリ コンウェハ 2 7を除去する工程を示す。 なお、 第 2 2図 ( d ' ) は、 ( d ) を下方から見た平面図である。 第 2 3図に、 本発明の接続装置の第 5実施例の製造工程の一部を示す c 本実施例は、 基本的には、 第 1 8図に示した実施例と同様のプロセスで 製造することができる。 異なる点は、 第 1 8図の例では、 突起支持部 4 3を片持ち梁構造に形成しているが、 本実施例では、 突起支持部 4 3を、 ブリ ッジ構造、 すなわち、 両持ち構造に形成する点にある。 従って、 プ ロセスにおいて相違する点は、 突起支持部 4 3の回りの二酸化シリ コン 膜 2 6を、 コ字形状にエッチングするか、 2本並行する溝状にエツチン グするかのマスクパターンの相違である。 従って、 製造プロセスの詳細 は、 第 1 8図の例を含めて、 既に述べられているので、 ここでは、 説明 を省略する。 FIG. 22 (c) shows a pattern for wiring formation which covers the surface of the above-mentioned square pyramid etching hole 59, does not cover the conductive coating 37 of the U-shaped etching surface 66. Thus, a step of forming the photoresist mask 67 covering the surface of the conductive coating 37 and then removing the conductive coating 37 will be described. FIG. 22 (d) shows the relationship between the surface of the photoresist mask 67 and the surface of the silicon dioxide film 30 applied to the surface of the conductive coating 37 and the silicon substrate as the support member 45. A step of removing the silicon dioxide film 29 and the silicon wafer 27 after integrating them with the buffer layer 46 interposed therebetween is shown. FIG. 22 (d ′) is a plan view of (d) viewed from below. FIG. 23 shows a part of the manufacturing process of the fifth embodiment of the connection device of the present invention. C This embodiment is basically manufactured by the same process as the embodiment shown in FIG. can do. The difference is that, in the example of FIG. 18, the protrusion support portions 43 are formed in a cantilever structure, but in the present embodiment, the protrusion support portions 43 are formed in a bridge structure, that is, a double-supported structure. The point is that it is formed into a structure. Therefore, the difference in the process is that the silicon dioxide film 26 around the projection support 43 is etched in a U-shape or etched in two parallel grooves. It is. Therefore, since the details of the manufacturing process have already been described, including the example of FIG. 18, the description is omitted here.
なお、 この例は、 片持ち梁構造の場合より、 可撓性は小さいが、 剛性 は、 片持ち梁構造のものより大きい。 従って、 本実施例は、 片持ち梁構 造のものと、 穴 2 8 a (または 5 1 a ) の開口部全体を塞ぐ構造のもの との中間的な性質を有する。  In this example, the flexibility is smaller than that of the cantilever structure, but the rigidity is larger than that of the cantilever structure. Therefore, this embodiment has an intermediate property between that of the cantilever structure and that of the structure that covers the entire opening of the hole 28a (or 51a).
なお、 第 1図ないし第 2 3図に示した実施例は、 第 2 4図 ( a ) およ び ( b ) に示すような二酸化シリコン膜の正方形のマスク 6 8を用いて、 シリコン単結晶の ( 1 0 0 ) 面を異方性エッチングして、 四角錐の接触 先端部を有する接触端子を形成する例である。 この場合、 接触端子の先 端部を形成するための二酸化シリコン膜の正方形のマスクは、 シリコン ウエノヽ 2 7の ( 1 0 0 ) 面において、 第 2 4図 ( a ) に示すように、 一 辺が 〈 1 1 0〉 方向と 4 5度の角をなす方位に配置するか、 あるいは、 第 2 4図 ( b ) に示すように、 一辺が < 1 1 0〉 方向と平行の方位に配 置するのが望ましい。  Note that the embodiment shown in FIGS. 1 to 23 uses a silicon single crystal silicon mask 68 as shown in FIGS. 24 (a) and (b) to form a silicon single crystal. In this example, the (100) plane is anisotropically etched to form a contact terminal having a quadrangular pyramid contact tip. In this case, as shown in FIG. 24 (a), a square mask of a silicon dioxide film for forming the tip of the contact terminal is formed on the (100) plane of the silicon wafer 27 as shown in FIG. Either place the sides at an angle of 45 degrees with the <110> direction or, as shown in Fig. 24 (b), place one side parallel to the <110> direction. It is desirable to place them.
なお、 これまで述べた例では、 接触端子を形成するための基材として、 シリコンゥヱハを用いている。 しかし、 本発明は、 これに限定されない。 異方性ェッチングによって、 先端が尖った形状の穴が形成できる結晶で あれば、 他の結晶を用いてもよい。 In the examples described so far, silicon wafers are used as the base material for forming the contact terminals. However, the present invention is not limited to this. A crystal that can form a sharp-pointed hole by anisotropic etching If so, another crystal may be used.
また、 突起を形成する第 2の基材、 例えば、 シリコンゥヱハ 2 7につ いては、 異方性エッチングが必要である。 しかし、 突起の形成に直接用 いられない第 1の基材、 例えば、 シリ コンゥヱハ 2 8または 5 1は、 必 ずしも異方性エッチングである必要はない。 通常のエッチングであって もよい。 従って、 第 1の基材であるシリ コンゥヱハ 2 8および 5 1は、 単結晶でなくてもよい。 例えば、 多結晶シリコン、 アモルファスシリ コ ンであつてもよい。  Further, anisotropic etching is necessary for the second base material on which the projections are formed, for example, silicon wafer 27. However, the first substrate that is not directly used for forming the protrusions, for example, silicon wafers 28 or 51, does not necessarily need to be anisotropically etched. Normal etching may be used. Therefore, the silicon substrates 28 and 51 as the first base material need not be single crystals. For example, polycrystalline silicon or amorphous silicon may be used.
さらに、 上記説明では、 基材を便宜状シリコンウェハとしたが、 ゥェ ハとして製作されたものに限定する趣旨ではない。 上記したプロセスで、 突起部が形成できるものであればよい。  Furthermore, in the above description, the base material is a convenience silicon wafer, but this is not intended to limit the invention to a wafer manufactured as a wafer. What is necessary is just to be able to form a projection by the above-mentioned process.
また、 上記各例では、 接触端子として設けられたものは、 全て配線が 接続され、 有効に使用できるものである。 しかし、 配線が接続されない、 単なる突起としてのみ機能するダミ一接触端子を設けることができる。 すなわち、 接触端子の高さと同じか、 または、 適宜に設定した高さで、 ダミーの接触端子を、 必要に応じて適度に配置することができる。 これ により、 接触端子の高さばらつき、 または、 被接触対象への押し付け圧 力の調整が容易になり、 接触特性および信頼性を向上することができる。 上記した実施例において、 片持ち梁状の突起支持部 4 3は、 長方形状の 例を示したが、 これに限られない。 例えば、 台形状、 平行四辺形状とす ることができる。  In each of the above examples, all of the terminals provided as the contact terminals are connected to the wiring and can be used effectively. However, it is possible to provide a dummy contact terminal to which no wiring is connected and which functions only as a simple projection. That is, the dummy contact terminals can be appropriately arranged as necessary at the same height as the contact terminals or at an appropriately set height. This facilitates the adjustment of the height variation of the contact terminals or the adjustment of the pressing pressure against the contact target, thereby improving the contact characteristics and reliability. In the above-described embodiment, the cantilever-shaped projection support portion 43 has a rectangular shape, but is not limited thereto. For example, the shape may be a trapezoid or a parallelogram.
また、 上記各実施例では、 突起部 3 5ごとに穴 2 8 aまたは穴 5 1 a を設けている例を示したが、 本発明は、 これに限られない。 すなわち、 複数の突起部 3 5ごとに、 1の穴 2 8 aまたは穴 5 1 aを設ける構成と してもよい。 すなわち、 一つの突起支持部で複数の突起部 3 5を支持す る構造とすることができる。 この場合、 一つの突起部ごとに独立して引 き出し用配線 4 0を設けて、 接触端子 4 2を突起部 3 5ごとに形成する ことができる。 次に、 それらの例について説明する。 なお、 一つの突起 支持部において支持される複数の突起部について、 1または 2以上の共 通の電極を設ける構成としてもよい。 Further, in each of the above embodiments, the example in which the hole 28a or the hole 51a is provided for each protrusion 35 is shown, but the present invention is not limited to this. That is, one hole 28a or hole 51a may be provided for each of the plurality of protrusions 35. That is, a structure in which one projection supporting portion supports a plurality of projections 35 can be provided. In this case, pull out independently for each protrusion. By providing the lead-out wiring 40, the contact terminal 42 can be formed for each projection 35. Next, those examples will be described. Note that one or more common electrodes may be provided for a plurality of projections supported by one projection support.
第 3 5図 ( a ) — ( d ) に示す例は、 それぞれ、 第 1の基材としてシ リ コンウェハ 5 1を用い、 第 2の基材としてシリコンウェハ 2 7を用い た実施例である。  Each of the examples shown in FIGS. 35 (a) to (d) is an example in which a silicon wafer 51 is used as a first base material and a silicon wafer 27 is used as a second base material.
これらの例は、 いずれも、 第 1 2図 ( a ) — ( d ) に示す工程と同様 にして、 突起部 3 5を形成する。 そして、 第 1 2図 ( e ) および ( f ) に示す工程と同様に、 穴 5 1 aを異方性エッチングによりあける。 ただ し、 この例では、 複数個の突起部 3 5がその開口面に位置する大きさで、 穴 5 1 aを設ける。 そのため、 マスクをその大きさで開口させる。 また、 この穴 5 1 aは、 二酸化シリコン膜 2 6に達するまで行われる。 なお、 第 1 2図 ( f , ) のように、 シリコンゥヱハ 5 1の一部を残すようにし てもよい。  In each of these examples, the projection 35 is formed in the same manner as the steps shown in FIGS. 12 (a) to 12 (d). Then, similarly to the steps shown in FIGS. 12 (e) and (f), a hole 51a is opened by anisotropic etching. However, in this example, the holes 51a are provided in such a size that the plurality of protrusions 35 are located on the opening surface. Therefore, the mask is opened to the size. The hole 51 a is formed until the silicon dioxide film 26 is reached. Note that a part of the silicon wafer 51 may be left as shown in FIG. 12 (f,).
ついで、 第 1 3図 ( g ) および ( h ) に示すように、 突起部 3 5を覆 う導電膜 3 9 と、 引出し用配線 4 0 とを設ける。 さらに、 第 1 4図 ( i ) 一 ( 1 ) に示した例と同じように、 支持部材 4 5であるシリコン基板に 固定する。これについては、穴 5 1 aの大きさを除いては、第 1 4図( i ) — ( 1 ) と同じであるので、 説明を省略する。  Next, as shown in FIGS. 13 (g) and (h), a conductive film 39 covering the protrusion 35 and a lead wire 40 are provided. Further, the support member 45 is fixed to a silicon substrate as in the example shown in FIG. 14 (i) -1 (1). Since this is the same as FIG. 14 (i)-(1) except for the size of the hole 51a, the description is omitted.
第 3 6図 ( a ) — ( d ) に示す例は、 それぞれ、 第 1の基材としてシ リコンゥヱハ 2 8を用い、 第 2の基材としてシリコンゥヱハ 2 7を用い た実施例である。  Each of the examples shown in FIGS. 36 (a) to (d) is an example using silicon wafer 28 as the first base material and silicon wafer 27 as the second base material.
これらの例は、 いずれも、 第 ί 6図 ( a ) および ( b ) に示す工程と 同様にして、突起部 3 5を形成する。そして、第 1 2図( e )および( ί ) に示す工程と同様に、 穴 2 8 aを異方性エッチングによりあける。 ただ し、 この例では、 複数個の突起部 3 5がその開口面に位置する大きさで、 穴 2 8 aを設ける。 そのため、 マスクをその大きさで開口させる。 また、 この穴 2 8 aは、 二酸化シリコン膜 2 6に達するまで行われる。 なお、 第 1 2図 ( f ' ) のように、 シリ コンゥヱハ 2 8の一部を残すようにして もよい。 In each of these examples, the projection 35 is formed in the same manner as in the steps shown in FIGS. 6 (a) and 6 (b). Then, similarly to the process shown in FIGS. 12 (e) and (ί), a hole 28a is opened by anisotropic etching. However However, in this example, a hole 28a is provided with a size such that the plurality of protrusions 35 are located on the opening surface. Therefore, the mask is opened to the size. The hole 28 a is formed until the silicon dioxide film 26 is reached. Note that a part of the silicon wafer 28 may be left as shown in FIG. 12 (f ').
ついで、 第 1 3図 ( g ) および ( h ) に示すように、 突起部 3 5を覆 う導電膜 3 9 と、 引出し用配線 4 0 とを設ける。 さらに、 第 1 7図 ( c ) 一 ( f ) に示した例と同じように、 支持部材 4 5であるシリコン基板に 固定する。これについては、穴 2 8 aの大きさを除いては、第 1 7図( c ) 一 ( f ) と同じであるので、 説明を省略する。  Next, as shown in FIGS. 13 (g) and (h), a conductive film 39 covering the protrusion 35 and a lead wire 40 are provided. Further, as in the example shown in FIG. 17 (c)-(f), it is fixed to the silicon substrate which is the support member 45. Since this is the same as FIG. 17 (c)-(f) except for the size of the hole 28a, the description is omitted.
次に、 突起部 3 5を、 第 1の基材の面に沿って、 どのように配列する かに関するいくつかの例を示す。 第 3 7図 ( a ) に示す例は、 測定対象 のチップごとに、 接触端子の突起部 3 5の配列を対応させたものである。 すなわち、 測定対象のチップ対応に、 シリ コンウェハ 2 8上に想定され たブロック 2 0 1ごとに、 複数の突起部 3 5を配列したものである。 第 3 7図 ( b ) に示す例は、 測定対象のチップ複数個 (本実施例では 2個 の例を示している) ごとに、 シリコンゥヱハ 2 8上に想定されたプロッ ク 2 0 1ごとに、 複数個の突起部 3 5を配列したものである。 また、 第 3 7図 ( c ) に示す例は、 シリ コンゥヱハ 2 8上に列状のプロックを想 定し、 このブロックごとに、 複数個の突起部を配列したものである。 次に、 上記の各実施例で述べられた接触装置の具体的な使用例につい て説明する。 使用例としては、 例えば、 半導体の検査装置が挙げられる。 また、 T F T型液晶ディスプレイの検査装置にも適用できる。  Next, some examples of how the protrusions 35 are arranged along the surface of the first base material will be described. In the example shown in FIG. 37 (a), the arrangement of the projections 35 of the contact terminals is made to correspond to each chip to be measured. That is, a plurality of protrusions 35 are arranged for each block 201 assumed on the silicon wafer 28 in correspondence with a chip to be measured. In the example shown in Fig. 37 (b), the number of chips to be measured (two in this example is shown) and the number of blocks 201 assumed on silicon wafer 28 are shown. A plurality of protrusions 35 are arranged. In the example shown in FIG. 37 (c), a row of blocks is assumed on a silicon wafer 28, and a plurality of protrusions are arranged for each block. Next, specific examples of use of the contact device described in each of the above embodiments will be described. An example of use is a semiconductor inspection device. Further, the present invention can be applied to an inspection apparatus for a TFT type liquid crystal display.
第 2 5図は、 本発明の接続装置を用いた一実施例である検査装置の要 部を示す説明図である。  FIG. 25 is an explanatory view showing a main part of an inspection apparatus which is an embodiment using the connection device of the present invention.
本実施例において、 検査装置は、 半導体装置の製造におけるウェハプ ローバとして構成されている。 この検査装置は、 被検査物を支持する試 料支持系 1 2 0 と、 被検査物に接触して電気信号の授受を行なうプロ一 ブ系 1 0 0 と、 試料支持系 1 2 0の動作を制御する駆動制御系 1 5 0 と、 測定を行なうテスタ 1 7 0 とで構成される。 なお、 被検査物としては、 半導体ゥヱハ 1を対象としている。 この半導体ウェハ 1の表面には、 外 部接鐃電極としての複数の電極 1 aが形成されている。 In this embodiment, the inspection apparatus is a wafer processing device in the manufacture of semiconductor devices. It is configured as a rover. This inspection apparatus is composed of a sample support system 120 that supports the test object, a probe system 100 that contacts the test object to transmit and receive electrical signals, and an operation of the sample support system 120. And a tester 170 that performs measurement. It should be noted that the semiconductor device to be inspected is the semiconductor device 1. On the surface of the semiconductor wafer 1, a plurality of electrodes 1a are formed as external contact electrodes.
試料支持系 1 2 0は、 半導体ウェハ 1が着脱自在に載置される、 ほぼ 水平に設けられた試料台 1 2 2 と、 この試料台 1 2 2を支持する、 垂直 に配置される昇降軸 1 2 4 と、 この昇降軸 1 2 4を昇降駆動する昇降駆 動部 1 2 5 と、 この昇降駆動部 1 2 5を支持する X— Yステージ 1 2 7 とで構成される。 X— Yステージ 1 2 7は、 筐体 1 2 6の上に固定され る。 昇降駆動部 1 2 5は、 例えば、 ステツ ビングモータなどからなる。 X— Yステージ 1 2 7の水平面内における移動動作と、 昇降駆動部 1 2 5による上下動などを組み合わせることにより、 試料台 1 2 2の水平お よび垂直方向における位置決め動作が行われるものである。 また、 試料 台 1 2 2には、 図示しない回動機構が設けられており、 水平面内におけ る試料台 1 2 2の回動変位が可能にされている。  The sample support system 120 includes a substantially horizontally provided sample stage 122 on which the semiconductor wafer 1 is detachably mounted, and a vertically arranged elevating shaft supporting the sample stage 122. It comprises an elevating drive unit 125 that drives the elevating shaft 124 up and down, and an XY stage 127 that supports the elevating drive unit 125. The X—Y stage 127 is fixed on the housing 126. The elevating drive unit 125 includes, for example, a stepping motor. The horizontal and vertical positioning of the sample stage 122 is performed by combining the movement of the X-Y stage 127 in the horizontal plane with the vertical movement of the elevation drive unit 125. . Further, the sample stage 122 is provided with a rotating mechanism (not shown) so that the sample stage 122 can be rotated and displaced in a horizontal plane.
試料台 1 2 2の上方には、 プローブ系 1 0 0が配置される。 すなわち、 当該試料台 1 2 2に平行に対向する姿勢で、 接続装置 1 0 0 aおよび配 線基板 7 0が設けられる。 この接続装置 1 0 0 aには、 複数個の接触端 子 4 2を有する端子配列体 2 0が、 被検査物と対抗する位置に設けられ る。 この端子配列体 2 0は、 上述した第 1図で示されるものが用いられ る。 すなわち、 この端子配列体 2 0は、 シリコンゥヱハ 2 8 と、 これに 支持される接触端子 4 2群と、 緩衝層 4 6および支持部材 4 5がー体的 に設けられて構成される。 各々の接触端子 4 2は、 該接続装置 1 0 0 a の延長配線シー 卜 Ί 1に設けられた引き出し用延長配線 7 2を介して、 配線基板 7 0の下部電極 7 3および内部配線 7 0 a とを通して、 該配線 基板 7 0に設けられた接続端子 7 0 bに接続されている。 なお、 本実施 例では、 接続端子 7 0 bは、 同軸コネクタで構成される。 この接続端子 7 0 bに接続されるケーブル 1 7 1を介して、 テスタ 1 Ί 0 と接続され る。 Above the sample stage 122, a probe system 100 is arranged. That is, the connection device 100a and the wiring board 70 are provided in a posture facing the sample table 122 in parallel. In this connection device 100a, a terminal array 20 having a plurality of contact terminals 42 is provided at a position opposing an object to be inspected. As the terminal array 20, the one shown in FIG. 1 described above is used. That is, the terminal array 20 is constituted by a silicon substrate 28, a group of contact terminals 42 supported by the silicon substrate 28, a buffer layer 46 and a support member 45 provided physically. Each contact terminal 42 is connected via an extension wiring 72 provided on an extension wiring sheet # 1 of the connection device 100a, Through the lower electrode 73 of the wiring board 70 and the internal wiring 70 a, it is connected to the connection terminal 70 b provided on the wiring board 70. In this embodiment, the connection terminal 70b is constituted by a coaxial connector. The tester 1Ί0 is connected via a cable 171, which is connected to the connection terminal 70b.
なお、 ここで用いられる接続装置は、 第 1図に示した構造のものに限 られない。 例えば、 第 2図、 第 3図、 第 4図等に示す構造のものを用い ることができる。  The connection device used here is not limited to the one having the structure shown in FIG. For example, the structure shown in FIG. 2, FIG. 3, FIG. 4, etc. can be used.
駆動制御系 1 5 0は、 ケーブル 1 7 2を介してテスタ 1 7 0 と接続さ れている。 また、 駆動制御系 1 5 0は、 試料支持系 1 2 0の各駆動部の ァクチユエ一夕に制御信号を送って、 その動作を制御する。 すなわち、 駆動制御系 1 5 0は、 内部にコンピュータを備え、 ケーブル 1 7 2を介 して伝達されるテスタ 1 7 0のテス ト動作の進行情報に合わせて、 試料 支持系 1 2 0の動作を制御する。 また、 駆動制御系 1 5 0は、 操作部 1 5 1を備え、 駆動制御に関する各種指示の入力の受付、 例えば、 手動操 作の指示を受け付ける。  The drive control system 150 is connected to the tester 170 via a cable 170. The drive control system 150 sends a control signal to the actuator of each drive unit of the sample support system 120 to control its operation. In other words, the drive control system 150 has a computer inside, and operates the sample support system 120 in accordance with the test operation progress information of the tester 170 transmitted via the cable 170. Control. Further, the drive control system 150 includes an operation unit 151, and receives input of various instructions related to drive control, for example, receives an instruction of a manual operation.
以下、 本実施例の検査装置の動作について説明する。 試料台 1 2 2の 上に、 半導体ウェハ 1を固定し、 X— Yステージ 1 2 7および回動機構 を用いて、 該半導体ウェハ 1に形成された電極 1 aを、 接続装置 1 0 0 aに形成された接触端子 4 2の直下に位置決めするため、 調整する。 そ の後、 駆動制御系 1 5 0は、 昇降駆動部 1 2 5を作動させ、 試料台 1 2 2を所定の高さまで上昇させることによって、 複数の接触端子 4 2の 各々の先端を目的の半導体素子における複数の電極 1 aの各々に所定圧 で接触させる。 ここまでは、 操作部 1 5 1からの操作指示に従って、 駆 動制御系 1 5 0により実行される。 なお、 これらの位置決め等の調整を 自動的に行なうようにしてもよい。 例えば、 半導体ウェハ 1に基準位置 のマークを予め付しておき、 これを読み取り装置で読み取って、 座標の 原点を設定するようにして、 行なうことができる。 この場合、 電極の位 置は、 予め設計データを受け取ることにより、 駆動制御系 1 5 0におい て既知となる。 Hereinafter, the operation of the inspection device of the present embodiment will be described. The semiconductor wafer 1 is fixed on the sample table 122, and the electrode 1a formed on the semiconductor wafer 1 is connected to the connection device 100a by using the XY stage 127 and the rotating mechanism. Adjust so that it can be positioned directly below the contact terminal 42 formed on the substrate. After that, the drive control system 150 operates the lifting / lowering drive unit 125 to raise the sample table 122 to a predetermined height, so that the tip of each of the plurality of contact terminals 42 is aimed at. Each of the plurality of electrodes 1a of the semiconductor element is brought into contact with a predetermined pressure. Up to this point, the operation is performed by the drive control system 150 in accordance with the operation instruction from the operation unit 151. In addition, these adjustments, such as positioning, may be automatically performed. For example, the reference position on semiconductor wafer 1 The mark can be attached in advance and read by a reading device to set the origin of the coordinates. In this case, the position of the electrode is known in the drive control system 150 by receiving design data in advance.
この状態で、 ケーブル 1 7 1、 配線基板 7 0、 延長配線シー ト 7 1、 および接触端子 4 2を介して、 半導体ウェハ 1 に形成された半導体素子 とテスタ 1 7 0 との間で、 動作電力や動作試験信号などの授受を行い、 当該半導体素子の動作特性の可否などを判別する。 上記の一連の試験動 作が、 半導体ウェハ 1に形成された複数の半導体素子の各々について実 施され、 動作特性の可否などが判別される。  In this state, the operation is performed between the semiconductor element formed on the semiconductor wafer 1 and the tester 170 via the cable 171, the wiring board 70, the extension wiring sheet 71, and the contact terminals 42. Transmission and reception of power, an operation test signal, and the like are performed to determine whether or not the semiconductor device has operating characteristics. The above-described series of test operations is performed for each of the plurality of semiconductor elements formed on the semiconductor wafer 1 to determine whether or not the operation characteristics are acceptable.
次に、 本発明の接続装置を用いた一実施例である半導体素子のバ一ン ィン工程での検査装置の一例について説明する。  Next, an example of an inspection device in a binning step of a semiconductor device which is an embodiment using the connection device of the present invention will be described.
第 2 6図は、 本発明の接続装置を用いた一実施例である半導体素子の バーンィン工程での検査装置の要部を示す斜視図、 第 2 7図は、 バーン ィン用の半導体素子検査装置の断面図である。  FIG. 26 is a perspective view showing an essential part of an inspection device in a burn-in process of a semiconductor device which is an embodiment using the connection device of the present invention, and FIG. 27 is a semiconductor device inspection for burn-in. It is sectional drawing of an apparatus.
本実施例は、 ウェハ状態の半導体素子に電気および温度ス ト レスを高 温状態で加え、 半導体素子の特性検査を実施するウェハプローバとして 構成されている。  The present embodiment is configured as a wafer prober for applying a characteristic test of a semiconductor element by applying an electric and temperature stress to a semiconductor element in a wafer state at a high temperature.
また、 本実施例は、 一度に複数枚のウェハ 1を恒温槽 (図示せず) に 入れた状態で、 特性検査が行なえるようになつている。  In the present embodiment, the characteristic inspection can be performed while a plurality of wafers 1 are put in a thermostat (not shown) at a time.
すなわち、 本実施例は、 第 2 7図に示すように、 恒温槽 (図示せず) に置かれる支持具 1 9 0に垂直に取り付けられるマザ一ボ一 ド 1 8 1 と、 これに垂直に、 すなわち、 前記支持具 1 9 0に並行にマザ一ボー ド 1 8 1に取り付けられる、 複数 ! の個別プローブ系 1 8 0 とで構成される。 マザ一ボー ド 1 8 1は、 各個別プローブ系 1 8 0ごとに設けられるコ ネクタ 1 8 3 と、 マザ一ボー ド 1 8 1を介して前記コネクタ 1 8 3 と通 じているケーブル 1 8 2 とを有する。 ケーブル 1 8 2は、 本実施例では 図示していないが、 前記第 2 5図に示すテスタ 1 7 0 と同様なテスタに 接続される。 That is, as shown in FIG. 27, this embodiment comprises a mother board 18 1 vertically attached to a support 190 placed in a thermostat (not shown), and That is, a plurality of the support members 190 are attached to the mother board 18 1 in parallel with the support members 190. Of the individual probe system 180. The mother board 18 1 communicates with the connector 18 3 provided for each individual probe system 180 and the connector 18 3 via the mother board 18 1. Cable 18 2. Although not shown in the present embodiment, the cable 182 is connected to a tester similar to the tester 170 shown in FIG.
個別プローブ系 1 8 0は、 被検査物ごとに設けられる。 この個別プロ —ブ系 1 8 0は、 上記した接続装置 1 0 0 a と、 この接続装置が固定さ れる配線基板 7 0 と、 被検査物である半導体ウェハ 1を支持するウェハ 支持基板 1 8 5 と、 このウェハ支持基板 1 8 5が載置され、 個別プロ一 ブ系自体をマーザーボー ド 1 8 1 に取り付けるための支持ボー ド 1 8 4 と、 前記接続装置 1 0 0 aを半導体ウェハ 1 に当接させるための押さえ 基板 1 8 6 とを有する。  An individual probe system 180 is provided for each inspection object. The individual probe system 180 includes a connection device 100 a described above, a wiring board 70 to which the connection device is fixed, and a wafer support substrate 18 that supports the semiconductor wafer 1 as an object to be inspected. 5, a support board 184 on which the wafer support substrate 185 is mounted, and an individual probe system itself is mounted on the motherboard 181, and the connection device 100a is connected to the semiconductor wafer 1 And a holding substrate 186 for making contact with the substrate.
ウェハ支持基板 1 8 5より上方にある各部は、 第 2 6図に示す構造と なっている。 すなわち、 ウェハ支持基板 1 8 5は、 例えば、 金属板で形 成され、 半導体ウェハ 1を着脱自在に収容するための凹部 1 8 5 a と、 位置決めのためのノ ックピン 1 8 7を有する。  Each part above the wafer support substrate 185 has the structure shown in FIG. That is, the wafer support substrate 185 is formed of, for example, a metal plate, and has a concave portion 185 a for detachably housing the semiconductor wafer 1 and a knock pin 187 for positioning.
接続装置 1 0 0 aは、 上述したように、 接触端子 4 2群が設けられて いる端子配列体 2 0と、 緩衝層 4 6および支持部材 4 5 と、 延長配線シ — 卜 7 1 とで構成される。 この接続装置 1 0 0 aは、 配線基板 7 0に搭 載され、 各接触端子 4 2から引出される配線が、 配線 7 0 dを介して、 コネクタ端子 7 0 cに接続される。 このコネクタ端子 7 0 cは、 前記コ ネクタ 1 8 3 と嵌合するようになっている。 なお、 この例は、 接続装置 1 0 0 a として、 第 1図に示すものを用いているが、 これに限定されな い。 例えば、 第 2図、 第 3図、 第 4図等に示すものを用いることができ る 0 As described above, the connection device 100a includes the terminal array body 20 provided with the contact terminals 42, the buffer layer 46 and the support member 45, and the extension wiring sheet 71. Be composed. The connection device 100a is mounted on a wiring board 70, and wiring drawn from each contact terminal 42 is connected to a connector terminal 70c via a wiring 70d. The connector terminal 70c is adapted to fit with the connector 183. In this example, the connection device 100a shown in FIG. 1 is used, but the connection device 100a is not limited to this. For example, FIG. 2, FIG. 3, Ru can be used as shown in FIG. 4, etc. 0
この接続装置 1 0 0 aの上方には、 押さえ基板 1 8 6が装着される。 この押さえ基板 1 8 6は、 チャネル状に形成され、 そのチャネル 1 8 6 a内に、 配線基板 7 0が収容される。 また、 この押さえ基板 1 8 6の周 縁部には、 前記ノ ックピン 1 8 7 と嵌合する穴 1 8 8が設けられている c 次に、 本実施例の測定動作について、 説明する。 Above the connection device 100a, a holding substrate 186 is mounted. The holding substrate 186 is formed in a channel shape, and the wiring substrate 70 is accommodated in the channel 186a. In addition, the circumference of The edge is provided with a hole 188 to be fitted with the knock pin 187. c Next, the measurement operation of this embodiment will be described.
ゥヱハ支持基板 1 8 5の凹部 1 8 5 aに、 半導体ゥヱハ 1を固定し、 ノ ック ピン 1 8 7を用いて、 該半導体ゥヱハ 1 に形成された各電極を、 接続装置 1 0 0 aに形成された各接触端子 4 2の直下に位置決めして、 複数の接触端子 4 2の各々の先端を、 半導体素子における複数の電極の うち、 目的の電極の各々に、 所定圧で接触させる。 この状態で、 ケープ ル 1 8 2、 マザ一ボー ド 1 8 1、 コネクタ 1 8 3、 配線基板 Ί 0、 延長 配線用シ一 ト 7 1に設けられた第 2 6図には示していない引き出し用延 長配線 7 2 (第 1図参照) 、 および、 接触端子 4 2を介して、 半導体ゥ ェハ 1に形成された半導体素子とテスタとの間で、 動作電力や動作試験 信号などの授受を行い、 当該半導体素子の動作特性の可否などを判別す る。 上記の一連の操作が、 恒温槽 (図示せず) 内に設置された支持具 1 9 0に固定されたマザーボ一 ド 1 8 1 に固定されたウェハ支持基板 1 8 5に搭載された半導体ウェハ 1の各々について実施され、 動作特性の可 否などが判別される。  The semiconductor substrate 1 is fixed to the concave portion 180a of the substrate support substrate 85, and the respective electrodes formed on the semiconductor substrate 1 are connected to the connection device 100a using the knock pins 187. Is positioned immediately below each of the contact terminals 42 formed at a predetermined position, and the tip of each of the plurality of contact terminals 42 is brought into contact with each of the target electrodes of the plurality of electrodes of the semiconductor element at a predetermined pressure. In this state, cable 18 2, mother board 18 1, connector 18 3, wiring board Ί 0, drawer not shown in Fig. 26 provided on extension wiring sheet 7 1 Transfer of operating power and operation test signals between the semiconductor element formed on the semiconductor wafer 1 and the tester via the extension wiring 72 2 (see FIG. 1) and the contact terminals 42 To determine whether or not the operating characteristics of the semiconductor element are applicable. The above series of operations is performed by the semiconductor wafer mounted on the wafer support substrate 185 fixed to the motherboard 181 fixed to the support 190 set in a thermostat (not shown). This is performed for each of the steps 1 to determine whether or not the operation characteristics are acceptable.
なお、 接続装置の接触端子を電極に接触させる場合、 上記実施例では、 接触端子と電極とを一対一対応に接続させているが、 これに限られない。 すなわち、 1個の電極について、 複数個の接触端子を接触させるように してもよい。 これにより、 より確実な接触を確保できる。  In the case where the contact terminals of the connection device are brought into contact with the electrodes, the contact terminals and the electrodes are connected in a one-to-one correspondence in the above-described embodiment. That is, a plurality of contact terminals may be brought into contact with one electrode. Thereby, more reliable contact can be secured.
上記各実施例では、 引き出し用配線 4 0および引き出し用延長配線 7 2を通常の単線での配線として扱ってきたが、 本発明は、 これに限定さ れない。 接地層を設けることによって、 各引き出し用配線 4 0および引 き出し用延長配線 7 2を、 マイクロス トリ ップ線路とする構成としても よい。 これより、 高周波域、 例えば、 数 G H z帯までの A C検査が可能 となる。 以上説明した実施例によれば、 異方性エッチングにより、 高さおよび 形態のそろった突起を形成でき、 その突起で接触端子を形成できる。 ま た、 突起後方に、 穴を形成して、 突起支持部の可撓性を大きく して、 検 査対象との接触を良好に行える。 また、 接触端子を、 フォ ト リ ソグラフ 技術により、 高密度かつ高精度に形成することができる。 しかも、 多数 個の接触端子を、 位置精度よく一括して形成できる。 In each of the above embodiments, the lead-out wiring 40 and the lead-out extension wiring 72 have been treated as ordinary single-line wiring, but the present invention is not limited to this. By providing a ground layer, each of the lead-out wiring 40 and the lead-out extension wiring 72 may be configured as a microstrip line. As a result, it is possible to perform an AC inspection in a high frequency range, for example, up to several GHz. According to the embodiment described above, projections having uniform height and shape can be formed by anisotropic etching, and the contact terminals can be formed by the projections. Further, a hole is formed at the rear of the projection to increase the flexibility of the projection support portion, so that good contact with the inspection target can be achieved. Further, the contact terminals can be formed with high density and high precision by photolithographic technology. In addition, a large number of contact terminals can be formed collectively with high positional accuracy.
以上に説明した各実施例は、 シリコンウェハを用いているが、 本発明 は、 これに限定されない。 結晶性の他の材料を用いることもできる。 また、 上記第 1図、 第 2図、 第 3図および第 4図に示す各実施例では、 支持部材 4 5を介して配線基板に接続装置を搭載しているが、 支持部材 を介さずに、 緩衝層を介して該接続装置を配線基板に固定するようにし てもよい。  Although each of the embodiments described above uses a silicon wafer, the present invention is not limited to this. Other crystalline materials can also be used. In each of the embodiments shown in FIGS. 1, 2, 3, and 4, the connection device is mounted on the wiring board via the support member 45, but without the support member. Alternatively, the connection device may be fixed to the wiring board via a buffer layer.
上記実施例では、 片持ち梁状の接触端子を、 長方形状の突起支持部 4 3で構成しているが、 この突起支持部の平面形状は、 長方形に限られな い。 例えば、 台形状とすることもできる。 また、 U字状に形成すること もできる。 産業上の利用可能性  In the above embodiment, the cantilever-shaped contact terminal is constituted by the rectangular projection support portion 43, but the planar shape of the projection support portion is not limited to a rectangle. For example, it may be trapezoidal. Also, it can be formed in a U-shape. Industrial applicability
本発明によれば、 接続装置の接触端子を、 多点、 かつ、 高密度化でき、 しかも、 多端子化において、 配線基板の電極パッ ド部に高密度かつ高精 度に先端部が尖った接続端子を一括形成することができるので接続装置 の組立性を大幅に向上させる効果がある。  ADVANTAGE OF THE INVENTION According to this invention, the number of contact terminals of the connection device can be increased at multiple points and the density can be increased. Since the connection terminals can be formed at once, there is an effect that the assemblability of the connection device is greatly improved.
また、 本発明によれば、 プローブの長さを短くできて、 高周波数まで 対応できる。  Further, according to the present invention, the length of the probe can be reduced, and it is possible to cope with high frequencies.
さらに、 接続端子の高さ方向ばらつきは、 シリ コンの ( 1 0 0 ) 面の 異方性エッチングによる ( 1 1 1 ) 面で囲まれた四角錐の形状を形成す ることにより、 横方向ばらつきと同様に、 ホ トレジス 卜マスクパターン の寸法精度に近いレベルにもっていく ことができる。 また、 S 0 I基板 を用いることにより、 二酸化シリ コン層が異方性ェツチング時のス トッ パとなるため、 異方性エッチングのプロセス制御が容易である。 これに より、 接続端子の先端部位置精度を大幅に向上させる効果がある。 しか も、 薄膜プロセスで形成するので、 加工精度が高く、 しかも、 微細な組 立て作業を要せずに製造できる。 Furthermore, the variation in the height of the connection terminals is caused by the formation of a quadrangular pyramid surrounded by the (111) plane by anisotropic etching of the (100) plane of the silicon. By doing so, it is possible to bring the photoresist mask pattern to a level close to the dimensional accuracy, as in the case of the lateral variation. In addition, by using the SOI substrate, the silicon dioxide layer serves as a stop during anisotropic etching, so that anisotropic etching process control is easy. This has the effect of significantly improving the positional accuracy of the tip of the connection terminal. In addition, since it is formed by a thin film process, it can be manufactured with high processing accuracy and without the need for fine assembly work.
また、 本発明の構成による緩衝層あるいは片持ち梁構造の弾性力によ つて接続端子を対向した電極に接触させる接続装置においては、 接触端 子と電極とのあいだの距離のばらつきを吸収して、 小さな荷重で、 各接 触端子に均等の圧力が加わるようにすることができる。 それにより、 全 ピンの接触を確実に行うことができる。 また、 検査対象物に過大な荷重 をかけることを防ぐことができる。  Further, in the connection device according to the present invention, in which the connection terminal is brought into contact with the facing electrode by the elastic force of the buffer layer or the cantilever structure, the dispersion of the distance between the contact terminal and the electrode is absorbed. However, even pressure can be applied to each contact terminal with a small load. This ensures that all pins are in contact. Also, it is possible to prevent an excessive load from being applied to the inspection object.
また、 シ リ コンおよび二酸化シ リ コ ン層に耐熱性があり、 バーンィ ン 試験 (〜 2 0 0 °C ) ができる。 また、 L S I製造プロセスを接触装置の 構成材であるシリコン単結晶基板に適用して、 接触端子の近傍にコンデ ンサあるいは抵抗等を形成したり、 インピーダンス整合したりすること によって、 高周波特性を改善することができる。 また、 接触端子の近傍 に、 能動素子を形成して、 検査機能を持たせることにより、 検査用のテ スタの負担を少なくすることもできる。  In addition, the silicon and silicon dioxide layers have heat resistance and can be burned in (up to 200 ° C). In addition, applying the LSI manufacturing process to the silicon single crystal substrate, which is a component of the contact device, improves the high-frequency characteristics by forming a capacitor or resistor near the contact terminal and matching the impedance. be able to. Also, by forming an active element near the contact terminal and having an inspection function, the load on the tester for inspection can be reduced.

Claims

請求の範囲 The scope of the claims
1 . 検査対象と電気的に接触して、 電気信号を授受するための接続装置 であって、 1. A connection device for transmitting and receiving an electric signal by making electrical contact with the object to be inspected.
検査対象と電気的に接触するための複数個の接触端子と、 各接触端子 から引き出される引き出し用配線と、 接触端子および引出し用配線を支 持する第 1 の基材とを備え、  A plurality of contact terminals for making electrical contact with the object to be inspected, lead wires drawn from each contact terminal, and a first base material supporting the contact terminals and the lead wires,
前記接触端子は、 結晶性の第 2の基材を異方性ェツチングして得られ る突起部と、 この突起部を支持する突起支持部とを備え、  The contact terminal includes: a protrusion obtained by anisotropically etching a crystalline second base material; and a protrusion supporter that supports the protrusion.
前記突起部は、 少なく ともその先端側に、 導電性部分を有し、 この導 電性部分は、 対応する前記引出し用配線と接続されることを特徴とする 接続装置。  The connection device, wherein the protrusion has a conductive portion at least on a tip side thereof, and the conductive portion is connected to the corresponding lead-out wiring.
2 . 請求の範囲第 1項記載の接続装置において、 前記第 1の基材は、 突 起部後方部分に穴を有し、 前記突起支持部は、 この穴の開口部の少なく とも一部を占める部分を塞ぐように配置され、 この部分で、 前記突起部 を支持するものである接続装置。  2. The connection device according to claim 1, wherein the first base material has a hole in a rear portion of the protrusion, and the protrusion support portion has at least a part of an opening of the hole. A connection device which is arranged so as to cover an occupied portion, and which supports the protrusion at this portion.
3 . 請求の範囲第 2項記載の接続装置において、 前記突起支持部は、 前 記穴の縁で一端が支持される片持ち梁状に形成された部分を有する接続 装置。  3. The connection device according to claim 2, wherein the protrusion support portion has a portion formed in a cantilever shape, one end of which is supported at an edge of the hole.
4 . 請求の範囲第 2項記載の接続装置において、 前記突起支持部は、 前 記穴の縁で両端が支持されるプリ ッジ状に形成された部分を有する接続  4. The connection device according to claim 2, wherein the protrusion support portion has a portion formed in a shape of a prism supported at both ends by an edge of the hole.
5 . 請求の範囲第 2項記載の接続装置において、 前記突起支持部は、 穴 の縁全周で支持され、 該穴の開口部を覆う形状を有する接続装置。 5. The connection device according to claim 2, wherein the projection support portion is supported around the entire periphery of the hole, and has a shape covering the opening of the hole.
6 . 請求の範囲第 2項記載の接続装置において、 前記引き出し用配線は、 前記突起部の先端の導電性部分と一体的に設けられる接続装置。 6. The connection device according to claim 2, wherein the lead-out wiring is A connection device provided integrally with the conductive portion at the tip of the projection.
7 . 請求の範囲第 1項記載の接続装置において、 前記第 1および第 2の 基材は、 絶縁層をシ リ コン層の間に挟んだ、 (シ リ コ ン一絶縁層ーシリ コ ン) の構造を有する S 0 I ( Si l icon On Insulator) 基板のシ リ コ ン 層で構成され、 前記突起支持部は、 前記絶縁層を含んで構成され、 かつ、 少なく とも前記第 2の基材は、 単結晶である接続装置。  7. The connection device according to claim 1, wherein the first and second base materials include an insulating layer sandwiched between silicon layers, (silicon-one insulating layer-silicon). The projection support portion is configured to include the insulating layer, and is configured to include at least the second base material. Is a single crystal connection device.
8 . 請求の範囲第 1項記載の接続装置において、 緩衝層と支持部材とを さらに有し、 前記接触端子を形成した基板は、 緩衝層を挟んで該支持部 材と固定される接続装置。  8. The connection device according to claim 1, further comprising a buffer layer and a support member, wherein the substrate on which the contact terminals are formed is fixed to the support member with the buffer layer interposed therebetween.
9 . 請求の範囲第 8項記載の接続装置において、 前記支持部材を搭載す るための配線基板をさらに有し、 前記引き出し用配線と、 配線基板の配 線とが接続される接続装置。  9. The connection device according to claim 8, further comprising a wiring board on which the support member is mounted, wherein the lead-out wiring is connected to a wiring of the wiring board.
1 0 . 請求の範囲第 1項記載の接続装置において、 緩衝層と配線基板と をさらに有し、 前記接触端子を形成した基板は、 緩衝層を挟んで該配線 基板と固定され、 さらに、 前記引き出し用配線と、 配線基板の配線とが 接続される接続装置。  10. The connection device according to claim 1, further comprising a buffer layer and a wiring board, wherein the board on which the contact terminals are formed is fixed to the wiring board with a buffer layer interposed therebetween. A connection device that connects the wiring for drawing and the wiring on the wiring board.
1 1 . 検査対象と電気的に接触して、 電気信号を授受するための接続装 置の製造方法であって、  1 1. A method of manufacturing a connection device for transmitting and receiving an electric signal in electrical contact with a test object,
絶縁膜と、 これを挾んで積層される第 1の基材および第 2の基材とか らなり、 少なく とも第 2の基材が結晶性である基板の、 第 2の基材の複 数箇所について、 それぞれその部分を覆うマスクを形成して、 第 2の基 材を異方性ェッチングする工程と、  The insulating film is composed of a first base material and a second base material which are laminated with the insulating film interposed therebetween, and at least a plurality of portions of the second base material of the substrate in which at least the second base material is crystalline. Forming a mask covering the respective portions, anisotropically etching the second substrate,
当該マスクを除去して、 該マスクで覆われていた箇所に突起部を形成 する工程と、  Removing the mask to form a projection at a location covered by the mask;
前記突起の先端部に、 当該先端部を覆う導電性被覆を形成し、 かつ、 導電性被覆と接続され、 前記第 1の基材に沿って配置される引き出し用 配線を形成する工程と A conductive coating is formed on the tip of the projection to cover the tip, and is connected to the conductive coating, and is arranged along the first base material for drawing. The process of forming wiring
を有することを特徴とする接続装置の製造方法。  A method for manufacturing a connection device, comprising:
1 2 . 請求の範囲第 1 1項記載の接続装置の製造方法において、 前記突 起に酸化膜を形成した後、 その先端部に、 当該先端部を覆う導電性被覆 を形成し、 かつ、 引き出し用配線を形成することを特徴とする接続装置 の製造方法。  12. The method for manufacturing a connection device according to claim 11, wherein an oxide film is formed on the protrusion, and then a conductive coating is formed on the tip to cover the tip. A method for manufacturing a connection device, comprising forming wiring for use.
1 3 . 請求の範囲第 1 1項または第 1 2項記載の接続装置の製造方法に おいて、 前記第 1の基材の突起後方部分をエッチングにより除去して、 該第 1の基材に穴を形成する工程をさらに有する、 接続装置の製造方法。  13. The method for manufacturing a connection device according to claim 11 or 12, wherein a portion of the first base material behind the protrusion is removed by etching, so that the first base material is removed. A method for manufacturing a connection device, further comprising a step of forming a hole.
1 4 . 請求の範囲第 1 3項記載の接続装置の製造方法において、 前記穴 の形成は、 前記絶縁膜に第 1の基材に達する溝状のマスク穴をあけ、 こ のマスク穴から第 1の基材をェツチングすることにより行う、 接続装置 の製造方法。 14. The method for manufacturing a connection device according to claim 13, wherein the hole is formed by forming a groove-shaped mask hole reaching the first base material in the insulating film, and forming a groove-shaped mask hole from the mask hole. A method for manufacturing a connection device, which is performed by etching one of the base materials.
1 5 . 請求の範囲第 1 4項記載の接続装置の製造方法において、 第 1の 基材として、 単結晶を用い、 前記穴の形成における第 1の基材のエッチ ングを、 異方性エッチングにより行う、 接続装置の製造方法。  15. The method for manufacturing a connection device according to claim 14, wherein a single crystal is used as the first base material, and the etching of the first base material in forming the holes is performed by anisotropic etching. A method for manufacturing a connection device.
1 6 . 請求の範囲第 1 5項記載の接続装置の製造方法において、 前記絶 縁膜に設ける溝状のマスク穴として、 コ字形状のパターンを持つ穴を形 成し、 前記穴の開口部に片持ち梁状で位置する絶縁膜を形成する、 接続 装置の製造方法。  16. The method for manufacturing a connection device according to claim 15, wherein a hole having a U-shaped pattern is formed as the groove-shaped mask hole provided in the insulating film, and the opening of the hole is formed. A method for manufacturing a connection device, wherein an insulating film positioned in a cantilever shape is formed on a substrate.
1 7 . 請求の範囲第 1 5項記載の接続装置の製造方法において、 前記絶 縁膜に設ける溝状のマスク穴として、 並行する二つの溝を形成し、 前記 溝の開口部にプリ ッジ状に位置する絶縁膜を形成する、 接続装置の製造 方法。  17. The method for manufacturing a connection device according to claim 15, wherein two parallel grooves are formed as groove-shaped mask holes provided in the insulating film, and a bridge is formed in an opening of the groove. A method for manufacturing a connection device, comprising forming an insulating film positioned in a shape.
1 8 . 請求の範囲第 1 4項記載の接続装置の製造方法において、 前記第 1の基材の第 2の基材と反対側の面に、 第 2の絶縁膜を介して第 3の基 材が積層された基板を用い、 前記穴の形成は、 マスク穴から第 1の基材 を、 前記第 2の絶縁膜に達するまでエッチングすることにより行う、 接 続装置の製造方法。 18. The method for manufacturing a connection device according to claim 14, wherein a surface of the first base member opposite to the second base member is provided with a third base member via a second insulating film. A method for manufacturing a connection device, wherein a hole is formed by etching a first base material from a mask hole until the second base film is reached, using a substrate on which a material is laminated.
1 9 . 請求の範囲第 1 3項記載の接続装置の製造方法において、 前記穴 の形成は、 前記第 1の基材を、 第 2の基材のある面とは反対側の面から、 エッチングして形成する、 接続装置の製造方法。  19. The method for manufacturing a connection device according to claim 13, wherein the hole is formed by etching the first base material from a surface opposite to a surface having a second base material. A method for manufacturing a connection device.
2 0 . 請求の範囲第 1 9項記載の接続装置の製造方法において、 前記穴 の形成は、 前記第 1の基材と第 2の基材との間にある絶縁膜に達するま で行う、 接続装置の製造方法。  20. The method of manufacturing a connection device according to claim 19, wherein the hole is formed until the hole reaches an insulating film between the first base material and the second base material. Manufacturing method of connection device.
2 1 . 請求の範囲第 1 9項記載の接続装置の製造方法において、 前記穴 の形成は、 前記第 1の基材と第 2の基材との間にある絶縁膜に達する前 にエッチングを停止して、 第 1の基材が残っている状態まで行う、 接続 装置の製造方法。  21. The method for manufacturing a connection device according to claim 19, wherein the hole is formed by etching before reaching an insulating film between the first base material and the second base material. A method for manufacturing a connection device, in which the first substrate is stopped until the first base material remains.
2 2 . 請求の範囲第 2 0項記載の接続装置の製造方法において、 前記穴 を覆う状態にある絶縁膜を、 突起部を囲むように、 コ字形状のパターン でエッチングして切断することを特徴とする、 接続装置の製造方法。  22. The method for manufacturing a connection device according to claim 20, wherein the insulating film covering the hole is etched and cut in a U-shaped pattern so as to surround the projection. A method for manufacturing a connection device.
2 3 . 請求の範囲第 1 1項または第 1 2項記載の接続装置の製造方法に おいて、 前記接触端子を形成した基板を、 緩衝層を挟んで支持部材に固 定する、 接続装置の製造方法。 23. The method for manufacturing a connection device according to claim 11 or 12, wherein the substrate on which the contact terminals are formed is fixed to a support member with a buffer layer interposed therebetween. Production method.
2 4 . 請求の範囲第 2 3項記載の接続装置の製造方法において、 前記支 持部材を、 さらに配線基板に固定する工程と、 前記引き出し用配線と該 配線基板との配線を接続することを特徴とする、 接続装置の製造方法。 24. The method for manufacturing a connection device according to claim 23, further comprising: fixing the support member to a wiring board; and connecting the lead-out wiring and the wiring to the wiring board. A method for manufacturing a connection device.
2 5 . 検査対象.と電気的に接触して、 電気信号を授受するための接続装 置の製造方法であって、 2 5. A method of manufacturing a connection device for transmitting and receiving an electric signal in electrical contact with an object to be inspected.
絶縁膜と、 これを挾んで積層される第 1の基材および第 2の基材とか らなり、 少なく とも第 2の基材が結晶性である基板の、 第 1の基材を、 第 2の基材のある面とは反対側からエツチングして第 1の穴を形成する 工程と、 The first substrate, which is composed of an insulating film and a first substrate and a second substrate laminated with the insulating film interposed therebetween, and at least the second substrate is crystalline, Etching from the side opposite to the surface of the second base material to form the first hole;
前記第 1の穴内に露出している絶縁膜の一部に、 第 2の基材に達する マスク穴を設け、 このマスク穴を介して、 第 2の基材を異方性エツチン グして、 角錐状の第 2の穴を形成する工程と、  A mask hole reaching the second base material is provided in a part of the insulating film exposed in the first hole, and the second base material is anisotropically etched through the mask hole. Forming a pyramidal second hole;
前記角錐状の第 2の穴の内面に導電性被覆を形成すると共に、 前記第 1の穴の内面、 および、 穴の外の面に、 導線性被覆と接続されて、 外部 に引出しを行う引出し用配線を形成する工程と、  A conductive coating is formed on the inner surface of the second pyramid-shaped hole, and the inner surface of the first hole and the outer surface of the hole are connected to the conductive coating to draw out to the outside. Forming wiring for;
前記第 2の基材をェッチングにより除去する工程と  Removing the second substrate by etching.
を有することを特徴とする、 接続装置の製造方法。  A method for manufacturing a connection device, comprising:
2 6 . 請求の範囲第 2 5項記載の接続装置の製造方法において、 前記導 電性被覆を形成すると共に、 引出し用配線を形成する工程は、 接触端子 用突起部を形成するための前記角錐状の第 2の穴の内面を覆う部分を残 し、 かつ、 引出し用配線を形成する部分を残して、 他の部分をエツチン グにより除去することを含むことを特徴とする接続装置の製造方法。 26. The method of manufacturing a connection device according to claim 25, wherein the step of forming the conductive coating and the step of forming the lead-out wiring comprises: forming the contact pyramid for forming a contact terminal protrusion. A method of manufacturing a connection device, comprising: removing a portion that covers an inner surface of a second hole having a shape, leaving a portion for forming a lead-out wiring, and removing another portion by etching. .
2 7 . 請求の範囲第 2 6項記載の接続装置の製造方法において、 前記導 電性被覆を成膜する工程は、 下地膜を成膜し、 その上に導電性被覆を成 膜し、 前記第 2の基材除去工程では、 第 2の基材を除去した後、 前記下 地膜を除去し、 さらに、 前記導電性被覆の、 接触端子用突起部を覆う部 分および引き出し用配線を形成する部分を残して、 他の部分をエツチン グにより除去することを特徴とする接続装置の製造方法。 27. The method for manufacturing a connection device according to claim 26, wherein the step of forming the conductive coating includes forming a base film, forming a conductive coating thereon, and forming the conductive coating thereon. In the second base material removing step, after removing the second base material, the underlying film is removed, and further, a portion of the conductive coating covering the contact terminal protrusion and a lead-out wiring are formed. A method for manufacturing a connection device, characterized in that a part is left and another part is removed by etching.
2 8 . 請求の範囲第 2 5項記載の接続装置の製造方法において、 第 1の 基材として結晶性の材料を用い、 第 2の基材の突起部を形成する箇所を 囲むようにマスクで覆って、 第 1の基材に異方性エッチングを行うこと を特徴とする接続装置の製造方法。 28. The method for manufacturing a connection device according to claim 25, wherein a crystalline material is used as the first base material, and a mask is formed so as to surround a portion of the second base material where the projection is formed. A method for manufacturing a connection device, comprising: performing anisotropic etching on a first base material while covering the first base material.
2 9 . 請求の範囲第 2 5項記載の接続装置の製造方法において、 前記絶 縁膜を、 前記第 2の基材の突起部を形成する箇所を囲むように、 コ字形 状のパターンのマスクで覆って、 エッチングで切断することを特徴とす る接続装置の製造方法。 29. The method of manufacturing a connection device according to claim 25, wherein A method for manufacturing a connection device, wherein the edge film is covered with a mask having a U-shaped pattern so as to surround a portion where the projection of the second base material is formed, and cut by etching.
3 0 . 請求の範囲第 2 5項記載の接続装置の製造方法において、 前記接 触端子を形成した基板を、 緩衝層を挟んで支持部材に固定する、 接続装 置の製造方法。  30. The method for manufacturing a connection device according to claim 25, wherein the substrate on which the contact terminals are formed is fixed to a support member with a buffer layer interposed therebetween.
3 1 . 請求の範囲第 3 0項記載の接続装置の製造方法において、 前記支 持部材を、 さらに配線基板に固定する工程と、 前記引き出し用配線と該 配線基板との配線を接続することを特徴とする、 接続装置の製造方法。  31. The method for manufacturing a connection device according to claim 30, further comprising: fixing the support member to a wiring board; and connecting the lead-out wiring and the wiring to the wiring board. A method for manufacturing a connection device.
3 2 . 請求の範囲第 1 1項、 第 1 9項または第 2 5項記載の接続装置の 製造方法において、 前記第 1および第 2の基材は、 1層の絶縁層をシリ コン層の間に挟んだ、 (シリコン一絶縁層—シリコン) の構造を有する S O I ( Sil icon On Insulator) 基板のシリ コン層で構成され、 かつ、 少なく とも前記第 2の基材は、 単結晶である接続装置の製造方法。 32. The method for manufacturing a connection device according to claim 11, 19, or 25, wherein the first and second base materials are each formed of a single insulating layer formed of a silicon layer. A connection composed of a silicon layer of an SOI (Silicon On Insulator) substrate having a structure of (silicon one insulating layer—silicon) interposed therebetween, and at least the second base material is a single crystal. Device manufacturing method.
3 3 . 請求の範囲第 1 1項、 第 1 9項または第 2 5項記載の接続装置の 製造方法において、 前記導電性被覆および引出し用配線の少なく とも一 方に、 めっき膜を成膜する工程をさらに有する接続装置の製造方法。 33. In the method for manufacturing a connection device according to claim 11, claim 19, or claim 25, a plating film is formed on at least one of the conductive coating and the lead-out wiring. A method for manufacturing a connection device, further comprising a step.
3 4 . 請求の範囲第 3 3項記載の接続装置の製造方法において、 めっき 膜は、 導電性被覆より硬度の大きい材料で形成される接続装置の製造方 法。 34. The method for manufacturing a connection device according to claim 33, wherein the plating film is formed of a material having a higher hardness than the conductive coating.
3 5 . 多数の電極が配置された検査対象の各電極に接触して、 電気信号 を授受して検査を行う検査装置において、  3 5. In an inspection device that performs inspection by sending and receiving electrical signals by contacting each electrode to be inspected where a large number of electrodes are arranged,
検査対象物を変位自在に支持する試料支持系と、  A sample support system that displaceably supports the inspection object,
請求の範囲 、 第 9項または第 1 0項記載の接続装置を有し、 該接続装置 の接触端子のある面が、 試料支持系の検査対象物と対向するように配置 されるプローブ系と、 前記試料支持系の検査対象の変位駆動を制御する駆動制御系と、 前記プローブ系と接続されて検査を行うテスタと A probe system comprising the connection device according to claim 9 or 10, wherein a surface of the connection device with a contact terminal is arranged so as to face an inspection target of the sample support system; A drive control system that controls the displacement drive of the test target of the sample support system; and a tester that is connected to the probe system to perform the test.
を有することを特徴とする検査装置。  An inspection apparatus comprising:
3 6 . 多数の電極が配置された検査対象の各電極に接触して、 電気信号 を授受して検査を行う検査装置において、  36. In an inspection device that conducts inspection by sending and receiving electrical signals by contacting each electrode of the inspection target where a large number of electrodes are arranged,
検査対象物を支持する試料支持部、 および、 請求の範囲第 9項または 第 1 0項記載の接続装置を有し、 該接続装置は、 その接触端子のある面 が、 試料支持部の検査対象物と対向するように配置される、 少なく とも 1個の個別プローブ系と、  A sample supporter for supporting an object to be inspected, and a connection device according to claim 9 or 10, wherein the surface of the connection device having a contact terminal is an object to be inspected by the sample supporter. At least one individual probe system arranged opposite the object,
前記個別プローブ系と接続されて検査を行うテスタとを有し、 前記個別プローブ系は、 マザ一ボー ドに装着され、 該マザ一ボー ドを 介して、 テスタと接続されることを特徴とする検査装置。  A tester connected to the individual probe system for performing an inspection, wherein the individual probe system is mounted on a motherboard and connected to a tester via the motherboard. Inspection equipment.
3 7 . 請求の範囲第 5項記載の接続装置において、 各突起支持部は、 複 数の突起部を有する接続装置。 37. The connection device according to claim 5, wherein each projection support portion has a plurality of projection portions.
3 8 . 請求の範囲第 1 3項記載の接続装置の製造方法において、 前記穴 は、 第 1の基材の突起複数個分を含む範囲の後方部分をエッチングによ り除去して形成される、 接続装置の製造方法。  38. The method for manufacturing a connection device according to claim 13, wherein the hole is formed by removing a rear portion of a range including a plurality of protrusions of the first base material by etching. The manufacturing method of the connecting device.
PCT/JP1995/001058 1994-06-03 1995-05-31 Connecting device and its manufacture WO1995034000A1 (en)

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JP6/122869 1994-06-03
JP12286994 1994-06-03

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