JP4223362B2 - Method for manufacturing metal-based circuit board - Google Patents
Method for manufacturing metal-based circuit board Download PDFInfo
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- JP4223362B2 JP4223362B2 JP2003326256A JP2003326256A JP4223362B2 JP 4223362 B2 JP4223362 B2 JP 4223362B2 JP 2003326256 A JP2003326256 A JP 2003326256A JP 2003326256 A JP2003326256 A JP 2003326256A JP 4223362 B2 JP4223362 B2 JP 4223362B2
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1306—Field-effect transistor [FET]
- H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
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- Insulated Metal Substrates For Printed Circuits (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
本発明は、出力用半導体と制御用半導体とを共に実装してなる混成集積回路に用いるに好適な金属ベース回路基板とその製造方法に関する。 The present invention relates to a metal base circuit board suitable for use in a hybrid integrated circuit in which an output semiconductor and a control semiconductor are mounted together, and a manufacturing method thereof.
金属板上に無機フィラ−を充填したエポキシ樹脂等からなる絶縁層を設け、その上に回路を配設した金属ベース回路基板が、熱放散性に優れることから高発熱性電子部品を実装する回路基板として用いられている。 A circuit for mounting highly exothermic electronic components because a metal base circuit board with an insulating layer made of an epoxy resin filled with an inorganic filler on a metal plate and a circuit on it is excellent in heat dissipation. Used as a substrate.
混成集積回路を搭載する回路基板に関しては、半導体素子の高集積化により、出力用半導体素子等が小型化されると共に、同一基板上にさまざまな種類の半導体素子に加えて抵抗体チップ等をも搭載するという手法が主流となってきている。それぞれの半導体素子や電子部品毎に要求される基板特性が異なるために、部分的にそれぞれの半導体素子や電子部品に対応する特性を有する回路基板が要求されている。 Regarding circuit boards on which hybrid integrated circuits are mounted, semiconductor elements for output and the like are miniaturized due to the high integration of semiconductor elements, and in addition to various types of semiconductor elements, resistor chips and the like are also provided on the same substrate. The method of mounting has become mainstream. Since the required substrate characteristics are different for each semiconductor element and electronic component, a circuit board having characteristics partially corresponding to each semiconductor element and electronic component is required.
このため、例えば特許文献１に開示されているような、異種の絶縁層を組み合わせた回路基板が提案されている。しかし、このような複合絶縁基板では、それを製造する工程が繁雑なために、コストアップになる上に、異種絶縁層を小面積内で複雑に組み合わせることが技術的に容易でなく、回路基板の大幅な小型化が達成し得ないという問題があった。
本発明は、従来技術に鑑みてなされたものであって、同一回路基板上においても、部分的に基板特性を変化させることで、多様な種類の半導体素子や電子部品等を搭載できるようにすることを可能とし、特に、制御用半導体や出力用半導体を併せ持つ混成集積回路用に好適な金属ベース回路基板を提供することを目的としている。 The present invention has been made in view of the prior art, and enables various types of semiconductor elements, electronic components, and the like to be mounted by partially changing substrate characteristics even on the same circuit board. In particular, an object of the present invention is to provide a metal base circuit board suitable for a hybrid integrated circuit having both a control semiconductor and an output semiconductor.
本発明は、金属板と、前記金属板上に設けられた絶縁層と、前記絶縁層上に設けられた回路と、前記回路上に実装される出力用半導体と、前記出力用半導体を制御し、前記回路上に設けられる制御用半導体とからなる混成集積回路に用いられる金属ベース回路基板の製造方法であって、（１）金属板の絶縁層を設ける側の主面に凹部を形成する工程、（２）前記凹部と前記凹部以外の金属板上に、同一表面高さにまで絶縁接着剤を塗布する工程、（３）前記絶縁接着剤の表面に金属箔を設け前記絶縁接着剤を硬化して金属接合体とする工程、（４）前記金属接合体の金属箔を加工して回路を形成する工程と、からなることを特徴とする金属ベース回路基板の製造方法である。 The present invention controls a metal plate, an insulating layer provided on the metal plate, a circuit provided on the insulating layer, an output semiconductor mounted on the circuit, and the output semiconductor. A method for manufacturing a metal base circuit board used in a hybrid integrated circuit comprising a control semiconductor provided on the circuit, wherein (1) a step of forming a recess in a main surface of the metal plate on the side where the insulating layer is provided (2) A step of applying an insulating adhesive to the same surface height on the concave portion and a metal plate other than the concave portion, and (3) providing a metal foil on the surface of the insulating adhesive and curing the insulating adhesive. And (4) a step of forming a circuit by processing a metal foil of the metal joined body, thereby producing a metal base circuit board.
更に、本発明は、前記の製造方法で得られる金属ベース回路基板であって、絶縁接着剤が無機フィラーを含有してなる樹脂からなり、しかも硬化後の熱伝導率が１．３Ｗ／ｍＫ以上であることを特徴とする金属ベース回路基板であり、好ましくは、絶縁接着剤層を充填した凹部上の回路と金属板との間の単位面積当たりの静電容量が５０ｐＦ／ｃｍ２以下であり、かつ前記部分以外の部分の回路と金属板との間の単位面積当たりの静電容量が５０ｐＦ／ｃｍ２以上１６０ｐＦ／ｃｍ２以下であることを特徴とする前記の金属ベース回路基板である。 Furthermore, the present invention is a metal base circuit board obtained by the above manufacturing method, wherein the insulating adhesive is made of a resin containing an inorganic filler, and the thermal conductivity after curing is 1.3 W / mK or more. Preferably, the capacitance per unit area between the circuit on the recess filled with the insulating adhesive layer and the metal plate is 50 pF / cm 2 or less. and is the metal base circuit board capacitance per unit area is equal to or is 50 pF / cm 2 or more 160 pF / cm 2 or less between the circuit and the metal plate portion other than the portion.
本発明の製造方法によれば、後述する通りに、静電容量が小さいので制御用半導体を搭載するのに好適な部分と、静電容量は若干大きいが熱伝導性に優れるので出力用半導体を搭載するのに好適な部分とを併せ持つ金属ベース回路基板を、高い歩留で得ることができるので、金属板と、前記金属板上に設けられた絶縁層と、前記絶縁層上に設けられた回路と、前記回路上に実装される出力用半導体と、前記出力用半導体を制御し、前記回路上に設けられる制御用半導体とからなる混成集積回路に用いられる金属ベース回路基板を安価に提供できるという効果が得られ、産業上非常に有用である。 According to the manufacturing method of the present invention, as will be described later, since the electrostatic capacity is small, a portion suitable for mounting a control semiconductor, and the output semiconductor is excellent because it has a slightly large electrostatic capacity but excellent thermal conductivity. Since a metal base circuit board having a portion suitable for mounting can be obtained with high yield, a metal plate, an insulating layer provided on the metal plate, and provided on the insulating layer A metal base circuit board used for a hybrid integrated circuit comprising a circuit, an output semiconductor mounted on the circuit, and the control semiconductor provided on the circuit can be provided at low cost. It is very useful industrially.
本発明の金属ベース回路基板は、硬化後の熱伝導率が１．３Ｗ／ｍＫ以上の絶縁接着剤を用いているので、優れた熱放散性が確保され、信頼性高く半導体素子が動作でき、惹いては混成集積回路の動作信頼性を高めることができる効果がある。 Since the metal base circuit board of the present invention uses an insulating adhesive having a thermal conductivity of 1.3 W / mK or higher after curing, excellent heat dissipation is ensured, and the semiconductor element can operate with high reliability. As a result, the operation reliability of the hybrid integrated circuit can be improved.
更に、本発明の金属ベース回路基板は、単位面積当たりの静電容量が５０ｐＦ／ｃｍ２以下の部分と５０ｐＦ／ｃｍ２以上１６０ｐＦ／ｃｍ２以下の部分とを併せ持っているので、前者に制御用半導体を選択的に搭載することにより、混成集積回路の信頼性を一層高めることができるという効果が得られる。 Further, the metal base circuit board of the present invention, the capacitance per unit area has both a 50 pF / cm 2 or less parts and 50 pF / cm 2 or more 160 pF / cm 2 or less parts, control the former By selectively mounting the semiconductor, an effect of further improving the reliability of the hybrid integrated circuit can be obtained.
以下、図を用いて本発明を説明する。 Hereinafter, the present invention will be described with reference to the drawings.
図１は、本発明に係る金属ベース回路基板の製造方法を説明する図である。まず、金属板表面の所望の位置に凹部を形成する（図１（１）参照）。ここで、凹部を形成する方法については、プレス加工、切削加工或いは化学薬品によるエッチング等の従来公知の方法が挙げられる。本発明で用いられる金属板としては、熱伝導性に優れた材質のものであればどのようなものであっても構わないが、アルミニウム、アルミニウム合金、銅及び銅合金が高熱伝導であることから、好ましく選択される。また、金属板の厚みとしては、特に制限はないが０．３ｍｍ〜４．０ｍｍが一般的に用いられる。 FIG. 1 is a diagram for explaining a method of manufacturing a metal base circuit board according to the present invention. First, a recess is formed at a desired position on the surface of the metal plate (see FIG. 1 (1)). Here, as a method for forming the concave portion, a conventionally known method such as press working, cutting, or etching with a chemical may be used. The metal plate used in the present invention may be any material as long as it is made of a material having excellent thermal conductivity, but aluminum, aluminum alloy, copper and copper alloy are highly thermally conductive. Are preferably selected. Moreover, there is no restriction | limiting in particular as thickness of a metal plate, but 0.3 mm-4.0 mm are generally used.
金属板の凹部形状については、金属ベース回路基板を上方より眺めた時に凹部の広がりが、混成集積回路として使用されるときに、制御用半導体を搭載する回路、高周波等の信号の伝わる回路より大きければ良い。そして、厚さ（深さ）については、絶縁層を形成する絶縁接着剤の材質等によって異なるものの、通常５０〜５００μｍあれば良い。また、凹部深さは個々の凹部により変化しても構わないが、いずれも同じ深さとするとき一度に加工できることから好ましい。 As for the concave shape of the metal plate, when the metal base circuit board is viewed from above, the extent of the concave portion is larger than the circuit on which the control semiconductor is mounted and the circuit transmitting signals such as high frequency when used as a hybrid integrated circuit. It ’s fine. And although thickness (depth) changes with materials etc. of the insulating adhesive agent which forms an insulating layer, it should just be 50-500 micrometers normally. Further, the depth of the recess may vary depending on the individual recess, but it is preferable because all can be processed at a time when the depth is the same.
続いて、前記凹部と前記凹部以外の金属板上に同一表面高さにまで絶縁接着剤を塗布する（図１（２）参照）。絶縁接着剤の塗布方法としては、一般にロールコーター、グラビアコーター、寄付コーター、スクリーン印刷等が用いられる。また、絶縁剤接着剤は、単一層もしくは複数層にする。複数層の場合、工程が長くなる分コストアップになるが、耐絶縁破壊特性が向上するとともに、絶縁層の厚さ精度を向上させることができる特徴がある。 Subsequently, an insulating adhesive is applied to the same surface height on the recess and the metal plate other than the recess (see FIG. 1 (2)). As a method for applying the insulating adhesive, a roll coater, a gravure coater, a donation coater, screen printing or the like is generally used. Further, the insulating adhesive is a single layer or a plurality of layers. In the case of a plurality of layers, the cost is increased due to the length of the process, but there is a feature that the dielectric breakdown resistance is improved and the thickness accuracy of the insulating layer can be improved.
次に、前記絶縁接着剤の表面に金属箔を設けて金属接合体（図１（３）参照）とした後、前記金属接合体の金属箔を加工して回路を形成する（図１（４）参照）。本発明で用いる金属箔、そして前記金属箔から形成される回路の材質としては、銅、アルミニウム、ニッケル、鉄、錫、銀、チタニウムのいずれか、これらの金属を２種類以上含む合金、或いは前記金属又は合金を使用したクラッド箔等を用いることができる。尚、前記金属箔の製造方法は電解法でも圧延法で作製したものでもよく、金属箔上にはＮｉメッキ、Ｎｉ−Ａｕメッキ、半田メッキなどの金属メッキがほどこされていてもかまわないが、絶縁接着剤との接着性の点から金属箔（回路）の絶縁接着剤に接する側の表面はエッチングやメッキ等により予め粗化処理されていることが一層好ましい。 Next, a metal foil is provided on the surface of the insulating adhesive to form a metal joined body (see FIG. 1 (3)), and then the metal foil of the metal joined body is processed to form a circuit (FIG. 1 (4)). )reference). As the material of the metal foil used in the present invention and the circuit formed from the metal foil, one of copper, aluminum, nickel, iron, tin, silver, titanium, an alloy containing two or more of these metals, or the above A clad foil using a metal or an alloy can be used. In addition, the manufacturing method of the metal foil may be one produced by an electrolytic method or a rolling method, and metal plating such as Ni plating, Ni-Au plating, or solder plating may be applied on the metal foil. From the viewpoint of adhesiveness with the insulating adhesive, it is more preferable that the surface of the metal foil (circuit) on the side in contact with the insulating adhesive is roughened in advance by etching, plating, or the like.
図２は、本発明の金属ベース回路基板の製造方法で得られた金属ベース回路基板を用いた混成集積回路の一例を示す図である。図２に例示した通りに、本発明の金属ベース回路基板には、絶縁層が局部的に厚い部分（金属板に設けられた凹部に相当）上に設けられた回路と、絶縁層が局部的に厚くない部分（金属板の凹部以外の部分に相当）上に設けられた回路との少なくとも２種が設けられている。前者の回路上に抵抗チップ並びにコンデンサチップ等の制御用電子部品を搭載することにより、制御用半導体からの信号の歪みを低減することができるし、また、後者の回路上に出力用半導体や制御用半導体等を搭載することで半導体の過度の温度上昇とそれによる誤動作を防止することができるので、混成集積回路全体として高信頼性の動作を確保することができるという効果を発揮できる。 FIG. 2 is a diagram showing an example of a hybrid integrated circuit using a metal base circuit board obtained by the method for manufacturing a metal base circuit board of the present invention. As illustrated in FIG. 2, the metal base circuit board of the present invention has a circuit in which an insulating layer is locally thick (corresponding to a recess provided in a metal plate) and an insulating layer locally. And at least two types of circuits provided on a portion that is not thick (corresponding to a portion other than the concave portion of the metal plate). By mounting control electronic components such as resistor chips and capacitor chips on the former circuit, it is possible to reduce signal distortion from the control semiconductor, and output semiconductors and control on the latter circuit. By mounting the semiconductor for example, it is possible to prevent an excessive temperature rise of the semiconductor and a malfunction caused by the semiconductor temperature. Therefore, it is possible to exhibit an effect that a highly reliable operation can be ensured as the entire hybrid integrated circuit.
本発明に於いて、絶縁接着剤の組成、特性が極めて重要である。本発明に於いて、絶縁接着剤は無機質充填材を含有してなる樹脂で構成されるが、前記無機質充填材としては、アルミナ（酸化アルミニウム）、窒化硼素、マグネシア（酸化マグネシウム）、硫酸バリウム、酸化亜鉛、シリカ（酸化ケイ素）、窒化ケイ素、窒化アルミニウム等の無機物が好ましく用いられ、樹脂としては、エポキシ樹脂、フェノール樹脂、ポリイミド樹脂などの熱硬化性樹脂、各種エンジニアプラスチック、或いはポリエチレン、ポリプロピレン、塩化ビニリデン、ポリエチレンテレフタレート、ＡＢＳ樹脂、ＡＳ樹脂などの熱可塑性樹脂、更に、アクリル樹脂、シリコーン樹脂、ウレタン樹脂などが好ましく用いられる。 In the present invention, the composition and characteristics of the insulating adhesive are extremely important. In the present invention, the insulating adhesive is composed of a resin containing an inorganic filler. Examples of the inorganic filler include alumina (aluminum oxide), boron nitride, magnesia (magnesium oxide), barium sulfate, Inorganic materials such as zinc oxide, silica (silicon oxide), silicon nitride, and aluminum nitride are preferably used. Examples of resins include thermosetting resins such as epoxy resins, phenol resins, and polyimide resins, various engineer plastics, polyethylene, polypropylene, Thermoplastic resins such as vinylidene chloride, polyethylene terephthalate, ABS resin, AS resin, acrylic resin, silicone resin, urethane resin and the like are preferably used.
前記無機質充填材と前記樹脂との組み合わせに関しては、アルミナ、窒化硼素、窒化アルミニウム、シリカの１種以上を含有するエポキシ樹脂が、金属板や金属箔との密着力が高く、しかも硬化後に熱伝導率の高い絶縁層や静電容量の小さな絶縁層を容易に得ることができるので、一層好ましい。 As for the combination of the inorganic filler and the resin, an epoxy resin containing one or more of alumina, boron nitride, aluminum nitride, and silica has high adhesion to a metal plate or a metal foil, and conducts heat after curing. Since an insulating layer with a high rate and an insulating layer with a small capacitance can be easily obtained, it is more preferable.
本発明に於いて、絶縁接着剤が硬化後の熱伝導率が１．３Ｗ／ｍＫ以上であることが好ましい。前記高熱伝導率を有する絶縁接着剤を用いるとき、より信頼性の高い混成集積回路が得られ、例えば自動車、鉄道等の車載用の混成集積回路として用いることができる。 In the present invention, the thermal conductivity of the insulating adhesive after curing is preferably 1.3 W / mK or more. When the insulating adhesive having the high thermal conductivity is used, a hybrid integrated circuit with higher reliability can be obtained. For example, it can be used as a vehicle-mounted hybrid integrated circuit such as an automobile or a railway.
更に、本発明に於いて、絶縁接着剤を充填した凹部の回路と金属板との間の単位面積当たりの静電容量が５０ｐＦ／ｃｍ２以下で、しかも前記凹部以外の部分の回路と金属板との間の単位面積当たりの静電容量が５０ｐＦ／ｃｍ２以上１６０ｐＦ／ｃｍ２以下であることが望ましい。前記構成とすることにより、本発明の効果がより一層顕著となり、例えば、自動車、鉄道等の車載用の実用的な混成集積回路を提供することができる。 Furthermore, in the present invention, the capacitance per unit area between the circuit and the metal plate of the recess filled with insulating adhesive at 50 pF / cm 2 or less, yet the circuit and the metal plate portion other than the recess capacitance per unit area between the can is desirably 50 pF / cm 2 or more 160 pF / cm 2 or less. By adopting the above-described configuration, the effect of the present invention becomes even more prominent. For example, a practical hybrid integrated circuit for use in vehicles such as automobiles and railways can be provided.
１５０ｍｍ×１５０ｍｍ×１．５ｍｍのアルミニウム板上の所望の位置に、熱硬化型レジストインクを塗布し、エッチングにより深さ２００μｍの凹部を形成した後、レジストインクを除去した。 A thermosetting resist ink was applied to a desired position on an aluminum plate of 150 mm × 150 mm × 1.5 mm, and after forming a recess having a depth of 200 μm by etching, the resist ink was removed.
その後、ビスフェノールＡ型液状エポキシ樹脂（ジャパンエポキシレジン社製、ＥＰ８２８）へ平均粒径２μｍのアルミナ（日本軽金属社製、ＬＳ−２０）を４５体積％含有するように配合し、混合して絶縁接着剤を作製した。 Then, blended into bisphenol A type liquid epoxy resin (Japan Epoxy Resin, EP828) so as to contain 45% by volume of alumina (Nippon Light Metal Co., Ltd., LS-20) with an average particle diameter of 2 μm, and mixed to insulate and bond An agent was prepared.
前記絶縁接着剤を、前記凹部を有するアルミニウム板上に塗布することで、前記凹部に絶縁接着材を充填すると共に前記凹部以外の部分の絶縁層の厚さが６０μｍになるようにした。更に、金属箔を前記絶縁接着剤上にラミネートして金属ベース基板を得た。このとき使用した絶縁接着剤について、直径１０ｍｍ厚さ２ｍｍの形状に硬化して熱伝導率測定用の試片を作成し、評価したところ、１．５Ｗ／ｍＫであった。 The insulating adhesive was applied onto the aluminum plate having the recesses so that the recesses were filled with an insulating adhesive and the thickness of the insulating layer other than the recesses was 60 μm. Further, a metal foil was laminated on the insulating adhesive to obtain a metal base substrate. The insulating adhesive used at this time was cured into a shape having a diameter of 10 mm and a thickness of 2 mm, and a test piece for measuring thermal conductivity was prepared and evaluated, and it was 1.5 W / mK.
また、絶縁接着剤を充填した凹部上の回路と金属板との間の単位面積当たりの静電容量は３５ｐＦ／ｃｍ２であり、前記凹部以外の部分上の回路と金属板との間の単位面積当たりの静電容量は１２０ｐＦ／ｃｍ２であった。尚、前記単位面積当たりの静電容量の測定にあたっては、ＬＣＲメーターにより測定周波数１Ｍｚのときの静電容量を求めるとともに、当該測定部分の回路の絶縁接着剤と接する部分の面積を求め、前記静電容量を前記回路面積で除して求めた。 The capacitance per unit area between the circuit on the recess filled with the insulating adhesive and the metal plate is 35 pF / cm 2 , and the unit between the circuit on the portion other than the recess and the metal plate The capacitance per area was 120 pF / cm 2 . In measuring the electrostatic capacity per unit area, the electrostatic capacity at a measurement frequency of 1 Mz is obtained by an LCR meter, and the area of the measurement part in contact with the insulating adhesive is obtained. The capacitance was obtained by dividing by the circuit area.
次に、前記金属ベース基板の前記凹部の部分には、出力用半導体を制御する制御用半導体を含む混成集積回路を形成し、また、前記凹部以外の部分には、出力用半導体や制御用半導体する回路を形成して、金属ベース回路基板とした。 Next, a hybrid integrated circuit including a control semiconductor for controlling the output semiconductor is formed in the concave portion of the metal base substrate, and the output semiconductor and the control semiconductor are formed in portions other than the concave portion. The circuit to be formed was formed into a metal base circuit board.
次に、前記金属ベース回路基板を用いて、図２に例示される混成集積回路を作成した。尚、当該混成集積回路は、制御用半導体としてはデジタル信号ＩＣ、出力用半導体としてＭＯＳ−ＦＥＴを搭載したデジタルアンプである。この混成集積回路を動作周波数６００ｋＨｚで動作させたところ、正常に動作することを確認した。 Next, a hybrid integrated circuit illustrated in FIG. 2 was created using the metal base circuit board. The hybrid integrated circuit is a digital amplifier equipped with a digital signal IC as a control semiconductor and a MOS-FET as an output semiconductor. When this hybrid integrated circuit was operated at an operating frequency of 600 kHz, it was confirmed that it operated normally.
実施例１において、絶縁接着剤としてアルミナフィラーの量を６０体積％含有したエポキシ樹脂としたこと以外は、実施例１と同じ手順で、絶縁接着剤の硬化試片、金属ベース基板、そして金属ベース回路基板を作製した。このとき、絶縁接着剤の熱伝導率は、２．８Ｗ／ｍＫであり、絶縁接着剤を充填した凹部上の回路と金属板との間の単位面積当たりの静電容量は４５ｐＦ／ｃｍ２で、前記凹部以外の部分上の回路と金属板との間の単位面積当たりの静電容量は１４０がｐＦ／ｃｍ２であった。 In Example 1, except that an epoxy resin containing 60% by volume of an alumina filler was used as the insulating adhesive, the same procedure as in Example 1 was followed to cure the insulating adhesive, the metal base substrate, and the metal base. A circuit board was produced. At this time, the thermal conductivity of the insulating adhesive is 2.8 W / mK, and the capacitance per unit area between the circuit on the recess filled with the insulating adhesive and the metal plate is 45 pF / cm 2 . The capacitance per unit area between the circuit on the portion other than the recess and the metal plate was 140 pF / cm 2 .
実施例１と同様にデジタルアンプを作製して動作させたところ、動作周波数６００ｋＨｚで１時間以上継続して正常に動作することを確認した。 When a digital amplifier was fabricated and operated in the same manner as in Example 1, it was confirmed that it operated normally at an operating frequency of 600 kHz for 1 hour or longer.
（比較例１）実施例１において、凹みのない、平坦なアルミニウム板を用い、また、当該アルミニウム板上に絶縁接着剤を６０μｍ厚みで塗布したこと以外は、実施例１と同じ手順で絶縁接着剤の硬化試片、金属ベース基板、そして金属ベース回路基板を作製した。絶縁接着剤の硬化体の熱伝導率は１．５Ｗ／ｍＫであり、回路と金属板との間の単位面積当たりの静電容量は１２３ｐＦ／ｃｍ２であった。 (Comparative Example 1) Insulating adhesion was carried out in the same procedure as in Example 1 except that a flat aluminum plate without dents was used in Example 1 and that an insulating adhesive was applied to the aluminum plate in a thickness of 60 μm. An agent curing specimen, a metal base substrate, and a metal base circuit board were prepared. The heat conductivity of the cured body of the insulating adhesive was 1.5 W / mK, and the capacitance per unit area between the circuit and the metal plate was 123 pF / cm 2 .
更に、実施例１と同様に、デジタルアンプを作製し、動作確認を行った。その結果、動作周波数６００ｋＨｚで動作させたが、誤動作した。 Further, similarly to Example 1, a digital amplifier was manufactured and the operation was confirmed. As a result, it was operated at an operating frequency of 600 kHz, but malfunctioned.
（比較例２）実施例１において、凹みのない、平坦なアルミニウム板を用い、また、当該アルミニウム板上に絶縁接着剤を２６０μｍの厚みで塗布したこと以外は、実施例１と同じ手順で絶縁接着剤の硬化試片、金属ベース基板、そして金属ベース回路基板を作製した。絶縁接着剤の硬化体の熱伝導率は１．５Ｗ／ｍＫであり、回路と金属板との間の静電容量は３２ｐＦ／ｃｍ２であった。 (Comparative Example 2) Insulation was performed in the same procedure as in Example 1, except that a flat aluminum plate without dents was used in Example 1, and an insulating adhesive was applied to the aluminum plate to a thickness of 260 μm. A cured adhesive specimen, a metal base substrate, and a metal base circuit board were prepared. The thermal conductivity of the cured body of the insulating adhesive was 1.5 W / mK, and the capacitance between the circuit and the metal plate was 32 pF / cm 2 .
更に、実施例１同様にデジタルアンプを作製し、動作確認を行った。その結果、動作周波数６００ｋＨｚで動作させた当初は正常に動作したが、パワートランジスタの発熱により５秒動作後には、動作しなくなった。 Further, a digital amplifier was manufactured in the same manner as in Example 1, and the operation was confirmed. As a result, the device operated normally at an operating frequency of 600 kHz, but stopped operating after 5 seconds of operation due to heat generated by the power transistor.
本発明の製造方法によれば、静電容量が小さいので出力用半導体を制御する抵抗チップやコンデンサ等の電子部品を搭載するのに好適な部分と、静電容量は若干大きいが熱伝導性に優れるので放熱が必要な出力用半導体や制御用半導体を搭載するのに好適な部分とを併せ持つ金属ベース回路基板を、高い歩留で得ることができるので、混成集積回路に用いられる金属ベース回路基板を安価に提供できるという効果が得られ、産業上非常に有用である。 According to the manufacturing method of the present invention, since the capacitance is small, it is suitable for mounting electronic components such as a resistor chip and a capacitor for controlling the output semiconductor, and the capacitance is slightly large but the thermal conductivity is improved. Metal base circuit boards used in hybrid integrated circuits can be obtained with a high yield because they are excellent and can be combined with parts suitable for mounting output semiconductors and control semiconductors that require heat dissipation. Can be provided at low cost, and is very useful in industry.
１ 金属板
２ 凹部（空隙部）
３ 絶縁接着剤（絶縁層）
４ 金属箔
５ 回路
６ ヒートスプレッダー
７ 出力用半導体
８ 制御用半導体
９ ボンディングワイヤー
1
3 Insulating adhesive (insulating layer)
4
Claims (1)
回路上に実装される出力用半導体と、前記出力用半導体を制御し、前記回路上に設けられ
る制御用半導体とからなる混成集積回路に用いられる金属ベース回路基板の製造方法であ
って、（１）金属板の絶縁層を設ける側の主面に凹部を形成する工程、（２）前記凹部と
前記凹部以外の金属板上とに、同一表面高さにまで絶縁接着剤を塗布する工程、（３）前
記絶縁接着剤の表面に金属箔を設け、前記絶縁接着剤を硬化して金属接合体とする工程、
（４）前記金属接合体の金属箔を加工して回路を形成する工程、とからなることを特徴と
する金属ベース回路基板の製造方法。
A metal plate; an insulating layer provided on the metal plate; a circuit provided on the insulating layer; an output semiconductor mounted on the circuit; and controlling the output semiconductor; A method of manufacturing a metal base circuit board used in a hybrid integrated circuit comprising a control semiconductor provided in (1) a step of forming a recess in a main surface on the side where an insulating layer of a metal plate is provided, (2) A step of applying an insulating adhesive to the same surface height on the concave portion and a metal plate other than the concave portion; (3) providing a metal foil on the surface of the insulating adhesive, and curing the insulating adhesive; A process for forming a metal joined body,
(4) A method of manufacturing a metal base circuit board, comprising: forming a circuit by processing a metal foil of the metal joined body.
Priority Applications (16)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003326256A JP4223362B2 (en) | 2003-09-18 | 2003-09-18 | Method for manufacturing metal-based circuit board |
| US10/553,076 US7709939B2 (en) | 2003-04-15 | 2004-04-15 | Metal-base circuit board and its manufacturing method |
| MXPA05011216A MXPA05011216A (en) | 2003-04-15 | 2004-04-15 | Metal-base circuit board and its manufacturing method. |
| CA2773112A CA2773112A1 (en) | 2003-04-15 | 2004-04-15 | Metal base circuit board and its production process |
| KR1020107028252A KR101097075B1 (en) | 2003-04-15 | 2004-04-15 | Metal-base circuit board and its manufacturing method |
| KR1020057019663A KR101051908B1 (en) | 2003-04-15 | 2004-04-15 | Metal base circuit board and its manufacturing method |
| KR1020107028251A KR101097076B1 (en) | 2003-04-15 | 2004-04-15 | Metal-base circuit board and its manufacturing method |
| CA2520241A CA2520241C (en) | 2003-04-15 | 2004-04-15 | Metal base circuit board and its production process |
| SG200802903-5A SG163439A1 (en) | 2003-04-15 | 2004-04-15 | Metal base circuit board and its production process |
| EP04727676.1A EP1615267B1 (en) | 2003-04-15 | 2004-04-15 | Hybrid integrated circuit comprising a metal-base circuit board and its manufacturing method |
| SG200802901-9A SG162619A1 (en) | 2003-04-15 | 2004-04-15 | Metal base circuit board and its production process |
| CA2773085A CA2773085A1 (en) | 2003-04-15 | 2004-04-15 | Metal base circuit board and its production process |
| KR1020107028250A KR101162133B1 (en) | 2003-04-15 | 2004-04-15 | Metal-base circuit board and its manufacturing method |
| SG200802902-7A SG162620A1 (en) | 2003-04-15 | 2004-04-15 | Metal base circuit board and its production process |
| CA2773076A CA2773076A1 (en) | 2003-04-15 | 2004-04-15 | Metal base circuit board and its production process |
| PCT/JP2004/005365 WO2004093186A1 (en) | 2003-04-15 | 2004-04-15 | Metal-base circuit board and its manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003326256A JP4223362B2 (en) | 2003-09-18 | 2003-09-18 | Method for manufacturing metal-based circuit board |
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| Publication Number | Publication Date |
|---|---|
| JP2005093795A JP2005093795A (en) | 2005-04-07 |
| JP4223362B2 true JP4223362B2 (en) | 2009-02-12 |
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|---|---|---|---|
| JP2003326256A Expired - Fee Related JP4223362B2 (en) | 2003-04-15 | 2003-09-18 | Method for manufacturing metal-based circuit board |
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| Country | Link |
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| JP (1) | JP4223362B2 (en) |
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- 2003-09-18 JP JP2003326256A patent/JP4223362B2/en not_active Expired - Fee Related
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