JP4206635B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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Publication number
JP4206635B2
JP4206635B2 JP2000347019A JP2000347019A JP4206635B2 JP 4206635 B2 JP4206635 B2 JP 4206635B2 JP 2000347019 A JP2000347019 A JP 2000347019A JP 2000347019 A JP2000347019 A JP 2000347019A JP 4206635 B2 JP4206635 B2 JP 4206635B2
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Prior art keywords
dicing
semiconductor
sheets
semiconductor chips
solder
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JP2002151642A (en
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新美　　彰浩
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Denso Corp
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Denso Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0652—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next and on each other, i.e. mixed assemblies
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    • H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
    • H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
    • H01L2221/68336—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding involving stretching of the auxiliary support post dicing
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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    • H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
    • H01L2224/751—Means for controlling the bonding environment, e.g. valves, vacuum pumps
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    • H01L2224/7525—Means for applying energy, e.g. heating means
    • H01L2224/753—Means for applying energy, e.g. heating means by means of pressure
    • H01L2224/75301—Bonding head
    • H01L2224/75314—Auxiliary members on the pressing surface
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    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81193—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed on both the semiconductor or solid-state body and another item or body to be connected to the semiconductor or solid-state body
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    • H01L2224/812—Applying energy for connecting
    • H01L2224/81201—Compression bonding
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  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、２つの半導体チップが重ね合わされ、ハンダを介して接合されてなる半導体装置の製造方法に関する。
【０００２】
【従来の技術】
一般に、２つの半導体チップが重ね合わされ、ハンダを介して接合されてなる半導体装置（これを３次元チップ積層構成という）は、次のようにして製造される。まず、半導体ウェハ内に複数個の半導体素子をチップ単位毎に形成する。
【０００３】
次に、半導体ウェハをエポキシ樹脂等よりなるダイシング用プレートの一面に貼り付け、続いて、半導体ウェハをチップ単位にダイシングカットする。その後、分断された半導体チップをダイシング用プレートから剥がし、相手側の半導体チップと重ね合わせてハンダ付けする。
【０００４】
【発明が解決しようとする課題】
しかしながら、半導体チップ１個毎に相手のチップと接合する方法は、手間も時間もかかり、効率が悪い。且つ非常に薄い半導体チップでは、チップ単位で取り扱うと割れ、欠けの発生原因となる。そこで、次のような方法が考えられる。ダイシングカット後、分断された複数個の半導体チップがダイシング用プレートに貼り付けられたままの状態のものについて、同じものを２個用意する。
【０００５】
そして、両ダイシング用プレートを、その半導体チップ側の面にて重ね合わせ、一方のダイシング用プレートに貼り付いている複数個の半導体チップと、他方のダイシング用プレートに貼り付いている複数個の半導体チップとを位置合わせするとともに、ハンダを介して接触させる。次に、ハンダをリフローさせることにより、複数個の半導体チップを一括してハンダ接合する。
【０００６】
ここで、ハンダ付けの際の加熱によりダイシング用プレートが熱膨張するが、ダイシング用プレートは通常、上述のようにエポキシ樹脂等よりなるため、２個のダイシング用プレート間、及び、各ダイシング用プレートにおいて、熱膨張の度合が不均一になる可能性が高い。そのため、対向する半導体チップ同士の位置ずれが発生し、十分な位置合わせ精度が得られないといった問題が生じる。
【０００７】
本発明は上記問題に鑑み、２つの半導体チップが重ね合わされ、ハンダを介して接合されてなる半導体装置の製造方法において、複数個の半導体装置を一括して適切に製造できるようにすることを目的とする。
【０００８】
【課題を解決するための手段】
請求項１に記載の発明では、ダイシングカットにより切断された複数個の第１の半導体チップ（１０）が一面側に貼り付いている第１のダイシング用シート（４０）と、ダイシングカットにより第１の半導体チップと配列、サイズ及び形状が同一となるように切断された複数個の第２の半導体チップ（２０）が一面側に貼り付いている第２のダイシング用シート（５０）とを用意した後、以下の各工程を実行するものである。
【０００９】
まず、第１のダイシング用シートの一面と第２のダイシング用シートの前記一面とを対向配置する工程を行う。
【００１０】
次に、対向配置された第１及び第２のダイシング用シートの間隙を大気圧よりも低い圧力雰囲気としつつ、第１及び第２のダイシング用シートの外側を大気圧雰囲気とすることにより、これら両雰囲気の圧力差によって第１及び第２のダイシング用シートをその外側から押さえつけ、互いに対向する第１の半導体チップと第２の半導体チップとをハンダ（３０）を介して接触させる工程を行う。
【００１１】
そして、上記圧力差による第１及び第２の半導体チップのハンダを介した接触状態を維持しつつ、加熱することにより、第１及び第２の半導体チップをハンダを介して接合する工程を行う。
【００１２】
そして、本発明では、第１および第２のダイシング用シートのうち少なくとも一方に、第１及び第２の半導体チップをハンダを介して接合するための加熱時において弾性変形可能なものを用いている。
【００１３】
以上の特徴を有する本発明の製造方法によれば、対向配置された第１及び第２のダイシング用シートの間隙部と外部との圧力差により第１の半導体チップと第２の半導体チップとがハンダを介して接触する。そのため、固定治具を用いることなく、両半導体チップのハンダを介した接触状態の維持（仮固定）が可能となる。
【００１４】
もし、仮固定用の固定治具を用いた場合、第１および第２の両ダイシング用シートのうち半導体チップが貼り付いている領域に対応する両シートの外側部分を、固定治具で押さえつけて仮固定を行うこととなる。この場合、固定治具とダイシング用シートとの熱膨張係数の差等により、加熱時におけるダイシング用シートの熱膨張の不均一化が促進され好ましくない。しかし、本発明によれば、そのような問題を回避できる。
【００１５】
そして、本発明によれば、第１および第２のダイシング用シートのうち少なくとも一方に、ハンダ接合するための加熱時において弾性変形可能なものを用いているため、たとえ、第１のダイシング用シート自身の熱膨張や相手側の第２のダイシング用シートの熱膨張が不均一であったとしても、上記弾性変形可能なダイシング用シートが伸び縮みして、これらの不均一な熱膨張による半導体チップの位置ずれを吸収することができる。
【００１６】
よって、本発明によれば、ダイシング用シートの不均一な熱膨張による半導体チップの位置ずれを防止することができ、複数個の半導体装置を一括して適切に製造することができる。
【００１７】
ここで、請求項２に記載の発明のように、第１および第２のダイシング用シート（４０、５０）の両方に、加熱時において弾性変形可能なものを用いるようにすれば、ダイシング用シートの不均一な熱膨張による半導体チップの位置ずれをより効果的に吸収することができ、当該位置ずれをより高いレベルにて防止することができる。
【００１８】
ここで、加熱時において弾性変形可能な第１および第２のダイシング用シート（４０、５０）としては、請求項３に記載の発明のように、ポリイミド樹脂よりなるものを用いることができる。
【００１９】
なお、上記各手段の括弧内の符号は、後述する実施形態に記載の具体的手段との対応関係を示す一例である。
【００２０】
【発明の実施の形態】
以下、本発明を図に示す実施形態について説明する。図１は、本発明の実施形態に係る半導体装置の概略断面図である。この半導体装置は、シリコン基板等よりなり互いに同一のサイズ及び形状を有する第１の半導体チップ（図中、上側のチップ）１０と第２の半導体チップ（図中、下側のチップ）２０の２つの半導体チップが重ね合わされ、ハンダ３０を介して接合されてなるものである。
【００２１】
ここで、第１及び第２の半導体チップ１０、２０において、図１中の上側の面を一面１１、２１、下側の面を他面１２、２２とする。そして、第１及び第２の半導体チップ１０、２０は、第１の半導体チップ１０の他面１２と第２の半導体チップ２０の一面２１とを対向させた状態で重ね合わされている。
【００２２】
各半導体チップ１０、２０は、例えば、一面（図１中、上側の面）１１、２１側にトランジスタ等の素子が形成された能動領域１３、２３を有している。また、第１の半導体チップ１０の他面１２には、ＮｉやＣｒ等よりなる電極１４が形成されており、一方、第２の半導体チップ２０の一面２１には、ＮｉやＣｒ等よりなるメタルバンプ２４が形成されている。
【００２３】
そして、この電極１４とメタルバンプ２４とは、Ｓｎ−Ｐｂ系、Ｉｎ、Ｓｎ若しくはＰｂを主成分とする材料等よりなる上記ハンダ３０により、ハンダ接合されている。このように、半導体装置は、重ね合わされた２つの半導体チップ１０、２０が、ハンダ３０を介して接合され、両半導体チップ１０、２０は機械的、電気的に接続されている。
【００２４】
次に、図１に示す半導体装置の製造方法について、図２を参照して説明する。図２は、本製造方法を説明するための工程図であり、図１に対応した断面にて模式的に示してある。まず、図２（ａ）に示す様に、複数個の第１の半導体チップ１０が貼り付いた第１のダイシング用シート４０と、複数個の第２の半導体チップ２０が貼り付いた第２のダイシング用シート５０とを用意する。このような各シート４０、５０は次のようにして作られる。
【００２５】
まず、第１の半導体チップ１０が形成される第１の半導体ウェハ（図示せず）を用意し、この第１の半導体ウェハに対して、周知の半導体製造技術を用いてスクライブラインで区画された複数個のチップ単位毎に、トランジスタ等の素子を形成するとともに電極１４を形成し且つ電極１４上にハンダ３０を形成する。
【００２６】
一方、第２の半導体チップ２０が形成される第２の半導体ウェハ（図示せず）として、上記第１の半導体ウェハと同一のスクライブパターンを有するものを用意し、この第２の半導体ウェハに対して、周知の半導体製造技術を用いて複数個のチップ単位毎に、トランジスタ等の素子を形成するとともに上記第１の半導体ウェハにおける電極１４及びハンダ３０に対応する位置にメタルバンプ２４を形成する。
【００２７】
次に、第１の半導体ウェハにおいて、第１の半導体チップ１０の一面１１となる面に、第１のダイシング用シート４０を貼り付ける（図２（ａ）参照）。一方、第２の半導体ウェハにおいて、第２の半導体チップ２０の他面２２となる面に、第２のダイシング用シート５０を貼り付ける（図２（ａ）参照）。
【００２８】
ここで、第１および第２のダイシング用シート４０、５０としては共に、第１及び第２の半導体チップ１０、２０をハンダ３０を介して接合するための加熱時において弾性変形可能なものを用いる。具体的には、熱に強いポリイミド樹脂よりなるテープ材（ポリイミドテープ）等を用いることができる。
【００２９】
そして、各ダイシング用シート４０、５０に貼り付けられた上記各半導体ウェハを、半導体ウェハ側からチップ単位にダイシングカットして、各ダイシング用シート４０、５０はつながった状態で残すようにする。
【００３０】
こうして、図２（ａ）に示す様に、ダイシングカットにより切断された複数個の第１の半導体チップ１０が一面側に貼り付いている第１のダイシング用シート４０と、ダイシングカットにより第１の半導体チップ１０と配列、サイズ及び形状が同一となるように切断された複数個の第２の半導体チップ２０が一面側に貼り付いている第２のダイシング用シート５０とが用意される。
【００３１】
ここで例えば、複数個の第１及び第２の半導体チップ１０、２０においては共に、個々のチップが同一サイズの矩形状であり、この同一サイズの矩形状チップが複数個格子状に配列したもの、つまり一般的なスクライブパターンによって切断されたものとすることができる。
【００３２】
なお、複数個の第１及び第２の半導体チップ１０、２０においては共に、その厚さは例えば５０μｍ〜１００μｍとすることができ、各ダイシング用シート４０、５０の厚さは、数μｍ〜数１０μｍとすることができる。また、各ダイシング用シート４０、５０の他面における外周部に、環状の金属フレーム６０をそれぞれ貼り付ける。
【００３３】
次に、図２（ａ）に示す様に、大気圧よりも低い圧力雰囲気とした密閉室（真空チャンバ等）内にて、室温（例えば２５℃）で、第１のダイシング用シート４０の一面（第１の半導体チップ１０が貼り付いている面）と、第２のダイシング用シート５０の一面（第２の半導体チップ２０が貼り付いている面）とを対向配置する。
【００３４】
このとき、両ダイシング用シート４０、５０は、両シート４０、５０の半導体チップ１０、２０を位置合わせしつつ対向配置する。また、上記密閉室内の圧力は、例えば大気圧の１／１００以下の低圧雰囲気とすることができる。
【００３５】
そして、環状の金属フレーム６０を用いて、対向する各ダイシング用シート４０、５０の一面における外周部を貼り合わせ、両シート４０、５０の間隙空間を封止する。このとき、各ダイシング用シート４０、５０に設けられた金属フレーム６０同士は、ねじやクリップ等（図示せず）を用いて互いに固定される。
【００３６】
この貼り合わせにより、両シート４０、５０の間隙を密閉し、続いて、密閉室内を大気に開放する。こうして、対向配置された第１及び第２のダイシング用シート４０、５０の間隙を大気圧よりも低い圧力雰囲気としつつ、これら両シート４０、５０の外側を大気圧雰囲気とすることができる。
【００３７】
これにより、これら両雰囲気の圧力差によって第１及び第２のダイシング用シート４０、５０はその外側（他面側）から押さえつけられ、互いに対向する第１の半導体チップ１０と第２の半導体チップ２０とは、ハンダ３０を介して接触する。つまり、対向する半導体チップ１０、２０のそれぞれにおいて、電極１４とメタルバンプ２４とがハンダ３０を介して接触する。この状態のものを図２（ｂ）に示す。
【００３８】
そして、図２（ｂ）に示す状態のもの、即ち上記した圧力差による第１及び第２の半導体チップ１０、２０のハンダ３０を介した接触状態にあるものを、オーブン等の加熱手段を用いて加熱する。それにより、ハンダ３０がリフローされ、第１及び第２の半導体チップ１０、２０は、ハンダ３０を介して接合される。
【００３９】
ところで、上記製造方法によれば、対向配置された第１及び第２のダイシング用シート４０、５０の間隙部と外部との圧力差により、第１の半導体チップ１０と第２の半導体チップ２０とをハンダ３０を介して接触させた状態で仮固定している。
【００４０】
そのため、第１および第２の両ダイシング用シート４０、５０のうち半導体チップ１０、２０が貼り付いている領域に対応する両シート４０、５０の外側部分（他面）を、固定治具で押さえつけて仮固定を行う必要が無くなる。もし、固定治具を用いた場合、固定治具とダイシング用シートとの熱膨張係数の差等により、加熱時におけるダイシング用シートの熱膨張の不均一化が促進され好ましくない。しかし、上記製造方法によれば、そのような問題を回避できる。
【００４１】
また、上記製造方法によれば、第１および第２のダイシング用シート４０、５０として、ハンダ接合するための加熱時において弾性変形可能なものを用いている。そのため、たとえ、第１のダイシング用シート４０や第２のダイシング用シート５０の熱膨張が不均一であったとしても、各ダイシング用シート４０、５０が伸び縮みして、これらの不均一な熱膨張による半導体チップ１０、２０の位置ずれを吸収することができる。
【００４２】
つまり、ダイシング用シート４０、５０の不均一な熱膨張により、ハンダ３０を介して接触している半導体チップ１０、２０同士が位置ずれするように力が加わったとしても、この力は、ダイシング用シート４０、５０の弾性変形により吸収され、半導体チップ１０、２０の位置ずれは防止される。
【００４３】
従って、上記製造方法によれば、両ダイシング用シート４０、５０を重ね合わせて位置合わせされた半導体チップ１０、２０同士が、ハンダ接合のための加熱によって位置ずれすることがなく、上記図１に示す半導体装置を複数個一括して適切に製造することができる。
【００４４】
なお、本実施形態においては、第１および第２のダイシング用シート４０、５０の両方でなくとも、両シート４０、５０のうちの一方にのみ、ハンダ接合するための加熱時において弾性変形可能なものを用いるようにしてもよい。例えば、第１のダイシング用シート４０は加熱時において弾性変形可能なポリイミドテープ等を採用し、第２のダイシング用シート５０は加熱時において弾性変形しない剛性の高いプレート（例えばエポキシ樹脂製）を採用してもよい。
【００４５】
その場合、第２のダイシング用シート５０は、ハンダ接合のための加熱時に熱膨張が不均一となるが、他方の弾性変形可能な第１のダイシング用シート４０が、第２のダイシング用シート５０の不均一な熱膨張に追随して伸び縮みするため、上記した半導体チップの位置ずれを吸収し防止することができる。
【００４６】
また、対向配置された第１及び第２のダイシング用シート４０、５０の間隙を大気圧よりも低い圧力雰囲気としつつ、これら両シート４０、５０の外側を大気圧雰囲気とする方法としては、上記密閉室を用いる方法に限定されない。例えば、両ダイシング用シート４０、５０の外周部から両シート間の間隙内に向かってノズルを差し込み、このノズルから当該間隙内を吸引すれば、大気中で当該間隙内を減圧することができる。
【図面の簡単な説明】
【図１】本発明の実施形態に係る半導体装置の概略断面図である。
【図２】図１に示す半導体装置の製造方法を説明するための工程図である。
【符号の説明】
１０…第１の半導体チップ、２０…第２の半導体チップ、３０…ハンダ、
４０…第１のダイシング用シート、５０…第２のダイシング用シート。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device in which two semiconductor chips are overlaid and joined via solder.
[0002]
[Prior art]
In general, a semiconductor device in which two semiconductor chips are overlapped and joined via solder (this is referred to as a three-dimensional chip stacked configuration) is manufactured as follows. First, a plurality of semiconductor elements are formed for each chip in a semiconductor wafer.
[0003]
Next, the semiconductor wafer is attached to one surface of a dicing plate made of epoxy resin or the like, and then the semiconductor wafer is diced and cut in units of chips. Thereafter, the divided semiconductor chip is peeled off from the dicing plate, and is superposed on the other semiconductor chip and soldered.
[0004]
[Problems to be solved by the invention]
However, the method of bonding each semiconductor chip to the counterpart chip takes time and effort, and is inefficient. In addition, a very thin semiconductor chip may cause cracking or chipping when handled in chip units. Therefore, the following method can be considered. After the dicing cut, two of the same semiconductor chips are prepared with the divided semiconductor chips still attached to the dicing plate.
[0005]
Then, both dicing plates are overlapped on the surface of the semiconductor chip, a plurality of semiconductor chips attached to one dicing plate, and a plurality of semiconductors attached to the other dicing plate The chip is aligned and brought into contact with the solder. Next, by reflowing the solder, a plurality of semiconductor chips are soldered together.
[0006]
Here, the dicing plate thermally expands due to heating at the time of soldering, but the dicing plate is usually made of an epoxy resin or the like as described above, and therefore, between the two dicing plates and each dicing plate. In this case, the degree of thermal expansion is likely to be non-uniform. For this reason, a positional deviation occurs between the semiconductor chips facing each other, resulting in a problem that sufficient alignment accuracy cannot be obtained.
[0007]
SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide a method for manufacturing a semiconductor device in which two semiconductor chips are overlapped and joined via solder so that a plurality of semiconductor devices can be manufactured appropriately in a lump. And
[0008]
[Means for Solving the Problems]
In the first aspect of the present invention, the first dicing sheet (40) in which a plurality of first semiconductor chips (10) cut by dicing cut are attached to one surface side, and the first dicing cut by the first dicing cut. And a second dicing sheet (50) in which a plurality of second semiconductor chips (20) cut so as to have the same arrangement, size, and shape are attached to one side. Thereafter, the following steps are performed.
[0009]
First, a step of arranging one surface of the first dicing sheet and the one surface of the second dicing sheet so as to face each other is performed.
[0010]
Next, by setting the gap between the first and second dicing sheets opposed to each other to a pressure atmosphere lower than atmospheric pressure, the outside of the first and second dicing sheets is changed to atmospheric pressure atmosphere. The first and second dicing sheets are pressed from the outside by the pressure difference between the two atmospheres, and the first semiconductor chip and the second semiconductor chip facing each other are brought into contact with each other through the solder (30).
[0011]
Then, the first and second semiconductor chips are joined via the solder by heating while maintaining the contact state of the first and second semiconductor chips via the solder due to the pressure difference.
[0012]
In the present invention, at least one of the first and second dicing sheets is used that can be elastically deformed during heating for bonding the first and second semiconductor chips via solder. .
[0013]
According to the manufacturing method of the present invention having the above characteristics, the first semiconductor chip and the second semiconductor chip are separated by the pressure difference between the gap portion of the first and second dicing sheets arranged opposite to each other and the outside. Contact through solder. Therefore, it is possible to maintain (temporarily fix) the contact state of both semiconductor chips via solder without using a fixing jig.
[0014]
If a fixing jig for temporary fixing is used, the outer portion of both sheets corresponding to the area where the semiconductor chip is attached is pressed with the fixing jig between the first and second dicing sheets. Temporary fixing will be performed. In this case, non-uniform thermal expansion of the dicing sheet during heating is promoted due to a difference in thermal expansion coefficient between the fixing jig and the dicing sheet. However, according to the present invention, such a problem can be avoided.
[0015]
According to the present invention, since at least one of the first and second dicing sheets is elastically deformable at the time of heating for soldering, even if the first dicing sheet is used. Even if the thermal expansion of itself or the second dicing sheet on the other side is non-uniform, the elastically deformable dicing sheet expands and contracts, and the semiconductor chip due to these non-uniform thermal expansion Can be absorbed.
[0016]
Therefore, according to the present invention, it is possible to prevent misalignment of the semiconductor chip due to non-uniform thermal expansion of the dicing sheet, and it is possible to appropriately manufacture a plurality of semiconductor devices in a lump.
[0017]
Here, as in the invention described in claim 2, if both the first and second dicing sheets (40, 50) are made of an elastically deformable sheet during heating, the dicing sheet is used. It is possible to more effectively absorb the misalignment of the semiconductor chip due to the non-uniform thermal expansion, and to prevent the misalignment at a higher level.
[0018]
Here, as the first and second dicing sheets (40, 50) that can be elastically deformed during heating, those made of polyimide resin can be used as in the invention described in claim 3.
[0019]
In addition, the code | symbol in the parenthesis of each said means is an example which shows a corresponding relationship with the specific means as described in embodiment mentioned later.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments shown in the drawings will be described below. FIG. 1 is a schematic cross-sectional view of a semiconductor device according to an embodiment of the present invention. This semiconductor device includes a first semiconductor chip (upper chip in the figure) 10 and a second semiconductor chip (lower chip in the figure) 20 which are made of a silicon substrate or the like and have the same size and shape. Two semiconductor chips are overlaid and joined via solder 30.
[0021]
Here, in the first and second semiconductor chips 10 and 20, the upper surface in FIG. 1 is defined as one surface 11, 21, and the lower surface is defined as the other surface 12, 22. The first and second semiconductor chips 10 and 20 are overlapped with the other surface 12 of the first semiconductor chip 10 and the one surface 21 of the second semiconductor chip 20 facing each other.
[0022]
Each semiconductor chip 10, 20 has active regions 13, 23 in which elements such as transistors are formed on one surface (upper surface in FIG. 1) 11, 21, for example. An electrode 14 made of Ni, Cr or the like is formed on the other surface 12 of the first semiconductor chip 10, while a metal made of Ni, Cr or the like is formed on the one surface 21 of the second semiconductor chip 20. Bumps 24 are formed.
[0023]
The electrode 14 and the metal bump 24 are soldered by the solder 30 made of Sn—Pb, In, Sn or Pb as a main component. As described above, in the semiconductor device, the two stacked semiconductor chips 10 and 20 are joined via the solder 30, and both the semiconductor chips 10 and 20 are mechanically and electrically connected.
[0024]
Next, a method for manufacturing the semiconductor device shown in FIG. 1 will be described with reference to FIG. FIG. 2 is a process diagram for explaining the present manufacturing method, and is schematically shown in a cross section corresponding to FIG. First, as shown in FIG. 2A, a first dicing sheet 40 having a plurality of first semiconductor chips 10 attached thereto and a second dicing sheet having a plurality of second semiconductor chips 20 attached thereto. A dicing sheet 50 is prepared. Each of such sheets 40 and 50 is produced as follows.
[0025]
First, a first semiconductor wafer (not shown) on which the first semiconductor chip 10 is formed is prepared, and the first semiconductor wafer is partitioned by a scribe line using a well-known semiconductor manufacturing technique. For each of a plurality of chip units, an element such as a transistor is formed, the electrode 14 is formed, and the solder 30 is formed on the electrode 14.
[0026]
On the other hand, a second semiconductor wafer (not shown) on which the second semiconductor chip 20 is formed is prepared having the same scribe pattern as that of the first semiconductor wafer. Then, using a well-known semiconductor manufacturing technique, elements such as transistors are formed for each of a plurality of chips, and metal bumps 24 are formed at positions corresponding to the electrodes 14 and the solder 30 on the first semiconductor wafer.
[0027]
Next, in the first semiconductor wafer, the first dicing sheet 40 is attached to the surface to be the first surface 11 of the first semiconductor chip 10 (see FIG. 2A). On the other hand, in the second semiconductor wafer, the second dicing sheet 50 is attached to the surface to be the other surface 22 of the second semiconductor chip 20 (see FIG. 2A).
[0028]
Here, as the first and second dicing sheets 40 and 50, those that can be elastically deformed during heating for bonding the first and second semiconductor chips 10 and 20 via the solder 30 are used. . Specifically, a tape material (polyimide tape) made of a heat-resistant polyimide resin can be used.
[0029]
Then, the semiconductor wafers attached to the dicing sheets 40 and 50 are diced and cut in units of chips from the semiconductor wafer side so that the dicing sheets 40 and 50 remain connected.
[0030]
Thus, as shown in FIG. 2A, the first dicing sheet 40 in which a plurality of first semiconductor chips 10 cut by the dicing cut are attached to the one surface side, and the first dicing cut by the first dicing cut. A second dicing sheet 50 is prepared in which a plurality of second semiconductor chips 20 cut so as to have the same arrangement, size, and shape as the semiconductor chip 10 are attached to one side.
[0031]
Here, for example, in each of the plurality of first and second semiconductor chips 10 and 20, each chip has a rectangular shape of the same size, and a plurality of rectangular chips of the same size are arranged in a grid pattern. That is, it can be cut by a general scribe pattern.
[0032]
Note that the thickness of each of the plurality of first and second semiconductor chips 10 and 20 can be, for example, 50 μm to 100 μm, and the thickness of each of the dicing sheets 40 and 50 can be several μm to several It can be 10 μm. Moreover, the annular metal frame 60 is affixed to the outer peripheral part of the other surface of each dicing sheet 40, 50, respectively.
[0033]
Next, as shown in FIG. 2A, one surface of the first dicing sheet 40 at a room temperature (for example, 25 ° C.) in a sealed chamber (vacuum chamber or the like) in a pressure atmosphere lower than the atmospheric pressure. The (surface on which the first semiconductor chip 10 is adhered) and one surface of the second dicing sheet 50 (surface on which the second semiconductor chip 20 is adhered) are arranged to face each other.
[0034]
At this time, both the dicing sheets 40 and 50 are arranged to face each other while aligning the semiconductor chips 10 and 20 of the both sheets 40 and 50. The pressure in the sealed chamber can be a low-pressure atmosphere, for example, 1/100 or less of atmospheric pressure.
[0035]
And the outer peripheral part in one surface of each sheet | seat for dicing 40 and 50 which opposes is bonded together using the cyclic | annular metal frame 60, and the clearance gap between both sheets 40 and 50 is sealed. At this time, the metal frames 60 provided on the dicing sheets 40 and 50 are fixed to each other using screws, clips, or the like (not shown).
[0036]
By this bonding, the gap between the two sheets 40 and 50 is sealed, and then the sealed chamber is opened to the atmosphere. In this way, while the gap between the first and second dicing sheets 40 and 50 arranged opposite to each other is set to a pressure atmosphere lower than the atmospheric pressure, the outside of both the sheets 40 and 50 can be set to the atmospheric pressure atmosphere.
[0037]
Thus, the first and second dicing sheets 40 and 50 are pressed from the outside (other surface side) by the pressure difference between the two atmospheres, and the first semiconductor chip 10 and the second semiconductor chip 20 facing each other. Contact with the solder 30. That is, in each of the semiconductor chips 10 and 20 facing each other, the electrode 14 and the metal bump 24 are in contact via the solder 30. The thing in this state is shown in FIG.
[0038]
2B, that is, the contact state of the first and second semiconductor chips 10 and 20 through the solder 30 due to the pressure difference described above, using a heating means such as an oven. Heat. As a result, the solder 30 is reflowed, and the first and second semiconductor chips 10 and 20 are joined via the solder 30.
[0039]
By the way, according to the manufacturing method described above, the first semiconductor chip 10 and the second semiconductor chip 20 are caused by the pressure difference between the gaps of the first and second dicing sheets 40 and 50 arranged opposite to each other and the outside. Are temporarily fixed in a state of being in contact with each other through the solder 30.
[0040]
Therefore, the outer portions (other surfaces) of both the sheets 40 and 50 corresponding to the region where the semiconductor chips 10 and 20 are attached to the first and second dicing sheets 40 and 50 are pressed with a fixing jig. This eliminates the need for temporary fixing. If a fixing jig is used, non-uniform thermal expansion of the dicing sheet during heating is promoted due to a difference in thermal expansion coefficient between the fixing jig and the dicing sheet. However, according to the manufacturing method, such a problem can be avoided.
[0041]
Moreover, according to the said manufacturing method, what can be elastically deformed at the time of the heating for solder joining is used as the 1st and 2nd sheet | seats 40 and 50 for 2nd dicing. Therefore, even if the thermal expansion of the first dicing sheet 40 and the second dicing sheet 50 is nonuniform, the dicing sheets 40 and 50 expand and contract, and these nonuniform heat Misalignment of the semiconductor chips 10 and 20 due to expansion can be absorbed.
[0042]
That is, even if a force is applied so that the semiconductor chips 10 and 20 that are in contact with each other via the solder 30 are displaced due to non-uniform thermal expansion of the dicing sheets 40 and 50, this force is applied to the dicing sheet. Absorption by the elastic deformation of the sheets 40 and 50 prevents the semiconductor chips 10 and 20 from being displaced.
[0043]
Therefore, according to the manufacturing method described above, the semiconductor chips 10 and 20 aligned by overlapping the two dicing sheets 40 and 50 are not displaced by heating for solder bonding, and the above FIG. It is possible to appropriately manufacture a plurality of the semiconductor devices shown.
[0044]
In this embodiment, not only both of the first and second dicing sheets 40 and 50 but only one of the two sheets 40 and 50 can be elastically deformed at the time of heating for soldering. You may make it use a thing. For example, the first dicing sheet 40 employs a polyimide tape or the like that can be elastically deformed during heating, and the second dicing sheet 50 employs a highly rigid plate (for example, made of epoxy resin) that does not elastically deform during heating. May be.
[0045]
In that case, the second dicing sheet 50 has non-uniform thermal expansion when heated for solder bonding, but the other elastically deformable first dicing sheet 40 is the second dicing sheet 50. Therefore, it is possible to absorb and prevent the above-described misalignment of the semiconductor chip.
[0046]
In addition, as a method of setting the gap between the first and second dicing sheets 40 and 50 arranged opposite to each other to be a pressure atmosphere lower than the atmospheric pressure, the outside of the both sheets 40 and 50 is set to the atmospheric pressure atmosphere. It is not limited to the method using a sealed chamber. For example, if the nozzle is inserted into the gap between the two sheets from the outer peripheral portions of the dicing sheets 40 and 50 and the gap is sucked from the nozzle, the gap can be decompressed in the atmosphere.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of a semiconductor device according to an embodiment of the present invention.
2 is a process diagram for describing the manufacturing method of the semiconductor device shown in FIG. 1; FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 10 ... 1st semiconductor chip, 20 ... 2nd semiconductor chip, 30 ... Solder,
40 ... 1st sheet for dicing, 50 ... 2nd sheet for dicing.

Claims (3)

ダイシングカットにより切断された複数個の第１の半導体チップ（１０）が一面側に貼り付いている第１のダイシング用シート（４０）と、
ダイシングカットにより前記第１の半導体チップと配列、サイズ及び形状が同一となるように切断された複数個の第２の半導体チップ（２０）が一面側に貼り付いている第２のダイシング用シート（５０）とを用意し、
前記第１のダイシング用シートの前記一面と前記第２のダイシング用シートの前記一面とを対向配置する工程と、
対向配置された前記第１及び第２のダイシング用シートの間隙を大気圧よりも低い圧力雰囲気としつつ、前記第１及び第２のダイシング用シートの外側を大気圧雰囲気とすることにより、これら両雰囲気の圧力差によって前記第１及び第２のダイシング用シートをその外側から押さえつけ、互いに対向する前記第１の半導体チップと前記第２の半導体チップとをハンダ（３０）を介して接触させる工程と、
前記圧力差による前記第１及び第２の半導体チップの前記ハンダを介した接触状態を維持しつつ加熱することにより、前記第１及び第２の半導体チップを前記ハンダを介して接合する工程と、を備え、
前記第１および第２のダイシング用シートのうち少なくとも一方に、前記加熱時において弾性変形可能なものを用いることを特徴とする半導体装置の製造方法。A first dicing sheet (40) in which a plurality of first semiconductor chips (10) cut by dicing cut are attached to one surface;
A second dicing sheet in which a plurality of second semiconductor chips (20) cut so as to have the same arrangement, size and shape as the first semiconductor chips by dicing cut are attached to one surface side ( 50)
Disposing the one surface of the first dicing sheet and the one surface of the second dicing sheet opposite to each other;
By setting the gap between the first and second dicing sheets arranged opposite to each other to a pressure atmosphere lower than atmospheric pressure, the outside of the first and second dicing sheets is set to atmospheric pressure atmosphere. Pressing the first and second dicing sheets from the outside by an atmospheric pressure difference, and contacting the first semiconductor chip and the second semiconductor chip facing each other via solder (30); ,
Joining the first and second semiconductor chips via the solder by heating while maintaining the contact state of the first and second semiconductor chips via the solder due to the pressure difference; and With
A method of manufacturing a semiconductor device, wherein at least one of the first and second dicing sheets is elastically deformable during the heating. 前記第１および第２のダイシング用シート（４０、５０）の両方に、前記加熱時において弾性変形可能なものを用いることを特徴とする請求項１に記載の半導体装置の製造方法。The method of manufacturing a semiconductor device according to claim 1, wherein both the first and second dicing sheets (40, 50) are elastically deformable during the heating. 前記第１および第２のダイシング用シート（４０、５０）は、ポリイミド樹脂よりなることを特徴とする請求項２に記載の半導体装置の製造方法。The method for manufacturing a semiconductor device according to claim 2, wherein the first and second dicing sheets (40, 50) are made of polyimide resin.
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