JP4196434B2 - Data rounding method and data rounding device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a data rounding method and a data rounding device for rounding digitized numerical values.
[0002]
[Prior art]
When a digital computer or the like performs multiplication of two binary value data, the number of bits necessary to express the binary value data obtained as a result of the multiplication is larger than the number of bits of the original data. For example, when multiplication is performed in an n-bit computer, normally, two binary numerical data before multiplication are n bits, but the multiplication result is 2n-bit data.
[0003]
However, when storing the multiplication result, it is often necessary to round the number of bits to n bits. In such a case, the simplest rounding method is a method of truncating the lower n bits. However, this method does not provide a rounding result that is symmetric with respect to positive and negative numbers.
[0004]
FIG. 9 is an example showing a rounding result when rounding is performed by simple truncation. Specifically, FIG. 9 schematically shows a case where an 8-bit binary value is rounded to obtain a 4-bit binary value. In the figure, it is assumed that the decimal point position of 8-bit data before rounding is between the lower 4th bit and the 5th bit, and the data is expressed in 2's complement format.
[0005]
As can be seen from (a) of FIG. 9, when the data before rounding is a positive numerical value 3.75, the data after rounding is 3.0, and from (b) of FIG. When the data is a negative numerical value −3.75, it can be seen that the rounded data is −4.0. In other words, a rounding result that is symmetric with respect to positive and negative numbers cannot be obtained. When such a rounding method is used for a series of product-sum operations often seen in signal processing or the like, there is an inconvenience that rounding errors are accumulated in a negative direction, resulting in a significant deterioration in calculation accuracy.
[0006]
In order to avoid this problem, there is a data rounding method as shown in FIG. FIG. 10 is a flowchart showing the flow of the “numerical value rounding method” disclosed in Japanese Patent Application Laid-Open No. 64-58020, and describes the rounding method when obtaining the rounding result B of the lower k bits of certain data A. Is.
[0007]
In step S1 of FIG. 10, 2 is added to the data A before rounding.^k-1(The addition result is A ′), and in step S2, the lower-order k bits of the data A ′ after the addition are rounded down. This is a rounding off. Rounding is performed by adding data in which only the most significant bit in the bits to be rounded down is 1 and all other bits are 0 before rounding down, and then rounding down. (A) in FIG. , (B) is an example showing a rounding result when rounding by this rounding is performed.
[0008]
As shown in (a) of FIG. 11, when the data before rounding is a positive numerical value 3.75, after rounding is 4.0, and as shown in (b), the data before rounding is a negative numerical value. When it is −3.75, it is −4.0 after rounding. In other words, the method shown in FIG. 11 provides a rounding result that is symmetric with respect to positive and negative numerical values.
[0009]
However, as shown in FIG. 12, in the data before rounding, when only the most significant bit in the bits to be discarded is 1 and the others are 0, the above method has a problem. Referring to FIG. 11, when the data before rounding is a positive numerical value 3.5, it is 4.0 after rounding, and when the data before rounding is a negative numerical value −3.5, it is −3. 0, and no symmetric rounding result is obtained for positive and negative numerical values.
[0010]
On the other hand, as a method of always giving symmetrical rounding results to positive and negative binary values, for example, there is a “rounding device” shown in Japanese Patent Laid-Open No. 48-27648. In the rounding process shown in this publication, when the data before rounding is positive, the data with only the most significant bit being 1 and the other bits being 0 is added before the truncation is performed. Later, truncation is performed. Also, in this process, if the data before rounding is negative, the most significant bit in the bits to be rounded off and the data with more bits being 0 and the other bits being 1 are added before truncation. After that, truncation is carried out. According to such rounding processing, in any case, it is possible to give a symmetric rounding result to positive and negative binary values.
[0011]
[Problems to be solved by the invention]
However, in the above conventional rounding method, a symmetric rounding result cannot be obtained for positive and negative numerical values, or the processing differs depending on whether the data before rounding is positive or negative. Judgment is necessary. If this determination is made to obtain a symmetric rounding result, there is a problem that the processing becomes very complicated.
[0012]
In addition, even when the conventional rounding method is used for an adaptive filter, for example, a symmetrical rounding result cannot be obtained with respect to positive and negative binary values, so that the estimation accuracy of the impulse response is not improved. There's a problem.
[0013]
The present invention has been made in view of the above-described problems. The object of the present invention is to provide a symmetric rounding result for positive and negative binary values and to determine whether the data before rounding is positive or negative. It is to provide a data rounding method and a data rounding device which are not necessary.
[0014]
[Means for Solving the Problems]
  In order to achieve the above object, according to a first aspect of the present invention, there is provided a data rounding method for obtaining a rounding result having a predetermined number of bits by rounding a lower bit of data, wherein nm bits of upper bit data, m bits A step of holding n-bit unrounded data consisting of (n, m are integers, n> m), a step of holding n-m bits of 0 data, and the above-mentioned before rounding Upper m bits of dataUpper bit side ofSynthesize the n−m bits of 0 data, the data before rounding, and the upper m bits before roundingUpper bit side ofData rounding performed by a computer system comprising: adding a sum of n−m bits of 0 data to data; and truncating the lower m bits of the n-bit data after the addition to obtain a rounding result. Provide a method.
  According to a second aspect of the present invention, there is provided a data rounding device for obtaining a rounding result of a predetermined number of bits by rounding the lower bits of data, wherein nm bits of upper bit data, m bits of lower bit data, (n, m is an integer, and n> m), means for holding n-bit unrounded data, means for holding nm bits of data, and the upper m bits of the data before roundingUpper bit side ofMeans for synthesizing the nm bits of data, the data before rounding, and the upper m bits before roundingUpper bit side ofAnd means for adding data obtained by synthesizing nm-bit data, the means for holding nm-bit data holds all 0 data, and the lower order of the n-bit data after the addition. A data rounding device for rounding off m bits to obtain a rounding result is provided.
[0015]
  According to a third aspect of the present invention, there is provided a data rounding method for obtaining a rounding result of a predetermined number of bits by performing rounding processing on lower bits of data, wherein n−m bits of upper bit data, m bits of lower bit data, (n, m is an integer, and n> m), holding n-bit pre-round data, performing a right shift of nm bits on the pre-round data, the pre-round data, This is executed by a computer system comprising: adding data shifted right by nm bits to the unrounded data; and truncating lower m bits of the n-bit data after the addition to obtain a rounded result. Data rounding method.
  According to a fourth aspect of the present invention, there is provided a data rounding device for obtaining a rounding result of a predetermined number of bits by rounding the lower bits of data, wherein nm bits of upper bit data, m bits of lower bit data, (n, m is an integer, and n> m) means for holding n-bit unrounded data, means for performing a right shift of nm bits with respect to the unrounded data, the unrounded data, And a means for adding data shifted right by nm bits to the data before rounding, and a data rounding device for obtaining a rounding result by truncating the lower m bits of the n-bit data after the addition.
[0016]
  According to a fifth aspect of the present invention, there is provided means for performing a convolution operation on impulse response estimation data of an unknown system and a predetermined reference signal to generate a pseudo response signal, and the pseudo response signal and the response signal from the unknown system. An adaptation comprising: means for calculating a correction amount of the impulse response estimation data based on the difference; and means for calculating new n-bit impulse response estimation data by adding the correction amount and the impulse response estimation data In the data rounding device used in the filter, the application filter rounds the addition value of the calculated correction amount of the impulse response estimation data and the impulse response estimation data up to the previous time to obtain new impulse response estimation data N−m bits of upper bit data, m bits of lower bit data (n and m are integers, n Consists a m), and means for holding the previous data rounding n bits, means for holding the n-m bit data, the upper m bits of the rounding data beforeUpper bit side ofMeans for synthesizing the nm bits of data, the data before rounding, and the upper m bits before roundingUpper bit side ofAnd means for adding data obtained by synthesizing nm-bit data, the means for holding nm-bit data holds all 0 data, and the lower order of the n-bit data after the addition. A data rounding device for rounding off m bits to obtain a rounding result is provided.
  According to a sixth aspect of the present invention, there is provided: means for generating a pseudo response signal by performing a convolution operation on impulse response estimation data of an unknown system and a predetermined reference signal; and the pseudo response signal and the response signal from the unknown system. An adaptation comprising: means for calculating a correction amount of the impulse response estimation data based on the difference; and means for calculating new n-bit impulse response estimation data by adding the correction amount and the impulse response estimation data In the data rounding device used in the filter, the applied filter is configured to round the correction amount of the calculated impulse response estimation data, and includes n−m bits of upper bit data and m bits of lower bit data ( n and m are integers, and n> m) means for holding n-bit unrounded data, and holding nm bits of data And stage, upper m bits of the rounding data beforeUpper bit side ofMeans for synthesizing the nm bits of data, the data before rounding, and the upper m bits before roundingUpper bit side ofAnd means for adding data obtained by synthesizing nm-bit data, the means for holding nm-bit data holds all 0 data, and the lower order of the n-bit data after the addition. A data rounding device for rounding off m bits to obtain a rounding result is provided.
[0017]
  7thAccording to the present invention, means for generating a pseudo response signal by performing a convolution operation on the impulse response estimation data of an unknown system and a predetermined reference signal, and a difference between the pseudo response signal and the response signal from the unknown system are calculated. An adaptive filter comprising: means for calculating a correction amount of the impulse response estimation data; and means for calculating new n-bit impulse response estimation data by adding the correction amount and the impulse response estimation data. Data rounding to useapparatusInThe applied filter is configured to round the addition value of the calculated amount of correction of the impulse response estimation data and the impulse response estimation data up to the previous time to obtain new impulse response estimation data, and nm bits Means for holding n-bit unrounded data, and n−m with respect to the unrounded data, n−m is an integer and n> m. means for performing a right shift of m bits, and means for adding the data before rounding and the data shifted to the right by nm bits with respect to the data before rounding, the lower order of the n bit data after the addition A data rounding device for rounding off m bits to obtain a rounding result is provided.
  According to an eighth aspect of the invention, there is provided: means for generating a pseudo response signal by performing a convolution operation on impulse response estimation data of an unknown system and a predetermined reference signal; and the pseudo response signal and the response signal from the unknown system. An adaptation comprising: means for calculating a correction amount of the impulse response estimation data based on the difference; and means for calculating new n-bit impulse response estimation data by adding the correction amount and the impulse response estimation data In the data rounding device used in the filter, the applied filter is configured to round the correction amount of the calculated impulse response estimation data, and includes n−m bits of upper bit data and m bits of lower bit data ( n and m are integers, and n> m) means for holding n-bit unrounded data, and n−m for the unrounded data And a means for adding the data before the rounding and the data shifted to the right by nm bits with respect to the data before the rounding, and the lower m of the n-bit data after the addition A data rounding device for rounding bits to obtain a rounding result is provided.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to the accompanying drawings.
Embodiment 1 FIG.
FIG. 1 is a block diagram showing a configuration of a rounding circuit for realizing a data rounding method according to Embodiment 1 of the present invention. Note that the rounding processing circuit according to the present embodiment performs processing for rounding n-bit data to nm bits.
[0019]
The rounding processing circuit shown in FIG. 1 includes a register 101 that holds data before rounding, a register 102 that stores “0”, an n-bit adder 103, and a register 104 that holds a rounding result.
[0020]
Hereinafter, the operation of the rounding processing circuit according to the present embodiment will be described.
The register 101 holds n-bit data before rounding. The register 102 is an nm bit register, and “0” is stored in all the bits here. The n-bit adder 103 adds two n-bit data. One of them is data before rounding held in the register 101. The other n-bit data is data obtained by synthesizing these n−m bits and m bits, with the output of the register 102 being its upper nm bits and the upper m bits of the register 101 being its lower m bits. is there. Then, the addition result output from the n-bit adder 103 is held in the register 104, and the higher-order nm bits become the rounding result.
[0021]
FIG. 2 is a diagram for explaining rounding processing in the present embodiment. This figure shows the input data and output of the n-bit adder 103 of the rounding circuit of FIG. In FIG. 2, the first input data of the n-bit adder 103 in FIG. 1 is A, the other input data is B, and the output data after addition is C.
[0022]
That is, as shown in (a) of FIG. 2, A is n-bit data before rounding, and as shown in (b) of FIG. The lower m bits are data having the same configuration as the upper m bits of A. The addition result of A and B is C ((c) in the figure), and the upper nm bits of C are the rounding result.
[0023]
Therefore, hereinafter, it will be described that the data rounding method as described above gives a symmetric rounding result to positive and negative data.
[0024]
Consider a certain positive n-bit data X. For simplicity, it is assumed that n and m have a relationship of n = 2m. When the lower m bits of the data X are represented by XL and the upper m bits are represented by XH,
X = 2^m・ XH + XL (1)
It becomes. If the output of the n-bit adder 103 in FIG.
Y = 2^m・ XH + XL + XH (2)
It becomes.
[0025]
Therefore, when this rounding output is Yr, Yr is XL + XH ≧ 2^mWhen the
Yr = 2^m・ XH + 2^m= 2^m・ (XH + 1) (3)
XL + XH <2^mIn case of, no carryover occurs,
Yr = 2^m・ XH (4)
It becomes.
[0026]
On the other hand, when the data “−X” in which the sign of X is inverted is represented using XH and XL as described above,
-X = -2^m・ XH-XL (5)
It becomes. The output Z of the n-bit adder 103 in FIG. 1 with respect to −X is when XL ≠ 0.
Z = -2^m・ XH-XL + (2^m-1-XH)
= -2^m・ XH + (2^m-XL-XH-1) (6)
It becomes.
[0027]
Therefore, when this rounding output is Zr, Zr is expressed as XL + XH ≧ 2^m2^mSince -XL-XH-1 <0, a carry-down occurs,
Zr = -2^m・ XH-2^m= -2^m・ (XH + 1) (7)
It becomes. Also, XL + XH <2^m2^mSince -XL-XH-1 ≧ 0, no carry-down occurs,
Zr = -2^m・ XH (8)
It becomes.
[0028]
Thus, according to the above rounding method, it can be seen that a symmetrical rounding result is given to positive and negative data when XL ≠ 0. When XL = 0, the output Y of the n-bit adder 103 for X is Y = 2.^m・ XH + XH, 0 <XH <2^m-1Therefore, no carry occurs and the rounding output Yr is always Yr = 2.^m・ It becomes XH.
[0029]
On the other hand, the output Z of the n-bit adder 103 for the data -X is Z = -2.^m・ XH + (2^m-XH). 0 <XH <2^m-1So 2^m-1<2^m-XH <2^mThis also causes no ups and downs, and the rounding output Zr is always Zr = −2.^m・ It becomes XH.
[0030]
As described above, according to the present embodiment, an nm bit register storing 0 and an adder for adding two n bit data are provided, and the upper m bits of the data before rounding are obtained. By adding n-bit data, which is the lower m bits, and n-bit data before rounding, and by rounding down the lower m bits of the data after the addition, rounding results are obtained, and positive and negative binary values are obtained. On the other hand, a symmetric rounding result is given, and a data rounding method that does not determine whether data is positive or negative can be obtained.
[0031]
Embodiment 2. FIG.
Embodiment 2 according to the present invention will be described below. Note that the processing circuit according to the first embodiment is configured to generate addition data using an nm bit register in which 0 is stored. Here, the addition is performed using a shift arithmetic unit. Generate data.
[0032]
FIG. 3 is a block diagram showing a configuration of a rounding processing circuit for realizing the data rounding method according to the second embodiment of the present invention. In the rounding circuit according to the present embodiment shown in FIG. 3, the same components as those in the rounding circuit according to the first embodiment shown in FIG. Description is omitted.
[0033]
That is, the register 101, the n-bit adder 103, and the register 104 in FIG. 3 operate in the same manner as the corresponding components of the rounding processing circuit shown in FIG. 3 receives the n-bit data before rounding held in the register 101, performs an n-m bit right logical shift operation, and outputs the operation result as n Output to the bit adder 103.
[0034]
Since the shift operation performed by the shift calculator 105 is a logical shift, the upper nm bits that are vacated by the right shift are “padded with zeros”. Therefore, the n-bit data obtained by this shift operation is the same data as the data B shown in FIG. 2B according to the first embodiment.
[0035]
Therefore, the n-bit adder 103 in FIG. 3 adds two n-bit data, the n-bit data before rounding, held in the register 101, and the n-bit data obtained by the shift operation. As in the first embodiment, the addition result output from the n-bit adder 103 is held in the register 104, and the higher order nm bits are the rounding result.
[0036]
As described above, according to the present embodiment, an n−m-bit shift arithmetic unit and an adder that adds two n-bit data are provided, and n obtained by shifting the data before rounding. After adding bit data and n-bit data before rounding, rounding off the lower m bits of the data after the rounding results in a round result, which is symmetric with respect to positive and negative binary values. Thus, a rounding method can be obtained, which can provide a rounding result and does not need to determine whether the data is positive or negative.
[0037]
Embodiment 3 FIG.
Embodiment 3 according to the present invention will be described below. In each of the above embodiments, data rounding is realized using specific hardware such as an adder or a register. Here, a data rounding method executed by software will be described.
[0038]
FIG. 4 is a block diagram showing a schematic configuration of, for example, a digital signal processor that executes software according to the present embodiment. In the digital signal processor (DSP) 400 shown in the figure, the memory 403 temporarily stores data and calculation results to be processed, and the ROM 402 stores the processing procedure according to the present embodiment. Is stored as a program. The CPU 401 is a central control unit that performs data rounding processing described below according to the above-described program and controls the entire processor. Note that the calculation result here is output from the output unit 404 to an external device (not shown).
[0039]
FIG. 5 is a flowchart showing an execution procedure of the data rounding method according to the present embodiment. In the process shown in the figure, first, data B obtained by right-shifting n-bit data A before rounding by n−m bits is calculated (step ST1). Next, the data A before rounding and the data B obtained by this right logical shift are added (step ST2). Then, in the final step ST3, a process of truncating the lower m bits of the addition result is performed.
[0040]
The rounding process realized by such a procedure eliminates the need to judge whether the data is positive or negative when rounding is performed in a digital signal processor or the like. A rounding process that gives a symmetric result can be realized.
[0041]
Since most of digital signal processors are 16-bit fixed point systems, the most significant bit is often treated as a sign bit and the lower 15 bits as an amplitude bit in many cases. In this case, in the multiplication result of two 16-bit data, the most significant bit is a sign bit and the lower 31 bits are amplitude bits, and the lower 16 bits of the total 32-bit data are rounded. This means that the bit length of the data after rounding becomes ½ of the bit length of the data before rounding. By doing in this way, each step mentioned above becomes a process in a unit of 16 bits, and generally each step can be realized more simply.
[0042]
As described above, according to the present embodiment, the right shift of the data before rounding, the addition of the data obtained by this right shift and the data before rounding, and the lower m bits of the data after the addition Since the truncation is performed purely by software, it is not necessary to determine whether the data is positive or negative, so that a symmetric rounding result can be obtained for positive and negative binary data with a small number of steps. In particular, when this program is executed on a digital signal processor, each processing step can be realized more simply.
[0043]
Embodiment 4 FIG.
Embodiment 4 according to the present invention will be described below. The data rounding method according to the present embodiment is used in an adaptive filter that estimates an unknown system.
[0044]
FIG. 6 is a block diagram showing a configuration of an adaptive filter using the data rounding method according to the present embodiment. The adaptive filter shown in the figure includes an X register 201 that stores past sample values of a reference signal, an H register 202 that stores an impulse response estimated value, and a convolution of the stored value of the X register 201 and the stored value of the H register 202. The convolution integrator 203 that performs the operation, the subtractor 204 that subtracts the output of the convolution integrator 203 from the response signal of the unknown system 250, the impulse response of the unknown system 250 is estimated, and the impulse response stored in the H register 202 A ΔH generation circuit 205 that calculates a correction amount of the estimated value, a H + ΔH adder 206 that adds the correction amount and the impulse response estimated value stored in the H register 202, and a rounding process that rounds the addition result of the H + ΔH adder 206 The unit 207 is configured.
[0045]
Next, the operation of the adaptive filter according to this embodiment will be described.
The adaptive filter is realized by digital signal processing, and is digital data in which all signals are sampled at a constant sampling time. Therefore, assuming that the current sampling time is i, first, the X register 201 first stores data X (i), X (i−1), X (i) for the past N samples of the reference signal output to the unknown system 250. ..., X (i-N + 1) is held. The H register 202 holds the impulse response estimation values h0 (i), h1 (i),..., HN-1 (i) of the unknown system 250.
[0046]
The convolution integrator 203 includes the reference signals X (i), X (i−1),..., X (i−N + 1) and impulse response estimated values h0 (i), h1 (i),. The pseudo response signal r (i) is calculated by a convolution operation with hN-1 (i). Therefore, this pseudo response signal is expressed as r (i) = x (i) × h0 (i) + x (i−1) × h1 (i) +... + X (i−N + 1) × hN−1 (i) It becomes.
[0047]
The subtracter 204 subtracts the pseudo response signal r (i) from the response signal s (i) input from the unknown system 250 to obtain a residual signal e (i). That is, e (i) = s (i) −r (i). Further, the ΔH generation circuit 205 estimates the unknown system 250, and the correction amount Δh0 (i) of the impulse response estimated value stored in the H register 202 so that the residual signal e (i) becomes small. , Δh1 (i),..., ΔhN−1 (i) are calculated.
[0048]
Here, as a general correction algorithm, there is an algorithm called a least mean square (LMS) method. According to this method, the correction amount Δhk (i) (k = 0, 1,..., N−1) is expressed as Δhk (i) = α × e (i) × X (ik). Become.
[0049]
If each of the above data except for Δhk (i) is n-bit data, the correction amount Δhk (i) is not n-bit data and has a bit number of n bits or more. It becomes data. In order to simplify the calculation, a power value of 2 is often used for α. However, if it is 1, Δhk (i) is 2n-bit data.
[0050]
The H + ΔH adder 206 is an adder for adding 2n-bit data, and the impulse response estimated values h0 (i), h1 (i),..., HN−1 (i) and their corrections. The amounts Δh0 (i), Δh1 (i),..., ΔhN-1 (i) are added to obtain new impulse response estimated values h0 (i + 1), h1 (i + 1) used at the next sample time i + 1. ,..., HN-1 (i + 1) is calculated. That is, hk (i + 1) = hk (i) + Δhk (i) (k = 0, 1,..., N−1).
[0051]
Of the above data, if each data except Δhk (i) is n-bit data, the correction amount Δhk (i) is not n-bit data and has a bit number of n bits or more. It becomes data. Similarly to the above, for simplicity of calculation, a power of 2 is often used for α. However, if it is 1, Δhk (i) is 2n-bit data.
[0052]
Accordingly, the H + ΔH adder 206 adds two 2n-bit data, and an appropriate shift is applied to the impulse response estimated value hk (i), which is n-bit data, at the time of the addition. Then, the position of the decimal point is adjusted to be the same as the position of the decimal point of Δhk (i) which is 2n-bit data.
[0053]
Since the new impulse response estimated values h0 (i + 1), h1 (i + 1),..., HN−1 (i + 1) calculated in this way become 2n-bit data, the rounding processing unit 207 After being rounded to n-bit data, it is stored in the H register 202. The operation of the rounding processing unit 207 is the same as the operation of the rounding processing circuit according to the first embodiment shown in FIG.
[0054]
FIG. 7 shows the characteristics of the adaptive filter according to the present embodiment having the rounding processing method described above. That is, this figure is a graph showing the process in which the adaptive filter as described above estimates the impulse response of an unknown system.
[0055]
In the graph of FIG. 7, the vertical axis is the square error of the impulse response of the unknown system and the impulse response estimate of the adaptive filter (normalized by the sum of squares of the impulse response of the unknown system), and the horizontal axis is This is the number of samples (corresponding to the operating time of the adaptive filter). Curve A is a filter characteristic when the data rounding method according to the present embodiment is applied, curve B is a characteristic when data rounding by truncation is applied, and curve C is data rounding by rounding. It is a characteristic when applying.
[0056]
As is clear from FIG. 7, in the characteristic indicated by the curve B, errors start to accumulate from around 3000 samples, and the square error increases. In the curve C, errors start to accumulate from around 30000 samples, and the square error gradually increases. On the other hand, the curve A has a square error slightly larger than that of the curve B from around 5000 to 45000 samples, but does not increase the square error until the end. It can be seen that the multiplication error is reduced. Thus, it can be seen that this rounding scheme gives a symmetric rounding result for positive and negative binary values and improves the impulse response estimation accuracy.
[0057]
As described above, according to the present embodiment, in the adaptive filter, the correction amount of the impulse response estimated value is calculated based on the pseudo response signal obtained by performing the convolution operation on the reference signal and the impulse response estimated value. By applying a data rounding method that rounds down the lower bits to a new impulse response estimation value obtained by adding the correction amount to the above impulse response estimation value, positive and negative binary values are obtained. Symmetrical rounding results can be obtained, and excellent impulse response estimation characteristics can be obtained as characteristics of the adaptive filter.
[0058]
Embodiment 5 FIG.
Embodiment 5 according to the present invention will be described below. In the fourth embodiment, the configuration of the adaptive filter that performs rounding on the output of the H + ΔH adder has been described. Here, a mode in which rounding is performed on the correction amount of the impulse response estimated value is shown.
[0059]
FIG. 8 is a block diagram showing a configuration of an adaptive filter using the data rounding method according to the present embodiment. In the figure, the same components as those of the adaptive filter according to Embodiment 4 shown in FIG. That is, a past sample value of the reference signal is stored in the X register 201 of FIG. 8, and an impulse response estimated value is stored in the H register 202. The convolution integrator 203 performs a convolution operation between the stored value of the X register 201 and the stored value of the H register. The subtractor 204 subtracts the output of the convolution integrator 203 from the response signal of the unknown system 250.
[0060]
The ΔH generation circuit 205 estimates the impulse response of the unknown system 250 and calculates the correction amount of the impulse response estimation value stored in the H register 202. The rounding processing unit 207 rounds the correction amount, and the H + ΔH adder 206 adds the correction amount after rounding and the impulse response estimated value stored in the H register 202.
[0061]
Hereinafter, the operation of the adaptive filter according to the present embodiment will be described. Note that the X register 201, H register 202, convolution integrator 203, subtractor 204, and ΔH generation circuit 205 in FIG. 8 perform the same operation as the adaptive filter according to the fourth embodiment shown in FIG.
[0062]
The rounding processing unit 207 performs rounding on the estimated impulse response correction amounts Δh0 (i), Δh1 (i),..., ΔhN−1 (i) output from the ΔH generation circuit 205. The operation of the rounding processing unit 207 is the same as the operation of the rounding processing circuit according to the first embodiment shown in FIG. Therefore, if the rounded data are Δh0 (i) ′, Δh1 (i) ′,..., ΔhN−1 (i) ′, these are estimated impulse response values h0 stored in the H register 202. (I), h1 (i),..., HN-1 (i) are rounded to the same number of bits.
[0063]
When the number of bits is n, the H + ΔH adder 206 is an adder for adding n bits of data, and the impulse response estimated values h0 (i), h1 (i),..., HN−1. (I) and the corrected amounts Δh0 (i) ′, Δh1 (i) ′,..., ΔhN−1 (i) ′ after rounding are added to obtain a new value used at the next sample time i + 1. Impulse response estimated values h0 (i + 1), h1 (i + 1),..., HN−1 (i + 1) are calculated. That is, hk (i + 1) = hk (i) + Δhk (i) ′ (k = 0, 1,..., N−1), and this is newly stored in the H register 202.
[0064]
As described above, according to the present embodiment, in the adaptive filter, the correction amount of the impulse response estimated value is calculated based on the pseudo response signal obtained by performing the convolution operation on the reference signal and the impulse response estimated value. Then, after applying a data rounding method that rounds down the lower bits to this correction amount, by adding the rounded correction amount to the impulse response estimation value, a new impulse response estimation value is calculated, A rounding result symmetric with respect to positive and negative binary values can be obtained, and an excellent impulse response estimation characteristic can be obtained as the characteristic of the adaptive filter.
[0065]
【The invention's effect】
  As described above, according to the first invention, in a data rounding method for obtaining a rounding result having a predetermined number of bits by rounding the lower bits of data, the upper bit data of n−m bits and m bits A step of holding n-bit unrounded data consisting of (n, m are integers, n> m), a step of holding n-m bits of 0 data, and the above-mentioned before rounding Upper m bits of dataUpper bit side ofSynthesize the n−m bits of 0 data, the data before rounding, and the upper m bits before roundingUpper bit side ofAnd a step of adding data obtained by synthesizing n−m bits of 0 data and a step of rounding down the lower m bits of the data after addition to obtain a rounding result, thereby obtaining a positive and negative binary value. As a result, a symmetric rounding result is obtained, and it is not necessary to determine whether the data before rounding is positive or negative.
  According to the second aspect of the present invention, in a data rounding device that obtains a rounding result of a predetermined number of bits by rounding the lower bits of the data, the upper bit data of n−m bits, the lower bit data of m bits, n and m are integers, and n> m) means for holding n-bit unrounded data, means for holding nm bits of data, and the upper m bits of the unrounded dataUpper bit side ofMeans for synthesizing the nm bits of data, the data before rounding, and the upper m bits before roundingUpper bit side ofAnd a means for adding the data obtained by combining the mn bits of data, the means for holding the mn bits of data holds all 0 data, and the lower m bits of the data after the addition By rounding off and obtaining a rounding result, a rounding result that is symmetric with respect to positive and negative binary values can be obtained, and there is no need to determine whether the data before rounding is positive or negative.
[0066]
  According to the third aspect of the present invention, in a data rounding device that obtains a rounding result of a predetermined number of bits by rounding the lower bits of the data, the upper bit data of n−m bits, the lower bit data of m bits, n and m are integers, and n> m) means for holding n-bit unrounded data, means for performing a right shift of nm bits on the unrounded data, and the unrounded data And means for adding data shifted right by nm bits with respect to the data before rounding, and by rounding down the lower m bits of the data after addition to obtain a rounding result, positive and negative A rounding result that is symmetric with respect to a binary value is obtained, and it is not necessary to determine whether the data before rounding is positive or negative.
  According to a fourth aspect of the present invention, in a data rounding device that obtains a rounding result of a predetermined number of bits by rounding the lower bits of the data, the n-m bit upper bit data, the m bit lower bit data ( n and m are integers, and n> m) means for holding n-bit unrounded data, means for performing a right shift of nm bits on the unrounded data, and the unrounded data And means for adding data shifted right by nm bits to the data before rounding, and means for rounding down the lower m bits of the data after addition to obtain a rounding result. A rounding result symmetric with respect to a negative binary value is obtained, and at the same time, an excellent impulse response estimation characteristic can be obtained as the characteristic of the adaptive filter.
[0067]
  According to the fifth invention, means for generating a pseudo response signal by performing a convolution operation on the impulse response estimation data of the unknown system and the predetermined reference signal, the pseudo response signal and the response signal from the unknown system And means for calculating a correction amount of the impulse response estimation data, and means for calculating new n-bit impulse response estimation data by adding the correction amount and the impulse response estimation data. In the data rounding device used in the adaptive filter provided, the applied filter rounds the sum of the calculated correction amount of the impulse response estimation data and the impulse response estimation data up to the previous time, and obtains new impulse response estimation data. Mn bits of upper bit data, m bits of lower bit data (n and m are integers) , N> m) consisting a, means for holding the previous data rounding n bits, means for holding the n-m bit data, the upper m bits of the rounding data beforeUpper bit side ofMeans for synthesizing the nm bits of data, the data before rounding, and the upper m bits before roundingUpper bit side ofAnd means for adding data obtained by synthesizing mn bits of data, and the means for holding nm bits of data holds all 0 data, and the lower order of the n bits of data after the addition. By rounding off m bits to obtain a rounding result, a rounding result symmetric with respect to positive and negative binary values can be obtained, and an excellent impulse response estimation characteristic can be obtained as a characteristic of the adaptive filter.
  According to the sixth aspect of the invention, means for generating a pseudo response signal by performing a convolution operation on the impulse response estimation data of the unknown system and the predetermined reference signal, the pseudo response signal and the response signal from the unknown system And means for calculating a correction amount of the impulse response estimation data, and means for calculating new n-bit impulse response estimation data by adding the correction amount and the impulse response estimation data. In the data rounding device used in the adaptive filter provided, the applied filter is configured to round the correction amount of the calculated impulse response estimation data, and includes mn bits of upper bit data and m bits of lower bit data. And (n and m are integers, n> m), means for holding n-bit unrounded data, and holding nm bits of data. Means for, upper m bits of the rounding data beforeUpper bit side ofMeans for synthesizing the nm bits of data, the data before rounding, and the upper m bits before roundingUpper bit side ofAnd means for adding data obtained by synthesizing nm-bit data, the means for holding nm-bit data holds all 0 data, and the lower order of the n-bit data after the addition. By rounding off m bits to obtain a rounding result, a rounding result symmetric with respect to positive and negative binary values can be obtained, and an excellent impulse response estimation characteristic can be obtained as a characteristic of the adaptive filter.
[0068]
  First7According to the invention of unknown systemThe impulse response based on the difference between the pseudo response signal and the response signal from the unknown system, and means for generating a pseudo response signal by performing a convolution operation on the impulse response estimation data and the predetermined reference signal In a data rounding apparatus used in an adaptive filter, comprising: means for calculating a correction amount of estimated data; and means for calculating new n-bit impulse response estimation data by adding the correction amount and the impulse response estimation data. The applied filter is configured to round the addition value of the calculated amount of correction of the impulse response estimation data and the impulse response estimation data up to the previous time to obtain new impulse response estimation data, and nm bits Of n bits, n bits and m bits, and (n and m are integers, n> m). Means for holding the previous data, means for right shifting nm bits with respect to the data before rounding, data before rounding, and data shifted right with respect to the data before rounding by nm bits And by rounding down the lower m bits of the n-bit data after the addition to obtain a rounding result, a rounding result symmetric with respect to positive and negative binary values is obtained. An excellent impulse response estimation characteristic can be obtained as the characteristic of the adaptive filter.
According to the eighth invention, means for generating a pseudo response signal by performing a convolution operation on impulse response estimation data of an unknown system and a predetermined reference signal, the pseudo response signal, and a response signal from the unknown system And means for calculating a correction amount of the impulse response estimation data, and means for calculating new n-bit impulse response estimation data by adding the correction amount and the impulse response estimation data. In the data rounding device used in the adaptive filter provided, the applied filter is configured to round the correction amount of the calculated impulse response estimation data, and includes mn bits of upper bit data and m bits of lower bit data. And (n, m are integers, n> m), means for holding n-bit unrounded data, Means for performing a right shift of -m bits, and means for adding the data before rounding and the data shifted to the right by nm bits to the data before rounding in alignment with n bits. By rounding down the lower m bits of n-bit data to obtain a rounding result, a rounding result that is symmetric with respect to positive and negative binary values is obtained, and an excellent impulse response estimation characteristic is provided as a characteristic of the adaptive filter. Obtainable.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a rounding processing circuit according to a first embodiment of the present invention.
FIG. 2 is a diagram for explaining rounding processing according to the first embodiment;
FIG. 3 is a block diagram showing a configuration of a rounding processing circuit according to a second embodiment of the present invention.
FIG. 4 is a block diagram showing a schematic configuration of a digital signal processor that executes software according to Embodiment 3 of the present invention;
FIG. 5 is a flowchart showing an execution procedure of a data rounding method according to the third embodiment.
FIG. 6 is a block diagram showing a configuration of an adaptive filter using a data rounding method according to Embodiment 4 of the present invention.
7 is a diagram illustrating characteristics of an adaptive filter according to Embodiment 4. FIG.
FIG. 8 is a block diagram showing a configuration of an adaptive filter using a data rounding method according to a fifth embodiment of the present invention.
FIG. 9 is a diagram illustrating a rounding result when rounding is performed by simple truncation.
FIG. 10 is a flowchart showing a flow of a conventional rounding method.
FIG. 11 is a diagram showing a rounding result when rounding is performed by rounding off.
FIG. 12 is a diagram showing another rounding result when rounding is performed by rounding off.
[Explanation of symbols]
101, 102, 104 ... registers, 103 ... n-bit adder, 105 ... nm bit shift computing unit, 201 ... X register, 202 ... H register, 203 ... convolution integrator, 204 ... subtractor, 205 ... ΔH generation Circuit 206... H + ΔH adder 207 rounding processing unit 250 unknown system 400 digital signal processor (DSP) 401 CPU 402 ROM 403 memory 404 output unit

Claims (8)

In a data rounding method for obtaining a rounding result of a predetermined number of bits by rounding the lower bits of data,
holding n-bit unrounded data consisting of n−m bits of upper bit data, m bits of lower bit data (n and m are integers, n> m),
holding n−m bits of 0 data;
Synthesizing the nm bits of 0 data on the upper m bits of the upper m bits of the pre-round data;
Adding the data before rounding and data obtained by combining 0-bit data of nm bits on the upper bit side of the upper m bits before rounding;
Truncating the lower m bits of the n-bit data after addition to obtain a rounding result, and a data rounding method executed by a computer system. In a data rounding device that obtains a rounding result of a predetermined number of bits by rounding the lower bits of data,
means for holding n-bit unrounded data consisting of n−m bits of upper bit data, m bits of lower bit data, and (n and m are integers, n>m);
means for holding nm bits of data;
Means for synthesizing the nm bits of data on the upper m bits of the upper m bits of the pre-round data;
Means for adding the unrounded data and data obtained by combining nm bits of data to the upper bits of the upper m bits before rounding;
A data rounding apparatus characterized in that all 0 data is held in the means for holding nm bits of data, and the lower m bits of the added n bit data are discarded to obtain a rounding result. In a data rounding method for obtaining a rounding result of a predetermined number of bits by rounding the lower bits of data,
  holding n-bit unrounded data consisting of n−m bits of upper bit data, m bits of lower bit data, and (n and m are integers, n> m);
Performing a right shift of nm bits on the unrounded data;
Adding the data before rounding and data shifted to the right by nm bits with respect to the data before rounding;
Truncating the lower m bits of the n-bit data after the addition to obtain a rounding result.
A data rounding method executed by a computer system. In a data rounding device that obtains a rounding result of a predetermined number of bits by rounding the lower bits of data,
  means for holding n-bit unrounded data consisting of n−m bits of upper bit data, m bits of lower bit data, and (n and m are integers, n> m);
Means for right shifting nm bits with respect to the unrounded data;
Means for adding the data before rounding and the data shifted to the right by nm bits with respect to the data before rounding;
A data rounding device, wherein a rounding result is obtained by truncating the lower m bits of the n-bit data after the addition. Means for performing a convolution operation on impulse response estimation data of an unknown system and a predetermined reference signal to generate a pseudo response signal;
Means for calculating a correction amount of the impulse response estimation data based on a difference between the pseudo response signal and a response signal from the unknown system;
In a data rounding device used in an adaptive filter comprising means for calculating the new n-bit impulse response estimation data by adding the correction amount and the impulse response estimation data,
The applied filter is configured to round the addition value of the calculated amount of correction of the impulse response estimation data and the impulse response estimation data up to the previous time to obtain new impulse response estimation data,
means for holding n-bit unrounded data consisting of n−m bits of upper bit data, m bits of lower bit data, and (n and m are integers, n>m);
means for holding nm bits of data;
Means for synthesizing the nm bits of data on the upper m bits of the upper m bits of the pre-round data;
Means for adding the unrounded data and data obtained by combining nm bits of data to the upper bits of the upper m bits before rounding;
A data rounding apparatus characterized in that all 0 data is held in the means for holding nm bits of data, and the lower m bits of the added n bit data are discarded to obtain a rounding result. Means for performing a convolution operation on impulse response estimation data of an unknown system and a predetermined reference signal to generate a pseudo response signal;
Means for calculating a correction amount of the impulse response estimation data based on a difference between the pseudo response signal and a response signal from the unknown system;
In a data rounding apparatus used in an adaptive filter comprising means for adding the correction amount and the impulse response estimation data to calculate new n-bit impulse response estimation data,
The applied filter is configured to round the correction amount of the calculated impulse response estimation data,
means for holding n-bit unrounded data consisting of n−m bits of upper bit data, m bits of lower bit data, and (n and m are integers, n>m);
means for holding nm bits of data;
Means for synthesizing the nm bits of data on the upper m bits of the upper m bits of the pre-round data;
Means for adding the unrounded data and data obtained by combining nm bits of data to the upper bits of the upper m bits before rounding;
A data rounding device characterized in that all 0 data is held in the means for holding nm bits of data, and the lower m bits of the added n bit data are rounded down to obtain a rounding result. Means for performing a convolution operation on impulse response estimation data of an unknown system and a predetermined reference signal to generate a pseudo response signal;
  Means for calculating a correction amount of the impulse response estimation data based on a difference between the pseudo response signal and a response signal from the unknown system;
In a data rounding device used in an adaptive filter comprising means for calculating the new n-bit impulse response estimation data by adding the correction amount and the impulse response estimation data,
The applied filter is configured to round the addition value of the calculated amount of correction of the impulse response estimation data and the impulse response estimation data up to the previous time to obtain new impulse response estimation data,
means for holding n-bit unrounded data consisting of n−m bits of upper bit data, m bits of lower bit data, and (n and m are integers, n> m);
  Means for right shifting nm bits with respect to the unrounded data;
  Means for adding the data before rounding and the data shifted to the right by nm bits with respect to the data before rounding;
  A data rounding device, wherein a rounding result is obtained by truncating lower m bits of n-bit data after the addition. Means for performing a convolution operation on impulse response estimation data of an unknown system and a predetermined reference signal to generate a pseudo response signal;
  Means for calculating a correction amount of the impulse response estimation data based on a difference between the pseudo response signal and a response signal from the unknown system;
  In a data rounding apparatus used in an adaptive filter comprising means for adding the correction amount and the impulse response estimation data to calculate new n-bit impulse response estimation data,
  The applied filter is configured to round the correction amount of the calculated impulse response estimation data,
  means for holding n-bit unrounded data consisting of n−m bits of upper bit data, m bits of lower bit data, and (n and m are integers, n> m);
  Means for right shifting nm bits with respect to the unrounded data;
  Means for adding the data before rounding and the data shifted to the right by nm bits with respect to the data before rounding;
  A data rounding device, wherein the rounded result is obtained by truncating the lower m bits of the n bits after the addition.

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