JP4162888B2 - Spin valve transistor - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a spin valve transistor expected to be applied as a reproducing magnetic head or a magnetic memory.
[0002]
[Prior art]
Conventionally, as a technique in such a field, for example,
(1) K.K. Mizushima, T .; Kinno, K .; Tanaka, and T.K. Yamauchi, Physical Review B, Vol. 58, no. 8, 1998, pp. 4660-4665
(2) D. J. et al. Monsma, J .; C. Rodder, Th. J. et al. A. Popma, and, B, Dieny, Physical Review Letters, Vol. 74, no. 26, 1995, pp. 5260-5263
Was disclosed.
[0003]
The above document proposes a spin valve transistor (SVT) element as a magnetic sensor based on the tunnel magnetoresistive effect (TMR).
[0004]
Since the SVT element exhibits a larger magnetoresistive effect than the conventional magnetoresistive effect element, it is expected to be applied as a reproducing magnetic head or a magnetic memory.
[0005]
FIG. 8 is a configuration diagram of a conventional SVT element.
[0006]
As shown in this figure, the SVT element includes a first magnetic layer 200, a tunnel barrier layer (dielectric layer) 300, and a second magnetic layer 100 on a semiconductor substrate (semiconductor layer) 400. It has a structure laminated in this order. Here, the semiconductor substrate 400 is connected to an external electric circuit through the collector electrode 550 formed in the ohmic contact region 401. In the first magnetic layer 200 formed on the semiconductor substrate 400, a base electrode 530 is formed on the upper portion to directly make an electrical connection with an external circuit without the semiconductor substrate 400.
[0007]
On the other hand, the second magnetic layer 100 is connected to an external electric circuit through an emitter electrode 510 formed of a metal wiring layer.
[0008]
An emitter voltage 710 is applied between the emitter electrode 510 and the base electrode 530, and a collector voltage 750 is applied between the collector electrode 550 and the base electrode 530. Here, a current flowing through the emitter electrode 510 is an emitter current 610, a current flowing into the base electrode 530 is a base current 630, and a current flowing into the collector electrode 550 is a collector current 650. Reference numeral 800 denotes an external magnetic field.
[0009]
FIG. 9 is a diagram showing a band structure realized at each interface of the first magnetic layer 200, the tunnel barrier layer 300, the second magnetic layer 100, and the semiconductor substrate 400 and their interfaces in the SVT element. is there.
[0010]
In FIG. 9, the Fermi level of the first magnetic body is displayed as E _F1 , and the Fermi level of the second magnetic body is displayed as E _F2 . In FIG. 9, the emitter voltage 710 biases the emitter electrode 510 negatively by V _{E with} respect to the base electrode 530, and the base potential and the collector potential are set to the same potential (that is, The collector voltage is zero).
[0011]
When a bias voltage V is applied between the two types of magnetic layers 100 and 200, a tunnel current I flows through the tunnel barrier layer 300 between the two magnetic layers. The tunnel resistance R can be defined by R = V / I. When the magnitude of the tunnel resistance R is observed, the tunnel resistance R changes depending on whether the magnetization direction between the first and second magnetic layers 200 and 100 is parallel or antiparallel. Such a change in the tunnel resistance R is called a magnetoresistance change. The cause of the magnetoresistance change is the asymmetry of the state density distribution in the vicinity of the Fermi surface in both magnetic bodies. That is, when the direction of the majority spin of the first magnetic layer 200 is upward and the direction of the minority spin of the second magnetic layer 100 is also upward, only tunnels between spin states in the same direction are allowed. As a result, the density of vacant levels in the first magnetic layer 200 viewed from the second magnetic layer 100 is relatively small, and the tunnel probability is small. Such an arrangement of the magnetizations of the magnetic layers 100 and 200 is called an antiparallel arrangement of magnetization.
[0012]
On the other hand, when the direction of the majority spin of the first magnetic layer 200 is upward and the direction of the majority spin of the second magnetic layer 100 is also upward as described above, the second magnetic layer 100 The density of vacant levels in the first magnetic layer 200 as viewed from the above is relatively large, and the tunnel probability is large. Such an arrangement of the magnetizations of both magnetic materials is called a parallel arrangement of magnetizations.
[0013]
The tunnel resistance R is larger in the antiparallel arrangement with a small tunnel probability, and the tunnel resistance R is smaller in the parallel arrangement with a large tunnel probability. If the bias voltage V is constant due to the change in magnetoresistance, the change in the external magnetic field 800 causes a switch between a parallel arrangement and an antiparallel arrangement of magnetization, and the tunnel current changes.
[0014]
In the SVT element, among the tunnel electrons injected from the second magnetic layer 100 to the first magnetic layer 200, a part of the electrons reach the semiconductor substrate 400 through the first magnetic layer 200. It has a structure that can be done.
[0015]
In the SVT element according to the present invention, a current resulting from electrons reaching the semiconductor layer (semiconductor substrate) is used as a current signal. In other words, a change in the collector current 650 due to the external magnetic field 800 is a sensor signal.
[0016]
Reaching the semiconductor layer electrons, due to the presence of the emitter-base bias voltage shown in FIG. 9, triggered by the energy levels near the Fermi level E _F2 of the second magnetic layer 100, a first It is considered that hot electrons HE that reach the semiconductor layer 400 through an energy level sufficiently higher than the Fermi level E _F1 in the magnetic layer 200 are mainly used.
[0017]
Here, at an energy level sufficiently higher than the Fermi level E _F1 in the first magnetic layer 200, the state density of the upward spin is much larger than the state density of the downward spin, and the second magnetic body It can be seen that the electrons injected from the layer 100 into the first magnetic layer 200 are almost limited to those having an upward spin. Therefore, an extremely large magnetoresistive effect that faithfully reflects the spin polarizability of the second magnetic layer 100 is obtained depending on whether the magnetization directions of both magnetic layers are parallel or antiparallel.
[0018]
On the other hand, electrons originating from an energy level sufficiently lower than the Fermi level E _{F2 of} the second magnetic layer 100 are at an energy level higher than the Fermi level E _F1 in the first magnetic layer 200. Since it is injected into an energy level lower than the Schottky barrier height, it hardly reaches the semiconductor layer (semiconductor substrate) 400 and flows to the external circuit through the first magnetic layer 200 to form a base current 530. .
[0019]
As shown also in FIG. 9, the electronic state in the first magnetic layer 200 involved in the tunneling of these low energy electrons does not have a very large spin polarization, so the base current 530 has A large magnetoresistance effect cannot be expected.
[0020]
From the above discussion, the collector current 650 mainly composed of electrons (hot electrons) reaching the semiconductor layer 400 via a sufficiently high energy level in the first magnetic layer 200 passes through a lower energy level. It is concluded that a larger magnetoresistance change (also referred to as a magnetocurrent change) occurs compared to the base current 530 mainly composed of electrons.
[0021]
The SVT element has more than the entire tunnel electrons injected into the first magnetic layer 200 due to the “Schottky barrier filter effect” generated at the interface between the first magnetic layer 200 and the semiconductor layer 400. This is an element that extracts only hot electrons HE that cause a large change in magnetoresistance and uses them as a collector signal.
[0022]
[Problems to be solved by the invention]
As described above, the collector current in the SVT element is a signal obtained as a result of a part of the emitter current injected from the second magnetic body reaching the collector. The emitter current is prevented from flowing into the collector in the following three processes. (1) Attenuation of hot electrons in the first magnetic layer by various scattering mechanisms, (2) Removal of low energy electrons by a Schottky barrier, (3) First magnetic body and semiconductor of hot electrons There are mainly three factors of potential scattering at the interface. Normally, the collector current becomes about 1 × 10 ⁻⁴ times or less of the emitter current by these processes. For this reason, there has been a problem that the signal level is greatly reduced and the signal-to-noise ratio is deteriorated in spite of a significant improvement in magnetoresistance change.
[0023]
An object of the present invention is to provide a spin valve transistor that can eliminate the above-mentioned problems and suppress a decrease in signal level due to a significant improvement in magnetoresistance change and increase the signal-to-noise ratio.
[0024]
[Means for Solving the Problems]
In order to achieve the above object, the present invention provides
[1] In a spin valve transistor, an electron multiplication layer by avalanche breakdown is formed on a semiconductor layer, a first magnetic layer is stacked on the electron multiplication layer, and the first magnetic layer is formed on the first magnetic layer. The structure is characterized in that a tunnel barrier layer and a second magnetic layer are sequentially laminated.
[0025]
[2] The spin valve transistor according to [1], wherein a high-concentration doped semiconductor is interposed between the first magnetic layer and an electron multiplication layer provided on the semiconductor layer by avalanche breakdown. A buffer layer is provided.
[0026]
[3] An n-type semiconductor layer and a p-type semiconductor layer are grown in this order on the semiconductor layer, a first magnetic layer is grown on the p-type semiconductor layer, and on the first magnetic layer, A spin valve transistor in which a tunnel barrier layer and a second magnetic layer are grown in order, and a collector bias reversely biases the pn junction to obtain an electron multiplication mechanism.
[0027]
[4] The spin valve transistor according to the above [1], [2] or [3], wherein Fe having a thickness of 100 mm or less is used as the first magnetic layer.
[0028]
[5] The spin valve transistor according to [1], [2], [3] or [4], wherein GaAs is used as the semiconductor layer.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments of the present invention will be described in detail.
[0030]
FIG. 1 is a cross-sectional view showing a basic configuration of a spin valve transistor of the present invention. The same parts as those of the conventional spin valve transistor are denoted by the same reference numerals, and description thereof is omitted.
[0031]
Here, a spin valve transistor (SVT) structure having a collector current multiplication mechanism was used. In this multiplication mechanism, as shown in FIG. 1, a multiplication layer 410 made of a lightly doped semiconductor layer is provided immediately below the first magnetic layer 200, and the collector electrode 550 is positively connected to the base electrode 530. Is obtained by applying a sufficiently large reverse bias voltage. The voltage applied to the collector voltage 750 generates a large electric field strength in the multiplication layer 410.
[0032]
As shown in FIG. 2, by this electric field, hot electrons HE injected from the first magnetic layer 200 to the multiplication layer 410 are further accelerated, generating electron-hole pairs while causing impact ionization, Causes multiplication. This increases the collector current 650, leading to an increase in the output signal.
[0033]
FIG. 3 is a configuration diagram of a spin valve transistor element according to the first embodiment of the present invention. The same parts as those of the conventional spin valve transistor are denoted by the same reference numerals, and description thereof is omitted.
[0034]
On the heavily doped n-type GaAs semiconductor substrate 402, a multiplication layer 412 made of lightly doped GaAs was regrown, and 50 nm-thick Fe (100) was grown as a first magnetic layer 202 on the surface thereof. . Subsequently, a tunnel barrier layer 302 made of an aluminum oxide layer was formed, and then the second magnetic layer 102 was grown. Here, the Fe0.2Ni0.8 alloy was used for the second magnetic layer 102. As the second magnetic layer 102, an amorphous magnetic alloy in general such as a CoFe alloy can be used.
[0035]
The doping level of the heavily doped n-type GaAs semiconductor substrate 402 is 1 × 10 ⁻¹⁸ cm ⁻³ of Si, and the Si doping level of the multiplication layer 412 of the lightly doped n-type GaAs is 1 × 10 ⁻¹⁷ cm ⁻³ . is there. The GaAs substrate on which the magnetic layer as described above is grown is processed into an SVT element having a junction area of 20 μm × 50 μm by a microfabrication technique mainly using photolithography.
[0036]
With the above configuration, a signal current level more than five times that of the conventional SVT element is realized.
[0037]
FIG. 4 is a block diagram of a spin valve transistor element showing a second embodiment of the present invention. The same parts as those of the conventional spin valve transistor are denoted by the same reference numerals, and description thereof is omitted.
[0038]
In the SVT element described in the first embodiment shown in FIG. 3, shots generated at the interface between the first magnetic body 202 and the lightly doped GaAs multiplication layer 412 as the bias voltage applied to the collector electrode increases. The key barrier becomes relatively thin. Therefore, the “high-energy electron filtering effect by the Schottky barrier” which is the operation principle of the SVT element is weakened. In order to avoid such a phenomenon, a buffer layer 420 made of highly doped n-type GaAs as shown in FIG. 4 is provided.
[0039]
FIG. 5 shows a band structure realized by this structure. The collector bias is concentrated on the multiplication layer 412 and does not significantly affect the potential distribution of the buffer layer 420. For this reason, the Schottky barrier as a filter can realize a good filter effect while preserving its function and enhancing the multiplication mechanism. As a result, a signal current level more than 10 times that of the conventional SVT element was realized.
[0040]
FIG. 6 is a block diagram of a spin valve transistor showing a third embodiment of the present invention. The same parts as those of the conventional spin valve transistor are denoted by the same reference numerals, and description thereof is omitted.
[0041]
In the SVT device described in the first embodiment shown in FIG. 3, there is shown another method for reducing the effect of reducing the “filtering effect of high energy electrons by the Schottky barrier” as the bias voltage applied to the collector electrode increases. This is the embodiment. The structure of FIG. 6 in this embodiment is obtained by sequentially stacking an n-type GaAs layer 416 and a p-type GaAs buffer layer 414 on a highly doped GaAs semiconductor substrate 402.
[0042]
The band structure is realized in the structure of FIG shown in Fig. When a reverse bias is applied to the pn junction formed at the interface between the n-type GaAs layer 416 and the buffer layer 414, the electric field concentrates on the depletion layer near the pn junction, thereby generating an electron multiplication mechanism.
[0043]
For this reason, the potential distribution near the interface between the first magnetic layer 202 and the p-type GaAs layer 414 is not subject to large fluctuations, and a large reverse bias can be applied, resulting in a large multiplication mechanism. As a result, a signal current level more than 10 times that of the conventional SVT element was realized.
[0044]
In addition, this invention is not limited to the said Example, A various deformation | transformation is possible based on the meaning of this invention, and these are not excluded from the scope of the present invention.
[0045]
【The invention's effect】
As described above in detail, according to the present invention, the following effects can be obtained.
[0046]
(A) The signal-to-noise ratio can be increased by suppressing a decrease in signal level due to a significant improvement in magnetoresistance change.
[0047]
(B) The output current level of the spin valve transistor can be increased from the conventional one to 5 to 10 times.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a basic configuration of a spin valve transistor element according to the present invention.
2 is a diagram showing a band structure of the spin valve transistor element shown in FIG. 2. FIG.
FIG. 3 is a cross-sectional view of a spin valve transistor element showing a first embodiment of the present invention.
FIG. 4 is a cross-sectional view of a spin valve transistor element showing a second embodiment of the present invention.
5 is a diagram showing a band structure of the spin valve transistor element shown in FIG.
FIG. 6 is a cross-sectional view of a spin valve transistor element according to a third embodiment of the present invention.
7 is a diagram showing a band structure of the spin valve transistor element shown in FIG. 6. FIG.
FIG. 8 is a cross-sectional view of a conventional spin valve transistor element.
9 is a diagram showing a band structure of the spin valve transistor element shown in FIG. 8. FIG.
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 100,102 2nd magnetic body layer 200,202 1st magnetic body layer 300 Tunnel barrier layer 302 Tunnel barrier layer by an aluminum oxide layer 400 Semiconductor substrate (semiconductor layer)
401 Ohmic contact region 402 Highly doped n-type GaAs semiconductor substrate 410 Multiplier layer made of lightly doped semiconductor layer 412 Multiplier layer made of lightly doped GaAs 414 Buffer layer made of p-type 416 416 n-type GaAs layer 420 High concentration Buffer layer made of doped n-type GaAs 510 Emitter electrode 530 Base electrode 550, 650 Collector electrode 610 Emitter current 630 Base current 710 Emitter voltage 750 Collector voltage 800 External magnetic field HE Hot electron

Claims (5)

  An electron multiplication layer by avalanche breakdown is formed on the semiconductor layer, a first magnetic layer is stacked on the electron multiplication layer, a tunnel barrier layer, and a first layer on the first magnetic layer in order. A spin valve transistor having a structure in which two magnetic layers are laminated.   2. The spin valve transistor according to claim 1, wherein a buffer layer made of a highly doped semiconductor is provided between the first magnetic layer and an electron multiplication layer provided on the semiconductor layer by avalanche breakdown. 3. A spin valve transistor characterized by being provided. An n-type semiconductor layer and a p-type semiconductor layer are grown in this order on the semiconductor layer, a first magnetic layer is grown on the p-type semiconductor layer, and a tunnel barrier is sequentially formed on the first magnetic layer. A spin valve transistor in which a layer and a second magnetic layer are grown , wherein a collector bias reversely biases the pn junction to obtain an electron multiplication mechanism.   4. The spin valve transistor according to claim 1, wherein Fe having a thickness of 100 μm or less is used as the first magnetic layer. 5.   5. The spin valve transistor according to claim 1, wherein GaAs is used as the semiconductor layer.

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