JP2003188390A - Spin valve transistor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a spin valve transistor in which signal/noise ratio can be increased by enhancing variation of reluctance significantly thereby suppressing decrease of signal level. <P>SOLUTION: In a spin valve transistor having a multilayer structure of a first magnetic body layer (200) grown directly on a semiconductor layer (400), a tunnel barrier layer (300) and a second magnetic body layer (100) formed sequentially on the first magnetic body layer (200), an avalanche breakdown electron multiplication layer (410) is provided on the semiconductor layer (400). <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a spin valve transistor expected to be applied as a reproducing magnetic head or a magnetic memory.

[0002]

2. Description of the Related Art Conventionally, as a technique in such a field,
For example, (1) K. Mizushima, T .; Kinno, K .;
Tanaka, and T. Yamauchi, Phys
ical Review B, Vol. 58, no.
8, 1998, pp. 4660-4665 (2) D.I. J. Monsma, J .; C. Rodder,
Th. J. A. Popma, and, B, Diny,
Physical Review Letters, V
ol. 74, no. 26, 1995, pp. 5260-
5263.

In the above literature, the tunnel magnetoresistive effect (T
A spin valve transistor (SVT) element has been proposed as a magnetic sensor based on MR.

Since the SVT element exhibits a larger magnetoresistive effect than the conventional magnetoresistive effect element, it is expected to be applied as a reproducing magnetic head or a magnetic memory.

FIG. 8 is a block diagram of a conventional SVT element.

As shown in this figure, the SVT element has a first magnetic layer 20 on a semiconductor substrate (semiconductor layer) 400.
0, the tunnel barrier layer (dielectric layer) 300, and the second magnetic layer 100 are laminated in this order.
Here, the semiconductor substrate 400 has a collector electrode 550 formed in the ohmic contact region 401.
Connected to an external electric circuit. On the first magnetic layer 200 formed on the semiconductor substrate 400, a base electrode 530 is formed on the upper portion of the first magnetic layer 200 for making electrical connection directly to an external circuit without the semiconductor substrate 400 interposed therebetween.

On the other hand, the second magnetic layer 100 is connected to an external electric circuit through an emitter electrode 510 formed of a metal wiring layer.

Also, the emitter electrode 510 and the base electrode 5
The emitter voltage 710 is applied between the electrodes 30, and the collector voltage 750 is applied between the collector electrode 550 and the base electrode 530. Here, the current flowing through the emitter electrode 510 is the emitter current 610, and the base electrode 53
The current flowing into 0 is the base current 630, and the current flowing into the collector electrode 550 is the collector current 650.
In addition, 800 is an external magnetic field.

FIG. 9 shows a band structure realized in each layer of the first magnetic material layer 200, the tunnel barrier layer 300, the second magnetic material layer 100, and the semiconductor substrate 400 in the SVT element and their interfaces. FIG.

In FIG. 9, the Fermi level of the first magnetic material is shown as E _F1 and the Fermi level of the second magnetic material is shown as E _F2 . Further, in FIG. 9, the emitter voltage 710 biases the emitter electrode 510 negatively by V _{E with} respect to the base electrode 530, and the base potential and the collector potential are set to the same potential (that is, The collector voltage is zero).

When a bias voltage V is applied between the two types of magnetic layers 100 and 200, a tunnel current I is generated between the two magnetic layers via the tunnel barrier layer 300.
Flows. The tunnel resistance R can be defined by R = V / I. Observing the magnitude of the tunnel resistance R, the tunnel resistance R changes depending on whether the magnetization directions between the first and second magnetic layers 200 and 100 are parallel or antiparallel. Such a change in tunnel resistance R is called a change in magnetic resistance. The cause of the change in magnetoresistance is the asymmetry of the density of states distribution near the Fermi surface in both magnetic materials.
That is, when the direction of the majority spin of the first magnetic layer 200 is upward and the direction of the minority spin of the second magnetic layer 100 is also upward, only tunnels between spin states of the same direction are allowed. Therefore, the first magnetic layer 20 seen from the second magnetic layer 100 is not formed.
The density of empty levels of 0 is relatively small, and the tunnel probability is small. The arrangement of the magnetizations of both magnetic layers 100 and 200 as described above is called an antiparallel arrangement of the magnetizations.

On the other hand, as described above, the first magnetic layer 200
When the direction of the majority spin of is the upward direction and the direction of the majority spin of the second magnetic layer 100 is also the upward direction, the vacant quasi-state of the first magnetic layer 200 seen from the second magnetic layer 100. The order density is relatively large and the tunnel probability increases. The arrangement of the magnetizations of both magnetic bodies is called the parallel arrangement of the magnetizations.

In the case of antiparallel arrangement with a small tunnel probability,
The tunnel resistance R becomes larger, and the tunnel resistance R becomes smaller in the parallel arrangement in which the tunnel probability is high. If the bias voltage V is constant due to the change in magnetic resistance, the change in the external magnetic field 800 causes
A switch between parallel and anti-parallel configurations of magnetization occurs,
The tunnel current changes.

In the SVT element, some of the tunnel electrons injected from the second magnetic layer 100 into the first magnetic layer 200 are transmitted through the first magnetic layer 200 and some of the electrons are emitted from the semiconductor substrate. It has a structure that can reach 400.

In the SVT element according to the present invention, the current resulting from the electrons reaching the semiconductor layer (semiconductor substrate) is used as the current signal. In other words, the change in collector current 650 due to the external magnetic field 800 is the sensor signal.

The electrons arriving at the above semiconductor layer are caused by the presence of the emitter-base bias voltage shown in FIG.
Starting from the energy level near the Fermi level E _{F2 of} the second magnetic layer 100 and reaching the semiconductor layer 400 via an energy level sufficiently higher than the Fermi level E _F1 in the first magnetic layer 200, It is considered that hot electrons HE are the main components.

Here, in the energy level sufficiently higher than the Fermi level E _F1 in the first magnetic layer 200,
The density of states of the upward spin is much higher than that of the downward spin, and the electrons injected from the second magnetic layer 100 into the first magnetic layer 200 are almost limited to those of the upward spin. You can see it. Therefore, an extremely large magnetoresistive effect that faithfully reflects the spin polarizability of the second magnetic layer 100 can be obtained depending on whether the magnetization directions of both magnetic layers are parallel or antiparallel.

On the other hand, an electron that originates at an energy level sufficiently lower than the Fermi level E _{F2 of} the second magnetic layer 100 has an energy level higher than the Fermi level E _{F1 of} the first magnetic layer 200. However, since it is injected into an energy level lower than the Schottky barrier height, it hardly reaches the semiconductor layer (semiconductor substrate) 400, flows to the external circuit through the first magnetic layer 200, and the base current 530. To form.

As shown in FIG. 9, the first magnetic layer 2 involved in the tunnel of these low energy electrons.
The electronic state in 00 does not have a very large spin polarization, so that a large magnetoresistive effect cannot be expected for the base current 530.

From the above discussion, the collector current 650 mainly composed of electrons (hot electrons) reaching the semiconductor layer 400 via a sufficiently high energy level in the first magnetic layer 200 has a lower energy level. It is concluded that a larger magnetoresistance change (also referred to as a magnetic current change) occurs as compared with the base current 530 mainly composed of electrons passing through the position.

In the SVT element, due to the “Schottky barrier filter effect” generated at the interface between the first magnetic layer 200 and the semiconductor layer 400, all the tunnel electrons injected into the first magnetic layer 200 are included. Is an element that extracts only hot electrons HE that cause a larger change in magnetic resistance and uses them as collector signals.

[0022]

As described above, the SVT
The collector current in the element is a signal obtained as a result of a part of the emitter current injected from the second magnetic body reaching the collector. The emitter current is prevented from flowing into the collector in the following three types of processes. That is,
(1) Attenuation of hot electrons in the first magnetic layer by various scattering mechanisms, (2) Removal of low-energy electrons by Schottky barrier, (3) Hot electron at the interface between the first magnetic substance and the semiconductor. Potential scattering of
There are three main factors. Normally, the collector current becomes about 1 × 10 ⁻⁴ times or less the emitter current by these processes. Therefore, there is a problem that the signal level is greatly reduced and the signal-to-noise ratio is deteriorated, although the magnetic resistance change is significantly improved.

It is an object of the present invention to eliminate the above-mentioned problems, and to provide a spin valve transistor capable of increasing a signal-to-noise ratio by suppressing a decrease in signal level due to a significant improvement in magnetoresistance change.

[0024]

In order to achieve the above-mentioned object, the present invention provides [1] a spin valve transistor, which comprises a first magnetic layer directly grown on a semiconductor layer and a first magnetic layer. A spin valve transistor having a structure in which a tunnel barrier layer and a second magnetic layer are sequentially laminated on a magnetic layer, wherein an electron multiplication layer by avalanche breakdown is provided on the semiconductor layer. And

[2] The spin valve transistor according to the above [1], wherein a high concentration is provided between the first magnetic layer and the electron multiplication layer by avalanche breakdown provided in the semiconductor layer. A buffer layer made of a doped semiconductor is provided.

[3] The spin valve transistor according to [1] above, wherein an n-type semiconductor layer and a p-type semiconductor layer are grown in this order on the semiconductor layer, and the first-type semiconductor layer is formed directly on the p-type semiconductor layer. The magnetic layer is grown, and the collector bias obtains an electron multiplication mechanism by reverse biasing the pn junction.

[4] The spin valve transistor according to [1], [2] or [3] above, wherein Fe having a thickness of 100 Å or less is used as the first magnetic layer. .

[5] The spin valve transistor according to the above [1], [2], [3] or [4], wherein GaAs is used as the semiconductor layer.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below.

FIG. 1 is a sectional view showing the basic structure of the spin valve transistor of the present invention. The same parts as those of the conventional spin valve transistor are designated by the same reference numerals, and the description thereof will be omitted.

Here, a spin valve transistor (SVT) structure having a collector current multiplication mechanism is used.
In this multiplication mechanism, as shown in FIG. 1, a multiplication layer 410 made of a lightly doped semiconductor layer is provided directly below the first magnetic layer 200, and a collector electrode 550 is positively connected to a base electrode 530. , Which is obtained by applying a sufficiently large reverse bias voltage. Collector voltage 750
The voltage applied to generates a large electric field intensity in the multiplication layer 410.

As shown in FIG. 2, the hot electrons HE injected from the first magnetic layer 200 into the multiplication layer 410 are further accelerated by this electric field to generate electron-hole pairs while causing collision ionization. And cause electron multiplication.
As a result, the collector current 650 increases, leading to an increase in the output signal.

FIG. 3 is a block diagram of a spin valve transistor element showing the first embodiment of the present invention. Regarding the same parts as the conventional spin valve transistor,
The same reference numerals are given and their description is omitted.

Highly doped n-type GaAs semiconductor substrate 40
A lightly doped GaAs multiplication layer 412 is regrown on the surface 2 and the first magnetic layer 202 is formed on the surface of the multiplication layer 412.
Fe (100) with a thickness of 0Å was grown. Subsequently, the tunnel barrier layer 302 made of an aluminum oxide layer was formed, and subsequently, the second magnetic layer 102 was grown.
Here, the second magnetic layer 102 is made of Fe0.2Ni.
0.8 alloy was used. As the second magnetic layer 102, a general amorphous magnetic alloy such as a CoFe alloy can be used.

Highly doped n-type GaAs semiconductor substrate 40
The doping level of 2 is 1 × 10 ⁻¹⁸ cm ⁻³ of Si, and the multiplying layer 412 of lightly doped n-type GaAs has a Si doping level of 1 × 10 ⁻¹⁷ cm ⁻³ . The GaAs substrate on which the magnetic layer is grown as described above is 20 μm × 50 μm by a microfabrication technique mainly based on photolithography.
Is processed into an SVT element having a junction area of.

With the above structure, a signal current level which is five times or more that of the conventional SVT element is realized.

FIG. 4 is a block diagram of a spin valve transistor element showing a second embodiment of the present invention. Regarding the same parts as the conventional spin valve transistor,
The same reference numerals are given and their description is omitted.

In the SVT element according to the second embodiment shown in FIG. 4, as the bias voltage applied to the collector electrode increases, the first magnetic substance 202 and the lightly doped GaA are added.
The Schottky barrier generated at the interface of the multiplication layer 412 by s becomes relatively thin. Therefore, the "filter effect of high-energy electrons by the Schottky barrier" which is the operating principle of the SVT element becomes weak. In order to avoid such a phenomenon, a buffer layer 420 made of heavily doped n-type GaAs is provided as shown in FIG.

FIG. 5 shows a band structure realized by this structure. The collector bias is the multiplication layer 412.
, And does not significantly affect the potential distribution of the buffer layer 420. Therefore, the Schottky barrier as a filter can retain its function and enhance the multiplication mechanism while realizing a good filter effect. As a result, a signal current level 10 times or more that of the conventional SVT element was realized.

FIG. 6 is a block diagram of a spin valve transistor showing a third embodiment of the present invention. The same parts as those of the conventional spin valve transistor are designated by the same reference numerals, and the description thereof will be omitted.

In the SVT element according to the first embodiment shown in FIG. 3, as the bias voltage applied to the collector electrode is increased, the effect of weakening the "filtering effect of high energy electrons by the Schottky barrier" is reduced. This example illustrates the method. The structure of FIG. 6 of this embodiment has a heavily doped GaAs semiconductor substrate 402.
An n-type GaAs layer 416 and a buffer layer 414 made of p-type GaAs are sequentially laminated on top.

The band structure realized by the structure of FIG. 5 is shown in FIG.
Shown in. The n-type GaAs layer 416 and the buffer layer 414
When a reverse bias is applied to the pn junction formed at the interface of, the electric field concentrates on the depletion layer near the pn junction, and an electron multiplication mechanism occurs.

Therefore, the first magnetic layer 202 and the p-type G
The potential distribution in the vicinity of the interface of the aAs layer 414 is not greatly changed, a large reverse bias can be applied, and a large multiplication mechanism can be obtained. As a result, a signal current level 10 times or more that of the conventional SVT element was realized.

The present invention is not limited to the above embodiments, and various modifications can be made based on the spirit of the present invention, and these modifications are not excluded from the scope of the present invention.

[0045]

As described in detail above, according to the present invention, the following effects can be achieved.

(A) The signal-to-noise ratio can be increased by suppressing a decrease in signal level due to a great improvement in magnetic resistance change.

(B) The output current level of the spin valve transistor can be increased to 5 to 10 times that of the conventional one.

[Brief description of drawings]

FIG. 1 is a sectional view showing a basic configuration of a spin valve transistor element according to the present invention.

FIG. 2 is a diagram showing a band structure of the spin valve transistor element shown in FIG.

FIG. 3 is a cross-sectional view of a spin valve transistor element showing the first embodiment of the present invention.

FIG. 4 is a cross-sectional view of a spin valve transistor device showing a second embodiment of the present invention.

5 is a diagram showing a band structure of the spin valve transistor element shown in FIG.

FIG. 6 is a cross-sectional view of a spin valve transistor element showing a third embodiment of the present invention.

7 is a diagram showing a band structure of the spin valve transistor element shown in FIG.

FIG. 8 is a sectional view of a conventional spin valve transistor element.

9 is a diagram showing a band structure of the spin valve transistor element shown in FIG.

[Explanation of symbols]

100, 102 second magnetic layer 200, 202 first magnetic layer 300 tunnel barrier layer 302 tunnel barrier layer made of aluminum oxide layer 400 semiconductor substrate (semiconductor layer) 401 ohmic contact region 402 heavily doped n-type GaAs semiconductor substrate 410 Multiply layer 4 composed of lightly doped semiconductor layer 412 Multiply layer 4 composed of lightly doped GaAs 414 Buffer layer 416 composed of p-type GaAs n-type GaAs layer 420 Buffer layer 510 composed of heavily doped n-type GaAs 5 Emitter electrode 530 Base Electrodes 550 and 650 Collector electrode 610 Emitter current 630 Base current 710 Emitter voltage 750 Collector voltage 800 External magnetic field HE Hot electron

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Hiroyuki Akinaga             1-1-1 Higashi 1-1-1 Tsukuba City, Ibaraki Prefecture             Inside the Tsukuba Center, National Institute of Advanced Industrial Science and Technology (72) Inventor Motohisa Honda             1-16-1-103 Minamiootsuka, Toshima-ku, Tokyo (72) Inventor Tarucha Seigo             3-1-2 Toyama, Shinjuku-ku, Tokyo Waseda company housing             405 (72) Inventor Keiji Ohno             1-8-6 Kanamemachi, Toshima-ku, Tokyo Toyota Building             401 (72) Inventor Hiroshi Yokoyama             1-1-1 Higashi 1-1-1 Tsukuba City, Ibaraki Prefecture             Inside the Tsukuba Center, National Institute of Advanced Industrial Science and Technology

Claims (5)

[Claims] 1. A structure in which a first magnetic layer directly grown on a semiconductor layer, a tunnel barrier layer, and a second magnetic layer are sequentially laminated on the first magnetic layer. A spin-valve transistor having the above-mentioned spin-valve transistor, wherein an electron multiplication layer by avalanche breakdown is provided on the semiconductor layer. 2. The spin-valve transistor according to claim 1, wherein a highly-doped semiconductor is provided between the first magnetic layer and an electron multiplication layer by avalanche breakdown provided in the semiconductor layer. A spin valve transistor comprising a buffer layer made of 3. The spin valve transistor according to claim 1, wherein an n-type semiconductor layer and a p-type semiconductor layer are grown on the semiconductor layer in this order, and the n-type semiconductor layer and the p-type semiconductor layer are grown directly on the p-type semiconductor layer.
The first magnetic layer is grown, and the collector bias is
A spin valve transistor, wherein an electron multiplication mechanism is obtained by reverse biasing the pn junction. 4. The spin valve transistor according to claim 1, wherein the first magnetic layer is 1
A spin-valve transistor characterized by using Fe having a thickness of 00Å or less. 5. The spin valve transistor according to claim 1, 2, 3, or 4, wherein GaA is used as the semiconductor layer.
A spin valve transistor characterized by using s.