JP4151682B2 - Manufacturing method of semiconductor device - Google Patents

Manufacturing method of semiconductor device Download PDF

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JP4151682B2
JP4151682B2 JP2005211280A JP2005211280A JP4151682B2 JP 4151682 B2 JP4151682 B2 JP 4151682B2 JP 2005211280 A JP2005211280 A JP 2005211280A JP 2005211280 A JP2005211280 A JP 2005211280A JP 4151682 B2 JP4151682 B2 JP 4151682B2
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resin
cavity
mold
semiconductor chip
chip
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JP2006013527A (en
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健一 白坂
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Yamaha Corp
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Yamaha Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/4826—Connecting between the body and an opposite side of the item with respect to the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements

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  • Moulds For Moulding Plastics Or The Like (AREA)
  • Casting Or Compression Moulding Of Plastics Or The Like (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide the manufacturing method of a semiconductor element for removing a defect with the deformation of bonding wire, which occurs when the cavity of a mold is filled with resin for package at the time of manufacturing the semiconductor element, and for improving productivity and reliability. <P>SOLUTION: A chip stator 13 which can freely appear and disappear in a cavity is projected and a semiconductor chip 1 is temporarily fixed in the cavity 12 of the mold 10. Then, resin is injected into the cavity 12, the chip stator 13 is stored in a mold body 11 before the filling of resin is completed, and resin in the cavity 12 is solidified after storage. <P>COPYRIGHT: (C)2006,JPO&amp;NCIPI

Description

本発明は樹脂のパッケージにより封止された半導体素子、その製造方法及び半導体素子製造装置に関するものであり、特に、封止工程における樹脂注入中にボンディングワイヤが変形してパッケージから露出したり、パッケージ内で接触、短絡、切断などが起こることを防止する半導体素子の製造方法、この製造方法により製造される半導体素子、並びに前記半導体素子の製造に用いる半導体素子製造装置に関する。   The present invention relates to a semiconductor element sealed by a resin package, a manufacturing method thereof, and a semiconductor element manufacturing apparatus, and more particularly, a bonding wire is deformed and exposed from a package during resin injection in a sealing process. In particular, the present invention relates to a method for manufacturing a semiconductor element that prevents contact, short circuit, cutting, and the like from occurring inside, a semiconductor element manufactured by this manufacturing method, and a semiconductor element manufacturing apparatus used for manufacturing the semiconductor element.

一般に樹脂パッケージにより封止された半導体素子は、半導体チップとリードの内側端末とがボンディングワイヤで接続され、このリードの外側端末を外部に露出した状態で前記半導体チップと前記ボンディングワイヤと前記リードの内側端末とがパッケージ用の樹脂により一体に封止されてなっている。   Generally, in a semiconductor element sealed with a resin package, a semiconductor chip and an inner terminal of a lead are connected by a bonding wire, and the semiconductor chip, the bonding wire, and the lead are exposed with the outer terminal of the lead exposed to the outside. The inner terminal is integrally sealed with a package resin.

図５は前記半導体素子を従来の製造方法に従って製造する一過程を示している。図５においてこの半導体素子を製造するには、先ず半導体チップ１を載置するステージ６とリード２の配列とが形成されたフレーム８の前記ステージ６に半導体チップ１を載置し、この半導体チップ１のパッド１ａと前記リードの内側端末２ａとをボンディングワイヤ３で接続する。これにより得られたフレーム組立物９を型１００にセットする。   FIG. 5 shows a process of manufacturing the semiconductor device according to a conventional manufacturing method. In order to manufacture this semiconductor element in FIG. 5, first, the semiconductor chip 1 is placed on the stage 6 of the frame 8 on which the stage 6 on which the semiconductor chip 1 is placed and the arrangement of the leads 2 are formed. One pad 1 a and the inner terminal 2 a of the lead are connected by a bonding wire 3. The frame assembly 9 thus obtained is set on the mold 100.

型１００は、割り型１１１ａ，１１１ｂからなる型本体１１１と、この型本体１１１に形成されたキャビティ１１２と、キャビティ１１２内にパッケージ用の樹脂を供給するランナー１１４及びゲート１１５を有している。割り型１１１ａ，１１１ｂは、図示しない型駆動装置によって温度が制御されると共に、リードの外側端末２ｂを気密に挟み込めるようになっている。キャビティ１１２はこの半導体素子のパッケージの外形を規定する形状に成形されている。ランナー１１４及びゲート１１５は未硬化の熱硬化性樹脂コンパウンド（以下単に「樹脂」という）をキャビティ１１２内に注入するための通路であり、割り型１１１ａ，１１１ｂの割り面に形成され、ランナー１１４の一方の端末は図示しないプランジャ付きの加熱ポットに連通しゲート１１５はキャビティ１１２の所定の位置に開口している。   The mold 100 includes a mold body 111 including split molds 111 a and 111 b, a cavity 112 formed in the mold body 111, a runner 114 that supplies a package resin into the cavity 112, and a gate 115. The split molds 111a and 111b are controlled in temperature by a mold driving device (not shown) and can sandwich the outer terminal 2b of the lead in an airtight manner. The cavity 112 is formed in a shape that defines the outer shape of the package of the semiconductor element. The runner 114 and the gate 115 are passages for injecting uncured thermosetting resin compound (hereinafter simply referred to as “resin”) into the cavity 112, and are formed on the split surfaces of the split molds 111 a and 111 b. One terminal communicates with a heating pot with a plunger (not shown), and the gate 115 opens at a predetermined position of the cavity 112.

型１００に前記のフレーム組立物９をセットした後に閉型し、ランナー１１４及びゲート１１５を通してキャビティ１１２内に樹脂を注入し、キャビティを充填する。充填後所定の温度を維持すると樹脂はキャビティ内で硬化する。硬化後に開型し樹脂で封止されたフレーム組立物９を取り出し、リードの外側端末２ｂとフレーム８とを切り離すと、パッケージにより封止された半導体素子が得られる。   After the frame assembly 9 is set in the mold 100, the mold is closed, and resin is injected into the cavity 112 through the runner 114 and the gate 115 to fill the cavity. If a predetermined temperature is maintained after filling, the resin is cured in the cavity. When the frame assembly 9 opened after curing and sealed with resin is taken out and the outer terminal 2b of the lead is separated from the frame 8, a semiconductor element sealed by the package is obtained.

前記の樹脂充填工程では、樹脂注入中に、キャビティ１１２内でボンディングワイヤ３が変形するという問題が指摘されている。すなわち、樹脂がゲート１１５からキャビティ１１２内に注入されキャビティを充填する過程で、通常は極細の金線からなるボンディングワイヤ３が流入する樹脂に押されて変形しキャビティ内でよじれ、接触、短絡、切断、ボイドの発生などを起こすと共に、ときにはパッケージの表面に露出する場合もあった。   In the resin filling process, a problem has been pointed out that the bonding wire 3 is deformed in the cavity 112 during resin injection. That is, in the process in which resin is injected from the gate 115 into the cavity 112 and fills the cavity, the bonding wire 3 made of an extremely fine gold wire is pushed and deformed by the inflowing resin and is kinked in the cavity. In some cases, cutting, generation of voids, and the like were sometimes exposed on the surface of the package.

ボンディングワイヤがパッケージから露出するのを防ぐ方法として、特開平１０−１８９６３１号公報は、図６に示すように、キャビティ内でボンディングワイヤを押さえる方法を提案している。この方法は、型２００の上型２１１ａにキャビティ可動部２２０を設け、樹脂の注入に先立ってキャビティ可動部２２０をキャビティ２１２内に降下させその底面でボンディングワイヤ３の頂点の高さを規制しておく。この状態でキャビティ可動部２２０に形成した樹脂流入路２２１から樹脂をキャビティ２１２内に注入充填し、キャビティ内の樹脂が硬化しないうちにキャビティ可動部２２０をパッケージの表面高さ位置まで引き上げ、引き上げたことにより生じた未充填空間に更に樹脂を充填するというものである。
特開平１０−１８９６３１号公報 As a method for preventing the bonding wire from being exposed from the package, Japanese Patent Laid-Open No. 10-189631 has proposed a method of pressing the bonding wire in the cavity as shown in FIG. In this method, the cavity movable part 220 is provided in the upper mold 211a of the mold 200, the cavity movable part 220 is lowered into the cavity 212 prior to resin injection, and the height of the apex of the bonding wire 3 is regulated on the bottom surface. deep. In this state, resin is injected and filled into the cavity 212 from the resin inflow path 221 formed in the cavity movable part 220, and the cavity movable part 220 is pulled up to the surface height position of the package before the resin in the cavity is cured. The resin is further filled in the unfilled space generated by this.
Japanese Patent Laid-Open No. 10-189631

しかしこの方法によってもボンディングワイヤ３が流入する樹脂に押されて変形し、キャビティ内でよじれ、接触、短絡、切断、ボイドの発生などを起こす可能性は排除できず、また樹脂をキャビティ可動部２２０に形成した樹脂流入路２２１から注入することは、この樹脂が熱硬化性であってキャビティ２１２内で硬化すると同時に樹脂流入路２２１内でも非可逆的に硬化することを考慮すると、実施困難であった。   However, even with this method, the bonding wire 3 is pushed and deformed by the inflowing resin, and it is not possible to eliminate the possibility of kinking in the cavity and causing contact, short-circuiting, cutting, void generation, and the like. It is difficult to inject from the resin inflow passage 221 formed in consideration of the fact that this resin is thermosetting and hardens in the cavity 212 and at the same time irreversibly hardens in the resin inflow passage 221 as well. It was.

本発明者は、キャビティ内でボンディングワイヤが変形する原因について研究の結果、図７に示すように、キャビティ１１２内に樹脂が注入され空間を充填する過程で、高粘性の樹脂がステージ６共々に半導体チップ１を押圧し、半導体チップ１が所定の位置から移動することに主たる原因があることを見出した。この半導体チップの位置の移動が、例えばボンディングワイヤ３Ｘで示すようにパッケージの壁面に露出したり、またボンディングワイヤ３Ｙで示すようにキャビティ内でよじれ、接触、短絡、切断、ボイドの発生などを引き起こす。このようなボンディングワイヤの欠陥は、製造中に短絡や断線が発生した場合には工程中の導通検査などにより不良品として検知し排除できるが、このような不良品が多発すれば生産性が大幅に低下する。また通常の導通検査では検出できず、良品として出荷された後で欠陥が現れる場合もあり、この場合には製品の信頼性を大きく損なう。
本発明は前記の課題を解決するためになされたものであって、従ってその目的は、樹脂注入時のボンディングワイヤの変形に伴う欠陥を排除し、生産性と信頼性を向上させる半導体素子の製造方法、この製造方法により製造される半導体素子、及びこの半導体素子を製造する半導体素子製造装置を提供することにある。 As a result of research on the cause of the deformation of the bonding wire in the cavity, the present inventor, as shown in FIG. It has been found that there is a main cause in pressing the semiconductor chip 1 and moving the semiconductor chip 1 from a predetermined position. This movement of the position of the semiconductor chip is exposed on the wall surface of the package, for example, as indicated by the bonding wire 3X, or is kinked in the cavity as indicated by the bonding wire 3Y, causing contact, short circuit, cutting, void generation, etc. . Such defects in bonding wires can be detected and eliminated as defective products by continuity inspection during the process if a short circuit or disconnection occurs during manufacturing. However, if such defective products occur frequently, the productivity is greatly increased. To drop. In addition, it cannot be detected by a normal continuity test, and a defect may appear after being shipped as a non-defective product. In this case, the reliability of the product is greatly impaired.
SUMMARY OF THE INVENTION The present invention has been made to solve the above-described problems. Therefore, the object of the present invention is to manufacture a semiconductor device that eliminates defects associated with deformation of bonding wires during resin injection and improves productivity and reliability. The present invention provides a method, a semiconductor device manufactured by the manufacturing method, and a semiconductor device manufacturing apparatus for manufacturing the semiconductor device.

前記の課題を解決するために、
請求項１に記載の発明は、半導体チップとリードの内側端末とがボンディングワイヤで接続され、前記リードの外側端末を外部に露出した状態で前記半導体チップと前記ボンディングワイヤと前記リードの内側端末とがパッケージ用の樹脂により一体に封止されてなる半導体素子を製造するに際して、前記半導体チップを載置するステージを有するフレームに前記半導体チップを載置しかつ前記半導体チップと前記リードの内側端末とを前記ボンディングワイヤで接続するフレーム組立工程と、前記フレーム組立工程により組み立てられたフレーム組立物における前記リードの外側端末を上型と下型の割り型からなる上下の割り面で支持することにより前記半導体チップと前記ボンディングワイヤと前記リードの内側端末とを前記型のキャビティ内に懸架する型セット工程と、前記型の上側の割り型の一部として設けられ、前記キャビティ内に出没自由とされ、前記キャビティ内に突出したときに前記ステージを支持するために前記フレームに形成されたステージバーのステージ近傍の傾斜面に一時的に当接し、該当接時に先端が前記傾斜面に当接するチップ固定子により、間接的に当該半導体チップを一時的に固定するチップ固定工程と、前記チップ固定工程により半導体チップが一時的に固定されたキャビティ内にパッケージ用の樹脂を注入し、かつ前記樹脂の充填が完了する前に前記チップ固定子を前記一方の型内に収納する樹脂充填工程と、前記キャビティ内に充填された前記樹脂を固化させる樹脂固化工程とを含むことを特徴とする半導体素子の製造方法である。 In order to solve the above problems,
According to the first aspect of the present invention, the semiconductor chip, the bonding wire, the inner terminal of the lead, and the inner terminal of the lead are connected to each other by a bonding wire, and the outer terminal of the lead is exposed to the outside. In manufacturing a semiconductor element integrally sealed with a resin for packaging, the semiconductor chip is mounted on a frame having a stage on which the semiconductor chip is mounted, and the semiconductor chip and an inner terminal of the lead A frame assembling step for connecting the wire with the bonding wire, and supporting the outer end of the lead in the frame assembly assembled by the frame assembling step by upper and lower split surfaces made up of an upper die and a lower die. A semiconductor chip, the bonding wire, and the inner terminal of the lead are connected to the mold cavity. A mold setting process suspended in the mold, and a frame provided as a part of the split mold on the upper side of the mold so as to freely move in and out of the cavity and to support the stage when protruding into the cavity A chip fixing step of temporarily fixing the semiconductor chip indirectly by a chip stator that temporarily contacts the inclined surface in the vicinity of the stage of the stage bar formed on the tip and whose tip contacts the inclined surface at the time of corresponding contact Then, a resin for packaging is injected into the cavity in which the semiconductor chip is temporarily fixed by the chip fixing step, and the chip stator is accommodated in the one mold before the resin filling is completed. A method for manufacturing a semiconductor element, comprising: a resin filling step; and a resin solidification step for solidifying the resin filled in the cavity.

本発明の半導体素子の製造方法は型のキャビティ内に懸架した半導体チップをチップ固定子により一時的に固定し、キャビティ内で樹脂の充填が完了する前にこのチップ固定子を型内に収納するようにしたので、樹脂が注入される際の樹脂の流動圧により半導体チップが押圧されても移動が起こらず、従ってボンディングワイヤのパッケージからの露出やパッケージ内部で変形することによる接触、短絡、切断などが抑制され、半導体素子の生産性が向上する。   In the semiconductor device manufacturing method of the present invention, a semiconductor chip suspended in a cavity of a mold is temporarily fixed by a chip stator, and the chip stator is accommodated in the mold before filling of the resin in the cavity is completed. As a result, even if the semiconductor chip is pressed due to the flow pressure of the resin when the resin is injected, no movement occurs. Therefore, the bonding wire is exposed from the package or deformed inside the package, so that it is contacted, short-circuited or cut. Etc. are suppressed, and the productivity of semiconductor elements is improved.

次に本発明の実施の形態を具体例によって説明するがこれらの具体例は本発明を何ら制限するものではない。また添付の図面は本発明の思想を説明するためのものであって、本発明の説明に不要な要素は省略し、また図示した各要素の形状・寸法比・数なども実際のものを必ずしも反映していない。
図１は本発明の製造方法により製造された半導体素子の一例を示す断面図である。図１においてこの半導体素子は、半導体チップ１上に形成されたパッド１ｐとリード２の内側端末２ａとが金線からなるボンディングワイヤ３で接続され、前記リードの外側端末２ｂを外部に露出した状態で半導体チップ１とボンディングワイヤ３とリードの内側端末２ａとがパッケージ４を形成する熱硬化性樹脂コンパウンドにより一体に封止されてなっている。この半導体チップ１はパッケージ４のほぼ中央部に配置され、一方の面（図の下面）はステージ６に接着され、他方の面（図の上面）には電気回路が形成されている。 Next, embodiments of the present invention will be described by way of specific examples, but these specific examples do not limit the present invention in any way. The accompanying drawings are for explaining the idea of the present invention, and elements unnecessary for the description of the present invention are omitted, and the shapes, dimensional ratios, numbers, etc. of the illustrated elements are not necessarily actual ones. Not reflected.
FIG. 1 is a cross-sectional view showing an example of a semiconductor device manufactured by the manufacturing method of the present invention. In FIG. 1, in this semiconductor element, a pad 1p formed on a semiconductor chip 1 and an inner terminal 2a of a lead 2 are connected by a bonding wire 3 made of a gold wire, and an outer terminal 2b of the lead is exposed to the outside. The semiconductor chip 1, the bonding wire 3, and the inner terminal 2a of the lead are integrally sealed by a thermosetting resin compound that forms the package 4. The semiconductor chip 1 is disposed at substantially the center of the package 4, one surface (lower surface in the figure) is bonded to the stage 6, and an electric circuit is formed on the other surface (upper surface in the figure).

本実施形態の半導体素子は、下記の製造方法並びに製造装置により製造されている。
図２に本製造方法の工程図を示す。すなわち本製造方法は（１）フレーム組立工程、（２）型セット工程、（３）チップ固定工程、（４）樹脂充填工程、及び（５）樹脂固化工程を含んでいる。このうち、（２）型セット工程〜（５）樹脂固化工程は型と型駆動装置とからなる本発明の製造装置を用いて行われる。以下、工程順に詳しく説明する。 The semiconductor element of this embodiment is manufactured by the following manufacturing method and manufacturing apparatus.
FIG. 2 shows a process chart of the manufacturing method. That is, this manufacturing method includes (1) a frame assembly process, (2) a mold setting process, (3) a chip fixing process, (4) a resin filling process, and (5) a resin solidifying process. Among these, (2) mold setting process to (5) resin solidification process are performed using the manufacturing apparatus of the present invention including a mold and a mold driving device. Hereinafter, it demonstrates in detail in order of a process.

（１）フレーム組立工程
図３は（１）フレーム組立工程によって組み立てられたフレーム組立物９を示す平面図である。このフレーム組立物９は半導体チップ１とボンディングワイヤ３とフレーム５とからなっている。フレーム５は、半導体チップ１を載置するステージ６と、このステージを懸架するステージバー７と、リード２の配列を支持するリードステー８とが一体に金属板の打ち抜きによって形成されている。
（１）フレーム組立工程では、先ず半導体チップ１をステージ６に載置し接着する。次に半導体チップ１のパッド１ｐとリード２の内側端末２ａとをボンディングワイヤ３で接続し、フレーム組立物９を作成する。 (1) Frame Assembly Process FIG. 3 is a plan view showing the frame assembly 9 assembled by the (1) frame assembly process. The frame assembly 9 includes a semiconductor chip 1, a bonding wire 3, and a frame 5. In the frame 5, a stage 6 on which the semiconductor chip 1 is placed, a stage bar 7 that suspends the stage, and a lead stay 8 that supports the arrangement of the leads 2 are integrally formed by punching a metal plate.
(1) In the frame assembly process, first, the semiconductor chip 1 is mounted on the stage 6 and bonded. Next, the pad 1p of the semiconductor chip 1 and the inner terminal 2a of the lead 2 are connected by the bonding wire 3, and the frame assembly 9 is created.

（２）型セット工程および（３）チップ固定工程
図４は（２）型セット工程後の（３）チップ固定工程の最終段階を示す断面図である。これらの工程では本発明の型１０とこの型を駆動する型駆動装置（図示せず）とを有する半導体素子製造装置が用いられる。
型１０は、割り型１１ａ，１１ｂからなる型本体１１と、この型本体１１に形成されたキャビティ１２と、チップ固定子１３と、前記キャビティ１２内にパッケージ用の樹脂を供給するランナー及びゲートを有している。割り型１１ａ，１１ｂは、図示しない型駆動装置によって温度が制御されると共に、リードの外側端末２ｂとステージバー７の外側端末を気密に挟み込めるように、割り面にそれぞれを収納する溝が形成されている。キャビティ１２はパッケージ４の外形を規定する形状に形成されている。 (2) Mold Setting Process and (3) Chip Fixing Process FIG. 4 is a sectional view showing the final stage of the (3) chip fixing process after the (2) mold setting process. In these steps, a semiconductor element manufacturing apparatus having the mold 10 of the present invention and a mold driving device (not shown) for driving the mold is used.
The mold 10 includes a mold body 11 including split molds 11 a and 11 b, a cavity 12 formed in the mold body 11, a chip stator 13, and a runner and a gate for supplying a resin for packaging into the cavity 12. Have. In the split molds 11a and 11b, the temperature is controlled by a mold driving device (not shown), and grooves are formed on the split surfaces so that the outer terminal 2b of the lead and the outer terminal of the stage bar 7 can be sandwiched in an airtight manner. Has been. The cavity 12 is formed in a shape that defines the outer shape of the package 4.

前記のフレーム組立物９はこの型１０にセットされる。先ず型１０が開型され、割り型１１ａ，１１ｂの間の所定の位置にフレーム組立物９が載置される。このとき、フレーム組立物９のリード外側端末２ｂとステージバー７の外側端末が割り型１１ａ，１１ｂに挟持され、ステージ６に載置された半導体チップ１とボンディングワイヤ３とリード内側端末２ａとがキャビティ１２内に、キャビティ壁面と非接触に懸架される。フレーム組立物９がセットされた型１０は閉型される。   The frame assembly 9 is set in this mold 10. First, the mold 10 is opened, and the frame assembly 9 is placed at a predetermined position between the split molds 11a and 11b. At this time, the lead outer terminal 2b of the frame assembly 9 and the outer terminal of the stage bar 7 are sandwiched between the split molds 11a and 11b, and the semiconductor chip 1, the bonding wire 3 and the lead inner terminal 2a placed on the stage 6 are connected. It is suspended in the cavity 12 in a non-contact manner with the cavity wall surface. The mold 10 on which the frame assembly 9 is set is closed.

型１０にフレーム組立物９をセットし閉型した後、チップ固定子１３をキャビティ内に突出させ、その先端部をステージバー７に当接させる。
チップ固定子１３は、型１０の上側の割り型１１ａに設けられている。チップ固定子１３は円柱状のピンからなり、本実施形態では４本のチップ固定子１３が用いられ、方形の台座１８の４隅にそれぞれ立設されて４本が連動するようになっている。それぞれのチップ固定子１３は割り型１１ａの所定の位置に形成された貫通孔１６の壁面と摺動してキャビティ１２内に出没自由とされ、型外部の台座１８を押し下げると、それぞれのチップ固定子１３の先端部がステージバー７のステージ６近傍に当接し、これを押さえるように構成されている。チップ固定子１３の出没のタイミングやストロークは前記の型駆動装置により制御されている。ランナー及びゲートは未硬化の熱硬化性樹脂をキャビティ１２内に注入するための通路であり、割り型１１ａ，１１ｂの割り面に形成され、ランナーの一方の端末は図示しないプランジャ付きの加熱ポットに連通しゲートはキャビティ１２の所定の位置に開口している。 After the frame assembly 9 is set on the mold 10 and closed, the chip stator 13 is protruded into the cavity, and the tip thereof is brought into contact with the stage bar 7.
The chip stator 13 is provided in the split mold 11 a on the upper side of the mold 10. The chip stator 13 is composed of a cylindrical pin. In this embodiment, four chip stators 13 are used, and the four chip stators 13 are erected at the four corners of the rectangular pedestal 18 so as to be interlocked. . Each chip stator 13 slides on the wall surface of the through-hole 16 formed at a predetermined position of the split mold 11a so that it can freely move in and out of the cavity 12. When the pedestal 18 outside the mold is pushed down, each chip stator 13 is fixed. The distal end portion of the child 13 abuts on the stage bar 7 in the vicinity of the stage 6 and is configured to hold it. The projecting timing and stroke of the chip stator 13 are controlled by the mold driving device. The runner and gate are passages for injecting uncured thermosetting resin into the cavity 12, and are formed on the split surfaces of the split molds 11a and 11b, and one end of the runner is attached to a heating pot with a plunger (not shown). The communication gate opens at a predetermined position of the cavity 12.

本実施形態のチップ固定子１３…は、その先端部がステージバー７のステージ６近傍に当接するように構成されているが、半導体チップ１とステージ６とは接着されているので、間接的に半導体チップ１を一時的に固定することができる。この場合には半導体チップの回路要素などに損傷を与えず、樹脂の高速充填を可能にするほか、チップ固定子１３…が半導体チップ１から比較的遠くに離れているので、樹脂充填やチップ固定子の収納に際して特に半導体チップ１周辺の樹脂の流れが円滑になり、均一性の高いパッケージ４が形成される。またチップ固定子１３…は細いピンからなっているので、樹脂の注入に際してその流動を妨げることが少ない。従って高速で注入しても乱流などによってボイドが発生する可能性は少なく、半導体素子製品の生産歩留りと信頼性が向上する。   The tip stators 13 of the present embodiment are configured such that their tip portions are in contact with the vicinity of the stage 6 of the stage bar 7, but since the semiconductor chip 1 and the stage 6 are bonded, indirectly. The semiconductor chip 1 can be temporarily fixed. In this case, the circuit elements of the semiconductor chip and the like are not damaged, and the resin can be filled at high speed, and since the chip stators 13 are relatively far from the semiconductor chip 1, the resin filling and chip fixing are possible. Especially when the child is housed, the flow of the resin around the semiconductor chip 1 becomes smooth, and a highly uniform package 4 is formed. Further, since the chip stators 13 are made of thin pins, there is little possibility of hindering the flow when the resin is injected. Therefore, even if injection is performed at a high speed, there is little possibility that voids are generated due to turbulent flow, and the production yield and reliability of semiconductor element products are improved.

（４）樹脂充填工程
この樹脂充填工程では二つの操作、すなわち（Ａ．樹脂注入）と（Ｂ．チップ固定子収納）とが行われる。先ず、前記により半導体チップ１が一時的に固定されたキャビティ１２内に、ランナー及びゲートを通して未硬化の熱硬化性樹脂を注入する。そして、キャビティ１２内が樹脂で完全に充填される前に、チップ固定子１３を、その先端面がキャビティの内壁とほぼ面一となるまで割り型１１ａ内に収納する。このチップ固定子の収納に伴ってキャビティ内は陰圧となるが直ちに樹脂で補完されるため、収納痕にボイドや穴が発生することはない。またこの段階で、半導体チップ１はすでに樹脂内に埋没していて周囲が均圧となっているので、チップ固定子による固定が解除されても樹脂の流動圧により移動することはない。樹脂の注入速度、注入圧力、チップ固定子１３の収納開始タイミング、収納速度は、型温度と係わって最適となるように型駆動装置により制御される。 (4) Resin Filling Step In this resin filling step, two operations, that is, (A. resin injection) and (B. chip stator storage) are performed. First, uncured thermosetting resin is injected through the runner and gate into the cavity 12 where the semiconductor chip 1 is temporarily fixed as described above. Then, before the inside of the cavity 12 is completely filled with the resin, the chip stator 13 is accommodated in the split mold 11a until the tip end surface thereof is substantially flush with the inner wall of the cavity. As the chip stator is housed, negative pressure is generated in the cavity, but it is immediately supplemented with resin, so that no void or hole is generated in the housing trace. At this stage, since the semiconductor chip 1 is already buried in the resin and the periphery is equalized, it does not move due to the flow pressure of the resin even if the fixation by the chip stator is released. The injection speed of the resin, the injection pressure, the storage start timing of the chip stator 13 and the storage speed are controlled by the mold driving device so as to be optimal in relation to the mold temperature.

（５）樹脂固化工程
（５）樹脂固化工程ではキャビティ１２内に充填された樹脂が型１０の中で硬化される。この樹脂は熱硬化性であるから加熱の持続により不可逆的に固化し、パッケージ４を形成する。この際、ランナー及びゲートに残留した樹脂も硬化する。しかしランナー及びゲートはいずれも割り型１１ｂの割り面に形成されているので、開型すればパッケージ４に伴って容易に除去できる。 (5) Resin solidifying step (5) In the resin solidifying step, the resin filled in the cavity 12 is cured in the mold 10. Since this resin is thermosetting, it solidifies irreversibly by the continued heating to form the package 4. At this time, the resin remaining on the runner and the gate is also cured. However, since both the runner and the gate are formed on the split surface of the split mold 11b, the runner and the gate can be easily removed along with the package 4 when the mold is opened.

キャビティ１２内の樹脂が固化した後は、開型し、フレーム組立物９を型１０から取り出し、次いでリード２とリードステー８とを切り離し、またパッケージ４から突出したステージバー７を切除すれば、図１に示した本発明の半導体素子が得られる。この半導体素子は、樹脂注入時に樹脂の流動圧による半導体チップ１の移動が防止されたので、半導体チップの移動に伴って発生するボンディングワイヤ３のパッケージ４からの露出や、パッケージ４内部におけるボンディングワイヤ３の変形による接触、短絡、切断などが抑制され、生産性及び信頼性が従来のものに比べ向上している。   After the resin in the cavity 12 is solidified, the mold is opened, the frame assembly 9 is taken out of the mold 10, the leads 2 and the lead stay 8 are separated, and the stage bar 7 protruding from the package 4 is cut off. The semiconductor element of the present invention shown in FIG. 1 is obtained. In this semiconductor element, since the movement of the semiconductor chip 1 due to the flow pressure of the resin is prevented at the time of resin injection, the exposure of the bonding wire 3 generated from the movement of the semiconductor chip from the package 4 and the bonding wire inside the package 4 Contact, short circuit, cutting, and the like due to deformation 3 are suppressed, and productivity and reliability are improved as compared with the conventional one.

本発明の製造方法により製造された半導体素子の一例を示す断面図である。It is sectional drawing which shows an example of the semiconductor element manufactured by the manufacturing method of this invention. 本発明の製造方法の一例を示す工程図である。It is process drawing which shows an example of the manufacturing method of this invention. 前記製造方法において（１）フレーム組立工程によって組み立てられたフレーム組立物を示す平面図である。It is a top view which shows the flame | frame assembly assembled by the (1) frame | frame assembly process in the said manufacturing method. 本発明の実施形態におけるチップ固定子の構成及び実施態様を示す断面図である。It is sectional drawing which shows the structure and implementation of the chip | tip stator in embodiment of this invention. 半導体素子を従来の製造方法に従って製造する一過程を示す断面図である。It is sectional drawing which shows one process of manufacturing a semiconductor element according to the conventional manufacturing method. 従来提案された半導体素子の製造方法の一例を示す断面図である。It is sectional drawing which shows an example of the manufacturing method of the semiconductor element proposed conventionally. 従来の製造方法における一問題点を示す断面図である。It is sectional drawing which shows one problem in the conventional manufacturing method.

符号の説明Explanation of symbols

１・・・半導体チップ、２・・・リード、２ａ・・・内側端末、２ｂ・・・外側端末、３・・・ボンディングワイヤ、４・・・パッケージ、５・・・フレーム、６・・・ステージ、７・・・ステージバー、８・・・リードステー、９・・・フレーム組立物、１０・・・型、１１・・・型本体、１１ａ，１１ｂ・・・割り型、１２・・・キャビティ、１３・・・チップ固定子、１６・・・貫通孔
DESCRIPTION OF SYMBOLS 1 ... Semiconductor chip, 2 ... Lead, 2a ... Inner terminal, 2b ... Outer terminal, 3 ... Bonding wire, 4 ... Package, 5 ... Frame, 6 ... Stage, 7 ... Stage bar, 8 ... Lead stay, 9 ... Frame assembly, 10 ... Mold, 11 ... Mold body, 11a, 11b ... Split mold, 12 ... Cavity, 13 ... chip stator, 16 ... through hole

Claims (1)

半導体チップとリードの内側端末とがボンディングワイヤで接続され、前記リードの外側端末を外部に露出した状態で前記半導体チップと前記ボンディングワイヤと前記リードの内側端末とがパッケージ用の樹脂により一体に封止されてなる半導体素子を製造するに際して、
前記半導体チップを載置するステージを有するフレームに前記半導体チップを載置しかつ前記半導体チップと前記リードの内側端末とを前記ボンディングワイヤで接続するフレーム組立工程と、
前記フレーム組立工程により組み立てられたフレーム組立物における前記リードの外側端末を上型と下型の割り型からなる上下の割り面で支持することにより前記半導体チップと前記ボンディングワイヤと前記リードの内側端末とを前記型のキャビティ内に懸架する型セット工程と、
前記型の上側の割り型の一部として設けられ、前記キャビティ内に出没自由とされ、前記キャビティ内に突出したときに前記ステージを支持するために前記フレームに形成されたステージバーのステージ近傍の傾斜面に一時的に当接し、該当接時に先端が前記傾斜面に当接するチップ固定子により、間接的に当該半導体チップを一時的に固定するチップ固定工程と、
前記チップ固定工程により半導体チップが一時的に固定されたキャビティ内にパッケージ用の樹脂を注入し、かつ前記樹脂の充填が完了する前に前記チップ固定子を前記一方の型内に収納する樹脂充填工程と、
前記キャビティ内に充填された前記樹脂を固化させる樹脂固化工程とを含むことを特徴とする半導体素子の製造方法。 The semiconductor chip and the inner terminal of the lead are connected by a bonding wire, and the semiconductor chip, the bonding wire, and the inner terminal of the lead are integrally sealed with a resin for packaging with the outer terminal of the lead exposed to the outside. When manufacturing a semiconductor element that is stopped,
A frame assembling step of mounting the semiconductor chip on a frame having a stage for mounting the semiconductor chip and connecting the semiconductor chip and an inner end of the lead by the bonding wire;
The outer end of the lead in the frame assembly assembled by the frame assembling process is supported by the upper and lower split surfaces composed of the upper mold and the lower mold, thereby the inner end of the semiconductor chip, the bonding wire, and the lead. And a mold setting step for suspending the inside of the mold cavity,
Provided as part of the split mold on the upper side of the mold, can be freely moved in and out of the cavity, and near the stage of the stage bar formed on the frame to support the stage when protruding into the cavity A chip fixing step in which the semiconductor chip is temporarily fixed indirectly by a chip stator that is temporarily in contact with the inclined surface and the tip is in contact with the inclined surface at the time of contact;
Resin filling for injecting a resin for packaging into the cavity in which the semiconductor chip is temporarily fixed by the chip fixing step and storing the chip stator in the one mold before the resin filling is completed Process,
And a resin solidifying step of solidifying the resin filled in the cavity.
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