JP4124203B2 - リニアイメージセンサの光電変換回路 - Google Patents
リニアイメージセンサの光電変換回路 Download PDFInfo
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- JP4124203B2 JP4124203B2 JP2005029110A JP2005029110A JP4124203B2 JP 4124203 B2 JP4124203 B2 JP 4124203B2 JP 2005029110 A JP2005029110 A JP 2005029110A JP 2005029110 A JP2005029110 A JP 2005029110A JP 4124203 B2 JP4124203 B2 JP 4124203B2
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- 238000006243 chemical reaction Methods 0.000 title claims description 16
- 239000003990 capacitor Substances 0.000 claims description 29
- 238000012935 Averaging Methods 0.000 claims description 12
- 230000001360 synchronised effect Effects 0.000 claims description 2
- 230000035945 sensitivity Effects 0.000 description 5
- 238000010586 diagram Methods 0.000 description 4
- 102100031699 Choline transporter-like protein 1 Human genes 0.000 description 2
- 102100035954 Choline transporter-like protein 2 Human genes 0.000 description 2
- 102100039497 Choline transporter-like protein 3 Human genes 0.000 description 2
- 102100039496 Choline transporter-like protein 4 Human genes 0.000 description 2
- 101000940912 Homo sapiens Choline transporter-like protein 1 Proteins 0.000 description 2
- 101000948115 Homo sapiens Choline transporter-like protein 2 Proteins 0.000 description 2
- 101000889279 Homo sapiens Choline transporter-like protein 3 Proteins 0.000 description 2
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Description
以下、この発明の実施の形態1について図1を用いて説明する。図1は、実施の形態1によるリニアイメージセンサの光電変換回路の要部回路図であり、図1において1は原稿などの被写体からの光を受光する受光素子回路群、3は各受光素子回路1に直列に設けられたアナログスイッチなどで構成された第1のスイッチ群、4は第1のスイッチ間に設けられた第2のスイッチ群、5は受光素子回路1からの電荷を一時的に蓄積するコンデンサ群、6はコンデンサ5の端子に発生した電圧を電流増幅するMOSトランジスタ、7はMOSトランジスタ6の出力電流を開閉するアナログスイッチなどで構成された第3のスイッチ群、8は外部論理信号に基づき第2のスイッチを制御するセレクタなどで構成された平均化制御回路、9は外部論理信号に基づき第3のスイッチを制御するセレクタなどで構成された読出制御回路、10はMOSトランジスタ出力を電圧変換する出力段回路である。
Claims (1)
- 被写体からの光を光電変換する複数の受光素子回路と、個々の前記受光素子回路に接続され、外部から入力されるスタートパルス信号を受けて開閉動作する第1のスイッチと、この第1のスイッチの他端に、前記受光素子回路で光電変換された電荷を蓄積するコンデンサと、このコンデンサの端子電圧を電流増幅するMOSトランジスタのゲート電極とを接続すると共に隣接する前記コンデンサ間に配設した第2のスイッチを接続し、電流増幅された前記MOSトランジスタ出力に接続された第3のスイッチと、この第3のスイッチの他端同士を共通接続し、この共通線を通して前記スタートパルス信号に同期して流れ込むMOSトランジスタの出力電流を電圧変換する出力段回路とを備え、外部から入力される平均化制御信号により、前記第2のスイッチを選択的に閉とすることで導通された隣接するコンデンサ間の端子電圧を平均化すると共に外部から入力される解像度制御信号により、前記第3のスイッチを選択的に開とすることで当該第3のスイッチを介して前記共通線に流入するMOSトランジスタの出力を制御するリニアイメージセンサの光電変換回路。
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JP2005029110A JP4124203B2 (ja) | 2005-02-04 | 2005-02-04 | リニアイメージセンサの光電変換回路 |
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JP2005029110A JP4124203B2 (ja) | 2005-02-04 | 2005-02-04 | リニアイメージセンサの光電変換回路 |
Publications (2)
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JP2006217361A JP2006217361A (ja) | 2006-08-17 |
JP4124203B2 true JP4124203B2 (ja) | 2008-07-23 |
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JP5296417B2 (ja) * | 2008-05-29 | 2013-09-25 | セイコーインスツル株式会社 | 光電変換装置 |
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