JP4105811B2 - Method for forming polycrystalline silicon film - Google Patents

Method for forming polycrystalline silicon film Download PDF

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JP4105811B2
JP4105811B2 JP27689598A JP27689598A JP4105811B2 JP 4105811 B2 JP4105811 B2 JP 4105811B2 JP 27689598 A JP27689598 A JP 27689598A JP 27689598 A JP27689598 A JP 27689598A JP 4105811 B2 JP4105811 B2 JP 4105811B2
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layer
silicon
film
polycrystalline silicon
forming
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JP2000114558A (en
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学 古茂田
英樹 白間
浩一郎 新楽
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Kyocera Corp
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Kyocera Corp
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    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/545Microcrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/546Polycrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/548Amorphous silicon PV cells

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Description

【0001】
【発明の属する技術分野】
本発明は、多結晶シリコン膜の形成方法に関し、特に太陽電池などに使用される薄膜多結晶シリコン膜の形成方法に関する。
【0002】
【従来技術とその課題】
近年になり、低コスト且つ高効率な次世代太陽電池の研究開発は、国内外で活発に進められてきているが、このうち、特にシリコンを主材料とした薄膜多結晶シリコン太陽電池は、コスト、変換効率、資源問題、環境問題等を総合的に考慮すると、次世代太陽電池として最も有力であると考えられている。
【0003】
一般に、高効率な薄膜多結晶シリコン太陽電池を形成するには、充分高品質な光活性層を形成することが最も重要な要件であるが、この光活性層の品質を最大限活かしてより高い変換効率を得るには、光活性層の品質以外にも様々な要件についてその品質を向上させる必要がある。
【0004】
上記要件のうち、特に光活性層のpn接合が形成される側とは反対側にBSF層を形成する方法は、高変換効率を得るための最も効果的かつ一般的な方法として太陽電池全般に広く用いられている。
【0005】
薄膜多結晶シリコン太陽電池においても、当然、このBSF機能を有効に用いることが高効率化のための重要要件の一つであるが、このBSF機能は、光活性層形成のために形成される下地層にその機能を担わせることが一般的であり、様々な手法でその形成方法の研究開発がなされている。
【0006】
一例として、予め基板上に形成した非晶質または微結晶質シリコンに、レーザーまたはエネルギービームを照射してこれを溶融再結晶化する方法が知られている(例えば、特開平9−312258号公報等を参照)。
【0007】
この方法の特長としては、レーザーアニールによって下地結晶シリコンを比較的大粒径化できること、また、薄膜多結晶シリコンを比較的低温下で形成できること等が挙げられるが、一方、レーザーアニール工程に長時間を要するため、太陽電池素子として実用的な大面積基板を用いる際には、スループットに問題がある。
【0008】
また、SUS基板上にプラズマCVD法で形成された非晶質シリコンをSPC(固相結晶化)法を用いて多結晶化する方法が知られている(例えば、Proc.1st. WCPEC (1994)p.1315−1318、特開平2−28315号公報、特開平6−204539号公報、特開平7−135332号公報、特開平7−335660号公報等を参照)。
【0009】
この方法の特長としては、基板として安価なSUS基板を用いていること、また、SPC工程が600℃程度の比較的低温プロセスであることが挙げられるが、一方、SPC工程に約10時間という長時間を要し、また、得られる結晶についても充分大粒径化するのが難しいという問題を抱えている。
【0010】
他には、カーボン基板上に、プラズマ溶射法によりシリコン粒を溶融、射出して多結晶シリコン層を形成する方式が知られている(例えば、特開平5−315258号公報、特開平5−315259号公報、特開平5−315260号公報、特開平5−326414号公報、特開平6−208960号公報、特開平6−208961号公報等を参照)。
【0011】
この方式の特長としては、基板として安価を見込めるカーボン基板を用いていること、多結晶シリコン成膜を非常に高速に行え、また、多結晶シリコン粒を大粒径化できることが挙げられるが、成膜温度をシリコンの融点近傍の高温度とする必要があるため、多大な熱エネルギーを要するという問題がある。
【0012】
本発明は、以上の諸方法の問題点を解消し、薄膜多結晶シリコン太陽電池の高効率化に好適なBSF機能を有した下地層を低コストで形成することによって、高効率で低コストな薄膜多結晶シリコン太陽電池の製造が可能な多結晶シリコン膜の形成方法を提供することを目的とする。
【0013】
【課題を解決するための手段】
上記目的を達成するために、請求項1に係る発明では、基板上に、シリコンと共融系を成す金属元素からなる金属薄膜層と、ボロンを1×1018〜1×1021atoms/cm含有してなるシリコン層とを、順に積層する工程と、前記金属元素と前記シリコン層中のシリコンとを熱処理により反応させて、前記基板上にBSF機能を有する多結晶シリコン膜を形成する工程と、前記多結晶シリコン膜上に光活性層を形成する工程と、を有することを特徴とする。
【0014】
また、上記発明では、前記金属元素からなる金属薄膜層がAl、Sn、Inのうちのいずれか一種もしくは複数種から成ることが望ましい。
【0015】
また、上記発明では、前記金属元素からなる金属薄膜層の膜厚が0.3μm以下で、この金属薄膜層と前記シリコン層との膜厚の比が1:0.7〜1:3であることが望ましい。
【0016】
さらに、上記発明では、前記基板と前記金属元素からなる金属薄膜層との間に、Ti、Ni、W、Mo、Cu、Ag、Al等の金属層、またはその窒化層、またはそのシリサイド層を介在させてもよい。
【0017】
【作用】
以上の構成によって、シリコン−電極界面でのキャリア再結合を充分低く抑えることができ、同時に、下地層のシート抵抗値を充分に小さく抑えることができ、かつ、シリコン−電極間で良好なオーミック特性が得られるので、高効率化が望めるBSF機能を有した下地層が得られ、低コストかつ高効率な薄膜多結晶シリコン太陽電池を得ることができる。
【0018】
【発明の実施の形態】
以下に本発明の実施形態について図面に基づき詳細に説明する。
図1は全体として光電変換装置S1を示し、基板1上に、シリコンと共融系を成す1種以上の金属元素を含む多結晶シリコン層2(下層部は2a、上層部は2b)、シリコン光活性層3、シリコン光活性層3とは反対の導電型を持つシリコン層4、及び受光面電極層を兼ねた導電性反射防止膜である反射防止層6を順次積層して成る。同図中の7は反射防止膜6の上面に接続された表取り出し電極であり、8は多結晶シリコン層2の上面に接続された裏取り出し電極である。
【0019】
基板1としては、ガラス、ステンレス、カーボン等の安価で安定な材料の選択が可能である。
【0020】
光電変換装置の製造にあたっては、図2に示すように、まず、基板1上に、シリコンと共融系を成す金属元素を含んだ金属薄膜層2a′を電子ビーム蒸着法、スパッタリング法等の真空成膜法により、0.1〜2μm程度の膜厚、望ましくは0.1〜0.3μmに成膜する(図2(a)参照)。なお、シリコンと共融系を成す金属元素としては、Al、Sn、In等を用いることができる。
【0021】
次に、この金属薄膜層2a′を形成した基板1上に、プラズマCVD法、スパッタリング法等の薄膜形成技術にて膜厚0.1〜2μm、望ましくは0.1〜0.9μmの厚みにBを含有する非晶質または微晶質シリコン層2b′を形成する。
【0022】
次いで、上記基体を480〜570℃の比較的低温下で数分〜1時間程度保持し、上記金属元素とシリコンとの反応現象により、基板面に平行な方向において1μm以上の結晶粒径を持つ下層部2aと上層部2bとから成る多結晶シリコン層2を形成する(図2(b)参照)。
【0023】
つまり、Bを含有する非晶質または微晶質シリコン層2b′の膜厚が0.1μm以下の場合、シリコン層2が層状にならない傾向がある。また、Bを含有する非晶質または微晶質シリコン層2b′の膜厚が2μm以上の場合、シリコンが結晶化しない傾向がある。さらに、シリコンと共融系の金属元素を含む金属層2a′が0.1μm以下の場合、多結晶シリコンが島状になる傾向があり、2μm以上の場合、シリコンが相対的に少なくなって多結晶シリコンが島状になる傾向がある。
【0024】
また、多結晶シリコン層の上層2b及び下層2aの膜厚は、以下の理由からしても0.1〜2μmの範囲に設定することが望ましい。つまり、高濃度にドーピングされた多結晶シリコン層2が厚すぎると、この層内での不純物起源の再結合及びオージェ再結合が無視できなくなり、開放電圧が低下することで変換効率が低下してしまうこと、およびより薄い膜厚である程、膜形成に必要なプロセス時間を短縮することができ、低コスト化に適しているからである。
【0025】
特に、全層元素を含有する薄膜層2a’の膜厚を0.3μm以下すると共に、この薄膜層2a’とシリコン層2b’との膜厚の比が1:0.7〜1:3であることが望ましい。このように設定することによって、下層多結晶シリコン層2aの基板に対する被覆率を90%以上に制御することが可能であり、特に有効である。これによって、図1に示す裏面電極8側でのキャリアの再結合損失を少なくすることができる。
【0026】
このとき、多結晶シリコン層2(2a、2b)は、シリコンと共融系を成す金属元素が1×1018atoms/cm3 程度含有してp型となっているが、さらにBを含有させて不純物濃度を上げる。Bのドーピング濃度が1×1018〜1×1021atoms/cm3 の範囲外となると、膜厚が約0.2〜1μmの多結晶シリコン層(BSF層)の場合、素子のVoc特性が落ちる。
【0027】
♯1737ガラス基板上に、Al層を真空蒸着法で0.2μm、ガス流量比をSiH4 :H2 :B2 6 =1:146:20に設定してアモルファスシリコン層をプラズマCVD法で0.3μm積層して、550℃×1時間で熱処理して塩酸処理して諸特性を測定したところ、比抵抗は3.4〜3.5×10-3Ω−cm、移動度は33〜36cm2 /Vs、キャリア濃度は2×1019cm-3であった。
【0028】
また、♯1737ガラス板上に、Al層を真空蒸着法で0.2μm、Bをドープしないアモルファスシリコン層をプラズマCVD法で0.3μm積層して、550℃×1時間で熱処理して塩酸処理して諸特性を測定したところ、比抵抗は0.012Ω−cm、移動度は49cm /Vs、キャリア濃度は4×1019cm−3であった。
【0029】
結晶面方位は、特に(100)及び(111)面に対して配向特性を有することが望ましい。これによって、この多結晶シリコン膜2を下地層としてこの上に順次積層される結晶シリコン膜3にも同じ結晶方位の情報が伝達しやすくなり、後述する結晶シリコン表面への微細かつランダムな凹凸構造の形成など、太陽電池素子作製にあたっての各プロセスで行う各種処理の基板面内均一性を確保することをより容易にすることができる。
【0030】
また、基板面に平行な方向に対して1μm以上の結晶粒径のものを含んでいることが望ましい。これによって、より結晶粒径の大きな光活性層3の積層形成を促進でき、結晶粒界密度が低減することで、ここに起因する結晶欠陥の少ないより高品質な光活性層が形成できる。
【0031】
次に、前記多結晶シリコン層2上に同一導電型(すなわちp型)のシリコン光活性層3となる多結晶あるいは微結晶シリコン層3を厚さ2〜30μm程度に形成する(図2(c)参照)。このとき、多結晶シリコン層2がシリコン光活性層3を形成するための下地として機能し、シリコン光活性層3の結晶シリコンの結晶粒径拡大、結晶品質向上を促進する。なお、シリコン光活性層3の形成方法としては、プラズマCVD法や触媒CVD法等の真空成膜法を用いることができ、特に後者においては比較的低温下で高品質且つ高速に多結晶シリコン膜を形成しうるので、製造プロセスをより短時間にすることができる。
【0032】
次に、シリコン光活性層3上に同層とは反対導電型(すなわちn型)の非晶質、多結晶もしくは微結晶を含む非単結晶シリコン層4をプラズマCVD法やスパッタリング法等の真空成膜法により厚さ数100nm以下に形成する。
【0033】
ここで、シリコン光活性層3とシリコン層4とで形成されるpn接合の品質によっては、図3に示すように、シリコン光活性層3とシリコン層4の間に、真性型(i型)の非単結晶シリコン層5を介在させてもよい。特に同層を水素化アモルファスシリコンで形成する場合は、その膜厚を2〜40nm程度にする。シリコン層5を結晶質シリコンで形成する場合には1μm以下とする。さらに、シリコン層4及びシリコン層5を特に水素を含んだ雰囲気下で形成すると、各層の界面及びその近傍の欠陥準位を水素で終端、不活性化することができ、より品質の高いpn接合またはpin接合を得ることができる。
【0034】
さらに、シリコン層4上に、窒化シリコン膜や酸化シリコン膜等の絶縁性反射防止膜、あるいはITOやSnO2 等の導電性反射防止膜6をプラズマCVD法やスパッタリング法等の真空成膜法を用いて600〜1000nm程度の膜厚で成膜する(図1参照)。
【0035】
次に、反射防止膜6上に表取り出し電極7を、真空成膜技術、プリント及び焼成技術、さらにメッキ技術等で形成する。なお、絶縁性の反射防止膜6を第2の半導体層4上にコートする場合は、表取り出し電極7を形成させる領域をバッファードフッ酸等の適当な薬液によるエッチング技術等により除去してシリコン層4のシリコン表面を露出させ、ここに表取り出し電極7を接続するように形成すればよい。
【0036】
また、裏取り出し電極8については、図1に示すように多結晶シリコン層2を素子の裏電極として機能させる場合は、多結晶シリコン層2に真空成膜技術、プリント及び焼成技術、さらにメッキ技術等で接続形成すればよい。また図2に示すように裏電極層9を用いる場合には、裏取り出し電極8を同様の技術で裏電極層9上に接続形成すればよい。
【0037】
以上によって、低コストでしかも高効率な薄膜結晶シリコン太陽電池である光電変換装置S1を得ることができる。また、光電変換装置として太陽電池を例にとり説明したが、これに限定されるものではなく、例えば位置検知センサ、輝度センサ、カラーセンサ等の光センサ等にも適用が可能であり、本発明の要旨を逸脱しない範囲で適宜変更し実施が可能である。
【0038】
図3は他の光電変換装置S2を示し、前記S1に対して、Ti、Ni等の金属膜またはその窒化膜またはそのシリサイド膜からなる電極層9、及びシリコン光活性層3とシリコン層4との間に設けられたシリコン層5を追加したものである。
【0039】
この電極9はTi、Ni、W、Mo、Cu、Ag、Al等の金属層、またはその窒化膜層、またはそのシリサイド膜から成る。これらは、太陽電池の高効率化に適した裏電極とすることができる。
【0040】
この場合、電極9の表面構造が微細かつランダムな凹凸構造としてもよい。これによって、裏面電極9側に到達した光の反射が散乱されて、膜内部での光閉じ込めが促進されるので、光利用効率が向上する。
【0041】
本発明では、基板1上に、多結晶シリコン膜2a、2bを下地層とし、以下、シリコン光活性層3、pn接合、反射防止膜6、および電極7、8が順次形成された薄膜多結晶シリコン太陽電池において、その光入射側最表面のシリコン表面が微細かつランダムな凹凸構造に形成し、そのベアシリコン面の反射率が光波長400〜1000nmの範囲で10%以下とすることが望ましい。これによって入射した光の利用効率がさらに向上し、より高い変換効率を得ることができる。素子表面の反射率低減の方法としては、素子表面を適当な凹凸形状にしてライトトラッピング構造を形成し、表面反射率を低減することができる。この方法としてはドライエッチング技術であるRIE(Reactive Ion Etching)法が有力であることが示されている(Technical Digest of the International PVSEC-9 (1996)93-96 、109-110 )。この方法を用いれば、結晶シリコン表面をシリコンの結晶方位に依存しないランダム且つ微細な凹凸形状とすることができ、各種ウエットエッチング法に比べて格段に優れた低反射率特性を実現できる。すなわち、pn接合を形成する前に、RIE法により、光活性層の表面をシリコンの結晶方位に依存しない微細かつランダムな凹凸形状(粗面状)とし、続いて光活性層とは伝導型を異にするシリコン層を堆積してpn接合を形成する。これによって光波長400〜1000nmの範囲で表面反射率を10%以下に抑えることができる。実際の素子化にあたっては、さらに反射防止膜を形成するために、実際の表面反射率はさらに低減することができる。以上によって光利用効率が格段に向上したライトトラッピング構造を実現することができ、素子変換効率を飛躍的に向上させることができる。
【0042】
光利用効率が格段に向上することは、光活性層の膜厚をより薄くすることを可能とし、膜形成時間をより短時間とすることができるので、より一層の低コスト化にも寄与する。
【0043】
【発明の効果】
本発明によれば、基板上に、シリコンと共融系を成す金属元素からなる金属薄膜層とシリコン層とを積層して形成し、次いでこれを熱処理することによって前記金属元素とシリコンとを反応させて、前記基板上に上下二層から成る多結晶シリコン膜を形成する光電変換装置用多結晶シリコン膜の形成方法において、前記シリコン層中にボロンを1×1018〜1×1022toms/cm含有させて熱処理をすることから、太陽電池のBSF層として好適な多結晶シリコン膜を得ることができ、高効率な薄膜多結晶シリコン太陽電池を得ることができる。さらに、素子表面の反射率を低減することで、より高い変換効率を得ることができる。また、多結晶シリコン下地層膜を比較的低温下且つ短時間で形成できるため、低コストな太陽電池を得ることができる。
【図面の簡単な説明】
【図1】請求項1に係る多結晶シリコン膜の形成方法により形成した光電変換装置を示す断面図である。
【図2】請求項1に係る多結晶シリコン膜の形成方法の工程を示す断面図である。
【図3】請求項3に係る多結晶シリコン膜の形成方法により形成した光電変換装置を示す断面図である。
【符号の説明】
1‥‥‥基板、2‥‥‥多結晶シリコン層、3‥‥‥シリコン光活性層、4‥‥‥シリコン光活性層とは反対の導電型を持つシリコン層、6‥‥‥反射防止層、7‥‥‥表取り出し電極、8‥‥‥裏取り出し電極
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for forming a polycrystalline silicon film, and more particularly to a method for forming a thin polycrystalline silicon film used for a solar cell or the like.
[0002]
[Prior art and its problems]
In recent years, research and development of low-cost and high-efficiency next-generation solar cells have been actively promoted both in Japan and overseas. Of these, thin-film polycrystalline silicon solar cells mainly made of silicon are cost-effective. Considering conversion efficiency, resource issues, environmental issues, etc., it is considered to be the most powerful next-generation solar cell.
[0003]
In general, the formation of a sufficiently high-quality photoactive layer is the most important requirement for forming a highly efficient thin-film polycrystalline silicon solar cell. In order to obtain conversion efficiency, it is necessary to improve the quality of various requirements in addition to the quality of the photoactive layer.
[0004]
Among the above requirements, the method of forming the BSF layer on the side opposite to the side where the pn junction of the photoactive layer is formed is generally the most effective and general method for obtaining high conversion efficiency in general solar cells. Widely used.
[0005]
In thin-film polycrystalline silicon solar cells, naturally, effective use of this BSF function is one of the important requirements for high efficiency, but this BSF function is formed to form a photoactive layer. It is common to have the underlying layer perform its function, and research and development of its formation method has been performed by various methods.
[0006]
As an example, a method is known in which amorphous or microcrystalline silicon previously formed on a substrate is irradiated with a laser or an energy beam to melt and recrystallize the amorphous or microcrystalline silicon (for example, Japanese Patent Laid-Open No. 9-31258). Etc.).
[0007]
The features of this method include that the crystal grain size of the underlying crystalline silicon can be made relatively large by laser annealing, and that the thin film polycrystalline silicon can be formed at a relatively low temperature. Therefore, when a practical large area substrate is used as a solar cell element, there is a problem in throughput.
[0008]
Also known is a method of polycrystallizing amorphous silicon formed on a SUS substrate by plasma CVD using SPC (solid phase crystallization) (for example, Proc. 1st. WCPEC (1994)). p.1315-1318, JP-A-2-28315, JP-A-6-204539, JP-A-7-135332, JP-A-7-335660, etc.).
[0009]
The feature of this method is that an inexpensive SUS substrate is used as the substrate and that the SPC process is a relatively low temperature process of about 600 ° C. On the other hand, the SPC process takes about 10 hours. It takes time, and it has a problem that it is difficult to sufficiently increase the grain size of the obtained crystal.
[0010]
In addition, there are known systems in which a polycrystalline silicon layer is formed on a carbon substrate by melting and injecting silicon grains by plasma spraying (for example, Japanese Patent Laid-Open Nos. 5-315258 and 5-315259). No. 5, JP-A-5-315260, JP-A-5-326414, JP-A-6-208960, JP-A-6-208961, etc.).
[0011]
The features of this method include the use of a carbon substrate that can be expected to be inexpensive as a substrate, the ability to deposit polycrystalline silicon at a very high speed, and the ability to increase the size of polycrystalline silicon grains. Since the film temperature needs to be a high temperature in the vicinity of the melting point of silicon, there is a problem that a large amount of heat energy is required.
[0012]
The present invention eliminates the problems of the above-mentioned various methods, and forms a base layer having a BSF function suitable for increasing the efficiency of a thin-film polycrystalline silicon solar cell at a low cost, thereby achieving a high efficiency and a low cost. It is an object of the present invention to provide a method for forming a polycrystalline silicon film capable of producing a thin film polycrystalline silicon solar cell.
[0013]
[Means for Solving the Problems]
In order to achieve the above object, in the invention according to claim 1, a metal thin film layer made of a metal element that forms a eutectic system with silicon, and boron in a range of 1 × 10 18 to 1 × 10 21 atoms / cm on a substrate. A step of sequentially stacking a silicon layer containing 3 and a step of reacting the metal element and silicon in the silicon layer by heat treatment to form a polycrystalline silicon film having a BSF function on the substrate. And a step of forming a photoactive layer on the polycrystalline silicon film.
[0014]
Moreover, in the said invention, it is desirable for the metal thin film layer which consists of the said metal element to consist of any 1 type or multiple types of Al, Sn, and In.
[0015]
Moreover, in the said invention, the film thickness of the metal thin film layer which consists of said metal element is 0.3 micrometer or less, and the ratio of the film thickness of this metal thin film layer and the said silicon layer is 1: 0.7-1: 3. It is desirable.
[0016]
Furthermore, in the said invention, metal layers, such as Ti, Ni, W, Mo, Cu, Ag, Al, or its nitride layer, or its silicide layer are provided between the said board | substrate and the metal thin film layer which consists of the said metal element. It may be interposed.
[0017]
[Action]
With the above configuration, carrier recombination at the silicon-electrode interface can be suppressed sufficiently low, and at the same time, the sheet resistance value of the underlayer can be suppressed sufficiently small, and good ohmic characteristics between the silicon-electrodes Therefore, a base layer having a BSF function that can be expected to be highly efficient is obtained, and a low-cost and highly efficient thin-film polycrystalline silicon solar cell can be obtained.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
Embodiments of the present invention will be described below in detail with reference to the drawings.
FIG. 1 shows a photoelectric conversion device S1 as a whole, and a polycrystalline silicon layer 2 (a lower layer is 2a and an upper layer is 2b) containing one or more metal elements that form a eutectic system with silicon on a substrate 1, silicon A photoactive layer 3, a silicon layer 4 having a conductivity type opposite to that of the silicon photoactive layer 3, and an antireflection layer 6 which is a conductive antireflection film also serving as a light receiving surface electrode layer are sequentially laminated. In the figure, 7 is a front extraction electrode connected to the upper surface of the antireflection film 6, and 8 is a back extraction electrode connected to the upper surface of the polycrystalline silicon layer 2.
[0019]
As the substrate 1, an inexpensive and stable material such as glass, stainless steel, or carbon can be selected.
[0020]
In manufacturing the photoelectric conversion device, as shown in FIG. 2, first, a metal thin film layer 2a 'containing a metal element that forms a eutectic system with silicon is formed on a substrate 1 by vacuum such as electron beam evaporation or sputtering. A film is formed to a thickness of about 0.1 to 2 μm, preferably 0.1 to 0.3 μm by a film forming method (see FIG. 2A). Note that Al, Sn, In, or the like can be used as a metal element that forms a eutectic system with silicon.
[0021]
Next, a film thickness of 0.1 to 2 μm, preferably 0.1 to 0.9 μm, is formed on the substrate 1 on which the metal thin film layer 2a ′ is formed by a thin film forming technique such as plasma CVD or sputtering. An amorphous or microcrystalline silicon layer 2b 'containing B is formed.
[0022]
Next, the substrate is held at a relatively low temperature of 480 to 570 ° C. for about several minutes to one hour, and has a crystal grain size of 1 μm or more in a direction parallel to the substrate surface due to a reaction phenomenon between the metal element and silicon. A polycrystalline silicon layer 2 composed of a lower layer portion 2a and an upper layer portion 2b is formed (see FIG. 2B).
[0023]
That is, when the film thickness of the amorphous or microcrystalline silicon layer 2b ′ containing B is 0.1 μm or less, the silicon layer 2 tends not to be layered. Further, when the film thickness of the amorphous or microcrystalline silicon layer 2b ′ containing B is 2 μm or more, the silicon tends not to be crystallized. Furthermore, when the metal layer 2a ′ containing a eutectic metal element with silicon is 0.1 μm or less, the polycrystalline silicon tends to be island-like, and when it is 2 μm or more, the silicon becomes relatively small and a lot. Crystalline silicon tends to form islands.
[0024]
The film thicknesses of the upper layer 2b and the lower layer 2a of the polycrystalline silicon layer are desirably set in the range of 0.1 to 2 μm even for the following reason. In other words, if the heavily doped polycrystalline silicon layer 2 is too thick, impurity-derived recombination and Auger recombination in this layer cannot be ignored, and the open circuit voltage decreases, thereby reducing conversion efficiency. This is because the thinner the film thickness, the shorter the process time required for film formation, which is suitable for cost reduction.
[0025]
In particular, the film thickness of the thin film layer 2a ′ containing all layer elements is set to 0.3 μm or less, and the film thickness ratio of the thin film layer 2a ′ to the silicon layer 2b ′ is 1: 0.7 to 1: 3. It is desirable to be. By setting in this way, it is possible to control the coverage of the lower polycrystalline silicon layer 2a to the substrate to 90% or more, which is particularly effective. Thereby, the recombination loss of carriers on the back electrode 8 side shown in FIG. 1 can be reduced.
[0026]
At this time, the polycrystalline silicon layer 2 (2a, 2b) has a p-type content of about 1 × 10 18 atoms / cm 3 of a metal element that forms a eutectic system with silicon, but further contains B. Increase the impurity concentration. When the doping concentration of B is outside the range of 1 × 10 18 to 1 × 10 21 atoms / cm 3 , the V oc characteristic of the device is obtained in the case of a polycrystalline silicon layer (BSF layer) having a thickness of about 0.2 to 1 μm. Falls.
[0027]
On an # 1737 glass substrate, an Al layer is set to 0.2 μm by a vacuum deposition method, and a gas flow ratio is set to SiH 4 : H 2 : B 2 H 6 = 1: 146: 20, and an amorphous silicon layer is formed by a plasma CVD method. When 0.3 μm was laminated, heat-treated at 550 ° C. × 1 hour and treated with hydrochloric acid to measure various properties, the specific resistance was 3.4 to 3.5 × 10 −3 Ω-cm, and the mobility was 33 to 36 cm 2 / Vs, and the carrier concentration was 2 × 10 19 cm −3 .
[0028]
Further, on the ♯1737 glass board, and 0.3μm stacked 0.2μm the Al layer by vacuum deposition, the amorphous silicon layer not doped with B by the plasma CVD method, and heat-treated at 550 ° C. × 1 hour hydrochloride When various characteristics were measured after processing, the specific resistance was 0.012 Ω-cm, the mobility was 49 cm 2 / Vs, and the carrier concentration was 4 × 10 19 cm −3 .
[0029]
It is desirable that the crystal plane orientation has orientation characteristics particularly with respect to the (100) and (111) planes. As a result, information of the same crystal orientation is easily transmitted to the crystalline silicon film 3 sequentially laminated on the polycrystalline silicon film 2 as an underlayer, and a fine and random uneven structure on the crystalline silicon surface described later. It is possible to make it easier to ensure in-plane uniformity of various processes performed in each process for manufacturing a solar cell element, such as formation of the substrate.
[0030]
Moreover, it is desirable that the crystal grain size is 1 μm or more with respect to the direction parallel to the substrate surface. As a result, it is possible to promote the formation of a stacked layer of the photoactive layer 3 having a larger crystal grain size, and to reduce the crystal grain boundary density, thereby forming a higher quality photoactive layer with few crystal defects resulting therefrom.
[0031]
Next, a polycrystalline or microcrystalline silicon layer 3 to be a silicon photoactive layer 3 of the same conductivity type (ie p-type) is formed on the polycrystalline silicon layer 2 to a thickness of about 2 to 30 μm (FIG. 2 (c). )reference). At this time, the polycrystalline silicon layer 2 functions as a base for forming the silicon photoactive layer 3 and promotes the crystal grain size expansion and crystal quality improvement of the crystalline silicon of the silicon photoactive layer 3. As a method for forming the silicon photoactive layer 3, a vacuum film forming method such as a plasma CVD method or a catalytic CVD method can be used. In particular, in the latter case, a polycrystalline silicon film is formed at a high quality and high speed at a relatively low temperature. Therefore, the manufacturing process can be shortened.
[0032]
Next, on the silicon photoactive layer 3, a non-single crystal silicon layer 4 containing an amorphous, polycrystalline or microcrystalline material having a conductivity type opposite to that of the same layer (that is, n-type) is applied to a vacuum such as plasma CVD or sputtering. The film is formed to a thickness of several hundred nm or less by a film forming method.
[0033]
Here, depending on the quality of the pn junction formed by the silicon photoactive layer 3 and the silicon layer 4, an intrinsic type (i-type) is provided between the silicon photoactive layer 3 and the silicon layer 4 as shown in FIG. The non-single-crystal silicon layer 5 may be interposed. In particular, when the same layer is formed of hydrogenated amorphous silicon, the film thickness is set to about 2 to 40 nm. When the silicon layer 5 is formed of crystalline silicon, the thickness is set to 1 μm or less. Further, when the silicon layer 4 and the silicon layer 5 are formed in an atmosphere containing hydrogen in particular, the defect level at the interface of each layer and its vicinity can be terminated and deactivated with hydrogen, and a higher quality pn junction can be obtained. Alternatively, a pin junction can be obtained.
[0034]
Further, an insulating antireflection film such as a silicon nitride film or a silicon oxide film or a conductive antireflection film 6 such as ITO or SnO 2 is formed on the silicon layer 4 by a vacuum film formation method such as a plasma CVD method or a sputtering method. A film having a thickness of about 600 to 1000 nm is used (see FIG. 1).
[0035]
Next, the front extraction electrode 7 is formed on the antireflection film 6 by a vacuum film formation technique, a printing and baking technique, a plating technique, and the like. In the case where the insulating antireflection film 6 is coated on the second semiconductor layer 4, the region for forming the front extraction electrode 7 is removed by etching using an appropriate chemical solution such as buffered hydrofluoric acid. What is necessary is just to form so that the silicon | silicone surface of the layer 4 may be exposed and the front extraction electrode 7 may be connected here.
[0036]
For the back extraction electrode 8, as shown in FIG. 1, when the polycrystalline silicon layer 2 functions as a back electrode of the element, the polycrystalline silicon layer 2 is vacuum-deposited, printed and fired, and further plated. The connection may be formed by, for example. As shown in FIG. 2, when the back electrode layer 9 is used, the back extraction electrode 8 may be formed on the back electrode layer 9 by the same technique.
[0037]
As described above, it is possible to obtain the photoelectric conversion device S1 which is a low-cost and high-efficiency thin-film crystalline silicon solar cell. Further, the solar cell has been described as an example of the photoelectric conversion device, but the present invention is not limited to this, and can be applied to, for example, an optical sensor such as a position detection sensor, a luminance sensor, and a color sensor. Modifications can be made as appropriate without departing from the scope of the invention.
[0038]
FIG. 3 shows another photoelectric conversion device S2, with respect to the S1, an electrode layer 9 made of a metal film such as Ti or Ni or a nitride film or a silicide film thereof, and a silicon photoactive layer 3 and a silicon layer 4. The silicon layer 5 provided between the two is added.
[0039]
The electrode 9 is made of a metal layer such as Ti, Ni, W, Mo, Cu, Ag, Al, or a nitride film layer thereof or a silicide film thereof. These can serve as back electrodes suitable for increasing the efficiency of solar cells.
[0040]
In this case, the surface structure of the electrode 9 may be a fine and random uneven structure. Thereby, the reflection of the light reaching the back electrode 9 side is scattered and the light confinement inside the film is promoted, so that the light utilization efficiency is improved.
[0041]
In the present invention, a thin film polycrystal in which a polycrystalline silicon film 2a, 2b is used as a base layer on a substrate 1, and a silicon photoactive layer 3, a pn junction, an antireflection film 6, and electrodes 7, 8 are sequentially formed. In the silicon solar cell, it is desirable that the silicon surface on the light incident side outermost surface is formed in a fine and random uneven structure, and the reflectance of the bare silicon surface is 10% or less in the light wavelength range of 400 to 1000 nm. Thereby, the utilization efficiency of the incident light is further improved, and higher conversion efficiency can be obtained. As a method for reducing the reflectance on the surface of the element, it is possible to reduce the surface reflectance by forming a light trapping structure by making the surface of the element an appropriate uneven shape. As this method, RIE (Reactive Ion Etching) which is a dry etching technique has been shown to be effective (Technical Digest of the International PVSEC-9 (1996) 93-96, 109-110). If this method is used, the surface of the crystalline silicon can be made into random and fine irregularities independent of the crystal orientation of silicon, and low reflectance characteristics that are remarkably superior to various wet etching methods can be realized. That is, before forming the pn junction, the surface of the photoactive layer is made into a fine and random uneven shape (rough surface) that does not depend on the crystal orientation of silicon by the RIE method. Subsequently, the photoactive layer has a conductivity type. A different silicon layer is deposited to form a pn junction. Thereby, the surface reflectance can be suppressed to 10% or less in the light wavelength range of 400 to 1000 nm. In actual device formation, since the antireflection film is further formed, the actual surface reflectance can be further reduced. As described above, a light trapping structure in which the light utilization efficiency is remarkably improved can be realized, and the element conversion efficiency can be drastically improved.
[0042]
The remarkable improvement in light utilization efficiency enables the photoactive layer to be made thinner and the film formation time can be shortened, contributing to further cost reduction. .
[0043]
【The invention's effect】
According to the present invention, a metal thin film layer made of a metal element that forms a eutectic system with silicon and a silicon layer are laminated on a substrate, and then the metal element reacts with silicon by heat-treating it. Then, in the method for forming a polycrystalline silicon film for a photoelectric conversion device that forms a polycrystalline silicon film having two upper and lower layers on the substrate, boron is contained in the silicon layer at 1 × 10 18 to 1 × 10 22 toms / Since heat treatment is carried out with containing cm 3, a polycrystalline silicon film suitable as a BSF layer of a solar cell can be obtained, and a highly efficient thin-film polycrystalline silicon solar cell can be obtained. Furthermore, higher conversion efficiency can be obtained by reducing the reflectance of the element surface. In addition, since the polycrystalline silicon underlayer film can be formed at a relatively low temperature and in a short time, a low-cost solar cell can be obtained.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view showing a photoelectric conversion device formed by a method for forming a polycrystalline silicon film according to claim 1;
FIG. 2 is a cross-sectional view showing a process of a method for forming a polycrystalline silicon film according to claim 1;
3 is a cross-sectional view showing a photoelectric conversion device formed by the method for forming a polycrystalline silicon film according to claim 3. FIG.
[Explanation of symbols]
1 ... Substrate, 2 ... Polycrystalline silicon layer, 3 ... Silicon photoactive layer, 4 ... Silicon layer with conductivity type opposite to silicon photoactive layer, 6 ... Antireflection layer , 7… .. Front extraction electrode, 8… Back extraction electrode

Claims (4)

基板上に、シリコンと共融系を成す金属元素からなる金属薄膜層と、ボロンを1×1018〜1×1021atoms/cm3 含有してなるシリコン層とを、順に積層する工程と、前記金属元素と前記シリコン層中のシリコンとを熱処理により反応させて、前記基板上にBSF機能を有する多結晶シリコン膜を形成する工程と、前記多結晶シリコン膜上に光活性層を形成する工程と、を有する光電変換装置用多結晶シリコン膜の形成方法。On a substrate, a metal thin film layer made of a metal element forming the silicon and eutectic system, and a boron 1 × 10 18 ~1 × 10 21 atoms / cm3 comprising silicon layer, laminating in this order, the A step of reacting a metal element and silicon in the silicon layer by heat treatment to form a polycrystalline silicon film having a BSF function on the substrate; and a step of forming a photoactive layer on the polycrystalline silicon film; A method for forming a polycrystalline silicon film for a photoelectric conversion device. 前記金属元素からなる金属薄膜層がAl、Sn、Inのうちのいずれか一種もしくは複数種から成ることを特徴とする請求項1に記載した光電変換装置用多結晶シリコン膜の形成方法。Forming a photovoltaic device for a polysilicon film according to claim 1, the metal thin film layer made of the metal element is Al, Sn, characterized in that it consists of any one or more of In. 前記金属元素からなる金属薄膜層の膜厚が0.3μm以下で、この金属薄膜層と前記シリコン層との膜厚の比が1:0.7〜1:3であることを特徴とする請求項1に記載の光電変換装置用多結晶シリコン膜の形成方法。The thickness of the metal thin film layer made of a metal element at 0.3μm or less, the ratio of the thickness of the metal thin film layer and the silicon layer is 1: 0.7 to 1: claims, characterized in that the 3 Item 2. A method for forming a polycrystalline silicon film for a photoelectric conversion device according to Item 1. 前記基板と前記金属元素からなる金属薄膜層との間に、Ti、Ni、W、Mo、Cu、Ag、Alの金属層、またはその窒化層、またはそのシリサイド層を介在させたことを特徴とする請求項1に記載した光電変換装置用多結晶シリコン膜の形成方法。Between the metal thin film layer made of the metal element and the substrate, and wherein Ti, Ni, W, Mo, Cu, Ag, metal layer of Al, or a nitride layer, or that is interposed the silicide layer A method for forming a polycrystalline silicon film for a photoelectric conversion device according to claim 1.
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