JP4052872B2 - Method for manufacturing compound semiconductor device having T-type gate electrode - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device. In particular, the present invention relates to a method for manufacturing a T-type electrode required for configuring a high-frequency compatible semiconductor device such as a HEMT (High Electron Mobility Transistor).
[0002]
[Prior art]
T-type electrodes are widely used mainly for high frequency compound semiconductors such as HEMTs. In order to manufacture the T-type electrode, a resist pattern formation process peculiar to the T-type is required. For this reason, various resist pattern formation processes have been studied.
[0003]
17 to 23, AS Wakita et al. Manufactured a T-type electrode disclosed in the document "J. Vac. Sci. Technol. Vol. 13, No. 6, 1995, pp.2725-2728". A method will be described.
[0004]
First, as shown in FIG. 17, linear source electrodes 2 a and drain electrodes 2 b are formed on the upper surface of the semiconductor substrate 1 so as to be arranged in parallel with the active region interposed therebetween. These upper surfaces are covered with a Si ₃ N ₄ film 101. On top of this, “ZEP520” manufactured by Nippon Zeon Co., Ltd., which is a positive resist, is applied to form a first resist layer 102. Further, a positive resist PMGI (poly (dimethylglutarimide)) is applied thereon to form a second resist layer 103. Further thereon, ZEP 520 is applied again to form a third resist layer 104. Therefore, the resist has a three-layer structure.
[0005]
As shown in FIG. 17, an electron beam is irradiated as an energy beam from the upper surface. The electron beam irradiation is performed on a linear region along the gap between the source electrode 2a and the drain electrode 2b when viewed from above. Next, the uppermost third resist layer 104 is developed with a mixed organic developer of methyl ethyl ketone and methyl isobutyl ketone. In this development step, the ZEP 520 of the third resist layer 104 is developed, but the PMGI of the second resist layer 103 is not developed at all, so that an opening 105 is obtained in the third resist layer 104 as shown in FIG. Can do. Next, the second resist layer 103 is developed with tetramethylammonium hydroxide. In this development step, the third resist layer 104 and the first resist layer 102 made of ZEP 520 are not developed at all, contrary to the previous case. As a result, as shown in FIG. 19, a structure in which the cavity 106 is expanded inside the second resist layer 103 is obtained. Next, the first resist layer 102 is developed with a mixed organic developer of methyl isobutyl ketone and isopropyl alcohol. In this development step, the PMGI of the second resist layer 103 is not developed at all, so that a structure having an opening 107 in the first resist layer 102 can be obtained as shown in FIG. Further, as shown in FIG. 21, the Si ₃ N ₄ film 101 is etched and opened to expose the surface of the semiconductor substrate 1.
[0006]
Next, a metal to be a material for the T-type electrode is deposited from above. As shown in FIG. 22, the metal accumulates inside the cavity 106 through the opening 105. Thereafter, a lift-off process is performed to dissolve and remove the three-layer resist. As a result, as shown in FIG. 23, it is possible to obtain a T-type electrode 7 whose root is connected to the semiconductor substrate 1 and whose upper portion is wide. The T-type electrode 7 extends linearly in the front direction of the paper in FIG. 23, like the source electrode 2a and the drain electrode 2b.
[0007]
[Problems to be solved by the invention]
In the manufacturing method described above, in addition to the need for the resist coating process three times, the development process is required three times, which takes time and increases the manufacturing cost.
[0008]
Therefore, an object of the present invention is to reduce the number of steps and shorten the manufacturing time in a method of manufacturing a semiconductor device including such a T-type electrode.
[0009]
[Means for Solving the Problems]
In order to achieve the above object, in one aspect of the method for manufacturing a semiconductor device according to the present invention, an acid generation suppressing layer containing a component capable of suppressing acid generation in a resist on the surface of a semiconductor substrate is provided. An acid generation suppressing layer forming step to be formed; a resist coating step of applying the resist so as to cover the upper side of the acid generation suppressing layer; a drying step of drying the applied resist to form a resist film; and the resist film An exposure process for irradiating the desired area with energy rays to expose the desired area, a baking process for generating an acid in the resist film by heating, and developing the resist film with a resist developer. A developing step for obtaining a recess by the step, a conductor layer forming step for forming a conductor layer inside the recess, and a lift for dissolving and removing the resist film And a full process. By adopting this configuration, the number of resist coating and drying steps and development steps can be reduced, and a semiconductor device provided with a T-type electrode can be manufactured in a shorter time than conventional.
[0010]
In addition, this method can form a resist pattern for a T-type gate electrode using only a chemically amplified resist, so that the amount of energy rays such as an electron beam can be reduced, and the beam current value can be reduced. Can be reduced. Therefore, the beam can be narrowed down, and a finer pattern than before can be formed even if the processing time per one remains the same. By reducing the beam irradiation amount, device damage due to electron beam irradiation can also be reduced.
[0011]
Preferably, in the above invention, the acid generation suppressing layer forming step is a step of applying a suppressing liquid containing the above components. By employing this method, the acid generation suppressing layer can be easily formed.
[0012]
Preferably, in the above invention, the inhibitor is soluble in the resist developer. By adopting this configuration, it is possible to penetrate the acid generation suppressing layer simultaneously with the development of the resist film.
[0013]
Preferably, in the above invention, an electrode forming step of forming a source electrode and a drain electrode on the surface of the semiconductor substrate so as to be arranged with an active region in between is included before the coating step, and the desired region is formed of the active region. Located above. By adopting this configuration, a HEMT can be manufactured.
[0014]
Preferably, in the above invention, the energy beam is an electron beam. By adopting this configuration, exposure can be performed easily.
[0015]
In the present invention, preferably, the conductor layer includes at least one of nickel and gold. By adopting this configuration, a T-type electrode having a low resistance value can be obtained.
[0016]
Preferably, in the above invention, the conductor layer forming step is performed by vapor deposition. By adopting this configuration, the conductor layer can be reliably formed.
[0017]
In order to achieve the above object, in another aspect of the method for manufacturing a semiconductor device according to the present invention, an acid generation control layer containing a component capable of controlling the generation of acid in a resist on the surface of a semiconductor substrate is provided. An acid generation control layer forming step to be formed; a resist coating step of applying the resist so as to cover an upper side of the acid generation control layer; a drying step of drying the applied resist to form a resist film; and An exposure process for irradiating the desired area with energy rays to expose the desired area; a baking process for generating an acid in the resist film by heating; and developing the resist film with a resist developer. A developing step for obtaining a recess, a conductor layer forming step for forming a conductor layer inside the recess, and a lift-off process for dissolving and removing the resist film Wherein the door by controlling the temperature of the thickness and the acid generation control layer of the acid generator control layer, to control the shape of the recess resulting from the resist film. By adopting this configuration, the number of resist coating and drying steps and development steps can be reduced, and a semiconductor device provided with a T-type electrode can be manufactured in a shorter time than conventional.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
(Embodiment 1)
(Production method)
With reference to FIGS. 1-12, the manufacturing method of the semiconductor device in Embodiment 1 based on this invention is demonstrated.
[0019]
As shown in FIG. 1, linear source electrodes 2 a and drain electrodes 2 b are formed on the upper surface of a semiconductor substrate 1 so as to be arranged with an active region 9 interposed therebetween. First, as a coating process, a suppression solution containing a component capable of suppressing the generation of acid in the resist film 4 described later is applied so as to cover these surfaces, and an acid as shown in FIG. The generation suppression layer 3 is formed. As the inhibitor, for example, a solution containing a basic substance such as ammonia or amine can be used.
[0020]
Next, as a resist film forming step, a positive chemically amplified resist is applied so as to cover the upper side of the acid generation suppressing layer 3 and dried to form a resist film 4 as shown in FIG. As an exposure process, as shown in FIG. 3, an electron beam 5 is irradiated from the upper surface as an energy beam capable of exposing the resist film 4. The energy beam may be other than an electron beam as long as the resist film 4 can be exposed. The electron beam 5 is irradiated linearly with a constant width. Hereinafter, an area irradiated with the electron beam 5 is referred to as an “irradiation area” 12. The irradiation region 12 is along the gap between the source electrode 2a and the drain electrode 2b when viewed from above, and extends linearly in the direction toward the back of the page. In this example, the electrons of the electron beam 5 once pass through the resist film 4, but when passing through the resist film 4, only the resist is exposed and energy is not lost. The electrons that have once passed through the resist film 4 strike the semiconductor substrate 1 below the resist film 4 and are reflected. The electrons reflected toward the resist film 4 further sensitize the resist film 4. For reference, FIG. 4 shows how electrons are scattered when an electron beam 5 is irradiated in a structure in which a resist film 4 is formed on a semiconductor substrate 1.
[0021]
Whether or not the resist film 4 is exposed is determined by the range of movement of the transmitted and scattered electrons as described above, and therefore the boundary between the photosensitive portion and the non-sensitive region is not actually clear. As shown in FIG. 3, the photosensitive intensity gradually decreases as the distance from the center of the irradiation region 12 increases. However, in FIG. 3, for the convenience of explanation, the photosensitive film is exposed to a degree sufficient to remove the resist film 4 in a later development process. Whether or not to be called a “photosensitive portion” is distinguished depending on whether or not it is present (acid is generated), and the outline of the photosensitive portion is indicated by an outer broken line. Furthermore, even if the generation of acid is suppressed by the acid generation suppressing layer 3 as will be described later, the photosensitive portion is exposed to a degree sufficient to remove the resist film 4 (acid is generated). This portion will be referred to as a highly photosensitive portion 11. Of the photosensitive portion, a portion other than the high photosensitive portion 11 is referred to as a low photosensitive portion 10. As shown in FIG. 6, the width of the region that becomes the high photosensitive portion 11 is narrow, and the width of the region that becomes the low photosensitive portion 10 is relatively wide. As a result, as shown in FIG. 3, the low photosensitive portion 10 surrounds the periphery of the high photosensitive portion 11 in the resist film 4.
[0022]
In order to generate an acid in the photosensitive portion of the resist film 4, the whole is heated as a baking step. By this heating, an acid is originally generated in the low-sensitivity portion 10, but to some extent from the acid generation suppressing layer 3 to the inside of the resist film 4 by the time when this step is performed or during the heating as the baking step. The acid generation inhibitory component penetrates to a depth of 1 to change the resist sensitivity (acid generation amount). In general, the sensitivity characteristic of the resist changes from the curve shown by the solid line in FIG. 7 to the curve shown by the broken line by the action of the acid generation inhibiting component. That is, due to the action of the acid generation inhibiting component, the resist film remains even at a photosensitivity level that usually removes the resist film by exposure.
[0023]
Thus, as shown in FIG. 8, in the resist film 4, the lower portion 4k in which the sensitivity of the resist has changed due to the suppression component and the upper portion 4j that has not changed coexist. In the low photosensitive portion 10 of the upper portion 4j, acid is generated as usual by the baking process, but the generation of acid is suppressed in the low photosensitive portion 10 of the lower portion 4k. On the other hand, since the photosensitive intensity is high in the highly photosensitive portion 11 of the lower part 4k, the amount of acid generated is sufficient to remove the resist film 4 even if the influence of the suppression component is taken into account. Accordingly, the region 13 where the acid is generated to a degree sufficient to remove the resist film 4 has a shape as shown in FIG.
[0024]
Next, as a development step, the resist film 4 is developed with a resist developer. Since the generation of acid is suppressed in a part of the low-sensitivity portion 10 as described above, the development is constant as shown in FIG. Only the region 13 where the acid is generated (photosensitized) is removed. Therefore, as a result of the development, as shown in FIG. 10, a concave portion 8 is formed which is thin at the lower portion and wide at the upper portion.
[0025]
In FIG. 10, the recess 8 is formed so as to penetrate the acid generation suppressing layer 3, but when the acid generation suppressing layer 3 is soluble in the resist developer, the development of the resist film 4 is performed as described above. At the same time, the semiconductor substrate 1 can be exposed on the bottom surface of the recess 8 through the acid generation suppressing layer 3. If the acid generation suppression layer 3 is not soluble in the resist developer, the acid generation suppression layer 3 is developed after the development of the resist film 4.
[0026]
The structure of the resist film 4 shown in FIG. 10 is referred to as a “T-type resist pattern”. By using the concave portion 8 of the T-type resist pattern as a mold and depositing metal from above, a metal layer 6 is formed in the concave portion 8 as shown in FIG. As a material for the metal layer 6, Ni, Au, or the like can be used.
[0027]
By dissolving and removing the resist film 4 and the acid generation suppressing layer 3 as a lift-off process, the resist film 4 and the metal layer 6 formed on the upper side of the resist film 4 are removed, as shown in FIG. Here, the metal layer 6 that has been in the recess 8 remains to form the T-type electrode 7. The TMT electrode 7 can be used to configure a HEMT.
[0028]
(Action / Effect)
In the case of the manufacturing method based on the prior art, the development process is required three times, but in the manufacturing method in the present embodiment, only one or two steps are required. Further, in the case of the manufacturing method based on the prior art, the resist coating and drying steps are required three times, but in the manufacturing method according to the present embodiment, only one time is required. Therefore, by employing the manufacturing method in this embodiment, the number of steps can be reduced, and a semiconductor device including a T-type electrode can be manufactured in a shorter manufacturing time.
[0029]
Before forming the acid generation suppressing layer, a Si ₃ N ₄ film or the like may be formed on the upper surfaces of the source electrode 2a, the drain electrode 2b and the active region in order to increase adhesion and reduce contact resistance. Good. Furthermore, instead of the two layers of the acid generation suppressing layer and the Si ₃ N ₄ film, a film having an acid generation suppressing function as well as an adhesion improvement may be used.
[0030]
Although the material for the T-type electrode is a metal, it is not limited to a metal as long as it is a conductor. For example, a conductor such as polysilicon may be used.
[0031]
(T-shaped electrode shape control)
A method for controlling the shape of the T-type electrode 7 will be described with reference to FIGS. The concave portion 8 of the T-type resist pattern has a wide portion 81 and a root portion 82 as shown in FIG. As shown in FIG. 13, when the acid generation suppressing layer 3 is thinly coated, the depth of penetration of the suppressing liquid into the resist film 4 is small, so that the height of the root portion 82 is low as shown in FIG. Accordingly, the height of the wide portion 81 increases accordingly. As shown in FIG. 15, when the acid generation suppression layer 3 is applied thickly, the depth of the penetration of the suppression solution into the resist film 4 increases, and the height of the root portion 82 is as shown in FIG. The height of the wide portion 81 is reduced accordingly. As described above, the shape of the T-type resist pattern can be controlled by appropriately changing the coating amount of the suppressing liquid or the thickness of the acid generation suppressing layer 3. Therefore, the shape of the T-type electrode finally obtained from the T-type resist pattern can be controlled. Also, the shape of the T-type resist pattern can be controlled by the temperature and time of the heating process.
[0032]
In each of the above embodiments, the example using the acid generation suppressing layer that suppresses the generation of acid has been described. However, the same may be applied even if an acid generation promoting layer that increases the generation of acid is used instead of the acid generation suppressing layer. The shape of the T-type resist pattern can be controlled by applying the above concept. Alternatively, an acid generation control layer that can suppress or increase acid generation may be used.
[0033]
In addition, the said embodiment disclosed this time is an illustration in all the points, Comprising: It is not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and includes all modifications within the scope and meaning equivalent to the terms of the claims.
[0034]
【The invention's effect】
According to the present invention, a T-type resist pattern for a T-type electrode can be produced in a self-aligned manner by the action of the acid generation suppressing layer, so that the number of resist coating and drying steps and development steps can be increased. Thus, a semiconductor device including a T-type electrode can be manufactured in a shorter time than conventional.
[Brief description of the drawings]
FIG. 1 is a first explanatory diagram of a semiconductor device manufacturing method according to a first embodiment of the present invention.
FIG. 2 is a second explanatory diagram of the method of manufacturing the semiconductor device in the first embodiment based on the present invention.
3 is a third explanatory diagram of the semiconductor device manufacturing method according to the first embodiment of the present invention; FIG.
FIG. 4 is an explanatory diagram showing the state of electron scattering, which is a reference in the first embodiment based on the present invention.
FIG. 5 is a first graph showing the relationship between position and photosensitive intensity, which is a reference in the first embodiment based on the present invention.
FIG. 6 is a second graph showing the relationship between position and photosensitive intensity, which is a reference in the first embodiment based on the present invention.
FIG. 7 is a graph showing how the sensitivity of a resist changes for reference in the first embodiment based on the present invention.
8 is a fourth explanatory view of the semiconductor device manufacturing method according to the first embodiment of the present invention; FIG.
FIG. 9 is a fifth explanatory view of the semiconductor device manufacturing method according to the first embodiment of the present invention;
10 is a sixth explanatory view of the semiconductor device manufacturing method according to the first embodiment of the present invention; FIG.
11 is a seventh explanatory view of the semiconductor device manufacturing method according to the first embodiment of the present invention; FIG.
12 is an eighth explanatory view of the semiconductor device manufacturing method according to the first embodiment of the present invention; FIG.
13 is a cross-sectional view showing an example in which an acid generation suppressing layer is thinly formed by the method for manufacturing a semiconductor device in the first embodiment based on the present invention; FIG.
14 is a cross-sectional view of a T-type resist pattern obtained from the state shown in FIG.
FIG. 15 is a cross sectional view showing an example in which an acid generation suppressing layer is formed thick by the method for manufacturing a semiconductor device in the first embodiment based on the present invention;
16 is a cross-sectional view of a T-type resist pattern obtained from the state shown in FIG.
FIG. 17 is a first explanatory view of the semiconductor device manufacturing method based on the conventional technique;
FIG. 18 is a second explanatory view of the semiconductor device manufacturing method based on the prior art.
FIG. 19 is a third explanatory view of the semiconductor device manufacturing method based on the prior art.
FIG. 20 is a fourth explanatory view of the semiconductor device manufacturing method based on the conventional technique;
FIG. 21 is a fifth explanatory diagram of the semiconductor device manufacturing method based on the prior art;
FIG. 22 is a sixth explanatory view of the semiconductor device manufacturing method based on the prior art;
FIG. 23 is a seventh explanatory diagram of the semiconductor device manufacturing method based on the conventional technique;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor substrate, 2a source electrode, 2b drain electrode, 3 acid generation | occurrence | production suppression layer, 4 resist film, 4j upper part, 4k lower part, 5 electron beam, 6 metal layer, 7 T type electrode, 8 recessed part, 9 active region, 10 low Photosensitive portion, 11 highly sensitive portion, 12 irradiated region, 13 (sufficiently acid generated region), 81 wide portion, 82 root portion, 101 Si ₃ N ₄ film, 102 first resist layer, 103 second resist layer, 104 Third resist layer, 105, 107 opening, 106 cavity.

Claims (9)

An acid generation suppressing layer forming step of forming an acid generation suppressing layer containing a component capable of suppressing acid generation in the resist on the surface of the semiconductor substrate;
A resist coating step of coating the resist so as to cover the upper side of the acid generation suppressing layer;
A drying step of drying the applied resist to form a resist film;
An exposure step of irradiating the desired region with energy rays to sensitize the desired region of the resist film;
A baking step of generating an acid in the resist film by heating;
A development step of obtaining a recess by developing the resist film with a resist developer;
A conductor layer forming step of forming a conductor layer inside the recess;
A lift-off process for dissolving and removing the resist film,
A method of manufacturing a compound semiconductor device including a T-type gate electrode . The method for producing a compound semiconductor device including a T-type gate electrode according to claim 1, wherein the acid generation suppressing layer forming step is a step of applying a suppressing liquid containing the component. The method for producing a compound semiconductor device comprising a T-type gate electrode according to claim 1, wherein the acid generation suppressing layer is soluble in the resist developer. An electrode forming step of forming a source electrode and a drain electrode on the surface of the semiconductor substrate so as to be arranged with an active region in between is included before the coating step, and the desired region is located above the active region. Item 4. A method for manufacturing a compound semiconductor device comprising the T-type gate electrode according to any one of Items 1 to 3. The method of manufacturing a compound semiconductor device including a T-type gate electrode according to claim 1, wherein the energy beam is an electron beam. The method of manufacturing a compound semiconductor device including a T-type gate electrode according to claim 1, wherein the conductor layer includes at least one of nickel and gold. The method of manufacturing a compound semiconductor device comprising a T-type gate electrode according to claim 1, wherein the conductor layer forming step is performed by vapor deposition. An acid generation control layer forming step of forming an acid generation control layer containing a component capable of controlling the generation of acid in the resist on the surface of the semiconductor substrate;
A resist coating step of coating the resist so as to cover the upper side of the acid generation control layer;
A drying step of the resist film and drying the applied the resist,
An exposure step of irradiating the desired region with energy rays to sensitize the desired region of the resist film;
A baking step of generating an acid in the resist film by heating;
A development step of obtaining a recess by developing the resist film with a resist developer;
A conductor layer forming step of forming a conductor layer inside the recess;
A lift-off step of dissolving and removing the resist film,
A method for manufacturing a compound semiconductor device comprising a T-type gate electrode , wherein the shape of the recess obtained from the resist film is controlled by controlling the thickness of the acid generation control layer and the temperature of the acid generation control layer. 9. The method of manufacturing a compound semiconductor device comprising a T-type gate electrode according to claim 8, wherein the acid generation control layer is soluble in the resist developer.

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