JP4041045B2 - Ultrasonic flip chip bonding method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for ultrasonic flip-chip bonding by which the deformation of a bump can be suppressed by efficiently transmitting ultrasonic vibrations to the joint of the bump and, in addition, a satisfactory bonding strength can be obtained. <P>SOLUTION: In the method for ultrasonic flip-chip bonding, a stress is first applied to the bump without impressing any ultrasonic vibration upon the bump. When a first mean bump stress P1 which is lower than the yield point of the bump as a bulk material is reached, the impression of an ultrasonic vibration having an amplitude A1 is started. After a second mean bump stress P2 which is also lower than the yield point of the bump as the bulk material is reached, the impression of the ultrasonic vibration having the amplitude A1 is performed for a predetermined period of time while the stress P2 is maintained. Then the further increase of the stress applied to the bump is started and, at the same time, the impression of another ultrasonic vibration having an amplitude A2 is started. After a third mean bump stress P3 which is equal to or higher than the yield point of the bump as the bulk material is reached, the impression of the ultrasonic vibration having the amplitude A2 is performed for a predetermined period of time while the stress P3 is maintained. <P>COPYRIGHT: (C)2005,JPO&amp;NCIPI

Description

  The present invention relates to an ultrasonic flip chip bonding method.

  Conventionally, for example, as a method of mounting a semiconductor chip on a circuit board or package, there is a wire bonding bonding method for obtaining electrical connection by bonding both ends of an ultrafine wire to an electrode of a semiconductor chip and an electrode or package of the circuit board. In recent years, flip chip bonding methods with higher production efficiency have been used.

  The flip chip bonding method is a mounting method in which an electrode of a semiconductor chip and an electrode such as a circuit board are bonded by a bump which is a conductive connecting member. Since the flip chip bonding method can collectively bond a plurality of bonding points via bumps, the production efficiency is basically higher than that of the wire bonding bonding method in which the connection points are bonded one by one with the fine wire in order. Has the advantage of high. Further, in the flip chip bonding method, since the arrangement of the electrodes that are the bonding terminals is not limited to the periphery of the semiconductor chip, the number of bonding terminals can be greatly increased, and the mounting area of the semiconductor chip can be reduced, Also, the wiring length of the circuit can be shortened. Therefore, the flip chip bonding method is suitable for high-density mounting, high-speed semiconductor chip mounting, and the like.

  Specific methods of this flip chip bonding method include a method of bonding bumps and circuit board electrodes through an intermediate material such as a conductive paste, a method of directly bonding by thermocompression bonding or ultrasonic thermocompression bonding, etc. There is. The latter direct bonding method can be omitted because it can save the intermediate material, has a small number of steps, and the combined ultrasonic method has the advantage that the bonding time can be shortened. Yes.

  However, in the thermocompression bonding using ultrasonic waves, that is, the ultrasonic flip chip bonding method, the bump is first flattened by applying a weak ultrasonic vibration while a constant load is applied to the bump, and then the bump is flattened. Although the ultrasonic vibration stronger than the ultrasonic vibration used in the application is applied and the bumps and the circuit board electrodes are bonded to each other, the bonding strength is not sufficient and the electrical connection reliability is poor. . Note that the bump flattening means that the dimensions of the bumps provided between the electrodes of the semiconductor chip and the circuit board are microscopically different, so that ultrasonic vibration is applied with a load applied. By doing this, it means an operation of giving a slight plastic deformation to align the dimensions of a plurality of bumps.

  As a conventional technique for solving the above-described problem, there is a technique in which a load applied to a bump and an output of an applied ultrasonic wave are increased stepwise to join the bump and the connection terminal (see Patent Document 1). .

JP 11-102933 A

  FIG. 15 is a diagram showing the relationship between the load applied to the bump and the ultrasonic output applied to the bump in the conventional ultrasonic flip-chip bonding method. FIG. 15A shows the load applied to the bump, FIG. 15B shows the output of the ultrasonic wave applied to the bump, and the horizontal axis of FIG. 15A and FIG. The times shown are shown corresponding to each other. In the conventional bonding method shown in FIG. 15, load application to the bump and application of ultrasonic waves are started simultaneously, and the output of the applied ultrasonic wave is increased step by step so as to correspond to the step increase in load. Join.

  According to the joining method shown in FIG. 15, since the load and the application of the ultrasonic wave are started at the same time, the ultrasonic wave is applied in a state where the tip of the bump has not been sufficiently crushed. That is, since the ultrasonic wave is applied in a state where the bump and the electrode of the circuit board are hardly bonded, the bonding tool and the semiconductor chip slide with the ultrasonic wave oscillation from the ultrasonic vibrator, so that the semiconductor chip Easily move, and the relative position between the semiconductor chip and the circuit board shifts. If the load is further increased and the ultrasonic output is increased in such a state, there is a problem in that the contact portion between the bump and the electrode of the circuit board is joined with a positional deviation.

  In addition, since the load and the ultrasonic output are increased stepwise at the same time, if they are excessive, mortar-shaped breakage, which is a kind of crack, may occur in the electrodes of the semiconductor chip. Furthermore, if the load increased in steps and the ultrasonic output are excessive, the bumps may be crushed so that the circuit board electrodes may be damaged, and the slippage between the bonding tool and the semiconductor chip may occur. There are problems such as scratches caused by ultrasonic vibration on the contact surface of the semiconductor chip with the bonding tool.

  An object of the present invention is to provide an ultrasonic flip-chip bonding method capable of suppressing the amount of deformation of a bump and obtaining a good bonding strength by efficiently transmitting ultrasonic vibration to the bonding portion of the bump. It is.

The present invention relates to an ultrasonic flip chip that joins an electrode formed on a semiconductor chip and an electrode formed on a circuit board by applying ultrasonic vibration with a bump interposed between the electrodes. In the joining method,
The bumps provided on the semiconductor chip are brought into contact with the electrodes formed on the circuit board, and by increasing the load applied to the semiconductor chip, the average bump stress applied to the bumps is increased in a range below the yield point of the bumps . The first step;
A predetermined first amplitude A1 from when the average bump stress reaches a predetermined first average bump stress P1 less than the bump yield point to when a predetermined second average bump stress P2 less than the bump yield point is reached. A second step of applying ultrasonic vibrations to the bumps;
Ultrasonic vibration having a first amplitude A1 the predetermined is applied to the bumps, before the average bump stress reaches the yield point of the bump, a third step of applying ultrasonic vibration having a second amplitude A 2 of predetermined bump When,
And a fourth step of applying ultrasonic vibration having a predetermined second amplitude A2 to the bump in a state where the average bump stress is held at a predetermined third average bump stress P3 equal to or higher than the yield point of the bump. This is an ultrasonic flip chip bonding method.

The present invention is also characterized in that an amplitude ratio (A2 / A1) of the second amplitude A2 to the first amplitude A1 is less than 1.0.
In the invention, it is preferable that the amplitude ratio (A2 / A1) is 0.80 or less.

  According to the present invention, the sum of the time of the second step and the time of the third step for applying the ultrasonic vibration having the first amplitude A1 is not less than 0.3 seconds and not more than 0.9 seconds. It is characterized by.

Further, the present invention is characterized in that the first amplitude A1 is 5 μm or less.
In the invention, it is preferable that the bump is made of a material having gold (Au) as a main component.

According to the present invention, the first amplitude A1 and the second average bump stress P2 in the state of the first average bump stress P1 to the second average bump stress P2 in which the average bump stress applied to the bump is less than the yield point as the bulk material of the bump . Ultrasonic waves having two amplitudes A2 are applied to the bumps, and then the second bumps A2 are set in a state where the average bump stress applied to the bumps is a third average bump stress P3 that is equal to or higher than the yield point of the bump bulk material. The ultrasonic wave which has is applied to a bump, and the electrode of a semiconductor chip and the electrode of a circuit board are joined by a bump.

  In such a joining method, ultrasonic waves are not applied to the bumps until the stress applied to the bumps reaches the first average bump stress P1 and the bumps are crushed to some extent to have a contact area with the electrodes of the circuit board. Therefore, when application of ultrasonic waves is started, slippage between the bonding tool and the semiconductor chip hardly occurs, and occurrence of a displacement of the bonding position between the bump and the circuit board electrode can be prevented. In addition, since the ultrasonic wave is applied in a state where the load stress on the bump is less than the yield point as the bulk material of the bump, the first average bump stress P1 to the second average bump stress P2, the bump is unnecessarily crushed. The ultrasonic energy is efficiently transmitted to the joint between the bump and the circuit board, and a sufficient new surface can be generated. Furthermore, since the third average bump stress P3 above the yield point as the bulk material of the bump is applied in a state where a sufficiently new surface is generated, the bump is appropriately deformed and bonded to the electrode of the circuit board. Can obtain a high bonding strength.

  Further, according to the present invention, the amplitude ratio (A2 / A1) of the second amplitude A2 to the first amplitude A1 is less than 1.0, preferably 0.80 or less, and the bump is loaded with stress above its yield point. The amplitude A2 of the applied ultrasonic wave is set to be smaller than the amplitude A1 of the applied ultrasonic wave when stress below the yield point as the bulk material of the bump is applied. Is done. Therefore, when the bumps are bonded to the electrodes of the circuit board, they are not crushed unnecessarily, so that the circuit board is prevented from being damaged.

  Further, according to the present invention, the time sum of the second and third steps for applying the ultrasonic vibration having the first amplitude A1 is set to be in the range of 0.3 to 0.9 seconds. Sufficient joint strength and high production efficiency can be achieved.

  Further, according to the present invention, when the first amplitude A1 is 5 μm or less and a stress less than the yield point as the bulk material of the bump is applied to the bump, an ultrasonic wave having a suitable range of amplitude is applied. Therefore, it is possible to prevent the occurrence of displacement in the joint portion between the bump and the electrode of the circuit board.

  Further, according to the present invention, since a material mainly composed of Au is used for the bumps, the capacity of the bonding tool that applies stress to the bumps can be reduced, and a bonding portion with high electrical connection reliability can be achieved. Can be obtained.

  1 to 4 are diagrams showing an outline of an ultrasonic flip chip bonding method according to an embodiment of the present invention.

  In FIG. 1, a bonding tool 3 disposed so as to contact a semiconductor chip 1, bumps 2 provided on the electrodes of the semiconductor chip 1, and a surface 7 opposite to the surface 6 on which the bumps 2 of the semiconductor chip 1 are provided. And a circuit board 5 on which the electrodes 4 are formed.

  The semiconductor chip 1 is a semiconductor in which an integrated circuit is formed or an integrated circuit is formed. The semiconductor chip 1 is made of, for example, silicon (Si), and its dimensions are 10 mm square and 0.1 mm in thickness. The electrode formed on the semiconductor chip 1 is not shown in the figure, but a conductive layer made of, for example, aluminum (Al) -Si is formed on the surface 6 of the semiconductor chip 1 by sputtering or the like. For example, the dimensions of the electrodes formed on the semiconductor chip 1 are 65 μm square and 1 μm thick.

  The bumps 2 are provided by electroplating Au on the electrodes formed on the semiconductor chip 1. For example, the bumps 2 are 70 μm square and 20 μm high. Although a plurality of bumps 2 are provided simultaneously by electrolytic plating, the individual dimensions usually have some variation.

  The bonding tool 3 incorporates an ultrasonic head including a vibrator capable of oscillating ultrasonic waves, and has a plurality of holes formed on the surface bonded to the semiconductor chip 1 and is connected to a suction means (not shown). Thus, the atmosphere can be sucked from the hole, and the semiconductor chip 1 can be sucked and held by this. Although not shown in the figure, the joining tool 3 is provided with a driving means so as to be able to move in the direction approaching / separating from the circuit board 5 (vertical direction on the paper surface of FIG. 1).

  The circuit board 5 is an organic substrate made of an insulating material such as a glass cloth epoxy resin, an aramid fiber nonwoven fabric epoxy resin, or a liquid crystal polymer resin. For example, the circuit board 5 is 15 mm square and has a thickness of 0.1 mm. . The electrode 4 formed on the circuit board 5 is formed by sequentially plating nickel (Ni) and Au on a copper (Cu) wiring formed on the circuit board 5. The outermost Au plating of the electrode 4 is applied to a thickness of 0.5 μm by, for example, an electroless plating method. The circuit board 5 is placed on a stage not shown.

  With the semiconductor chip 1 held by the bonding tool 3, the electrodes 4 of the circuit board 5 placed on the stage and the bumps 2 provided on the semiconductor chip 1 are positioned so as to correspond to each other, and then driving means The semiconductor chip 1 is moved in the direction approaching the circuit board 5, that is, lowered.

  In FIG. 2, the bump 2 and the electrode 4 of the circuit board 5 are brought into contact with each other, and the semiconductor chip 1 is further lowered by the driving means until the stress applied to the bump 2 reaches the first average bump stress P1. When the stress applied to the bump 2 reaches the predetermined first average bump stress P1, the ultrasonic vibration having the predetermined first amplitude A1 by operating the ultrasonic vibrator is bumped through the semiconductor chip 1. 2 is applied.

  Here, the average bump stress is an apparent stress applied to the bump 2 and is defined as follows. FIG. 5 is a diagram for explaining the average bump stress. FIG. 5 shows one of the bumps 2 provided on the semiconductor chip 1. As described above, the shape of the bump 2 is, for example, a rectangular parallelepiped, and the surface that contacts the electrode 4 of the circuit board 5 is referred to as a bottom surface 8 for convenience.

When the number of bumps 2 provided on the semiconductor chip 1 is B, the load applied to the bumps 2 by the bonding tool 3 provided with the driving means via the semiconductor chip 1 is F, and the area of the bump bottom surface 8 is S. The average bump stress P, which is an apparent stress applied to the bump 2, is given by the equation (1). The load F can be detected by providing the joining tool 3 with, for example, a load cell.
P = F / (S × B) (1)

  Returning to FIG. 3, in FIG. 3, the stress applied to the bump 2 is increased from the first average bump stress P <b> 1 until reaching the second average bump stress P <b> 2, which is a stress larger than the first average bump stress P <b> 1. The ultrasonic vibration having the first amplitude A1 is applied to the bump 2 while being increased and held at the second average bump stress P2, and the stress applied to the bump 2 is then applied from the second average bump stress P2. Is further increased to the third average bump stress P3, and the ultrasonic vibration having the predetermined second amplitude A2 is applied to the bump 2 while maintaining the third average bump stress P3.

  In FIG. 4, the application of ultrasonic vibration to the bump 2 is stopped, the suction of the semiconductor chip 1 by the bonding tool 3 is stopped, and the bonding tool 3 is raised to release the load on the semiconductor chip 1 and the bump 2.

  FIG. 6 is a timing chart for explaining the ultrasonic flip chip bonding method of the present invention. The ultrasonic flip chip bonding method will be described in more detail with reference to FIG. FIG. 6A is a timing chart showing the average bump stress P applied to the bump 2. FIG. 6B is a timing chart showing the amplitude of the ultrasonic vibration applied to the bump 2. FIG. 6C is a timing chart showing a change in the relative position of the welding tool 3 with respect to the circuit board 5, that is, vertical movement.

  As shown in FIG. 1, the bonding tool 3 that holds the semiconductor chip 1 by suction is lowered, and the bump 2 provided on the semiconductor chip 1 at the time A on the time axis, which is the horizontal axis of the timing chart, The contact with the electrode 4 formed on the substrate 5 is started. After the bump 2 and the electrode 4 start to contact at time A, the lowering speed of the bonding tool 3 is lowered and the lowering is continued, that is, the average bump stress P applied to the bump 2 is increased. At time B, the stress reaches a predetermined first average bump stress P1.

  From time A to time B when the bump 2 is brought into contact with the electrode 4 and the stress applied to the bump 2 is increased until the first average bump stress P1 is reached is referred to as a first step. In the first step, the ultrasonic vibration is not applied to the bump 2 yet, and the bump 2 is flattened in a state where the ultrasonic vibration is not applied.

  FIG. 7 is a diagram showing a state in which there is a variation in bump height, and FIG. 8 is a diagram showing a change in stress value of each bump 2 in the first step. As described above, the bumps 2 formed by plating usually have slight variations in individual heights H. FIG. 7 illustrates four bumps 2a, 2b, 2c, and 2d having different heights H, and their planarization behavior will be described. Here, the height Ha of the bump 2a, the height Hb of the bump 2b, and the height Hc of the bump 2c are different from each other, and the height Hd of the bump 2d is equal to the height Ha of the bump 2a. And Therefore, the behavior of the bump 2d is represented by the bump 2a having the same height.

  FIG. 8 described above shows a change in stress value in the vicinity of the surface in contact with the electrode 4 of each bump 2a, 2b, 2c, and a dashed line 11 connecting the circles represents a change in the stress value of the bump 2a. The dashed line 12 connecting represents the stress value change of the bump 2b, and the solid line 13 connecting Δ represents the stress value change of the bump 2c.

  The contact between the bump 2 and the electrode 4 in the first step is started by the bump 2c having the highest height. When the bump 2c is in contact with the electrode 4, the other bumps 2b, 2c, 2d are not in contact with the electrode 4, so that the entire load applied by the bonding tool 3 is borne only by the bump 2c. As shown by the line 13, the bump stress value of the bump 2 c exceeds the yield point as the load increases, that is, the bonding tool 3 descends, and the bump 2 c is plastically deformed.

  Since the height Hc of the plastically deformed bump 2c is reduced, the bump 2b having the next highest height after the bump 2c comes into contact with the electrode 4 as the bonding tool 3 is further lowered. Since the bump 2b also comes into contact with the electrode 4, the load applied by the bonding tool 3 is borne by the bump 2c and the bump 2b, so that the bump stress value of the bump 2c is temporarily reduced. Thereafter, as the load applied by the bonding tool 3 increases, the bump stress values of the bumps 2c and 2b both increase. Similarly to the bump 2c, the bump stress value of the bumps 2c and 2b increases. Beyond the yield point as a bulk material, plastic deformation causes a reduction in height. As the bonding tool 3 is further lowered, the bumps 2a and 2d having a low height come into contact with the electrode 4, and the bump stress values behave in the same manner as in the case of the bumps 2c and 2b.

  As described above, the bump 2 having a high height among the bumps 2 is plastically deformed and crushed, so that the height of the entire bump 2 is made substantially uniform. At this time, in the bumps 2c and 2b having a high height, the bump stress value exceeds the yield point of the bump 2 as a bulk material, but the bumps 2c and 2b having a high height are crushed so as to come into contact with the electrode 4. The large number of bumps 2a and 2d having a low height only bear a bump stress value that is less than the yield point as the bulk material of the bump 2, so the apparent stress value of the entire bump at time B is The first average bump stress P1 less than the yield point as the bulk material of the bump 2 is obtained.

  In the first step, a certain contact area is obtained between the bump 2 and the electrode 4 by causing plastic deformation in the bump 2 in a state where ultrasonic vibration has not yet been applied to the bump 2. When ultrasonic vibration is applied, a corresponding frictional force generated between the bump 2 and the electrode 4 becomes a resistance, and the positional deviation between the bump 2 and the electrode 4 is prevented.

  Returning to FIG. 6, at time B, application of ultrasonic vibration having a predetermined first amplitude A <b> 1 to the bump 2 is started by the bonding tool 3 through the semiconductor chip 1. After the application of ultrasonic vibration having the first amplitude A1 is started, that is, after time B, the average bump stress P reaches a predetermined second average bump stress P2 that is less than the yield point as the bulk material of the bump 2. Until the welding tool 3 is gradually lowered. At this time, the application of ultrasonic vibration having the first amplitude A1 is continued.

  The time when the average bump stress P reaches the second average bump stress P2 is C, and the stress applied to the bump 2 increases from the first average bump stress P1 to the second average bump stress P2, and has the first amplitude A1. The period from time B to time C when the ultrasonic vibration is applied is referred to as a second step.

  From time C to time D, the stress applied to the bump 2 is kept constant at the second average bump stress P2 by controlling the lowering operation of the bonding tool 3, and the bump 2 has the second step and Similarly, ultrasonic vibration having the first amplitude A1 is applied. This time C to time D is called the third step.

  In the third step, since the ultrasonic vibration is applied in a state where stress less than the yield point as the bulk material of the bump 2 is applied to most of the bumps 2, the applied ultrasonic energy is applied to the bumps 2. It is efficiently transmitted to the contact surface between the bump 2 and the electrode 4 without being dispersed by plastic deformation. Therefore, a new surface can be generated at the interface between the bump 2 and the electrode 4 to be joined.

  Also, through the second step and the third step, the stress applied to the bump 2 and the applied ultrasonic vibration remove the contaminated layer on the contact surface between the bump 2 and the electrode 4, and Adhesion on the new surface proceeds to form a joint surface.

  The first amplitude A1 of the ultrasonic vibration applied to the bump 2 through the second step and the third step is preferably set to 5 μm or less. FIG. 9 is a diagram illustrating the influence of the first amplitude A1 of the ultrasonic vibration on the bonding strength of the bump 2. The data shown by the line 14 in FIG. 9 is obtained by changing the magnitude of the first amplitude A1 of the ultrasonic vibration applied to the bump 2 in the second and third steps of the ultrasonic flip chip bonding method described above. The results are obtained by performing a shear tensile test on the mounted components after bonding, obtaining the shear strength per bump, and observing the fracture surface after the shear tensile test to determine the presence or absence of misalignment. As shown in FIG. 9, when the first amplitude A1 exceeds 5 μm, although the shear strength is high, positional deviation occurs, and the joining accuracy becomes poor. Therefore, the first amplitude A1 is set to 5 μm or less.

  The time sum T1 (= t1 + t2) between the time t1 from the time B to the time C in the second step and the time t2 from the time C to the time D in the third step is 0.3 seconds or more and 0.9 seconds. The following is preferable. FIG. 10 is a diagram showing the influence of the time sum T1 of the second and third steps on the bonding strength of the bump 2. The data indicated by the line 15 in FIG. 10 indicates that the second and third steps of the ultrasonic flip chip bonding method described above are performed by changing the length of the time sum T1 and bonding the mounted components after bonding. A shear tensile test is performed to determine the shear strength per bump. As shown in FIG. 10, when the time sum T1 is less than 0.3 seconds, the shear strength is low. On the other hand, when the time sum T1 exceeds 0.9 seconds, a sufficient shear strength can be obtained. However, even if the time is extended, the shear strength is in a saturated state, which causes a reduction in production efficiency due to a longer time. Therefore, the time sum T1 is set to 0.3 to 0.9 seconds.

  After the third step, after time D, the stress applied to the bump 2 is further increased. At this time, at the same time as the increase in stress is started, the amplitude of the ultrasonic vibration applied to the bump 2 is reduced to a predetermined second amplitude A2. The amplitude ratio (A2 / A1) of the second amplitude A2 to the first amplitude A1 is set to be less than 1.0, preferably 0.80 or less.

  When the amplitude ratio (A2 / A1) is 1.0 or more, a large amplitude ultrasonic vibration is applied in a state where the stress applied to the bump 2 is large, and therefore the bump 2 is excessively plastically deformed, that is, crushed. Therefore, there are problems such as cracks in the bumps or damage to the electrodes 4 of the circuit board 5. Therefore, the amplitude ratio (A2 / A1) is set to less than 1.0.

  At time E, the stress applied to the bumps 2 is equal to or higher than the yield point of the bumps 2 and reaches a predetermined third average bump stress P3. When the stress applied to the bump 2 reaches the third average bump stress P3, by controlling the descending operation of the bonding tool 3 again, the third average bump stress P3 is kept constant, and the second amplitude with respect to the bump 2 is maintained. The application of ultrasonic vibration having A2 is continued.

  The step of applying ultrasonic vibration having the second amplitude A2 in a state where the stress applied to the bump 2 from the time E to the time F is held at the third average bump stress P3 is the essential first step of the present invention. Although there are four steps, in this embodiment, the time to increase the stress applied to the bump 2 from the second average bump stress P2 to the third average bump stress P3 while applying ultrasonic vibration having the second amplitude A2. A preliminary step from D to time E is also included in the fourth step.

  Therefore, as a mode of the fourth step, even at the time D, a timing chart in which the stress applied to the bump 2 is suddenly increased from the second average bump stress P2 to the third average bump stress P3. Good.

  In the fourth step, the portion that is not sufficiently bonded up to the third step is fixed. In this fourth step, along with the application of ultrasonic vibration, by applying a stress above the yield point of the bump 2 as a bulk material, the bump 2 is deformed, that is, stretched and deformed at the interface between the bump 2 and the electrode 4. This is a step of adhering and adhering metal surfaces to each other to further improve the bonding strength.

  FIG. 11 is a diagram illustrating the influence of the second amplitude A2 of the ultrasonic vibration on the bonding strength of the bump 2. In the fourth step of the ultrasonic flip chip bonding method, the data shown by the line 16 shown in FIG. 11 indicates the magnitude of the second amplitude A2 of the ultrasonic vibration applied to the bump 2 in the fourth step of the ultrasonic flip chip bonding method. Bonding is performed, and the mounted parts after bonding are subjected to a shear tensile test to determine the shear strength per bump, and the fracture surface after the shear test and the semiconductor chip 1 are observed to check for scratches and cratering. Represents the result obtained.

  As shown in FIG. 11, there is almost no change in shear strength due to the fluctuation of the second amplitude A2. This is because, in the plastic deformation region above the yield point as the bulk material of the bump 2, even if ultrasonic vibration having an amplitude of a certain level or more is applied, the contact surface between the bonding tool 3 and the semiconductor chip 1 is applied. Since slip occurs, it is considered that the amplitude of the ultrasonic vibration is attenuated by this slip.

  When the ultrasonic vibration having a large amplitude of 5 μm or more is applied even though slippage occurs on the contact surface between the bonding tool 3 and the semiconductor chip 1, scratches are generated on the contact surface of the semiconductor chip 1. In addition, cratering occurs on the electrode surface of the semiconductor chip 1. Therefore, as described above, when the appropriate magnitude of the second amplitude A2 is expressed by the amplitude ratio (A2 / A1) with respect to the first amplitude A1, it is preferably less than 1.0, and scratches and cratering are generated. From the viewpoint of completely preventing the amplitude ratio, the amplitude ratio is more preferably 0.80 or less.

  Further, the time sum T2 (= t3 + t4) of the time t3 from the time D to time E of the preliminary step and the time t4 from the time E to time F of the main step, that is, the time T2 of the fourth step is 0.3 seconds. As mentioned above, it is preferable that it is 0.7 second or less. FIG. 12 is a diagram illustrating the influence of the time T2 of the fourth step on the bonding strength of the bump 2. The data shown by the line 17 shown in FIG. 12 represents the result of obtaining the shear strength in the same manner as in FIG. As shown in FIG. 12, when the time sum T2 is less than 0.3 seconds, the shear strength is low. On the other hand, when the time T2 exceeds 0.7 seconds, the shear strength tends to decrease. Therefore, the time T2 was set to 0.3 to 0.7 seconds.

  At time F, the application of ultrasonic vibration to the bumps 2 is stopped, the suction of the semiconductor chip 1 by the bonding tool 3 is stopped, the rapid rise of the bonding tool 3 is started, and the bonding operation is finished.

  FIG. 13 is a diagram showing changes in stress values of individual bumps 2. Although FIG. 8 shows the change in the stress value of each bump 2 in the first step, FIG. 13 shows the change in the stress value of each bump 2 up to the fourth step. In FIG. 13, in order to emphasize the change of the stress value, the time axis is shown deformed with respect to the time axis of FIG.

  Since the first step has been described above, it will be omitted. From time B to time C, which is the second step, the bump stress values of the high bumps 2b, 2c are the bump stress values above the yield point, but the bump heights of the low bumps 2a, 2d, which are the majority of the bumps. Is a bump stress value less than the yield point as the bulk material of the bump 2, and the second average bump stress P2 less than the yield point as the bulk material of the bump 2 from the first average bump stress P1 less than the yield point. The increase up to is almost due to an increase in the bump stress value of the bumps 2a and 2d.

  Since the second average bump stress P2 is kept constant from time C to time D, which is the third step, the individual bump stress values hardly change.

  From time D to time E, which is a preliminary step in the fourth step, the average bump stress P is changed from the second average bump stress P2 less than the yield point to the third average bump greater than or equal to the yield point as the bulk material of the bump 2. Since the stress is increased to P3, the individual bump stress values, particularly the bump stress values of the bumps 2a and 2d having a low height which were less than the yield point as the bulk material of the bump 2, are increased, and all of them are caused while causing slight fluctuations. The stress value of the bump becomes a state equal to or higher than the yield point of the bump 2 as a bulk material. In the fourth step, the third average bump stress P3 is kept constant from time E to time F, which is the main step, and therefore, the individual bump stress values hardly change.

  Hereinafter, the first to third average bump stresses P1, P2, and P3 set in the present embodiment will be described. The first to third average bump stresses P1, P2, and P3 are set based on the yield point of the bump 2, and when the yield point of the bump 2 as a bulk material is σy, the magnitude relationship is P3 ≧ σy> P2 > P1. Therefore, although the absolute value of the average bump stress is set to a different value according to the material constituting the bump 2, particularly the yield point σy as the bulk material of the bump 2, Au in this embodiment is used as the bump 2 material. Regarding the case, the first to third average bump stresses P1, P2 and P3 are exemplified as follows. The first average bump stress P1 is preferably 15 to 20 MPa, the second average bump stress P2 is preferably 40 to 70 MPa, particularly 60 MPa, and the third average bump stress P3 is 80 to 120 MPa, particularly 90 MPa. Is preferred.

  If the first average bump stress P1 is a value smaller than the preferred value, for example, 10 MPa, the bump 2c having a partly high height only abuts against the electrode 4 of the circuit board 5 and is plastically deformed. Since the bump 2b cannot be plastically deformed by being brought into contact with the electrode 4 of the circuit board 5 and the bump height is not flattened, ultrasonic vibration having the first amplitude A1 is applied in the second step. In such a case, misalignment occurs and yield decreases.

  On the contrary, if the first average bump stress P1 is larger than the preferable value, for example, 50 MPa, all the bumps 2 come into contact with the electrodes 4 of the circuit board 5 and are plastically deformed, that is, crushed. When the ultrasonic vibration having the first amplitude A1 is applied, the effect of the ultrasonic vibration is not sufficiently exhibited, the bonding becomes insufficient, and the bonding strength is lowered.

  If the second average bump stress P2 is a value smaller than the preferable value, for example, 35 MPa, all the bumps 2 can be brought into contact with the electrodes 4 of the circuit board 5, but the bump 2a having a particularly low height is used. , 2d cannot be plastically deformed to the extent that it can be smoothed, so that even when ultrasonic vibration is applied for bonding, a sufficient bonding area cannot be obtained and the bonding strength decreases. On the contrary, if the second average bump stress P2 is a value larger than the preferable value, for example, 85 MPa exceeding the yield point, all the bumps 2 are crushed more than necessary, and the crushed bumps 2 are more than necessary. Since sonic vibration is applied, the junction yield such as damage to the semiconductor chip 1 is reduced.

  If the third average bump stress P3 is a value smaller than the preferred value, for example, 70 MPa smaller than the yield point of the bump 2 as a bulk material, sufficient bonding strength cannot be obtained. On the contrary, if the third average bump stress P3 is a value larger than the preferable value, for example, 140 MPa that greatly exceeds the yield point of the bump 2 as a bulk material, all the bumps 2 are greatly deformed, and the tension of the bumps 2 is increased. In a fracture region that is higher than the strength, further deformation is difficult. When ultrasonic vibration is applied in a state where such a large average bump stress is applied, the bonding property between the bump 2 and the electrode on the semiconductor chip 1 side is lowered, and the electrical connection reliability is lowered. That is, since an excessive load is applied to the bonding tool 3 that holds the semiconductor chip 1 by suction due to a large load, the movement in the ultrasonic vibration application direction is restricted, and as a result, the electrodes of the semiconductor chip 1 are damaged.

  However, the fourth step of applying ultrasonic vibration with an average bump stress that is equal to or higher than the yield point as the bulk material of the bump 2 is applied to the oxide film or impurity layer on the contact surface between the bump 2 and the electrode 4. Further, it is an indispensable process for removing and increasing deformation of the bump 2 to widen the bonding area and to obtain a sufficient bonding strength. As described above, the second amplitude A2 of the ultrasonic vibration to be applied is applied in the second and third steps under the condition that requires an average bump stress load equal to or higher than the yield point as the bulk material of the bump 2 as described above. By setting the ultrasonic vibration to be smaller than the first amplitude A1, the semiconductor chip 1 can be prevented from being damaged.

  FIG. 14 is a schematic sectional view showing the shape of the bump 2 before and after joining. FIG. 14A shows an undeformed state before joining, and FIG. 14B shows a state after being subjected to stress and ultrasonic vibration, that is, after joining. With reference to FIG. 14, the deformation | transformation behavior of the bump 2 in the ultrasonic flip chip joining method of this invention is demonstrated.

  When considering the deformation of the bump 2 in a cross section in a direction perpendicular to the surface on which the bump 2 of the semiconductor chip 1 is provided as shown in FIG. 14, the deformation area of the bump 2 is divided into three areas I, II, and III. Broadly divided. The region I is a region that is the widest on the contact surface with the electrode of the semiconductor chip 1 and the contact surface with the electrode 4 of the circuit board 5 and is formed so as to narrow toward the center in the thickness direction of the bump 2. This is a region in which deformation is suppressed by friction due to contact with the electrodes of the semiconductor chip 1 and contact with the electrodes 4 of the circuit board 5. The region II is a main deformation region that receives a large shear strain and is formed in a substantially X shape that connects the diagonals of the cross section of the substantially rectangular bump 2. The region III is the widest region on the free side where neither the electrode of the semiconductor chip 1 nor the electrode 4 of the circuit board 5 comes into contact, and is formed so as to narrow toward the center in the width direction of the bump 2, and the strain is too large. It is an area that deforms almost uniformly.

  When stress is applied to the bump 2 by the movement of the welding tool 3, the region I is prevented from being deformed by friction with the electrode surface as described above, and the diagonal portion where the stress is concentrated is caused to slip diagonally. Region II is formed. In the region II, the yield of the bump 2 as a bulk material progresses due to the slip deformation, while the deformation is suppressed in the region I. Therefore, in the region II, the large shear deformation occurs due to the large shear strain, and the bump 2 as a whole It transforms into a barrel shape.

  In the ultrasonic flip chip bonding method, the bump 2 is deformed as described above by the load applied by the bonding tool 3, and a shearing force is applied to the deformation region I of the bump 2 by applying ultrasonic vibration. A slip is generated, and a new surface is formed on the bump 2 by the slip deformation, and the bump 2 and the electrode 4 of the circuit board 5 are adhered.

  Examples of the present invention will be described below. A circuit board 5 on which the bonding tool 3, the semiconductor chip 1, the bumps 2 and the electrodes 4 shown in FIGS. That is, a Si chip having a size of 10 mm square and a thickness of 0.1 mm is prepared for the semiconductor chip 1, and an electrode made of Al—Si having a dimension of 65 μm square and a thickness of 1 μm is formed on one surface thereof. did. The bumps 2 were provided on the electrodes of the semiconductor chip 1 by electroplating Au so that the dimensions were 70 μm square and the height was 20 μm. As the circuit board 5, a glass cloth epoxy resin substrate having a size of 15 mm square and a thickness of 0.1 mm was prepared, and Ni and Au were sequentially plated on a Cu wiring on one surface to form an electrode.

Example 1
In Example 1, the appropriate value of the first average bump stress P1, which is the reached value of the load stress on the bump 2 where the second step is started, was examined. When a stress load is applied to the bump 2 and the first average bump stress P1 reaches 10, 20, and 50 MPa, ultrasonic vibration having a first amplitude A1 = 5 μm is applied to the bump 2. After that, when the load stress on the bump 2 reached the second average bump stress P2, the application of ultrasonic vibration to the bump 2 was stopped, and the bonding tool 3 was raised to release the load stress. In Example 1, the second average bump stress P2 was constant at 60 MPa. Therefore, although the time t1 of the second step has a different value for each stress level selected as the first average bump stress P1, the main subject of the evaluation is misalignment, and therefore the effect of the difference in time t1 on the misalignment. Was judged small and ignored.

  The joint test piece of the semiconductor chip 1 and the circuit board 5 interposing the bump 2 thus produced is subjected to a shear tensile test, the fracture surface after the shear tensile test is visually observed, and the joint portion between the bump 2 and the electrode The quality was evaluated by the presence or absence of occurrence of misalignment.

  The results are shown in Table 1. When the first average bump stress P1 was 10 MPa, occurrence of misalignment was confirmed. When the first average bump stress P1 was 20 MPa, there was no misalignment and the quality was good. At 50 MPa, the bump 2 was too crushed and the bonding state was poor. Therefore, it can be seen that 20 MPa is appropriate as the first average bump stress P1.

(Example 2)
In Example 2, the appropriate value of the second average bump stress P2 applied to the bump 2 in the third step was examined. The prepared bonding tool 3, semiconductor chip 1, bump 2, and circuit board 5 on which the electrode 4 is formed are the same as those in the first embodiment. The first average bump stress P1 used in Example 2 was set to 20 MPa based on the result of Example 1.

  When a stress load is started on the bump 2 and the first average bump stress P1 of 20 MPa is reached, application of ultrasonic vibration having a first amplitude A1 = 5 μm to the bump 2 is started. The level of the second average bump stress P2 at which the load stress with respect to is reached was changed to three types of 35, 60, and 85 MPa. While the second average bump stress P2 of each of the three levels is kept constant, the application of the ultrasonic vibration having the amplitude is continued for a predetermined time t2, and then the application of the ultrasonic vibration to the bump 2 is stopped and the bonding tool 3 is stopped. To release the load stress.

  At this time, the application of ultrasonic vibration is started at the first average bump stress P1 = 20 MPa, the time t1 of the second step until the above-mentioned three levels of the second average bump stress P2 are reached, and the three levels of the first average bump stress P1 = 20 MPa. 2 The time sum T1 (= t1 + t2) with the time t2 of the third step in which the ultrasonic vibration is applied while maintaining the average bump stress P2 is 0.6 regardless of the second average bump stress P2 of each level. Adjusted to be seconds.

  The joint test piece of the semiconductor chip 1 and the circuit board 5 with the bumps 2 thus produced is subjected to a shear tensile test, and the shear strength, that is, the joint strength, the fracture mode of the joint, and whether or not cratering has occurred. According to the quality evaluation.

  The fracture mode of the joint is evaluated by observing the fracture surface after the shear tensile test, for example, with a stereomicroscope, and the remaining rate (%) of the bumps 2 remaining on the surface of the electrode 4 of the circuit board 5, that is, the electrode 4 Evaluation was based on the percentage of the area of the bump 2 attached to the electrode 4 with respect to the surface area. For example, the residual rate of 100% means that the surface of the electrode 4 of the circuit board 5 is entirely covered with the bump 2 when it is broken between the electrode of the semiconductor chip 1 and the bump 2 or when it is broken with the bump 2 itself. State. Therefore, the larger the remaining rate, the better the bonding strength between the bump 2 and the electrode 4 of the circuit board 5. However, when the semiconductor chip 1 is broken between the electrode and the bump 2, there is a possibility that some damage exists between the electrode of the semiconductor chip 1 and the bump 2.

  After the second and third steps, the crater ring is generated by immersing it in aqua regia for 1 hour at room temperature without performing a shear tensile test to dissolve the Au as the bump 2 so that the electrode of the semiconductor chip 1 is formed. The surface of the electrode was observed with a scanning electron microscope and evaluated by the presence or absence of cracks. Needless to say, quality is poor when cracks occur.

  The results are shown in Table 2. When the second average bump stress P2 is 35 MPa, the bonding strength per bump is as small as 0.34 N, and the remaining rate is less than 50%, so that sufficient bonding strength cannot be obtained. When the second average bump stress P2 is 60 MPa, the bonding strength per bump is 0.52 N, the residual rate is 70%, and good bonding strength is realized. However, peeling at the interface between the partial bump 2 and the electrode 4 of the circuit board 5 was observed. Such interfacial delamination is improved by introducing the fourth step as described above.

  When the second average bump stress P2 was 85 MPa, the bonding strength per bump was 0.48 N, which was a moderate strength, but was slightly lower than the previous 60 MPa. Further, although the residual ratio was as high as 90% and good, cratering was recognized and the semiconductor chip 1 was damaged. Therefore, it can be seen that 60 MPa is appropriate as the second average bump stress P2.

(Example 3)
In Example 3, the appropriate value of the third average bump stress P3 applied to the bump 2 in the fourth step was examined. The prepared bonding tool 3, semiconductor chip 1, bump 2, and circuit board 5 on which the electrode 4 is formed are the same as those in the first embodiment. The first average bump stress P1 used in Example 3 was set to 20 MPa based on the result of Example 1, and the second average bump stress P2 was set to 60 MPa based on the result of Example 2.

  When the stress load on the bump 2 is started and the first average bump stress P1 of 20 MPa is reached, the ultrasonic vibration having the first amplitude A1 = 5 μm is started to be applied to the bump 2, and the stress is further applied. When the second average bump stress P2 was increased to 60 MPa, the application of ultrasonic vibration having the amplitude was continued for a predetermined time while the second average bump stress P2 was kept constant at 60 MPa. The time sum T1 of these second and third steps was adjusted to be 0.6 seconds.

  After finishing the third step, the load stress on the bump 2 was further increased, and simultaneously with the start of the increase of the load stress, application of ultrasonic vibration having the second amplitude A2 = 4 μm was started. The load stress was increased in the state where the ultrasonic vibration was applied, and the level of the third average bump stress P3 reached was changed to three types of 70, 90, and 110 MPa. Here, 70 MPa is the yield point of Au, which is the material of the bump 2, is less than 80 MPa, and 90 and 110 MPa are above the yield point. In a state where the third average bump stress P3 of each of the three levels is kept constant, the application of the ultrasonic vibration having the amplitude is continued for a predetermined time t4, and thereafter, the application of the ultrasonic vibration to the bump 2 is stopped, and the bonding tool 3 was raised to release the load stress.

  At this time, the application of ultrasonic vibration is started at the second average bump stress P2 = 20 MPa, the time t3 of the preliminary step until the above-mentioned three levels of the third average bump stress P3 are reached, and the third level of each of the three levels. The time T2 (= t3 + t4) of the fourth step, which is the sum of the time t4 of this step in which the ultrasonic vibration is applied while maintaining the average bump stress P3, is the third average bump stress P3 of each level. Was adjusted to 0.5 seconds.

  The joint test piece of the semiconductor chip 1 and the circuit board 5 with the bumps 2 thus produced is subjected to a shear tensile test in the same manner as in Example 2 to obtain the joint strength, the fracture mode of the joint, and the crater. The quality was evaluated based on the presence or absence of ring generation.

  The results are shown in Table 3. When the third average bump stress P3 is 70 MPa, the bonding strength per bump is 0.53 N, and the residual ratio is 70%, which is sufficient bonding strength. The interface peeling with the electrode 4 is not eliminated, and the electrical connection reliability is not sufficient.

  When the third average bump stress P3 is 90 MPa, the bonding strength per bump is 0.60 N, the residual rate is 80%, and good bonding strength is realized. Further, the fracture occurred in the bump 2 itself, there was no interface peeling between the electrode 4 of the circuit board 5 and the electrode of the semiconductor chip 1, and no cratering was observed. From this, when the third average bump stress P3 was 90 MPa, a mounting component having good bonding strength and excellent electrical connection reliability was obtained.

  When the third average bump stress P3 is 110 MPa, the bonding strength per bump is 0.63 N, and the remaining rate is 100%, which is a good bonding strength. Chip 1 was damaged. Therefore, it can be seen that 90 MPa is appropriate as the third average bump stress P3.

  As described above, the present embodiment is a rectangular parallelepiped bump formed by plating, but is not limited thereto, and for example, a ball bump may be used. Further, the circuit board is described as an organic substrate such as a glass cloth epoxy resin substrate, but is not limited thereto, and may be an inorganic substrate such as a ceramic substrate.

It is a figure which shows the outline | summary of the ultrasonic flip-chip joining method which is one aspect | mode of embodiment of this invention. It is a figure which shows the outline | summary of the ultrasonic flip-chip joining method which is one aspect | mode of embodiment of this invention. It is a figure which shows the outline | summary of the ultrasonic flip-chip joining method which is one aspect | mode of embodiment of this invention. It is a figure which shows the outline | summary of the ultrasonic flip-chip joining method which is one aspect | mode of embodiment of this invention. It is a figure explaining average bump stress. It is a timing chart explaining the ultrasonic flip chip joining method of the present invention. It is a figure which shows the state in which variation exists in bump height. It is a figure which shows the stress value change of each bump 2 in a 1st step. It is a figure which shows the influence which 1st amplitude A1 of an ultrasonic vibration has on the joining strength of bump 2. FIG. It is a figure which shows the influence which the time sum T1 of the 2nd and 3rd step exerts on the bonding strength of the bump 2. It is a figure which shows the influence which 2nd amplitude A2 of an ultrasonic vibration has on the joint strength of bump 2. FIG. It is a figure which shows the influence which time T2 of a 4th step has on the joining strength of bump 2. FIG. It is a figure which shows the stress value change of each bump. It is a schematic sectional drawing which shows bump 2 shape before and behind joining. It is a figure which shows the relationship between the load applied to a bump and the ultrasonic output applied to a bump in the ultrasonic flip chip joining method of a prior art.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor chip 2 Bump 3 Joining tool 4 Electrode 5 Circuit board

Claims (6)

In an ultrasonic flip chip bonding method for bonding an electrode formed on a semiconductor chip and an electrode formed on a circuit board by applying ultrasonic vibration in a state where a bump is interposed between the both electrodes,
The bumps provided on the semiconductor chip are brought into contact with the electrodes formed on the circuit board, and by increasing the load applied to the semiconductor chip, the average bump stress applied to the bumps is increased in a range below the yield point of the bumps . The first step;
A predetermined first amplitude A1 from when the average bump stress reaches a predetermined first average bump stress P1 less than the bump yield point to when a predetermined second average bump stress P2 less than the bump yield point is reached. A second step of applying ultrasonic vibrations to the bumps;
Ultrasonic vibration having a first amplitude A1 the predetermined is applied to the bumps, before the average bump stress reaches the yield point of the bump, a third step of applying ultrasonic vibration having a second amplitude A 2 of predetermined bump When,
And a fourth step of applying ultrasonic vibration having a predetermined second amplitude A2 to the bump in a state where the average bump stress is held at a predetermined third average bump stress P3 equal to or higher than the yield point of the bump. Ultrasonic flip chip bonding method. The amplitude ratio (A2 / A1) of the second amplitude A2 to the first amplitude A1 is:
2. The ultrasonic flip chip bonding method according to claim 1, wherein the ultrasonic flip chip bonding method is less than 1.0. The amplitude ratio (A2 / A1) is
The ultrasonic flip chip bonding method according to claim 2, wherein the ultrasonic flip chip bonding method is 0.80 or less. The sum of the time of the second step and the time of the third step for applying ultrasonic vibration having the first amplitude A1 is as follows:
It is 0.3 second or more and 0.9 second or less, The ultrasonic flip-chip joining method in any one of Claims 1-3 characterized by the above-mentioned. The first amplitude A1 is
The ultrasonic flip chip bonding method according to claim 1, wherein the ultrasonic flip chip bonding method is 5 μm or less. The bump is
The ultrasonic flip-chip bonding method according to claim 1, wherein the ultrasonic flip-chip bonding method is made of a material mainly composed of gold (Au).

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