JP4024235B2 - Game machine - Google Patents

Description

  The present invention relates to a gaming machine such as a pachinko machine, an arrangement ball machine, a sparrow ball game machine, and a revolving game machine, and more particularly to a gaming machine in which the occurrence timing of a big hit state is unpredictable.

  A ball game machine such as a pachinko machine is provided with a symbol start opening provided on the game board, a symbol display means for stopping a plurality of symbols after being changed for a predetermined time, a grand prize winning means for driving the opening and closing plate, etc. Configured. When the detection switch provided at the symbol start port detects the passing of the game ball, the symbol display means causes the display symbols to fluctuate for a predetermined time, and then the special winning symbol functions when the special symbols are aligned and stopped. A profit state advantageous to the player is generated.

  In this type of gaming machine, the jackpot counter CT is realized by software, and when the jackpot probability is 1 / N, the jackpot counter CT is circulated within a numerical range of 0 to N-1, while the numerical value is One of the ranges is set to the big hit winning value Hit. Then, when the detection switch provided at the symbol start port detects the passing of the game ball, the value of the big hit counter CT at that time is acquired and compared with the big hit winning value Hit. We are shifting to a profit state. The big hit counter CT is cleared to zero by an initial process after power-on, and then updated by an increment (+1) process in response to an interrupt signal issued every predetermined cycle.

  By the way, the jackpot winning value Hit can be grasped only by obtaining the gaming machine and analyzing the program. Therefore, if an illegal circuit is attached to the gaming machine having the above-described configuration and the interrupt signal after power-on is counted, the jackpot timing at which the value of the jackpot counter CT matches the jackpot winning value Hit can be found. Become. Moreover, since the big hit timing comes regularly corresponding to the Nth interrupt signal, if the ON signal of the detection switch of the symbol start opening is generated by an illegal circuit in accordance with the big hit timing, A big hit state can be realized arbitrarily.

  Therefore, in order to deal with such illegal actions, an attempt has been made to make the value of the jackpot counter CT irregular by using the sub-counter BGN in addition to the jackpot counter CT. In this case, the sub-counter BGN circulates starting from 0 in the numerical range of 0 to N-1. The big hit counter CT circulates in the numerical range of 0 to N−1 starting from the initial value START determined by the subcounter BGN.

  Then, when the big hit counter CT goes around the numerical value range N, the value of the sub-counter BGN at that time is acquired, and the circulation operation is repeated again by using it as a new initial value START. If the initial value START of the jackpot counter CT is changed at random in this way, the jackpot timing will not come regularly corresponding to the Nth interrupt signal, which has a great effect on eliminating fraud. .

  However, even in the above countermeasure, only the initial initial value after the CPU is reset as after the power is turned on must be determined uniformly in software (usually zero). If an illegal circuit is attached and the CPU is forcibly reset at an appropriate timing, the big hit timing can be grasped only in the first round after the reset.

  In other words, even if the initial value is changed randomly, the CPU is repeatedly reset at appropriate time intervals, and thereafter, the symbol start port detection switch is turned on at the timing when the big hit counter CT matches the big hit winning value Hit. Whenever a signal is generated, there is a problem that a big hit state occurs.

  The present invention has been made in view of such problems, and it is an object of the present invention to provide a gaming machine capable of excluding illegal gaming acts even when a jackpot winning value is known.

In order to solve the above-mentioned problem, the invention according to claim 1 includes a storage unit that stores a game operation program and a CPU that operates by reading the program, and performs predetermined detection in relation to the game state. A game machine that performs a lottery process to determine whether or not to generate a profitable state advantageous to a player by a random lottery based on a value of a jackpot counter when a detection signal is obtained from a sensor to be performed , and when the CPU is reset System reset processing that is started and includes infinite loop processing, and timer interrupt processing that periodically interrupts the infinite loop processing and cyclically updates the value of the jackpot counter within a predetermined numerical range. A first means for setting a timer value to an initial value in the system reset process; and a timer value for the timer interrupt process as a reference value. The second means for updating toward the time and the third means for preventing the lottery process from being executed until the value of the time timer reaches the reference value, so that after the CPU is reset, The profit state is not generated until the value reaches the reference value, and the number of updates required for the value of the timer to reach the reference value is determined so that the jackpot counter goes around the numerical range. It is set to exceed the required number of updates .

  In addition, the player includes a storage unit that stores a program for game operation and a CPU that operates by reading the program, and a player is selected by random lottery based on a detection signal from a sensor that performs predetermined detection in relation to the game state. A gaming machine that performs a lottery process for determining whether or not to generate a profit state that is advantageous to the game, and when the operating CPU is reset, an abnormality notification means for notifying the outside of the CPU may be provided. .

  In the present invention, even if the CPU is illegally reset, a big hit state cannot be generated afterward. In particular, the present invention determines the random number for lottery by the value of the main counter that circulates within a predetermined numerical range, and sets the value of the sub-counter every time the main counter circulates within the numerical range once or more This is effective when the initial value of the main counter is changed based on this.

  As described above, according to the present invention, it is possible to realize a gaming machine that can eliminate fraudulent gaming acts in advance even if the jackpot winning value is known.

  Hereinafter, the gaming machine of the present invention will be described in more detail based on examples. FIG. 1 is a block diagram illustrating an overall configuration of a pachinko machine according to an embodiment.

  The illustrated pachinko machine includes a main control board 1 for centrally controlling the game operation, a symbol control board 2 for controlling the operation of the liquid crystal display 8, a voice control board 3 for accelerating the game operation, and lamps In response to the lamp control board 4 that makes the flashing operation and the game operation is excited, the payout control board 5 that pays out the game ball, the launch control board 7 that is controlled by the payout control board 5 and launches the game ball, and AC24V The power supply board 6 supplies a DC voltage to each part of the apparatus.

  The main control board 1, the symbol control board 2, the voice control board 3, the lamp control board 4, and the payout control board 5 are configured by a computer circuit including a one-chip microcomputer incorporating a Z80 CPU equivalent product. 5 realizes an individual control operation based on a control command from the main control board 1. The main control board 1 is also connected to the hall computer through the external connection terminal board 9. This hall computer is connected to all the gaming machines in the gaming hall, the number of occurrences of the big hit state in each gaming machine, the number of times the game ball has passed through the symbol start opening, and the number of prize balls paid out from each gaming machine Etc. are intensively managed.

  FIG. 2 is a block diagram showing a circuit configuration of the main control board 1. As shown in the figure, the main control board 1 includes a CPU circuit 1a composed of a one-chip microcomputer, a system clock generator 1b that generates a clock signal Φ0 that is an integer multiple of the CPU operating clock CLK, and an address signal from the CPU. A decoding circuit 1c for generating a chip select signal for each part, an output port circuit 1d for outputting data from the CPU, an input port circuit 1e for the CPU to take in external data, and the sub-control boards 2 to 5 The output drive circuit 1f for outputting a control command to the controller and the switch input circuit 1g for inputting the ON / OFF state of switches of each part of the game board are mainly configured.

  3 to 5 are flowcharts showing a control program for the main control board 1. The control program for the main control board 1 is executed after the power is turned on and normally ends with an infinite loop process (ST8). ) Program (FIG. 4) and an NMI processing program (FIG. 6) that is driven by an NMI (Non Maskable interrupt) signal to back up the register value of the CPU when the power supply voltage falls below a predetermined value.

  The system reset processing program (main routine) will be described below with reference to FIG. This main routine is started not only when the power is turned on, but also when the count value of the watchdog timer reaches a predetermined value due to a program runaway and the CPU is reset. In addition, there is a possibility that the CPU is illegally reset due to mounting of an illegal circuit. There are also two patterns when the power is turned on, such as when the initialization switch 85 is turned off and the power is turned on, such as when recovering from a power failure, and when the pachinko hall is opened, There are cases where the initialization switch 85 is ON and the power is turned ON.

  In the main routine shown in FIG. 3, first, the Z80 CPU sets itself to an interrupt disabled state, and initializes each part of the one-chip microcomputer including the Z80 CPU core (ST1). Further, the CPU sets itself to the interrupt mode 2 (ST2), and then sets an initial value 1 to the timer TIME for fraud elimination (ST3).

  Next, the CPU determines the value of the RAM clear signal (ST4). The RAM clear signal is a signal indicating whether or not to initialize the RAM area, and has a value corresponding to the ON / OFF state of the initialization switch 85. Assuming that the pachinko hall is open and the initialization switch 85 is turned on and the power is turned on, the determination in step ST4 is Yes, the RAM work area is initialized, and other RAM areas are cleared to zero. At the same time, the CPU is set to an interrupt permission state (EI) (ST7). Thereafter, random number generation processing is performed in an infinite loop (ST8).

  The random number generation process of step ST8 includes an update process of the sub-counter BGN circulating through the numerical value range MAX by the increment process, and an update process of the off symbol counter. As will be described later, the value of the sub-counter BGN is used to change the initial value of the jackpot counter CT circulating through the numerical value range MAX by the random number generation process (ST30) in FIG. Further, the off symbol counter is a process for determining what type of off game will be produced when it is in the off state due to the big hit determination process in the special symbol processing (ST38) of FIG. is there.

  When the initialization switch 85 is in the OFF state as in the case of recovery from the power failure state, the content of the backup flag BFL is determined following the determination in step ST4 (ST5). The backup flag BFL is data indicating whether or not the backup data saved in the NMI process has been restored to the original state. In this embodiment, the backup flag BFL is set in the process of step ST74 in FIG. 5AH and is cleared to zero in the process of step ST14 of FIG.

  If the power is restored from the power failure state, the process proceeds to step ST9. However, if the CPU is forcibly reset, the initial value nn is set again in the timer TIME for eliminating fraud. (ST6 ′), the process proceeds to step ST7. However, when the CPU is forcibly reset, the illegal player may also turn on the RAM clear signal at the same time. Therefore, regardless of whether the RAM clear signal is on or off, the initial value is changed to the timer TIME. It is preferable to set nn (ST6) and shift to the process of step ST7. In this case, immediately after the pachinko hall is opened, the lottery process is invalidated as in the case of unauthorized resetting (although an abnormality notification may be added (FIG. 7)), the duration is short. So there is virtually no harmful effect.

  The timer TIME set to the initial value nn is decremented (−1) in the process of step ST31 in FIG. 4, and the switch input invalidation process is performed until the value of the timer TIME becomes zero (ST34). Since the initial value nn is set to a value exceeding the numerical range MAX of the jackpot counter CT, when the switch input management process (ST33) is executed, the jackpot counter CT is always circulated more than once. The initial value has been changed, so that illegal games can be reliably excluded (this point will be further described later).

  On the other hand, if it is determined in step ST5 of FIG. 3 that the content of the backup flag BFL is 5AH, 16-bit data read from the SP storage area of the RAM is written to the stack pointer SP of the CPU (ST9). Next, the RAM area data backed up in the NMI process at the time of a power failure is read out, and a backup restoration command is created (ST10 to ST12).

  Here, the backup return command creation process (ST10) for the payout control board means a preparation operation for rechecking the error signal and outputting a control command according to the current state of the gaming machine to the payout control board 5. . For example, if there is an error condition that the lower plate is full before the power failure, the error state is saved by the backup data, but it is highly possible that the player collects the game balls due to the power failure. The current situation is being confirmed.

  Also, the backup return command creation process (ST11, ST12) for the symbol control board or lamp control board is a so-called probabilistic state in which the gaming machine before the power failure is in a big hit state or the winning probability is increased. In such a case, the background color of the liquid crystal display 8 is set in accordance with the operating state, and a sound effect can be generated.

  When the processing of steps ST10 to ST12 is completed, the CPU executes the POP instruction to restore the values of the registers (BC, DE, HL) excluding the AF register from the stack area (ST13). As a result of this process, the recovery process from the power failure is completed, so the backup flag BFL is cleared to zero to indicate that (ST14). Finally, it is checked whether or not the interrupt is prohibited before the power failure (ST15 and ST16), and after the AF register is returned from the stack area (ST17 and ST19), the process is terminated while the interrupt is disabled (ST17 and ST19). (ST18) Alternatively, the process is returned to the interrupt enabled state (ST20, ST21). By executing the RET instruction in steps ST18 and ST21, the value of the PC (program counter) at the time of the PUSH processing being restored in the stack area is restored, and the processing suspended due to a power failure or the like is resumed. It will be.

  FIG. 4 is a flowchart showing the contents of an interrupt processing program of a timer interrupt INT (Maskable Interrupt disabled interrupt) that occurs every 2 msec during the infinite loop processing (ST8) of the main routine shown in FIG. When a timer interrupt occurs, the contents of each register are saved in the stack area, and random number generation processing, error management processing, and the like are performed (ST30). The error management process is a determination as to whether an abnormality has occurred inside the device. The random number generation processing means update processing of the winning counter RG and the big hit counter CT used in the lottery operation in the normal symbol processing ST37 and the special symbol processing ST38.

  FIG. 5 exemplifies the specific contents of the update process (random number generation process) of the jackpot counter CT and the jackpot counter RG. As shown in FIG. 5A, first, after the big hit counter CT is incremented (ST50), it is determined whether or not the numerical value range MAX is exceeded (ST51), and the value of the big hit counter CT is changed to the numerical value range MAX. Is exceeded (CT = MAX), the value is returned to zero (ST52).

  Next, it is determined whether or not the value of the big hit counter CT has reached the initial value START (ST53). If the value of the big hit counter CT has reached the initial value START after going around the numerical value range (updated in the process of step ST8). ) The value of the sub-counter BGN is written into the big hit counter CT (ST54). Further, the value of the sub-counter BGN is written in the START address as a new initial value, and the process ends (ST55). The update of the winning counter RG is as shown in FIG. 5B (ST60 to ST62). The value of the winning counter RG is the normal symbol processing (ST37) when the game ball passes the gate. Used for lottery operation.

  When the random number generation process is completed as described above, the CPU next decrements the value of the timer TIME (ST31 in FIG. 4) and determines whether or not the value of the timer TIME is zero (ST32). As described above, the initial value of the timer TIME is set to 1 at the time of recovery from a power failure or the like (ST3), but the initial value of the timer TIME is set to nn at the time of power-on or illegal reset ( ST6, ST6 ').

  During normal business operations except immediately after power-on, since the timer TIME after decrementing is zero, the value of the timer TIME is returned to the initial value 1 again, and then the switch input management process is performed (ST33). Here, the switch input management process is a determination as to whether or not a game ball has passed through a gate or an electric tulip. If the game ball has passed, it is determined that the switch input is in an ON state, and the normal symbol process ST37 or In the special symbol process ST38, a winning lottery or a big winning lottery is performed using the counters RG and CT. Note that the switch input process is specifically realized by a port scan operation by the CPU. However, since each corresponding input port does not latch the switch input, the switch input is ignored if there is no port scan operation. Become.

  On the other hand, at the time of an abnormal reset or when the power is turned on, since TIME ≠ 0 until nn interrupt processing ends, invalidation processing for invalidating the switch input is performed (ST34). The invalidation process simply requires not performing the port scan described above, and therefore the process of step ST33 may be skipped regardless of the illustration. Further, the lottery random value acquisition process may be skipped based on an appropriate flag value. As a result of such invalidation processing, even if the switch input is turned on by an illegal circuit, the ON signal is ignored, and a winning lottery or a big winning lottery is performed in the normal symbol processing ST37 or the special symbol processing ST38. It will never be.

  The invalidation process (ST34) is continued only for a time that the big hit counter CT makes one round. Specifically, since the numerical range MAX of the big hit counter is usually about 300, the switch input is ignored only for a time of about 2 × 300 = 600 mS. Therefore, there is a possibility that the player may be inconvenienced even if it is just after the power is turned on, or even if the gaming machine goes out of control and the gaming machine is reset by the operation of the watchdog timer during the normal player's game Is substantially zero.

  After the process of step ST33 or ST34, the value of the process division counter is determined, and the corresponding process of ST36 to ST40 is performed. The above error management and switch management should be repeated at short time intervals. On the other hand, the processing related to the pachinko game production is complicated and sophisticated according to the player's needs, and therefore requires a certain amount of processing time. It will be. Therefore, in this embodiment, not all the game control operations are completed by one interrupt process, but are divided into five types of processes, and each divided process is divided and executed for each interrupt. Yes. Therefore, a processing division counter that circulates in the range of 0 to 4 is provided to perform processing according to the value of the processing division counter.

  More specifically, when the processing division counter is 0, processing relating to the opening of the big prize opening is performed (ST36), and when the processing division counter is 1, normal symbol processing relating to display of the normal symbol is performed (ST37). ), When the processing division counter is 2, processing relating to the display of the jackpot symbol is performed (ST38). If the gate pass switch is in the ON state, in normal symbol processing ST37, it is determined whether or not it is normal hit using the hit counter RG. If the pass switch at the symbol start port is in the ON state, special symbol processing is performed. At 38, a big hit determination using the big hit counter CT is performed.

  If the process division counter is 3, timer management processing related to the opening / closing timing of the electric tulip and the big prize opening and command creation processing transmitted from the main control board to each control board are performed (ST39). If the process division counter is 4, information output and error display command creation processing is performed (ST40).

  When any one of steps ST36 to ST40 is completed, the value of the process division counter is updated (ST41), and the generated command is output to each sub-control board (ST42). In addition, the value of each register is restored and changed to the interrupt enabled state, and the routine returns from the interrupt processing routine to the main routine (ST43).

  FIG. 6 is a flowchart showing the contents of an NMI interrupt processing program that occurs when the power supply voltage drops due to a power failure or the like. In this interrupt processing, first, the contents of each register (AF, I, BC, DE, HL) are pushed to the stack area (ST70). Next, the value of the stack pointer SP after execution of the PUSH instruction in step ST70 is stored in the SP storage area of the RAM (ST71). FIGS. 6B and 6C show the saving state of each register (AF, I, BC, DE, HL), stack pointer SP, and program counter PC.

  Subsequently, since there is a case where a prize ball is currently being paid out, the state of the prize ball counting switch is detected and stored (ST72). Note that waiting for a predetermined time (ST73) takes into account the time during which the prize ball being paid out moves. Although not shown in the figure, after necessary processing, the flag value 5AH is stored in the RAM area of the backup flag BFL (ST74). Thereafter, access to the RAM is prohibited, the power supply voltage drops, and the CPU is turned off. Waiting for an operating state (ST75). After that, the CPU becomes non-operating, but since the backup power is supplied to the RAM, the backed up data continues to be stored as it is. That is, even after the power supply is completely shut down, the RAM area is maintained as shown in FIGS.

  FIG. 7 is a flowchart for explaining the system reset process of the second embodiment in which measures are taken when the CPU is illegally reset. The processing in steps S1 to S4 is the same as ST1, ST2, ST4, and ST5 in FIG. However, in this second embodiment, the RAM for the voice control board 3 and the lamp control board 4 is cleared after the internal RAM clear process (S5) regardless of whether the power is turned on or the CPU is reset. A clear notification command is transmitted (S6). In accordance with this, the fact that the RAM is cleared is also transmitted to the hall computer through the external connection terminal board 9 (S6).

  On the other hand, in response to this operation, the voice control board 3 that has received the RAM clear notification command notifies the occurrence of an abnormal situation with a loud voice saying “The RAM is now cleared”, and the lamp control board 4 In accordance with this, each lamp flashes violently. Therefore, when the CPU is illegally reset after the opening of the game hall, the store clerk of the game hall can immediately grasp the fact and can find an illegal player. In addition, since the occurrence of an abnormal situation can be grasped even in the hall computer, it is possible to appropriately deal with the gaming hall. Note that the above-described notification operation on the sound control board 3 and the lamp control board 4 is preferably continued for about 30 seconds to 2 minutes, so the main control board 1 performs time consumption processing according to the duration ( S7), without waiting for the game operation.

  However, in addition to the control in FIG. 7, the time consumption process (S <b> 7) is not particularly necessary when the same control as in FIG. 3 is performed. That is, before and after the process of step S6, the timer TIME for fraud elimination is set to an initial value, while if the process of steps ST31 to ST34 is provided in the timer interrupt, the voice control board 3 and the lamp control board 4 When the abnormality notification process is performed, the switch input process is skipped for a predetermined time.

  By the way, the above-described abnormal state notification operation may be performed before the RAM clear process. FIG. 8 illustrates a third embodiment of the present invention, and the processing of steps S1 to S4 is the same as that of FIG. However, in the third embodiment, the RAM clear signal is OFF (S3 is NO), but only when the CPU abnormality is reset such that the backup flag BFL is zero, the voice control board 3 and the lamp control board 4 are in RAM. A clear notification command is transmitted (S50). For this reason, in the third embodiment, when the store is opened when the power is normally turned on, there is no sound announcement of the occurrence of an abnormal situation or the lamp blinks, and the notification operation is performed only when the CPU abnormality is reset after the store is opened. In the case of this embodiment as well, since there is a report in the hall computer, appropriate measures can be taken in the game hall.

  Subsequently, the above-mentioned bullet ball game machine will be further described. FIG. 9 is a perspective view showing the pachinko machine 22 of the present embodiment, and FIG. 10 is a side view of the pachinko machine 22.

  The pachinko machine 22 shown in FIG. 9 is pivotally attached to a rectangular frame-shaped wooden outer frame 23 that is detachably mounted on the island structure and a hinge H fixed to the outer frame 23 so as to be opened and closed. And a frame 24. A plurality of pachinko machines 22 are arranged in the length direction of the island structure of the pachinko hall while being electrically connected to the card-type ball lending machine 21.

  A game board 25 is detachably mounted on the front frame 24 pivotally attached to the outer frame 23 via the hinge H, and a glass door 26 having a window portion corresponding to the front side of the game board 25 and A front plate 27 is pivotally attached to each other so as to be opened and closed. An upper plate 28 for storing game balls for launching is mounted on the front plate 27, and a lower plate 29 for storing game balls overflowing or extracted from the upper plate 28 and launching means 30 at the lower part of the front frame 24. And a firing handle 31 are provided.

  The launching means 30 includes a launching handle 31 that can be rotated, and a launching motor that launches a game ball with a striking rod 32 (FIG. 12) with a striking force corresponding to the pivoting angle of the launching handle 31. An operation panel 33 for lending the ball to the card-type ball lending machine 21 is provided on the right side of the upper plate 28. A card remaining amount display unit 33a for displaying the remaining amount of the card with a three-digit number is provided on the operation panel 33. A ball lending switch 33b for instructing lending of game balls for a predetermined amount, and a return switch 33c for instructing to return the card at the end of the game.

  As shown in FIG. 11, the game board 25 is provided with a guide rail 35 formed of a metal outer rail and an inner rail in a substantially annular shape, and a color liquid crystal is provided in a game area 25 a inside the guide rail 35. Display (LCD monitor) 8, symbol start opening (design start means / winning means) 37 having a detection switch, open / close-type winning means (large winning means) 38, a plurality of normal winning means 39 (in addition to the upper normal winning means 39) The six normal winning means 39 on the left and right sides of the openable winning means 38) and the two gates 40 (passage openings) are arranged at predetermined positions, respectively.

  The liquid crystal display 8 functions as a first symbol display means 42 (variable display device) that displays a changing symbol and also displays a background image, a moving image of various characters, and the like. The first symbol display means 42 displays a background image and a character in an animated manner, and has three (left, middle, and right) symbol display portions 42 a to 42 c arranged in the left-right direction. On the condition that the ball wins, the display symbols of the symbol display portions 42a to 42c are variably displayed (scrolled) for a predetermined time, and based on the lottery result corresponding to the winning timing of the game ball to the symbol start opening 37. Stop at the determined stop symbol pattern.

  A normal winning means 39 and a second symbol display means 43 are provided immediately above the liquid crystal display 8. The second symbol display means 43 has a normal symbol display unit for displaying one normal symbol. When a game ball passing through the gate 40 is detected, the display symbol of the normal symbol display unit (variable display device) is predetermined. It fluctuates by time, and stops by displaying a stop symbol determined by a random number for lottery drawn at the time when the game ball passes through the gate 40. The symbol start opening 37 is an electric tulip provided with a pair of left and right opening and closing claws 37a that can be opened and closed. When the stop symbol after the change of the second symbol display means 43 is hit and the symbol is displayed, the opening and closing claws 37a It is open for a predetermined time, making it easy to win.

  The open / close-type winning means 38 includes an opening / closing plate 38a that can be opened forward. When the stop symbol after the fluctuation of the first symbol display means 42 is a winning symbol such as “777”, a special game called “big hit” is started. The opening / closing plate 38a is opened to the front side. There is a specific area 38b inside the openable winning means 38, and when the winning ball passes through the specific area 38b, the special game is continued. Here, the special game state corresponds to a first state advantageous to the player.

  After the opening / closing plate 38a of the open / close winning means 38 is opened, when a predetermined time elapses or when a predetermined number (for example, 10) of game balls wins and the opening / closing plate 38a is closed, the game ball is moved to the specific area 38b. If the game has not passed, the special game ends. However, if the game passes the specific area 38b, the special game is continued up to, for example, 16 times, and is controlled in a state advantageous to the player.

  As shown in FIG. 12, a back mechanism plate 50 that presses the game board 25 from the back side is detachably mounted on the back side of the front frame 24, and an opening 50a is formed in the back mechanism plate 50. A prize ball tank 53 and a tank rail 54 extending from the prize ball tank 53 are provided. Dispensing means 55 connected to the tank rail 54 is provided on the side of the back mechanism plate 50. A passage unit 56 connected to the (dispensing motor) 55 is provided. The game balls paid out from the payout means 55 are paid out to the upper plate 8 from the upper plate discharge port 28a (FIG. 9) via the passage unit 56.

  In the opening 50a of the back mechanism plate 50, a back cover 57 mounted on the back side of the game board 25 and a winning ball discharge basket (not shown) for discharging the winning game balls in the winning means 37 to 39 are fitted. Are combined. The main control board 1 is disposed inside the case 58 attached to the back cover 57, and the symbol control board 2 is disposed on the front side thereof (FIG. 10). Below the main control board 1, the lamp control board 4 is provided in a case 61a attached to the back cover 57, and the sound control board 3 is provided in a case 61b adjacent to the case 61a.

  A power supply board 6 and a payout control board 5 are provided inside the case 64 mounted on the back mechanism plate 50 below the cases 61a and 61b. As shown in FIG. 12, a power switch 80 and an initialization switch 85 are disposed on the power supply board 6. A portion corresponding to both the switches 80 and 85 has a case 64 cut away so that each of the switches 80 and 85 can be operated simultaneously with a finger.

  A launch control board 7 is provided inside a case 67 attached to the rear side of the launching means 30. These control boards 1 to 7 are independent boards, and the control boards 1 to 5 except for the power supply board 6 and the launch control board 7 are equipped with a computer circuit including a one-chip microcomputer. The other control boards 2 to 5 are electrically connected via a connector with a plurality of signal lines.

  Although the present invention has been specifically described above, the specific description content does not particularly limit the present invention. For example, in FIG. 4, the switch input skipping process (ST34) is illustrated as the invalidation process. However, in order to avoid ignoring other switch inputs for a very short time, in the special symbol process (ST38). Invalidation processing may be executed. Specifically, even if the symbol start opening detection switch is ON, if the random number lottery process is skipped when the timer variable TIME is not TIME ≠ 0, it is an effective countermeasure against illegal games. In this case, a random number lottery process for determining whether or not the game is a big hit is performed only when the detection switch at the symbol start opening is ON and the timer variable TIME = 0.

  Further, the notification command transmission process (S6) in FIG. 7 in which the signal start port switch is turned ON may be provided immediately before step S10. In this case, two types of notification commands are prepared, the notification command in step S6 notifies “CPU has been reset”, and the notification command immediately before step S10 notifies “recovery from power failure”. It is preferable to do this.

  In the case of this embodiment, all the gaming machines are notified all at once when recovering from a power outage, but on the other hand, only the specific gaming machine is notified when recovering from a power failure due to an illegal circuit. Can be identified. Also in this case, it is preferable to transmit the notification information to the hall computer.

  Note that the present invention can also be applied to a rotating game machine. In this case, the switch input of the lottery process is a switch input for detecting the operation of the rotating operation lever of the spinning cylinder display unit (the display unit of the rotating reel).

It is a block diagram which shows the whole structure of the pachinko machine which concerns on an Example. It is a block diagram which shows the structure of a main control board. It is a flowchart which shows the system reset process in a main control board. It is a flowchart which shows the timer interruption process in a main control board. It is a flowchart which shows the update process of the big hit counter or the win counter. It is a flowchart which shows the MNI interruption process in a main control board. It is a flowchart which shows the system reset process which concerns on 2nd Example. It is a flowchart which shows the system reset process which concerns on 2nd Example. It is a perspective view of the pachinko machine concerning an example. It is a side view of the pachinko machine of FIG. It is a front view of the game board of the pachinko machine of FIG. It is a rear view of the pachinko machine of FIG.

Claims (1)

According to the value of the jackpot counter when a detection signal is obtained from a sensor that performs a predetermined detection related to the gaming state, including a storage unit that stores a program for gaming operation and a CPU that reads and operates the program A gaming machine that performs a lottery process for determining whether or not to generate a profit state advantageous to a player by random number lottery,
Execution starts when the CPU is reset, and system reset processing including infinite loop processing and the infinite loop processing are periodically interrupted, and the value of the jackpot counter is updated cyclically within a predetermined numerical range. Timer interrupt processing to
In the system reset process, first means for setting the value of the timer for time to an initial value; in the timer interrupt process, second means for updating the value of the timer for time to a reference value; and for the timer Until the value reaches the reference value, a third means that does not execute the lottery process is provided, and after the CPU is reset, until the value of the timer for time reaches the reference value, the profit state Is configured not to occur,
A gaming machine , characterized in that the number of updates required for the value of the clock timer to reach the reference value is set to exceed the number of updates required for the jackpot counter to make a round of the numerical value range .

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