JP3976420B2 - Optical semiconductor device - Google Patents

Optical semiconductor device Download PDF

Info

Publication number
JP3976420B2
JP3976420B2 JP29554998A JP29554998A JP3976420B2 JP 3976420 B2 JP3976420 B2 JP 3976420B2 JP 29554998 A JP29554998 A JP 29554998A JP 29554998 A JP29554998 A JP 29554998A JP 3976420 B2 JP3976420 B2 JP 3976420B2
Authority
JP
Japan
Prior art keywords
emitting element
light emitting
light
light receiving
film substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP29554998A
Other languages
Japanese (ja)
Other versions
JP2000124478A (en
Inventor
秀雄 国井
清 高田
公 落合
浩 井野口
勉 石川
智 関口
浩 小堀
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP29554998A priority Critical patent/JP3976420B2/en
Publication of JP2000124478A publication Critical patent/JP2000124478A/en
Application granted granted Critical
Publication of JP3976420B2 publication Critical patent/JP3976420B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Landscapes

  • Light Receiving Elements (AREA)
  • Photo Coupler, Interrupter, Optical-To-Optical Conversion Devices (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

【０００１】
【発明の属する技術分野】
本発明は、受光素子を、または発光素子と受光素子とを樹脂封止した光半導体装置に関するものであり、特に装置の薄形化に関するものである。
【０００２】
【従来の技術】
最近、サブノートパソコン、携帯情報端末、電子スチルカメラ等のマルチメディア機器がめざましい発展を遂げている。これらの機器は、携帯性を求められることから外部とのデータ送受信にも簡便なものが要求され、赤外線等の光信号を用いることによりコードレスで外部機器と本体とを接続する装置を備えたものが多い。その中でも光信号として波長が８７０ｎｍの赤外線を用いるＩｒＤＡ(Infrared Data Association)規格が最も普及している。
【０００３】
ＩｒＤＡ通信を利用するためには、接続すべき両方の機器に、赤外線信号を発する発光素子と、赤外線信号を受ける受光素子とを備える必要がある。発光素子と受光素子とは、それぞれ別個のパッケージとして電子機器に組み込まれる場合もあるし、両者が１つのパッケージに収納されたモジュールとして供給される場合もある。
【０００４】
図４に、発光素子と受光素子とを１つのパッケージに収納した赤外線データ通信用の半導体装置の例を示す（例えば、特開平１０−７０３０４号）。この装置は、装置本体１内に、半導体チップの形態で提供された受光素子２と発光素子３とを収納したもので、少なくとも赤外線に対して透明な樹脂で樹脂モールドしたものである。特に受光素子２においては、受光用のホトダイオードＰＤと、アンプ回路等の周辺回路とを同一チップ内に集積化する場合もある。
【０００５】
半導体チップで提供された受光素子２のホトダイオードＰＤは、半導体チップの表面に対して垂直方向に光を受ける構造になっている。そのため、受光素子２、発光素子３共に、半導体チップに対して垂直に光信号６を発光／受光する構造になっており、該光信号６の集光のために各素子の上方に、半球体レンズ４、５を樹脂で形成している。
【０００６】
【発明が解決しようとする課題】
電子機器における軽薄短小化の要求に対応するためには、プリント基板上に固着する電子部品自体の高さを制限することが不可欠である。しかしながら、光信号６がプリント基板に対して垂直方向に導入するように図５の装置本体１を実装すると、レンズ４、５の存在等により装置本体１の高さが高く、全体の薄形化が困難である欠点があった。
【０００７】
一方、図５に示すようにリードを折り曲げてレンズ４、５を横にすることで、プリント基板７に対して水平方向に光信号６を導入する様にする事も可能である。しかし、受光素子２と発光素子３の半導体チップを垂直に立てるようにして実装することから、実装時の高さを半導体チップの大きさ以下にすることが原理的に不可能であり、やはり薄形化が困難である欠点があった。
【０００８】
【課題を解決するための手段】
本発明は前述の課題に鑑みて成され、フィルム基板と、該フィルム基板の表面に描画された内部電極と、
前記フィルム基板を貫通して前記内部電極に電気接続され、前記フィルム基板の裏面側に形成されたバンプ電極と、前記フィルム基板の表面に固定された、光信号と電気信号とを変換する半導体チップと、前記半導体チップを被覆してパッケージ外形を形成する樹脂層と、前記半導体チップの上部に設けられた反射面とを具備し、
前記パッケージ外形の側面から入出する光信号を前記反射面で反射させて前記半導体チップ表面に到達するように構成したことを特徴とするものである。
【０００９】
【発明の実施の形態】
以下、本発明の第１の実施の形態を図面を参照しながら、詳細に説明する。本実施の形態は受光素子２と発光素子３とを１つのパッケージに収納したもので、図１（Ａ）（Ｂ）は本発明の構造を示す断面図、図２は平面図である。尚、図１（Ａ）は受光素子３部分のＡＡ線断面図を、図１（Ｂ）は発光素子３部分のＢＢ線断面図を各々示している。
【００１０】
これらの図中、符号２０はフィルム基板を示している。フィルム基板２０は膜厚が６０〜１２０μｍ程度のエポキシ系絶縁フィルムからなり、その中央付近には半導体チップを搭載するための領域が２箇所に設けられ、その周辺には金メッキ層によって内部電極２１が描画されている。前記２箇所の領域には、受光素子２と発光素子３とが各々絶縁性の接着剤によって固定されている。
【００１１】
受光素子２は、半導体チップとして提供されたＰＩＮホトダイオード等であり、これと共にＢＩＰ型素子、ＭＯＳ型素子等による、周辺の駆動回路等を同一チップ上に集積化した半導体チップでもよい。図２の符号ＰＤは受光素子２のホトダイオード部分（受光面）を示している。半導体チップの表面には電極パッド２２が形成され、ボンディングワイヤ２３によって電極パッド２２と内部電極２１とが接続されている。
【００１２】
発光素子３は、例えば波長８７０ｎｍの赤外光を発光するＬＥＤダイオードチップである。ＬＥＤはＧａＡｓのような化合物半導体からなり、チップの全体で発光して全方位に光が発散する素子である。そのため、チップ周囲に円錐形の「お椀」のような形状の反射板を形成し、発光素子３からの光信号６を傾斜した側壁で上方向に反射させ、光を集めるような構造とするのもよい。
【００１３】
フィルム基板２０上に固着された発光素子２と受光素子３は、赤外光あるいは紫外光に対して透明な樹脂でトランスファーモールドされる。樹脂は封止体２４を構成し、フィルム基板２１の裏面側は露出する。
【００１４】
フィルム基板２０の裏面側には、多数のバンプ電極２５を有する。フィルム基板２１の所望箇所に貫通孔（図示せず）が設けられており、この貫通孔を介して、バンプ電極２５と内部電極２１とが電気的に接続している。そして、バンプ電極２５を外部接続用の端子としてこの封止体２４が実装される。
【００１５】
而して、受光素子２のホトダイオード部分ＰＤの上部には、樹脂を凹ませた溝２６を形成し、溝２６の側壁によって平坦な反射面２７を構成している。反射面２７は、水平面に対して３５〜４５度程度の傾斜角度を有し、封止体２４をトランスファーモールドする際に、金型に溝２６に対応する雄型部分を形成しておくことによって形成するか、あるいは完成後に封止体２４の表面を削ることで形成される。そして、反射面２７は、封止体２４の側面２５ａから導入させた光信号６を、反射させて受光素子２のホトダイオード部分ＰＤに到達させる役割を果たす。
【００１６】
尚、反射面２７は、その境界における材料の屈折率の違いにより反射面となる。そのために、封止体２４の全体が梨地加工されているのに対して、反射面２７表面はそれより表面荒さが小さい鏡面加工としている。反射面２７に関しては、反射率を向上するために、その表面を遮光性の金属被膜などで覆っても良い。更には、集光が可能なパラボラ状の湾曲面としても良い。
【００１７】
上記の受光素子２に対して、発光素子３側にも同様に溝２６と反射面２７とを形成する。受光素子２側とはその傾斜角度などの設計を別にできるように別個に設けてあるが、１個の連続した溝でも形成が可能である。発光素子３から発光された信号光６を反射面２７で反射し、封止体２４の側面２５ａから外部に出射する機能を有する。
【００１８】
封止体２４の側面２４ａは、金型から引き抜くために５〜１０度のテーパ角θを有している。このテーパ角θにより、側面２４ａで光信号６が屈曲して封止体２４内部を伝搬する。反射面２７は、封止体２４内部で伝搬する光信号６の角度に合わせて、受光素子２又は発光素子３のチップ表面に対して垂直に光信号６が出入射できるように、その角度が設計されている。
【００１９】
側面２４ａから光信号６を出入射させるという制約上、反射面２７はホトダイオードＰＤの全表面と発光素子３の全表面を覆うことが必要である。この時に、ボンディングパッド２２と内部電極２１の配置を考慮することにより、ボンディングワイヤ２３が溝２６の最深部３０を横断しないように配置することができる（図２参照）。即ち、発光素子３にあっては内部電極２１を側面２４ａ側に配置すること、そして受光素子２にあってはボンディングパッド２２と内部電極２１を他の側面２４ｂ側に配置するのである。これにより、ボンディングワイヤ２３が溝２６の最深部３０よりも高い位置を通過しても両者の干渉を防止でき、溝２６を深く形成することができる。溝２６を深くできることは、封止体２４の高さｔを薄くできるのである。
【００２０】
この様に、光信号６の伝達経路を折り曲げることによって、封止体２４の厚みｔが薄い半導体装置を得ることができる。これによって、係る装置をプリント基板上に表面実装した時にプリント基板全体の高さを低く抑えることができ、更には前記プリント基板に対して水平方向に光信号６を出入射することができるので、電子機器の薄形化を推進することができるものである。尚、光半導体装置としては、受光素子２と発光素子３の両方を封止した構造の他、どちらか一方を封止した装置であっても良い。
【００２１】
図３は、本発明の第２の実施の形態を説明するための平面図である。封止体２４の側面２４ａに凸状の湾曲面からなるレンズ２８を形成した例である。同一箇所には同一の符号を付して説明を省略する。
【００２２】
レンズ２８は、封止体２４の樹脂層と一体的に形成するのが簡便であり、その表面は受光素子２又は発光素子３の表面に対して垂直な中心軸に対して半径ｒをもつ円筒曲面（但し金型からのはく離を考慮したテーパ角θを有する）の一部で構成されるか、あるいは半径ｒの球面の一部で構成されている。これらのレンズ２８は、反射面２７での反射を考慮した上で、受光素子２のホトダイオード部分ＰＤの表面または発光素子３の表面か、或いは表面よりもやや深い位置に焦点を持つように考慮されている。そして、レンズ２８は、封止体２４の他の側面２４ａから出入射させる光信号６を集光する役割を果たす。集光機能を持たせることにより、発光強度／受光感度を増大することができる。
【００２３】
【発明の効果】
以上説明したように、本発明によれば、反射面２７を設けることにより光信号６を反射させて受光素子２に到達させる構成としたので、樹脂の側面２４ａから光信号６の出入斜を行える光半導体装置を実現できる利点を有する。この装置は、封止体２４の全体の高さｔを薄くできるので、プリント基板に実装したときに大幅な薄形化を実現できるものである。
【００２４】
また、フィルム基板２０を用いることにより、内部電極２１を任意の位置に配置できるので、ボンディングワイヤ２３と溝２６の最深部３０との干渉を防止した配置が可能である利点を有する。
【００２５】
さらに、リードレスタイプであるので、装置の実装面積を低減できる利点を有する。
【図面の簡単な説明】
【図１】第１の実施の形態を説明する断面図である。
【図２】第１の実施の形態を説明する平面図である。
【図３】第２の実施の形態を説明する平面図である。
【図４】従来例を説明する斜視図である。
【図５】従来例を説明する斜視図である。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an optical semiconductor device in which a light receiving element or a light emitting element and a light receiving element are sealed with a resin, and more particularly, to a reduction in the thickness of the device.
[0002]
[Prior art]
Recently, multimedia devices such as sub-notebook computers, personal digital assistants, and electronic still cameras have made remarkable progress. Since these devices require portability, they are required to be easy to send and receive data to and from the outside, and have a device that connects the external device and the main body cordlessly using an optical signal such as infrared rays. There are many. Among them, the IrDA (Infrared Data Association) standard that uses infrared light having a wavelength of 870 nm as an optical signal is most popular.
[0003]
In order to use IrDA communication, it is necessary that both devices to be connected have a light emitting element that emits an infrared signal and a light receiving element that receives the infrared signal. The light emitting element and the light receiving element may be incorporated in the electronic device as separate packages, respectively, or may be supplied as a module housed in one package.
[0004]
FIG. 4 shows an example of a semiconductor device for infrared data communication in which a light emitting element and a light receiving element are housed in one package (for example, Japanese Patent Laid-Open No. 10-70304). In this apparatus, a light receiving element 2 and a light emitting element 3 provided in the form of a semiconductor chip are housed in the apparatus main body 1, and are molded with a resin that is transparent to at least infrared rays. In particular, in the light receiving element 2, a light receiving photodiode PD and a peripheral circuit such as an amplifier circuit may be integrated in the same chip.
[0005]
The photodiode PD of the light receiving element 2 provided in the semiconductor chip has a structure for receiving light in a direction perpendicular to the surface of the semiconductor chip. Therefore, both the light receiving element 2 and the light emitting element 3 are configured to emit / receive the optical signal 6 perpendicular to the semiconductor chip. A hemisphere is formed above each element for condensing the optical signal 6. The lenses 4 and 5 are made of resin.
[0006]
[Problems to be solved by the invention]
In order to meet the demand for reduction in size and size in electronic devices, it is indispensable to limit the height of the electronic component itself that is fixed on the printed circuit board. However, when the apparatus main body 1 of FIG. 5 is mounted so that the optical signal 6 is introduced in a direction perpendicular to the printed circuit board, the height of the apparatus main body 1 is high due to the presence of the lenses 4, 5, etc. There were drawbacks that were difficult.
[0007]
On the other hand, as shown in FIG. 5, the optical signal 6 can be introduced in the horizontal direction with respect to the printed circuit board 7 by bending the lead and placing the lenses 4 and 5 sideways. However, since the semiconductor chips of the light receiving element 2 and the light emitting element 3 are mounted so as to stand vertically, it is impossible in principle to make the height during mounting below the size of the semiconductor chip. There was a drawback that it was difficult to form.
[0008]
[Means for Solving the Problems]
The present invention has been made in view of the aforementioned problems, a film substrate, an internal electrode drawn on the surface of the film substrate,
A semiconductor chip that passes through the film substrate and is electrically connected to the internal electrode and formed on the back side of the film substrate, and a semiconductor chip that is fixed to the surface of the film substrate and converts an optical signal and an electrical signal And a resin layer that covers the semiconductor chip to form a package outer shape, and a reflective surface provided on the semiconductor chip,
An optical signal entering / exiting from the side surface of the package outer shape is reflected by the reflecting surface and reaches the surface of the semiconductor chip.
[0009]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a first embodiment of the present invention will be described in detail with reference to the drawings. In this embodiment, the light receiving element 2 and the light emitting element 3 are housed in one package. FIGS. 1A and 1B are cross-sectional views showing the structure of the present invention, and FIG. 2 is a plan view. 1A shows a cross-sectional view taken along the line AA of the light receiving element 3 portion, and FIG. 1B shows a cross-sectional view taken along the line BB of the light emitting element 3 portion.
[0010]
In these drawings, reference numeral 20 denotes a film substrate. The film substrate 20 is made of an epoxy insulating film having a film thickness of about 60 to 120 μm, and two regions for mounting a semiconductor chip are provided in the vicinity of the center, and the inner electrode 21 is formed by a gold plating layer in the periphery thereof. Has been drawn. In the two regions, the light receiving element 2 and the light emitting element 3 are respectively fixed by an insulating adhesive.
[0011]
The light receiving element 2 is a PIN photodiode or the like provided as a semiconductor chip, and may be a semiconductor chip in which peripheral drive circuits and the like, such as a BIP type element and a MOS type element, are integrated on the same chip. 2 indicates a photodiode portion (light receiving surface) of the light receiving element 2. Electrode pads 22 are formed on the surface of the semiconductor chip, and the electrode pads 22 and the internal electrodes 21 are connected by bonding wires 23.
[0012]
The light emitting element 3 is an LED diode chip that emits infrared light having a wavelength of 870 nm, for example. The LED is an element made of a compound semiconductor such as GaAs, and emits light in all directions and emits light in all directions. For this reason, a conical reflector like a bowl is formed around the chip, and the light signal 6 from the light emitting element 3 is reflected upward by the inclined side wall to collect light. Also good.
[0013]
The light emitting element 2 and the light receiving element 3 fixed on the film substrate 20 are transfer molded with a resin transparent to infrared light or ultraviolet light. The resin constitutes the sealing body 24, and the back side of the film substrate 21 is exposed.
[0014]
A large number of bump electrodes 25 are provided on the back side of the film substrate 20. A through hole (not shown) is provided at a desired location on the film substrate 21, and the bump electrode 25 and the internal electrode 21 are electrically connected through the through hole. Then, the sealing body 24 is mounted using the bump electrode 25 as a terminal for external connection.
[0015]
Thus, a groove 26 in which resin is recessed is formed in the upper portion of the photodiode portion PD of the light receiving element 2, and a flat reflecting surface 27 is constituted by the side wall of the groove 26. The reflection surface 27 has an inclination angle of about 35 to 45 degrees with respect to the horizontal plane, and a male part corresponding to the groove 26 is formed in the mold when the sealing body 24 is transfer molded. It is formed by cutting the surface of the sealing body 24 after completion. The reflecting surface 27 plays a role of reflecting the optical signal 6 introduced from the side surface 25 a of the sealing body 24 to reach the photodiode portion PD of the light receiving element 2.
[0016]
The reflecting surface 27 becomes a reflecting surface due to the difference in the refractive index of the material at the boundary. Therefore, the entire sealing body 24 is satin-finished, whereas the surface of the reflecting surface 27 is mirror-finished with a smaller surface roughness. As for the reflection surface 27, the surface thereof may be covered with a light-shielding metal film in order to improve the reflectance. Furthermore, it may be a parabolic curved surface capable of condensing light.
[0017]
Similarly to the light receiving element 2, a groove 26 and a reflecting surface 27 are formed on the light emitting element 3 side. It is provided separately from the light receiving element 2 side so that the design such as the inclination angle can be made separately, but it can also be formed by one continuous groove. The signal light 6 emitted from the light emitting element 3 is reflected by the reflection surface 27 and emitted from the side surface 25a of the sealing body 24 to the outside.
[0018]
The side surface 24a of the sealing body 24 has a taper angle θ of 5 to 10 degrees in order to be pulled out from the mold. Due to the taper angle θ, the optical signal 6 is bent at the side surface 24 a and propagates inside the sealing body 24. The angle of the reflecting surface 27 is adjusted so that the optical signal 6 can enter and exit perpendicularly to the chip surface of the light receiving element 2 or the light emitting element 3 according to the angle of the optical signal 6 propagating inside the sealing body 24. Designed.
[0019]
Due to the restriction that the optical signal 6 enters and exits from the side surface 24 a, the reflecting surface 27 needs to cover the entire surface of the photodiode PD and the entire surface of the light emitting element 3. At this time, it is possible to arrange the bonding wire 23 so as not to cross the deepest portion 30 of the groove 26 by considering the arrangement of the bonding pad 22 and the internal electrode 21 (see FIG. 2). That is, in the light emitting element 3, the internal electrode 21 is arranged on the side surface 24a side, and in the light receiving element 2, the bonding pad 22 and the internal electrode 21 are arranged on the other side surface 24b side. Thereby, even if the bonding wire 23 passes through a position higher than the deepest portion 30 of the groove 26, interference between the two can be prevented, and the groove 26 can be formed deeply. The fact that the groove 26 can be deepened can reduce the height t of the sealing body 24.
[0020]
In this way, by bending the transmission path of the optical signal 6, a semiconductor device in which the thickness t of the sealing body 24 is thin can be obtained. As a result, the height of the entire printed circuit board can be kept low when such a device is surface-mounted on the printed circuit board, and further, the optical signal 6 can enter and exit in the horizontal direction with respect to the printed circuit board. It is possible to promote thinning of electronic devices. In addition, as an optical semiconductor device, in addition to the structure in which both the light receiving element 2 and the light emitting element 3 are sealed, a device in which either one is sealed may be used.
[0021]
FIG. 3 is a plan view for explaining a second embodiment of the present invention. This is an example in which a lens 28 having a convex curved surface is formed on the side surface 24 a of the sealing body 24. The same parts are denoted by the same reference numerals, and description thereof is omitted.
[0022]
The lens 28 is easily formed integrally with the resin layer of the sealing body 24, and the surface thereof is a cylinder having a radius r with respect to the central axis perpendicular to the surface of the light receiving element 2 or the light emitting element 3. It is constituted by a part of a curved surface (however, it has a taper angle θ considering separation from the mold) or a part of a spherical surface having a radius r. These lenses 28 are considered so as to have a focal point on the surface of the photodiode portion PD of the light receiving element 2, the surface of the light emitting element 3, or a slightly deeper position than the surface in consideration of reflection on the reflection surface 27. ing. The lens 28 serves to collect the optical signal 6 that enters and exits from the other side surface 24 a of the sealing body 24. By providing the light collecting function, the light emission intensity / light receiving sensitivity can be increased.
[0023]
【The invention's effect】
As described above, according to the present invention, since the optical signal 6 is reflected to reach the light receiving element 2 by providing the reflective surface 27, the optical signal 6 can be entered and exited from the side surface 24a of the resin. It has an advantage that an optical semiconductor device can be realized. Since this device can reduce the overall height t of the sealing body 24, it can achieve a significant reduction in thickness when mounted on a printed circuit board.
[0024]
Moreover, since the internal electrode 21 can be disposed at an arbitrary position by using the film substrate 20, there is an advantage that an arrangement in which interference between the bonding wire 23 and the deepest portion 30 of the groove 26 can be prevented is possible.
[0025]
Furthermore, since it is a leadless type, there is an advantage that the mounting area of the apparatus can be reduced.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view illustrating a first embodiment.
FIG. 2 is a plan view for explaining the first embodiment;
FIG. 3 is a plan view for explaining a second embodiment;
FIG. 4 is a perspective view illustrating a conventional example.
FIG. 5 is a perspective view illustrating a conventional example.

Claims (3)

フィルム基板と、該フィルム基板の表面に描画された内部電極と、前記フィルム基板を貫通して前記内部電極に電気接続され、前記フィルム基板の裏面側に形成されたバンプ電極と、前記フィルム基板の表面に固定された発光素子と、前記半導体チップを被覆してパッケージ外形を形成する樹脂層と、前記半導体チップの上部に設けられた溝からなる反射面とを具備し、前記発光素子から発光した光が、前記反射面で反射されて前記パッケージ外形の一側面から出力される半導体装置であって、
前記内部電極と前記発光素子とは、ボンディングワイヤにより電気的に接続され、
前記内部電極は、前記ボンディングワイヤが前記溝の最深部を横断しないように配置されることを特徴とする光半導体装置。A film substrate; an internal electrode drawn on the surface of the film substrate; a bump electrode formed on the back side of the film substrate that is electrically connected to the internal electrode through the film substrate; A light emitting element fixed on the surface; a resin layer covering the semiconductor chip to form a package outer shape; and a reflecting surface including a groove provided on the semiconductor chip, and emitting light from the light emitting element. A semiconductor device in which light is reflected from the reflecting surface and output from one side of the package outer shape,
The internal electrode and the light emitting element are electrically connected by a bonding wire,
The internal electrode is arranged so that the bonding wire does not cross the deepest part of the groove . 前記パッケージ外形における前記一側面と対向する他側面と、前記最深部と、の間には、前記内部電極は配置されないことを特徴とする請求項１に記載の光半導体装置。The optical semiconductor device according to claim 1 , wherein the internal electrode is not disposed between the other side surface facing the one side surface of the package outer shape and the deepest portion . 前記反射面は、前記発光素子の全表面を覆うように配置されていることを特徴とする請求項２記載の光半導体装置。The optical semiconductor device according to claim 2 , wherein the reflecting surface is disposed so as to cover the entire surface of the light emitting element .
JP29554998A 1998-10-16 1998-10-16 Optical semiconductor device Expired - Fee Related JP3976420B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29554998A JP3976420B2 (en) 1998-10-16 1998-10-16 Optical semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29554998A JP3976420B2 (en) 1998-10-16 1998-10-16 Optical semiconductor device

Publications (2)

Publication Number Publication Date
JP2000124478A JP2000124478A (en) 2000-04-28
JP3976420B2 true JP3976420B2 (en) 2007-09-19

Family

ID=17822092

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29554998A Expired - Fee Related JP3976420B2 (en) 1998-10-16 1998-10-16 Optical semiconductor device

Country Status (1)

Country Link
JP (1) JP3976420B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010258308A (en) 2009-04-27 2010-11-11 Sharp Corp Semiconductor device and connector
JP5524301B2 (en) * 2012-09-07 2014-06-18 シャープ株式会社 Semiconductor module
US10720545B2 (en) 2016-05-27 2020-07-21 Rohm Co., Ltd. Semiconductor device

Also Published As

Publication number Publication date
JP2000124478A (en) 2000-04-28

Similar Documents

Publication Publication Date Title
KR100459347B1 (en) Optic semiconductor device and optic semiconductor module mounting optic semiconductor device
TWI257709B (en) Optical communication module
JPH1126816A (en) Inferred data communication module
US20080173790A1 (en) Motion-detecting module with a built-in light source
JP3851418B2 (en) Infrared data communication module
US7302125B2 (en) Optical device and optical apparatus
US20070194339A1 (en) Optical data communication module
JP4172558B2 (en) Infrared communication device
JP3976420B2 (en) Optical semiconductor device
JP4969055B2 (en) Optical communication module
JP3985363B2 (en) Optical transmission element
JP2000077686A (en) Mounting structure of semiconductor device
JP3976419B2 (en) Optical semiconductor device
JP4159147B2 (en) Semiconductor device
JP2000124479A (en) Optical semiconductor device
JP2000133834A (en) Optical semiconductor device
JP4301588B2 (en) Photocoupler device
JPH1041539A (en) Structure of inflared ray transmitting/receiving module
JP2000068531A (en) Optical semiconductor device
JPH11330539A (en) Optical semiconductor device
JP2000077685A (en) Mounting structure of semiconductor device
JP2000124476A (en) Optical semiconductor device
JP3115773B2 (en) Plug / Jack type shared optical transmission equipment
TW406439B (en) Photo semiconductor device and a semiconductor module having such photo semiconductor device
JP2001168376A (en) Infrared data communication module

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20040914

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20051227

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20070221

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070227

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070419

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20070522

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20070619

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100629

Year of fee payment: 3

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110629

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110629

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120629

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130629

Year of fee payment: 6

LAPS Cancellation because of no payment of annual fees