JP3958454B2 - Method for forming isolation film of semiconductor element - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor element, and more particularly, to a method for forming an isolation film of a semiconductor element suitable for electrical isolation between fine elements.
[0002]
[Prior art]
In general, one of the most widely used methods for electrical isolation between devices is a selective oxidation process (LOCOS). However, this LOCOS process can hardly be used in a process with a design standard of 0.2 μm or less. Generally, there are a conventional LOCOS method, an NSL (Nitride Sidewall LOCOS) method, a trench isolation method, and the like as element isolation methods.
[0003]
Hereinafter, a conventional method for forming an isolation film of a semiconductor device will be described with reference to the accompanying drawings.
FIGS. 1a to 1c and FIGS. 2a to 2c are process sectional views for explaining a conventional NSL (Nitride Sidewall LOCOS) method. The NSL method is similar in process to the conventional LOCOS method, except that the side wall is formed by etching the substrate to a predetermined depth prior to forming the field oxide film.
[0004]
That is, as shown in FIG. 1a, after the initial oxide film 12 is grown on the semiconductor substrate 11, the first silicon nitride film 13 is formed on the initial oxide film 12 by vapor deposition.
As shown in FIG. 1b, an active mask 14 is used to divide an active region in an actual element formation region and a field region that plays an electrical insulating role between the elements.
[0005]
As shown in FIG. 1c, a part of the first silicon nitride film 13 is selectively removed using an active mask 14 in an etching process. Then, ion implantation is performed using the first silicon nitride film 13 as a mask.
[0006]
As shown in FIG. 2a, a second silicon nitride film 15 is formed on the entire surface of the semiconductor substrate 11 including the first silicon nitride film 13 by vapor deposition.
As shown in FIG. 2B, a portion of the second silicon nitride film 15 is etched using an etch back process to form sidewalls 15a on both side surfaces of the first silicon nitride film 13. Next, as shown in FIG. Next, the trench 16 is formed by etching the surface of the semiconductor substrate 11 to a predetermined depth in an etching process using the side wall 15a as a mask. Thereafter, as shown in FIG. 2c, the field oxide film 17 is selectively grown by heat treatment in a high temperature furnace. This completes the conventional NSL process.
[0007]
3a to 3c, 4a, and 4b are process cross-sectional views for explaining a conventional trench isolation method.
As shown in FIG. 3A, after an initial oxide film 22 is grown on the semiconductor substrate 21, a silicon nitride film 23 is formed on the initial oxide film 22 by vapor deposition.
[0008]
As shown in FIG. 3b, the silicon nitride film 23 and a part of the initial oxide film 22 are selectively removed by an etching process using an active mask (not shown), and a part of the semiconductor substrate 21 is selectively selected. Expose.
[0009]
Thereafter, as shown in FIG. 3c, the surface of the semiconductor substrate 21 exposed in the etching process is etched to a predetermined depth using the silicon nitride film 23 as a mask to form a trench 24. Next, as shown in FIG.
[0010]
As shown in FIG. 4a, an insulating film 25 is formed on the entire surface of the semiconductor substrate 21 including the trench 24 by vapor deposition.
As shown in FIG. 4b, the field oxide film 25a is formed by removing the unnecessary insulating film 25 in the CMP process. This completes the trench isolation process according to the prior art.
[0011]
[Problems to be solved by the invention]
However, the conventional method for forming an isolation film for a semiconductor device has the following problems.
[0012]
(1) When the conventional conventional LOCOS method is used, if the width of the isolation region between the elements is 1 μm or less, the phenomenon that the thickness of the field oxide film becomes thin (thinning phenomenon) occurs, and the thickness is 0.5 μm or less. If it becomes, the thinning phenomenon will become worse. For this reason, it is impossible to apply the conventional LOCOS method to a micro device because a bird's beak in which a part of the field oxide film enters the active region is generated and the active region is reduced.
[0013]
(2) When the NSL method is used, it is advantageous in that no bird's beak occurs. However, when the field oxide film 25a is formed by etching the semiconductor substrate 21, the lower portion of the field oxide film 25a is not rounded, and a sharp portion is formed. For this reason, the stress increases from the sharp part, eventually increasing the leakage current, which is a factor that adversely affects the device characteristics. Further, since the thinning phenomenon of the field oxide film 25a also occurs, the amount of growth of the oxide film 25a from the surface of the substrate 21 to the inside is insufficient and the isolation characteristics become unstable.
[0014]
(3) When the trench isolation method is used, although the element isolation characteristic can be improved as compared with the conventional LOCOS, it is difficult to form a trench and embed an insulating film in the trench. In addition, by applying the CMP process, fine particles are generated and the process becomes complicated, which increases TAT (Turn Around Time) and cost.
[0015]
The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a method for forming an isolation film of a semiconductor device suitable for realizing a highly integrated semiconductor device by improving isolation characteristics between the devices. There is to do.
[0016]
[Means for Solving the Problems]
The method for forming an isolation film of a semiconductor device according to claim 1 for achieving the above object includes the steps of: forming a first nitride film on a semiconductor substrate; and forming an oxide film on the first nitride film; forming an oxidation barrier layer pattern by patterning the first nitride film and the oxide film, forming a sidewall spacer on a side surface of the oxide barrier layer pattern, the oxide barrier layer pattern and the sidewall spacer as a mask And etching the substrate to form a trench having a tilted or vertical sidewall, and oxidizing the surface of the trench so that the sidewall of the trench moves below the sidewall spacer. A step of forming an insulating film, a step of implanting impurity ions into the bottom surface of the trench, and a step of forming a field oxide film in the trench by thermal oxidation. And effect.
[0018]
According to a second aspect of the invention, in the isolated membrane forming method as claimed in claim 1 wherein the step of forming a pre-Symbol sidewall spacer a second nitride film before Symbol oxidation barrier on the pattern and the substrate formed And a step of anisotropically etching the second nitride film to form the side wall spacer made of the second nitride film on the side surface of the antioxidant film pattern.
[0019]
The invention according to claim 3 is the semiconductor device isolation film forming method according to claim 1, wherein the impurity ions are fluorine ions or germanium ions.
[0020]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, a method for forming an isolation film of a semiconductor device according to the present invention will be described with reference to the accompanying drawings.
FIGS. 5a to 5c, FIGS. 6a to 6c, FIGS. 7a and 7b are process cross-sectional views for explaining a method of forming an isolation film of a semiconductor device according to the first embodiment of the present invention.
[0021]
As shown in FIG. 5 a, the first insulating layer 31 is formed on the semiconductor substrate 30, and the second insulating layer 32 and the third insulating layer 33 are sequentially formed on the first insulating layer 31. At this time, the first and third insulating layers 31 and 33 are silicon oxide films, and the second insulating layer 32 is a silicon nitride film. The second insulating layer 32 is used as a mask layer for masking the active region, and the third insulating layer 33 has an etching selectivity with respect to the second insulating layer 32 when the nitride film side wall 33a is formed in a subsequent process. Used to adjust
[0022]
Next, after applying a photoresist PR3 on the third insulating layer 33, patterning is performed to partition the element isolation region.
Usually, the structure of a silicon crystal having a specific crystal direction is determined by performing many steps for forming an element on the silicon substrate 30. For example, when the crystal direction of the silicon crystal is <111>, the surface density of atoms is higher, the silicon tension is higher, and the oxidation rate of silicon is faster than in the other direction. In a MOS device, a silicon substrate in the <100> direction is usually used.
[0023]
As shown in FIG. 5b, the third, second, and first insulating layers 33, 32, and 31 are sequentially etched using the patterned photoresist PR3 as a mask to mask the active region. An antioxidant pattern 32a and a pad oxide film 31a for preventing oxidation are formed. The active area of the substrate 30 is masked by the antioxidant pattern 32a. At this time, the side part of the antioxidant pattern 32a is exposed.
[0024]
As shown in FIG. 5c, a fourth insulating layer (not shown) made of a silicon nitride film is etched back on the antioxidant pattern 32a including the exposed substrate 30 using a chemical vapor deposition method. In this way, side walls 33a made of a silicon nitride film are formed on the side surfaces of the pad oxide film 31a and the antioxidant pattern 32a. At this time, when the fourth insulating layer is etched back to form the side wall 33a, the third insulating layer 33, which is a silicon oxide film constituting the antioxidant pattern, is covered on the second insulating layer 32. The two insulating layers 32 are not etched.
[0025]
As shown in FIG. 6a, by anisotropically etching the substrate 30 in an etching process using the sidewall 33a as a mask, a trench 34 having a <100> direction on the bottom surface and a <111> direction on the side surface is formed. To do. At this time, the etching depth of the substrate 30 is adjusted to a depth of about half of the thickness of the field oxide film to be formed. In the trench 34, the silicon plane in the <111> direction is denser than the plane in the <100> direction, and the etching rate is lower.
[0026]
When the substrate 30 is wet-etched, 23 wt% KOH and 13 wt% CH3, CHOH, and CH3 are mixed and used as an etching solution. When etching is performed using this type of etching solution, the etching rate is larger in the <100> direction than in the <111> direction. When dry etching is performed, it is preferable to use a double plasma etching apparatus.
[0027]
As shown in FIG. 6b, a thermal oxide film 35 is grown on both sides and bottom of the trench 34 in an oxidizing atmosphere. At this time, the side surface and the bottom surface of the trench 34 have different directions, and the growth rate of the thermal oxide film 35 on the side surface is faster than that of the bottom surface. Thereby, the thickness of the thermal oxide film 35 on the side surface becomes larger than the thickness of the thermal oxide film 35 on the bottom surface. Further, when viewed from the growth rate of the thermal oxide film 35, the bottom surface of the trench 34 is in the <100> direction and the side surface is in the <111> direction, and the growth rate of the thermal oxide film 35 at a lower temperature is substantially lower than the bottom surface. About 67% larger. Therefore, the grown thermal oxide film 35 has a larger inclination on the side surface in the <111> direction than the bottom surface in the <100> direction.
[0028]
As shown in FIG. 6c, impurity ions that accelerate the bottom surface oxidation rate, such as inert ions (F) or germanium (Ge) ions, are implanted into the substrate 30 to form a heavily doped impurity layer. At this time, the side surface of the trench 34 is doped with some impurities (not shown), and most of the impurities are doped on the bottom surface of the trench. Here, the inclination angle on the side surface in the <111> direction has an inclination of about 55 ° with respect to the bottom surface of the trench in the <100> direction.
[0029]
As shown in FIG. 7a, the thermal oxide film 35 in the trench 34 is removed. The thermal oxide film 35 can be easily removed by a wet etching process using an etching solution having an etching selection ratio of the sidewall 33a, the silicon substrate 30, and the pad oxide film 31a.
[0030]
As shown in FIG. 7b, a field oxide film 37 having a thickness of 200 to 1000 nm is grown by thermal growth for 2 to 4 hours at a temperature of 900 to 1100 ° C. in an oxidizing atmosphere.
[0031]
Here, after removing the thermal oxide film 35, the field oxide film is grown by the thermal oxidation process without removing the thermal oxide film 35 in addition to the process of FIG. May be.
[0032]
After the field oxide film 37 is grown, the anti-oxidation pattern 32a and the pad oxide film 31a are removed to expose the active region. The antioxidant pattern 32a and the pad oxide film 31a can be easily removed by isotropic wet etching.
[0033]
In the first embodiment, the oxidation rate on the side surface of the trench 34 is slowed by injecting an impurity for promoting the oxidation rate into the center of the bottom surface of the trench. Therefore, it is possible to effectively prevent the field oxide film 37 from entering the active region and to prevent the occurrence of bird's beak. In addition, since the oxidation rate on the side surface of the trench 34 is different from the oxidation rate on the bottom surface, occurrence of a bird's head is prevented.
[0034]
Furthermore, since the silicon oxide film 33 is formed on the silicon nitride film 32 in consideration of the etching selectivity between the silicon nitride film 32 and the side walls 33a constituting the antioxidant pattern 32a, the antioxidant pattern 32a is prevented from being oxidized. Increased reliability of effect.
[0035]
8a to 8c and FIGS. 9a to 9c are process cross-sectional views for explaining a method of forming an isolation film of a semiconductor device according to a second embodiment of the present invention.
As shown in FIG. 8 a, the first insulating layer 41 is formed on the semiconductor substrate 40, and the second insulating layer 42 and the third insulating layer 43 are sequentially formed on the first insulating layer 41. At this time, the first and third insulating layers 41 and 43 are silicon oxide films, and the second insulating layer 42 is a silicon nitride film. The second insulating layer 42 is used as a mask layer for masking the active region, and the third insulating layer 43 has an etching selectivity with respect to the second insulating layer 42 when the nitride film side wall 43a is formed in a subsequent process. Used to adjust
[0036]
Next, after applying a photoresist PR4 on the third insulating layer 43, patterning is performed to partition the element isolation region.
As shown in FIG. 8b, the third, second, and first insulating layers 43, 42, and 41 are sequentially etched using the patterned photoresist PR4 as a mask to mask the active region to prevent oxidation. For this purpose, an anti-oxidation pattern 42a and a pad oxide film 41a are formed. The active area of the substrate 40 is masked by the antioxidant pattern 42a. At this time, the side portion of the antioxidant pattern 42a is exposed.
[0037]
As shown in FIG. 8c, a fourth insulating layer (not shown) made of a silicon nitride film is formed on the antioxidant pattern 42a including the exposed substrate 40 using a chemical vapor deposition method and etched back. . Thus, the side wall 43a made of the silicon nitride film is formed on the side surfaces of the pad oxide film 41a and the antioxidant pattern 42a. At this time, when the fourth insulating layer is etched back to form the side wall 43a, the third insulating layer 43, which is a silicon oxide film constituting the antioxidant pattern 42a, is covered on the second insulating layer 42. The second insulating layer 42 is not etched.
[0038]
As shown in FIG. 9a, by anisotropically etching the substrate 40, a trench 44 having a horizontal bottom surface and a side surface perpendicular to the bottom surface is formed. At this time, the trench 44 is formed to a depth of about half the required thickness of the field oxide film.
[0039]
As shown in FIG. 9 b, inert ions or germanium ions having low energy are implanted into the trench 44. As a result, a heavily doped impurity layer 46 is formed on the substrate 40 immediately below the bottom surface of the trench 44. This impurity layer 46 accelerates the growth rate of the oxide film during the thermal oxidation process.
[0040]
As shown in FIG. 9c, a field oxide film 47 having a thickness of 200 to 1000 nm is grown by thermal growth at a temperature of 900 to 1100 ° C. for 2 to 4 hours in an oxidizing atmosphere.
[0041]
After the field oxide film 47 is grown, the anti-oxidation pattern 42a and the pad oxide film 41a are removed to expose the active region. The antioxidant pattern 42a and the pad oxide film 41a can be easily removed by isotropic wet etching.
[0042]
In the second embodiment, by implanting impurities into the center of the bottom surface of the trench 44, the oxidation rate on the side surface of the trench 44 becomes slow. Therefore, it is possible to effectively prevent the field oxide film 47 from entering the active region, and the occurrence of bird's big is prevented. In addition, since the oxidation rate at the side surface of the trench 44 is different from the oxidation rate at the bottom surface, occurrence of a bird's head is also prevented.
[0043]
【The invention's effect】
As described above, the method for forming an isolation film for a semiconductor device of the present invention has the following effects.
[0044]
According to the first aspect of the present invention, the impurity ions are implanted into the bottom surface of the trench before the field oxide film is grown, thereby slowing down the oxidation rate of the field oxide film on the side surface of the trench. Accordingly, the field oxide film is prevented from entering a predetermined region of the semiconductor substrate, so that the element isolation characteristics can be improved.
[0045]
According to the first aspect of the present invention, since the antioxidant film pattern is composed of the nitride film and the oxide film for preventing oxidation, the reliability of the antioxidant effect can be improved.
[0046]
According to the third aspect of the present invention, the use of F or Ge ions that do not react but influence the oxidation rate as inert ions can increase the oxidation rate at the bottom of the trench.
[Brief description of the drawings]
FIGS. 1A to 1C are process cross-sectional views for explaining a conventional NSL (Nitride Sidewall LOCOS) method.
FIGS. 2a to 2c are process cross-sectional views for explaining a conventional NSL method following FIG.
FIGS. 3A to 3C are process cross-sectional views for explaining a trench isolation method according to the prior art. FIGS.
4A and 4B are process cross-sectional views for explaining a conventional trench isolation method following FIG. 3;
FIGS. 5a to 5c are process cross-sectional views for explaining a method of forming a semiconductor element isolation film according to the first embodiment of the present invention; FIGS.
6A to 6C are process cross-sectional views for explaining the isolation film forming method for the semiconductor device according to the first embodiment following FIG. 5;
FIGS. 7A and 7B are process cross-sectional views for explaining the method of forming the isolation film for the semiconductor device according to the first embodiment following FIG. 6; FIGS.
FIGS. 8A to 8C are process cross-sectional views for explaining a method for forming an isolation film of a semiconductor device according to a second embodiment of the present invention. FIGS.
FIGS. 9A to 9C are process cross-sectional views for explaining a method of forming a semiconductor element isolation film according to the second embodiment following FIG. 8; FIGS.
[Explanation of symbols]
30, 40 ... Semiconductor substrates 37, 47 ... Field oxide films 32a, 43a ... Antioxidation pattern (antioxidation film pattern)
32, 42 ... second insulating layer (first nitride film)
33, 43 ... Third insulating layer (oxide film)
33a, 43a ... sidewalls (the sidewall spacer, the antioxidant film pattern and the sidewall spacer form a pattern)
34, 44 ... trench 35 ... thermal oxide film (insulating film)

Claims (3)

Forming a first nitride film on a semiconductor substrate and forming an oxide film on the first nitride film;
Patterning the first nitride film and the oxide film to form an antioxidant film pattern;
Forming sidewall spacers on the side surfaces of the antioxidant film pattern;
Etching the substrate using the antioxidant film pattern and the sidewall spacer as a mask to form a trench having a tilted or vertical sidewall; and
Oxidizing the surface of the trench to form an insulating film so that the sidewall of the trench moves below the sidewall spacer;
Implanting impurity ions into the bottom of the trench;
And a step of forming a field oxide film in the trench by thermal oxidation. Forming a pre-Symbol sidewall spacers,
Forming a second nitride film before Symbol oxidation barrier on the pattern and the substrate,
The semiconductor device according to claim 1, further comprising: anisotropically etching the second nitride film to form the sidewall spacer made of the second nitride film on a side surface of the antioxidant film pattern. Isolation film forming method.   2. The isolation film forming method for a semiconductor device according to claim 1, wherein the impurity ions are fluorine ions or germanium ions.

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