JP3936620B2 - High frequency module - Google Patents

High frequency module Download PDF

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Publication number
JP3936620B2
JP3936620B2 JP2002122376A JP2002122376A JP3936620B2 JP 3936620 B2 JP3936620 B2 JP 3936620B2 JP 2002122376 A JP2002122376 A JP 2002122376A JP 2002122376 A JP2002122376 A JP 2002122376A JP 3936620 B2 JP3936620 B2 JP 3936620B2
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JP
Japan
Prior art keywords
capacitor
electrode
frequency module
circuit
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2002122376A
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Japanese (ja)
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JP2003318321A (en
Inventor
謙一 太田
正之 藤本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
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Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
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Priority to JP2002122376A priority Critical patent/JP3936620B2/en
Publication of JP2003318321A publication Critical patent/JP2003318321A/en
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Publication of JP3936620B2 publication Critical patent/JP3936620B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Description

【0001】
【発明の属する技術分野】
本発明は、高周波モジュールに関し、特に、小型化を図ることが可能な高周波モジュールに関する。
【0002】
【従来の技術】
携帯電話機やPDA(Personal Digital Assistant)など、様々な移動体携帯通信端末が我々の日常生活に欠かせないものとなっている。
【0003】
そして、このような端末には、多機能、小型化、低消費電力化などが求められており、また、このような要求に対応するため、これらの端末の主要部品であるパワーアンプなどの高周波モジュールに対しても、さらなる高周波化、小型化、低消費電力化、低価格化などが求められている。
【0004】
ところで、このような高周波モジュールは、従来、アルミナや樹脂基板上に様々な部品を実装して構成されていた。
【0005】
これに対して近年、従来は、基板上に実装していた部品を半導体基板に組み込み、高周波モジュールを構成するといったアプローチが試みられている。
【0006】
【発明が解決しようとする課題】
しかし、基板上に実装していた各部品を素子や回路として半導体基板に組み込む方法では、各部品を実装した高周波モジュールに比べて小型化が図れるものの、バイアス回路や高周波回路の配線、素子など、半導体基板に並列に配設されるため、半導体基板の面積を縮小するには限界があった。
【0007】
また、バイアス回路上に高周波回路の配線や素子などを積層して形成することにより、半導体基板の面積を抑える構成も考えられているが、この構成の場合、バイアス回路のインダクタやコンデンサから生じる電界や磁界が高周波回路の配線に影響を与え、特性の劣化が生じるという問題があった。
【0008】
このため、バイアス回路と配線層との間に、このような影響を防止するに十分な距離を設ける必要があり、これが高周波モジュールの小型化を妨げていた。
【0009】
そこで本発明では、高周波回路の面積及び厚みを抑え、小型化を図ることが可能な高周波モジュールを提供することを目的とする。
【0010】
【課題を解決するための手段】
本発明に係る高周波モジュールは、バイアス回路を有する高周波回路を搭載した高周波モジュールにおいて、バイアス回路は、半導体基板上に形成された下部コンデンサと、上部コンデンサと、下部コンデンサと上部コンデンサとの間に挟まれて形成されたインダクタとを具備し、高周波回路の配線層は、バイアス回路上に層間絶縁膜を介して形成される。
【0011】
このため、高周波回路の配線は、バイアス回路と電磁気的に分離され、高周波回路の特性の劣化を防止すると共に、配線や素子の設計自由度が増し、高周波モジュールの小型化を図ることができる。
【0012】
また、上部コンデンサ及び下部コンデンサは、それぞれ下部電極と誘電体と上部電極とを積層した構成を有し、上部コンデンサは、上部電極を接地電極とし、下部コンデンサは、下部電極を接地電極とすることにより、π型のフィルタ回路が構成され、バイアス回路のフィルタ特性を向上させることができる。
【0013】
そして、上部コンデンサ及び下部コンデンサは、それぞれ異種材料の薄膜を積層して形成されることにより、高周波回路を薄く形成することができる。
【0014】
【発明の実施の形態】
以下、本発明に係わる高周波モジュールの実施の形態を添付図面を参照して詳細に説明する。
【0015】
図1は、本発明に係わる高周波モジュールの一実施の形態の構成を概念的に示した図である。
【0016】
図1において、高周波モジュール1は、半導体基板(Si基板)2をプラットフォームとして、その上に異種材料の薄膜を利用したバイアス回路3を有し、さらに、バイアス回路3上に高周波回路の配線層4が積層されている。
【0017】
また、バイアス回路3には、高周波チョークコイル5と、この高周波チョークコイルの上に形成された上部コンデンサ6、及び高周波チョークコイルの下に形成された下部コンデンサ7が設けられている。
【0018】
そして、配線層4には、GND電極8、及び高周波回路の配線9が設けられている。
【0019】
ここで、上部コンデンサ6及び下部コンデンサ7は、高周波大容量コンデンサであり、後に詳述するように、下部電極、容量絶縁膜、上部電極、例えば、Pt/SrTiO3/Ptの多層構造からなるMIMキャパシタとして形成され、また、高周波チョークコイル5は、インダクタ配線である。
【0020】
また、図2に回路図を示すように、バイアス回路を構成する下部コンデンサは、下部電極を接地電極とし、また、上部コンデンサは、上部電極を接地電極としてπ型のフィルタ回路を構成しており、これによりバイアス回路のフィルタ特性を向上させている。
【0021】
加えて、チョークインダクタの上下が高周波的に接地されているため、バイアス回路の電界、磁界が遮断が可能で、高周波回路の配線や素子の設計自由度が増し、回路特性の向上や高周波モジュールの小型化を図ることができる。
【0022】
次に、本発明に係る高周波モジュールの製造方法の一例を図3を参照して説明する。
【0023】
まず、Siなどの半導体からなる半導体基板2上に、図示しないSiO2膜を成膜する。
【0024】
そして、SiO2膜上に、下部電極10となるPt電極膜を形成し、このPt電極膜上に、強誘電体材料であるSrTiO3膜11をゾルゲル法、スパッタ法、CVD法等によって形成し、その上に上部電極12となるPt電極膜を形成して、図3(a)に示すように、Pt電極膜/SrTiO3膜/Pt電極膜の多層構造からなる大容量MIMキャパシタを下部コンデンサ7として形成する。
【0025】
また、SiO2膜及び下部コンデンサ7上に絶縁性材料であるポリイミドを塗布して第1の層間絶縁膜13を形成し、図3(b)に示すように、第1の層間絶縁膜13上に、チョークコイル5をパターニングする。
【0026】
ここで、第1の層間絶縁膜10及びチョークコイル5上に絶縁性材料であるポリイミドを塗布して第2の層間絶縁膜14を形成し、図3(c)に示すように、下部電極15であるPt電極膜、SrTiO3膜16、下部電極17であるPt電極膜を積層して、この多層構造からなる大容量MIMキャパシタを上部コンデンサ6としてチョークコイル5に対応する位置に形成して、上部コンデンサ6及び下部コンデンサ7との間にチョークコイル7が配設されたバイアス回路3を形成する。
【0027】
そして、上部コンデンサ6上にポリイミドを塗布して第3の層間絶縁膜18を形成し、この第3の層間絶縁膜18上に、図3(d)に示すように、Alからなる高周波回路のGND配線9を形成する。
【0028】
ここで、GND配線9上にポリイミドを塗布して第4の層間絶縁層19を形成し、この第4の層間絶縁膜19上に高周波回路の配線9及び図示しない高周波回路の素子を形成して、図3(e)に示すように、GND配線9及び配線9からなる高周波回路の配線層4を形成する。
【0029】
なお、上部コンデンサは、上部電極を接地電極として形成し、また、下部コンデンサは、下部電極を接地電極として形成する。
【0030】
【発明の効果】
本発明では、搭載する高周波回路の面積及び厚みを抑えた高周波モジュールを作成することができる。
【図面の簡単な説明】
【図1】 本発明に係わる高周波モジュールの構成を概念的に示す断面図
【図2】 本発明に係わる高周波モジュールのバイアス回路を示す回路図
【図3】 本発明に係わる高周波モジュールの製造方法を示す断面図
【符号の説明】
1…高周波モジュール
2…半導体基板
3…バイアス回路
4…配線層
5…チョークコイル
6…上部コンデンサ
7…下部コンデンサ
8…GND電極
9…配線
10、15…下部電極
11、16…SrTiO3
12、17…上部電極
13…第1の層間絶縁膜
14…第2の層間絶縁膜
18…第3の層間絶縁膜
19…第4の層間絶縁層
[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a high-frequency module, and more particularly to a high-frequency module that can be miniaturized.
[0002]
[Prior art]
Various mobile portable communication terminals such as mobile phones and PDAs (Personal Digital Assistants) are indispensable for our daily life.
[0003]
Such terminals are required to have multiple functions, downsizing, low power consumption, and the like, and in order to meet such demands, high frequency components such as power amplifiers which are the main components of these terminals Modules are also required to have higher frequencies, smaller sizes, lower power consumption, and lower prices.
[0004]
By the way, such a high-frequency module has been conventionally configured by mounting various components on alumina or a resin substrate.
[0005]
On the other hand, in recent years, an approach has been attempted in which a component mounted on a substrate is incorporated into a semiconductor substrate to constitute a high-frequency module.
[0006]
[Problems to be solved by the invention]
However, in the method of incorporating each component mounted on the substrate into the semiconductor substrate as an element or circuit, the size can be reduced compared to the high frequency module mounted with each component, but the bias circuit, the wiring of the high frequency circuit, the element, etc. Since the semiconductor substrate is arranged in parallel, there is a limit in reducing the area of the semiconductor substrate.
[0007]
In addition, a configuration that suppresses the area of the semiconductor substrate by stacking high-frequency circuit wirings and elements on the bias circuit is also considered. In this configuration, the electric field generated from the inductor and capacitor of the bias circuit is also considered. In addition, there is a problem that the magnetic field affects the wiring of the high frequency circuit and the characteristics are deteriorated.
[0008]
For this reason, it is necessary to provide a sufficient distance between the bias circuit and the wiring layer to prevent such an influence, which hinders the miniaturization of the high-frequency module.
[0009]
Therefore, an object of the present invention is to provide a high-frequency module that can reduce the size and size of the high-frequency circuit.
[0010]
[Means for Solving the Problems]
The high-frequency module according to the present invention is a high-frequency module including a high-frequency circuit having a bias circuit. The bias circuit is sandwiched between a lower capacitor formed on a semiconductor substrate, an upper capacitor, and a lower capacitor and an upper capacitor. The wiring layer of the high frequency circuit is formed on the bias circuit through an interlayer insulating film.
[0011]
For this reason, the wiring of the high-frequency circuit is electromagnetically separated from the bias circuit, preventing deterioration of the characteristics of the high-frequency circuit, increasing the degree of freedom in designing the wiring and elements, and reducing the size of the high-frequency module.
[0012]
Each of the upper capacitor and the lower capacitor has a structure in which a lower electrode, a dielectric, and an upper electrode are laminated. The upper capacitor uses the upper electrode as a ground electrode, and the lower capacitor uses the lower electrode as a ground electrode. Thus, a π-type filter circuit is configured, and the filter characteristics of the bias circuit can be improved.
[0013]
The upper capacitor and the lower capacitor are formed by laminating thin films of different materials, so that the high-frequency circuit can be thinly formed.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of a high-frequency module according to the present invention will be described in detail with reference to the accompanying drawings.
[0015]
FIG. 1 is a diagram conceptually showing the configuration of an embodiment of a high-frequency module according to the present invention.
[0016]
In FIG. 1, a high frequency module 1 has a bias circuit 3 using a thin film of a different material on a semiconductor substrate (Si substrate) 2 as a platform, and a wiring layer 4 of the high frequency circuit on the bias circuit 3. Are stacked.
[0017]
The bias circuit 3 is provided with a high frequency choke coil 5, an upper capacitor 6 formed on the high frequency choke coil, and a lower capacitor 7 formed below the high frequency choke coil.
[0018]
The wiring layer 4 is provided with a GND electrode 8 and a high-frequency circuit wiring 9.
[0019]
Here, the upper capacitor 6 and the lower capacitor 7 are high-frequency and large-capacity capacitors, and as will be described in detail later, a lower electrode, a capacitive insulating film, an upper electrode, for example, a MIM having a multilayer structure of Pt / SrTiO 3 / Pt. The capacitor is formed as a capacitor, and the high frequency choke coil 5 is an inductor wiring.
[0020]
As shown in the circuit diagram of FIG. 2, the lower capacitor constituting the bias circuit has a lower electrode as a ground electrode, and the upper capacitor has a π-type filter circuit with the upper electrode as a ground electrode. This improves the filter characteristics of the bias circuit.
[0021]
In addition, since the top and bottom of the choke inductor are grounded at high frequency, the electric field and magnetic field of the bias circuit can be cut off, increasing the design flexibility of the wiring and elements of the high frequency circuit, improving the circuit characteristics and improving the high frequency module. Miniaturization can be achieved.
[0022]
Next, an example of the manufacturing method of the high frequency module which concerns on this invention is demonstrated with reference to FIG.
[0023]
First, a SiO 2 film (not shown) is formed on a semiconductor substrate 2 made of a semiconductor such as Si.
[0024]
Then, a Pt electrode film to be the lower electrode 10 is formed on the SiO 2 film, and a SrTiO 3 film 11 that is a ferroelectric material is formed on the Pt electrode film by a sol-gel method, a sputtering method, a CVD method, or the like. Then, a Pt electrode film to be the upper electrode 12 is formed thereon, and as shown in FIG. 3A, a large-capacity MIM capacitor having a multilayer structure of Pt electrode film / SrTiO 3 film / Pt electrode film is formed as a lower capacitor. 7 is formed.
[0025]
Also, polyimide as an insulating material is applied on the SiO 2 film and the lower capacitor 7 to form a first interlayer insulating film 13, and as shown in FIG. Next, the choke coil 5 is patterned.
[0026]
Here, a polyimide, which is an insulating material, is applied on the first interlayer insulating film 10 and the choke coil 5 to form a second interlayer insulating film 14, and the lower electrode 15 is formed as shown in FIG. A Pt electrode film as SrTiO 3 film 16 and a Pt electrode film as a lower electrode 17 are laminated, and a large-capacity MIM capacitor having a multilayer structure is formed as an upper capacitor 6 at a position corresponding to the choke coil 5. A bias circuit 3 in which a choke coil 7 is disposed between the upper capacitor 6 and the lower capacitor 7 is formed.
[0027]
Then, a third interlayer insulating film 18 is formed by applying polyimide on the upper capacitor 6, and a high-frequency circuit made of Al is formed on the third interlayer insulating film 18 as shown in FIG. A GND wiring 9 is formed.
[0028]
Here, polyimide is applied on the GND wiring 9 to form a fourth interlayer insulating layer 19, and the high-frequency circuit wiring 9 and a high-frequency circuit element (not shown) are formed on the fourth interlayer insulating film 19. As shown in FIG. 3E, the wiring layer 4 of the high-frequency circuit including the GND wiring 9 and the wiring 9 is formed.
[0029]
The upper capacitor is formed with the upper electrode as a ground electrode, and the lower capacitor is formed with the lower electrode as a ground electrode.
[0030]
【The invention's effect】
In the present invention, a high-frequency module in which the area and thickness of a high-frequency circuit to be mounted can be suppressed can be created.
[Brief description of the drawings]
FIG. 1 is a sectional view conceptually showing the configuration of a high-frequency module according to the present invention. FIG. 2 is a circuit diagram showing a bias circuit of the high-frequency module according to the present invention. Sectional view shown [Explanation of symbols]
1 ... RF module 2 ... semiconductor substrate 3 ... bias circuit 4 ... wiring layer 5 ... choke coil 6 ... upper capacitor 7 ... lower capacitor 8 ... GND electrode 9 ... wire 10, 15 ... lower electrode 11, 16 ... SrTiO 3 film 12, 17 ... Upper electrode 13 ... First interlayer insulating film 14 ... Second interlayer insulating film 18 ... Third interlayer insulating film 19 ... Fourth interlayer insulating layer

Claims (2)

バイアス回路を有する高周波回路を搭載した高周波モジュールにおいて、
前記バイアス回路は、
半導体基板上に形成された下部コンデンサと、
上部コンデンサと、
前記下部コンデンサと前記上部コンデンサとの間に挟まれて形成されたインダクタと
を具備し、
前記上部コンデンサ及び前記下部コンデンサは、
それぞれ下部電極と誘電体と上部電極とを積層した構成を有し、
前記上部コンデンサは、前記上部電極を接地電極とし、
前記下部コンデンサは、前記下部電極を接地電極とし、
前記高周波回路の配線層は、前記バイアス回路上に層間絶縁膜を介して形成されてい
ことを特徴とする高周波モジュール。
In a high frequency module equipped with a high frequency circuit having a bias circuit,
The bias circuit includes:
A lower capacitor formed on a semiconductor substrate;
An upper capacitor;
An inductor formed by being sandwiched between the lower capacitor and the upper capacitor;
The upper capacitor and the lower capacitor are:
Each has a configuration in which a lower electrode, a dielectric, and an upper electrode are laminated,
The upper capacitor has the upper electrode as a ground electrode,
The lower capacitor uses the lower electrode as a ground electrode,
The wiring layer of high-frequency circuits, high-frequency module, wherein the Ru Tei is formed via an interlayer insulating film on the bias circuit.
前記上部コンデンサ及び下部コンデンサは、それぞれ異種材料の薄膜を積層して形成されていることを特徴とする請求項1記載の高周波モジュール。Wherein the upper capacitor and the lower capacitor, the high-frequency module according to claim 1, wherein Tei Rukoto is formed by laminating thin films of different materials, respectively.
JP2002122376A 2002-04-24 2002-04-24 High frequency module Expired - Fee Related JP3936620B2 (en)

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JP3936620B2 true JP3936620B2 (en) 2007-06-27

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101003587B1 (en) 2008-10-13 2010-12-22 삼성전기주식회사 CMOS Radio frequency integrated circuit

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