JP3854174B2 - Display device and manufacturing method thereof - Google Patents

Description

【００８９】
なお、本発明は前記した実施の形態に限定されることなく、この発明の範囲内で種々変形可能である。例えば、使用する材料は前記した実施の形態に限定されることなく、必要に応じて種々選択可能である。また、本発明は、ＦＥＤに限らず、他の平面表示装置にも適用可能である。
【００９０】
【発明の効果】
以上の記載から明らかなように、本発明によれば、電子放出能力が高く長寿命の電子源を有し、明るく信頼性の高い表示装置を簡便かつ安価に得ることができる。
【００９１】
また、超微細単位を有し均一性に優れた電子源を備え、１つの絵素に対して数千以上もの単位電子源が対応するので、高効率で信頼性の高い表示を実現することができる。
【図面の簡単な説明】
【図１】本発明の実施形態であるＦＥＤの構造を概略的に示す断面図。
【図２】本発明の実施形態に使用される電子源の構造を示す断面図。
【図３】本発明の実施形態に使用される電子源の第１の実施例を示す上面図。
【図４】本発明の実施形態に使用される電子源の第１の実施例を示す断面図であり、図４（ａ）は図３の線Ａ−Ａに沿った断面図、図４（ｂ）は図３の線Ｂ−Ｂに沿った断面図。
【図５】本発明の実施形態に使用される電子源の第２の実施例を示す上面図。
【図６】本発明の実施形態に使用される電子源の第２の実施例を示す断面図であり、図６（ａ）は図５の線Ａ−Ａに沿った断面図、図６（ｂ）は図５の線Ｂ−Ｂに沿った断面図。
【図７】本発明の実施形態に使用される電子源の第３の実施例を示し、図７（ａ）は上面図、図７（ｂ）は図７（ａ）の一部を拡大して示す図。
【図８】本発明の実施形態に使用される電子源の第３の実施例を示す断面図であり、図８（ａ）は図７（ａ）の線Ａ−Ａに沿った断面図、図８（ｂ）は図７（ａ）の線Ｂ−Ｂに沿った断面図。
【図９】第１の実施例の電子源を製造するための第１の製造方法を示す断面図。
【図１０】第１の実施例の電子源を製造するための第２の製造方法を示す断面図。
【図１１】第３の実施例の電子源を製造するための第３の製造方法を示す断面図。
【図１２】第３の実施例の電子源を製造するための第４の製造方法を示す断面図。
【符号の説明】
５………蛍光体スクリーン、７………電子源、９，２２………導電層、１０，２１………ナノホール、１１，２３………絶縁体層、１２………金属埋め込み層、１３………バリア層、１４………導電性金属薄膜、１５………導電層パターン、１６………金属薄膜パターン、１７………多孔質絶縁体層パターン、２０………絶縁被覆層[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a display device and a method for manufacturing the display device.
[0002]
[Prior art]
In recent years, a field emission display (hereinafter referred to as FED) has been developed as a flat image display device. This FED has a face plate and a rear plate which are arranged to face each other with a predetermined gap, and three color phosphor layers are formed on the inner surface of the face plate, and these fluorescent materials are formed on the inner surface of the rear plate. An electron emission source that emits electrons that excite the body is provided.
[0003]
Conventionally, a structure called a spindle type has been proposed as an electron emission source of an FED. This electron emission source has a structure in which an electric field is concentrated on a sharp portion of an electron emission portion formed of Mo, and electrons are emitted from the electron emission portion by a voltage applied to the phosphor layer to cause the phosphor to emit light. is doing. By this method, a thin flat display device is realized.
[0004]
[Problems to be solved by the invention]
However, the above-described electron emission source has a very fine structure, and it has been extremely difficult to form a large number uniformly and simply. Therefore, it is difficult to make a large flat display device using such an electron emission source, and there is a problem that a manufacturing cost increases even if the flat display device has a small screen. In addition, since a difference in electron emission capability occurs due to a slight difference in shape of the electron emission source, it is difficult to obtain a stable image.
[0005]
Recently, a structure has been proposed in which carbon nanotubes (CN) are formed in very fine pores (nanoholes) with a diameter of several nanometers to several hundreds of nanometers, which are obtained by anodic oxidation of aluminum (Al), and used as electron emission sources. (See Displays 21 (2000) P99-104).
[0006]
However, in the electron emission source having such a structure, not only is CN expensive, but if the degree of vacuum in the tube is low, the gas in the tube contaminates the CN and the life is shortened. There was a problem.
[0007]
The present invention has been made to solve these problems, and an object of the present invention is to provide an electron source having a high electron emission capability and a long life even at a low vacuum degree, and having a high luminous efficiency, a low cost and a high reliability. Is to provide.
[0008]
[Means for Solving the Problems]
A display device according to the present invention includes a first substrate and a second substrate disposed to face each other, a phosphor layer provided on an inner surface of the first substrate, and an inner surface side of the second substrate. Provided with an electron source that emits electrons that excite the phosphor layer, the electron source comprising a conductive layer having a predetermined pattern formed on an insulating substrate, and the conductive layer. An insulator layer including a plurality of micropores having the same pattern as the conductive layer disposed on the layer; a conductor or semiconductor buried layer formed in the micropores of the insulator layer; and the insulation A conductive metal thin film having a pattern different from that of the conductive layer formed on the surface of the body layer in contact with the conductor or the semiconductor buried layer, and a bottom end portion of the fine hole of the insulator layer and the conductive layer. Layers separated by a barrier layer made of the insulator. It is, and the voltage applied between the conductive layer and the conductive metal thin film, wherein the electrons are emitted.
[0009]
In the display device of the present invention, in the electron source, the insulating layer having micropores can be a porous alumina layer. And as this porous alumina layer, the aluminum oxide layer obtained by the anodic oxidation of the layer which has aluminum as a main component is suitable. A third electrode can be provided on the opposite side of the conductive layer with the conductive metal thin film interposed therebetween.
[0010]
In the display device of the present invention, in the electron source, an insulating coating layer is formed on at least the pattern edge portion of the conductive layer and the insulating layer having the same pattern as the conductive layer, and the conductive metal thin film is formed thereon. Can be formed. In addition, an insulating coating layer can be formed on part or all of the portion other than the electron emission portion on the surface of the insulator layer and part or all of the surface of the insulating substrate.
[0011]
In the method for manufacturing a display device according to the present invention, a phosphor layer is formed on the inner surface of the first substrate, and an electron source that emits electrons that excite the phosphor is formed on the inner surface of the second substrate. And arranging and bonding the first substrate and the second substrate so that the phosphor layer and the electron source are opposed to each other with a gap. The forming step includes a step of forming a conductive layer mainly composed of aluminum on an insulating substrate in a predetermined pattern, and anodizing the conductive layer to leave the substrate side as the conductive layer, An anodizing step for forming an aluminum oxide layer having micropores on the side opposite to the substrate; a buried layer forming step for forming a buried layer of a conductor or semiconductor in the micropores of the aluminum oxide layer; and a surface of the aluminum oxide layer The conductor or A thin film pattern forming step of forming a conductive metal thin film in contact with the semiconductor buried layer in a pattern different from that of the conductive layer, and in the anodic oxidation step, between the bottom end portion of the fine hole and the conductive layer. A barrier layer made of the aluminum oxide is formed.
[0012]
This manufacturing method of a display device may include a step of forming an insulating coating layer at least at an edge portion of the pattern of the conductive layer and the aluminum oxide layer between the buried layer forming step and the thin film pattern forming step. Further, between the buried layer forming step and the thin film pattern forming step, an insulating coating layer is formed on part or all of the portion other than the electron emission portion on the surface of the insulator layer and on part or all of the surface of the insulating substrate. Can have steps.
[0013]
Furthermore, another method for manufacturing a display device according to the present invention includes a step of forming a phosphor layer on the inner surface of the first substrate, and an electron that emits electrons that excite the phosphor on the inner surface of the second substrate. Forming a source, and arranging and bonding the first substrate and the second substrate so that the phosphor layer and the electron source face each other with a gap, and The step of forming the electron source includes a step of forming a conductive layer mainly composed of aluminum on an insulating substrate, and anodizing the conductive layer, leaving the substrate side as the conductive layer, An anodic oxidation step of forming an aluminum oxide layer having micropores on the side opposite to the substrate, a buried layer forming step of forming a buried layer of a conductor or semiconductor in the micropores of the aluminum oxide layer, the conductive layer and the microscopic layer Filling the hole with a conductor or semiconductor A laminated film patterning step of forming a laminated film with the aluminum oxide layer on which only a layer is formed into a predetermined pattern by etching, and a conductive film in contact with the conductor or the semiconductor buried layer on the surface of the aluminum oxide layer pattern A thin film pattern forming step of forming a conductive metal thin film in a pattern different from that of the aluminum oxide layer. In the anodizing step, the aluminum oxide is formed between the bottom end portion of the micropore and the conductive layer. A barrier layer is formed.
[0014]
In this method for manufacturing a display device, a step of forming an insulating coating layer on at least an edge portion of the pattern of the conductive layer and the aluminum oxide layer can be provided between the laminated film patterning step and the thin film pattern forming step. Further, between the laminated film patterning step and the thin film pattern forming step, an insulating coating layer is formed on part or all of the portion other than the electron emission portion on the surface of the insulator layer and on part or all of the surface of the insulating substrate. Can have steps.
[0015]
According to the present invention, in the electron source, a conductor or a semiconductor buried layer is formed inside the micropore of the porous insulator layer, and between the bottom end of the micropore and the lower conductive layer. A barrier layer made of the insulator is provided, and the barrier layer becomes a tunnel barrier layer. Then, by applying a voltage between the conductive metal thin film formed so as to be in contact with the buried layer and the conductive layer, the electric field concentrates on the barrier layer and electrons are emitted. An electron source with a high emission capability can be obtained. In addition, since direct contact between the electron emission portion and the atmospheric gas is avoided, the deterioration due to contamination of the electron emission portion hardly occurs and a long-life display device is realized.
[0016]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, embodiments in which the display device of the present invention is applied to an FED will be described with reference to the drawings.
[0017]
As shown in FIG. 1, the FED includes a rear plate 1 and a face plate 2 each made of a rectangular glass substrate, and these plates are arranged to face each other at a predetermined interval. The rear plate 1 and the face plate 2 are joined to each other via a rectangular frame-shaped side wall 3 whose peripheral ends are made of glass to form a vacuum envelope 4.
[0018]
A phosphor screen 5 is formed on the inner surface of the face plate 2. The phosphor screen 5 is configured by arranging a phosphor layer of three colors of red (R), blue (B), and green (G) formed in a stripe shape or a dot shape and a light absorption layer composed of a black pigment. Has been. Further, a counter electrode 6 made of, for example, ITO is disposed between the phosphor screen 5 and the face plate 2.
[0019]
Here, the light absorption layer can be formed by photolithography or the like. In addition, the formation of phosphor layers of three colors of red (R), blue (B), and green (G) is based on ZnS, Y ₂ O ₃ Series, Y ₂ O ₂ It can be performed by a slurry method using a phosphor liquid such as S-based. In addition, formation of the phosphor layer of each color can also be performed by a spray method or a printing method, and also in these methods, pattern formation (patterning) by photolithography can be used together as necessary.
[0020]
On the inner surface of the rear plate 1, there is provided an electron source 7 that emits an electron beam (indicated by an arrow) to excite the phosphor. The side wall 3 is sealed to the peripheral edge of the rear plate 1 and the peripheral edge of the face plate 2 by, for example, frit glass, and the inside of the vacuum envelope 4 composed of the rear plate 1, the face plate 2 and the side wall 3 is almost the same. Held in a vacuum. Further, a large number of spacers (not shown) are arranged between the rear plate 1 and the face plate 2 at a predetermined interval in order to maintain a gap between these plates. The spacers are each formed in a plate shape or a column shape.
[0021]
The electron source 7 has a conductive layer 9 formed in a predetermined pattern on an insulating substrate 8 such as a rear plate, as shown in an enlarged view in FIG. An insulating layer 11 having a large number of microholes (nanoholes) 10 having a diameter of several nanometers to several hundreds of nanometers and extending in a direction substantially perpendicular to the surface is provided on the conductive layer 9. Are formed in the same pattern.
[0022]
Here, examples of the conductive layer 9 include a layer containing Al as a main component (hereinafter referred to as an Al layer). By anodizing this Al layer, a porous aluminum oxide layer having nanoholes 10 regularly arranged with a minute interval can be obtained. It is also possible to form a porous titanium oxide layer having nanoholes by using a titanium (Ti) layer as the conductive layer 9 and anodizing the Ti layer. In addition to aluminum and titanium, metals such as tantalum, niobium, vanadium, zirconium, molybdenum, hafnium, and tungsten can be given. Furthermore, the insulator layer 11 having nanoholes 10 such as a porous aluminum oxide layer can be formed by a method other than anodic oxidation.
[0023]
A metal buried layer 12 such as Ni is formed inside the nanohole 10. The leading end portion (upper end portion) of the metal buried layer 12 is formed to extend to a height almost equal to the upper end opening of the nanohole 10. The metal buried layer 12 can be formed by, for example, an electrochemical method, a CVD method, a vapor deposition method, or the like.
[0024]
In addition to Ni, examples of the material embedded in the nanohole 10 include metals such as Au, Ag, Cu, Co, Fe, and Cr. Semiconductors such as silicon and compound semiconductors can also be used. Even if a part of the metal embedded is in the form of an oxide, it can be used as long as a certain degree of conduction can be obtained. Furthermore, these metal buried layers 12 do not need to be filled in the nanoholes 10 without gaps, and it is only necessary to ensure conduction even if minute voids exist in the buried layer.
[0025]
The bottom end portion of the nanohole 10 in which the metal buried layer 12 is formed and the conductive layer 9 are separated by a barrier layer 13 made of the same aluminum oxide as the insulator having the nanohole 10.
[0026]
Further, a thin film 14 of a conductive metal such as Au is formed on the surface of the insulator layer 11 having the nanoholes 10 so as to be in electrical contact with the metal buried layer 12, and the conductive layer 9 and the porous insulator layer 11. It is formed with a different pattern. In addition to Au, other conductive metals such as Al and Ag can be used. The formation of the Au thin film pattern can be performed by a method such as vapor deposition or sputtering.
[0027]
According to this electron source, an electric field is concentrated on the barrier layer 13 by applying a voltage to the metal thin film 14 such as Au with respect to the conductive layer 9 which is a reference electrode, and as a result, electrons are emitted. Then, electrons are emitted through the metal buried layer 12 and the metal thin film 14 in the nanohole 10.
[0028]
In the electron source having such a structure, the optimum value of the thickness of the barrier layer 13 is considered to depend on the electric field strength applied to the barrier layer 13. The electric field strength is considered to be affected by various factors such as the resistance value of the metal buried layer 12 and the depth of the nanohole 10. The thickness of the barrier layer 13 is desirably 2 nm to 50 nm.
[0029]
When the thickness of the barrier layer 13 is less than 2 nm, electron emission (emission) hardly occurs. Further, even when the thickness of the barrier layer 13 exceeds 50 nm, stable good emission is hardly generated.
[0030]
The depth of the nanohole 10 is desirably 50 nm to 30 μm, and the pore diameter is desirably 2 nm to 100 nm. When the depth of the nanohole 10 is shallower, emission is improved, but the withstand voltage tends to be deteriorated. On the other hand, if the hole diameter is too large, the electric field concentration decreases, so that the emission generation voltage increases. Conversely, if the hole diameter is too small, formation of the hole becomes difficult, which is not preferable. Both the depth and the hole diameter of the nanohole 10 affect the electric field strength applied to the barrier layer 13.
[0031]
The thickness of the metal buried layer 12 is preferably 50 nm to 30 μm. If the thickness of the metal buried layer 12 is less than 50 nm, emission is good, but the voltage resistance is lowered, which is not preferable. On the other hand, when the thickness of the metal buried layer 12 exceeds 30 μm, it is difficult to obtain stable and good emission. Further, the shorter the distance from the upper end opening of the nanohole 10 to the upper end of the metal buried layer 12, the lower the emission generation voltage, which is preferable. Furthermore, it is preferable that the metal buried layer 12 does not protrude from the upper end opening of the nanohole 10.
[0032]
The thickness of the conductive metal thin film 14 such as Au is desirably 5 nm to 300 nm. If the thickness of the conductive metal thin film 14 is less than 5 nm, it is difficult to ensure stable and good conduction with the metal buried layer 12. On the contrary, if it exceeds 300 nm, it becomes difficult for electrons to penetrate and be emitted.
[0033]
Furthermore, this electron source is the first electrode (cathode) for concentrating the electric field on the barrier layer 13 and emitting electrons by the voltage applied between the conductive metal thin film 14 and the conductive layer 9. It is desirable that the resistance value between the conductive layer 9 and the conductive metal thin film 14 as the second electrode (anode) be in the range of 5Ω to 2MΩ.
[0034]
According to the embodiment of the present invention configured as described above, an electron source having a high electron emission (emission) capability, a long life, and a high reliability is provided. Obtainable.
[0035]
Further, in the electron source, the conductive layer 9 as the first electrode and the conductive metal thin film 14 as the second electrode are respectively formed in a predetermined pattern. Control is possible.
[0036]
A first example of an electron source having a simple matrix pattern as the pattern of the conductive layer 9 and the pattern of the conductive metal thin film 14 is shown in FIGS. 3 and 4A and 4B. 4 (a) and 4 (b) are an AA sectional view and a BB sectional view in FIG. 3, respectively.
[0037]
In the first embodiment of the electron source, the conductive layer as the first electrode (lower electrode) and the conductive metal thin film as the second electrode (upper electrode) have two axes (for example, the X axis) orthogonal to each other. The conductive layer pattern 15 and the metal thin film pattern 16 are arranged so as to cross each other. Each crossing pattern is selected as an electrode, and a voltage is applied to the intersection of these electrodes. In FIGS. 3 and 4, reference numeral 17 denotes an insulating substrate. In FIG. 4, reference numeral 18 denotes a porous insulator layer pattern, and 19 denotes a metal buried layer formed in a micropore (nanohole) of the porous insulator layer.
[0038]
In such an electron source of the first embodiment, electrons are emitted from a portion (indicated by C in FIG. 3) where the conductive layer pattern 15 and the metal thin film pattern 16 overlap. By controlling the voltage applied to each electrode, the electron generation site can be adjusted and the amount of electron generation can be controlled.
[0039]
In addition, the conductive layer pattern 15 as the lower electrode and the metal thin film pattern 16 as the upper electrode are insulated. In order to maintain this insulation more reliably, the following structure can be adopted.
[0040]
That is, in the second embodiment of the electron source, as shown in FIGS. 5A and 6B and FIGS. 6A and 6B which are AA and BB sectional views, the same as the conductive layer pattern 15 and the same. The insulating coating layer 20 is formed on the edge portion of the porous insulator layer pattern 18 having the shape, and the metal thin film pattern 16 is formed thereon. As an insulating material constituting the insulating coating layer 20, for example, silica (SiO 2 ₂ Insulating oxides such as
[0041]
Further, in the third embodiment, as shown in FIGS. 8A and 8B which are AA and BB sectional views in FIGS. 7A and 7B and FIG. 7A. Further, an insulating coating layer 20 is formed on a part or all of the surface of the porous insulator layer pattern 18 other than the electron emission portion and a part or all of the surface of the insulating substrate 17. A metal thin film pattern 16 is formed on the insulating coating layer 20. As an insulating material constituting the insulating coating layer 20, for example, silica (SiO 2 ₂ Insulating oxides such as In FIG. 7B, which is an enlarged view of a part of FIG. 7A, an electron emission portion on the surface of the porous insulator layer pattern 18 is indicated by E.
[0042]
In the electron sources of the second and third embodiments, insulation at the edge portions of the conductive layer pattern 15 and the porous insulator layer pattern 18 is reinforced by the insulating coating layer 20, so that dielectric breakdown occurs at the pattern end portions. Is unlikely to occur. Therefore, in the electron sources of the second and third embodiments, the dielectric breakdown is increased and the withstand voltage is improved as compared with the electron source of the first embodiment.
[0043]
The electron source of the first embodiment can be manufactured by the following method.
[0044]
In the first manufacturing method, first, as shown in FIG. 9A, a pattern 15 of a conductive layer such as aluminum (Al) is formed on an insulating substrate 17 such as a glass substrate. As a method of forming the conductive layer pattern 15,
(1) A metal such as Al is vapor-deposited through a mask having openings having a desired pattern. (2) After a metal layer such as Al is formed by vapor deposition or the like, an acid-resistant protective layer (resist layer) having a desired pattern is formed on the metal layer by photolithography, and then the metal layer is formed by acid or the like. Etch away.
It is possible to adopt such a method.
[0045]
Next, as shown in FIG. 9B, the conductive layer pattern 15 is anodized. At this time, the anodic oxidation time is controlled so that the conductive layer having a predetermined thickness on the insulating substrate 17 side is not oxidized, and the conductive layer on the side opposite to the substrate is oxidized. Thus, a pattern 18 of a porous insulator layer (for example, an aluminum oxide layer) having fine holes (nanoholes) 21 is formed on the conductive layer pattern 15 that remains unoxidized.
[0046]
Next, as shown in FIG. 9 (c), a metal buried layer 19 such as Ni is formed inside the fine holes (nanoholes) 21 of the porous insulator layer by an electrochemical method, a CVD method or a vapor deposition method. Form.
[0047]
Thereafter, as shown in FIG. 9D, a conductive metal thin film pattern 16 such as Au is formed on the porous insulator layer pattern 18 so as to be in electrical contact with the metal buried layer 19, for example, The conductive metal is formed by vapor deposition or sputtering through a mask having openings having a desired pattern.
[0048]
Further, the electron source of the first embodiment can be manufactured by another method. In the second manufacturing method, as shown in FIG. 10A, a conductive layer 22 such as aluminum (Al) is formed on the insulating substrate 17 by, for example, vapor deposition, and then as shown in FIG. Next, the conductive layer 22 is anodized. At this time, the anodic oxidation time is controlled so that the conductive layer 22 having a predetermined thickness on the substrate side is not oxidized, and the conductive layer on the side opposite to the substrate is oxidized. In this way, a porous insulator layer (for example, an aluminum oxide layer) 23 having micropores (nanoholes) 21 is formed on the conductive layer 22 that remains unoxidized.
[0049]
Next, as shown in FIG. 10C, a metal buried layer 19 such as Ni is formed in the fine holes 21 of the porous insulator layer 23 by an electrochemical method, a CVD method, a vapor deposition method, or the like. .
[0050]
Next, the laminated film of the conductive layer 22 and the porous insulator layer 23 is etched into a desired pattern, so that the conductive layer pattern 15 and the porous insulator layer pattern 18 are simultaneously formed as shown in FIG. . For patterning of the laminated film, a resist layer (protective layer) with a desired pattern is formed on the laminated film by photolithography, and then the portion not covered with the resist layer is etched away using a mixed acid such as chromic acid phosphate. Further, the protective layer is peeled off with a peroxide.
[0051]
Next, as shown in FIG. 10 (e), a conductive metal thin film pattern 16 such as Au is formed on the porous insulator layer pattern 18 so as to be in electrical contact with the metal buried layer 19. The conductive metal is formed by vapor deposition or sputtering through a mask having openings having a desired pattern.
[0052]
The electron source of the third embodiment can be manufactured by the third method shown in FIG. That is, in the first manufacturing method shown in FIG. 9, after the metal buried layer 19 such as Ni is formed inside the micropore (nanohole) 21 of the porous insulator layer, as shown in FIG. Silica (SiO 2) so as to cover the edges of the conductive layer pattern 15 and the porous insulator layer pattern 18 and the entire surface of the insulating substrate 17. ₂ And the like.
[0053]
The insulating coating layer 20 can be formed, for example, by sputtering an insulating material such as silica through a mask having openings having a desired pattern.
[0054]
Further, after forming a protective layer (resist layer) covering the electron emission portion on the porous insulator layer pattern 18 by photolithography, a silica layer is formed on the entire surface using a sol-gel method or the like, and then on the protective layer. It is also possible to form the silica layer by a method such as removing the entire protective layer. The electron source of the second embodiment can be manufactured by forming the insulating coating layer 20 with a pattern that covers only the edge portions of the conductive layer pattern 15 and the porous insulator layer pattern 18.
[0055]
Finally, as shown in FIG. 11 (e), on the insulating coating layer 20 and the porous insulator layer pattern 18, such as Au is electrically contacted with the metal buried layer 19 which is an electron emission portion. A thin film pattern 16 of conductive metal is formed. The metal thin film pattern 16 can be formed, for example, by a method such as vapor deposition or sputtering of a conductive metal through a mask having an opening having a desired pattern.
[0056]
Furthermore, the electron source of the third embodiment can be manufactured by the fourth method shown in FIG. That is, in the second manufacturing method shown in FIG. 10, after etching the laminated film of the conductive layer 22 and the porous insulator layer 23 to form the conductive layer pattern 15 and the porous insulator layer pattern 18 simultaneously, As shown in FIG. 12E, silica (SiO 2) is formed so as to cover the edge portions of the conductive layer pattern 15 and the porous insulator layer pattern 18 and the entire surface of the insulating substrate 17. ₂ And the like.
[0057]
Formation and patterning of the insulating coating layer 20 can be performed in the same manner as in the third method.
[0058]
Finally, as shown in FIG. 12 (f), Au or the like is formed on the insulating coating layer 20 and the porous insulator layer pattern 18 so as to be in electrical contact with the metal buried layer 19 serving as an electron emission portion. A thin film pattern 16 of conductive metal is formed.
[0059]
As described above, according to the embodiment of the present invention, the use of an electron emission source having a high electron emission (emission) capability, a long life, and a high reliability makes it possible to obtain an FED having excellent light emission characteristics and excellent discharge resistance. Can be realized easily and inexpensively.
[0060]
Next, specific examples of the present invention will be described.
[0061]
Example 1
As an insulating substrate, a glass plate measuring 10 cm in length and 10 cm in width is used. After thoroughly cleaning one side with a surfactant and acetone, a number of slit-shaped openings with a width of 0.5 mm are formed on the glass plate. Aluminum was deposited through the mask. In this way, thin-line (striped) aluminum layers having a width of 0.5 mm and a thickness of 0.3 μm were formed on the glass plate at intervals of 0.5 mm.
[0062]
Next, anodization of the aluminum layer pattern thus formed was performed at a voltage of 20 V using sulfuric acid as an electrolyte. The anodic oxidation time was controlled in such a range that conductivity was found in the obtained aluminum anodic oxide film, that is, the aluminum layer was not oxidized over the entire thickness and the aluminum layer remained on the glass plate side.
[0063]
Next, a Ni buried layer was formed by electrolytic deposition in the micropores of the porous aluminum oxide layer formed by anodic oxidation. That is, using an electrolytic solution containing nickel sulfate, boric acid and stannous sulfate, electrolysis was performed at a voltage of 14 V to deposit Ni in the fine holes.
[0064]
Next, gold (Au) is sputtered on the pattern of the porous aluminum oxide layer through a mask having a large number of slit-shaped openings having a width of 1.0 mm, and a stripe-shaped Au thin film having a width of 0.5 mm (thickness). 30-60 nm) was formed at intervals of 0.5 mm. The Au thin film pattern was formed in a direction orthogonal to the aluminum layer and porous aluminum oxide layer patterns.
[0065]
Thus, an electron source having a porous aluminum oxide layer thickness of 250 nm, a fine pore diameter of 10 nm, a barrier layer thickness of 15 nm, and an Au thin film thickness of 40 nm was obtained. The aluminum layer of the electron source is a cathode electrode as a first electrode, and the Au thin film is a drive electrode as a second electrode. The electron emission site is a site where the first electrode and the second electrode face each other.
[0066]
Next, a phosphor screen was prepared by the following procedure. A light shielding layer in the form of a lattice matrix mainly composed of graphfite was formed by photolithography on a glass substrate measuring 10 cm long × 10 cm wide. Red (Y) regularly arranged in the gap portion of the light shielding layer ₂ O ₂ Phosphor layers of S: Eu), green (ZnS: Cu, Al), and blue (ZnS: Ag, Al) were formed by photolithography. Next, a film made of nitrocellulose was formed on the phosphor layer, and an aluminum layer was formed thereon by vapor deposition to form a phosphor screen. This aluminum layer becomes an anode electrode which is a third electrode.
[0067]
The phosphor screen thus obtained and the electron source were assembled in the following procedure. First, a hole was made at a desired position outside the image effective surface of the electron source, and the exhaust pipe was joined with frit glass. Next, a glass frame for gap control is arranged on the electron source, and the phosphor screen is placed on the glass frame so that the second electrode of the electron source and the third electrode of the phosphor screen face each other through the glass frame. Arranged. After aligning the individual electron emission sites of the electron source to correspond to the phosphor screen pixels, they were joined by frit glass. At this time, the glass frame was controlled so that the gap between the second electrode of the electron source and the third electrode of the phosphor screen was 2 mm over the entire surface. Next, exhaust is performed through the exhaust pipe while heating at 300 ° C., and 1 × 10 ^-3 ~ 5x10 ^-3 When the pressure reached Pa, the exhaust pipe was sealed. A 10 cm × 10 cm display device was manufactured by the above procedure.
[0068]
Then, the voltage of the third electrode (anode voltage: Va) is set to 7 kv, the voltage (drive voltage: Vd) applied between the first electrode group and the second electrode group is changed, and the light emission state of the phosphor screen is changed. By observing, the emission (electron emission) start voltage and the breakdown voltage were measured. The measurement results are shown in Table 1.
[0069]
In the display device of Example 1, emission of electrons started at a low voltage (3 V), and a good light emission state was obtained. Further, the dielectric breakdown voltage was high, and the voltage resistance was sufficiently satisfactory.
[0070]
Example 2
The formation of the aluminum layer pattern, the formation of the porous aluminum oxide layer pattern by anodic oxidation thereof, and the formation of the Ni buried layer in the micropores of the porous aluminum oxide layer were performed in the same manner as in Example 1.
[0071]
Next, a photoresist layer is formed on the porous aluminum oxide layer pattern, and patterning is performed by photolithography to form a protective layer made of a resist on the electron emission portion, and then silica (SiO 2) is sputtered on the entire surface of the substrate. ₂ ) Layer was formed. Next, after removing the silica layer formed in the electron emission portion together with the undercoat protective layer with peroxide, the Au thin film is formed in the same manner as in Example 1 so as to contact the exposed Ni buried layer of the electron emission portion. A pattern was formed.
[0072]
Thus, the porous aluminum oxide layer had a thickness of 250 nm, the pore diameter was 10 nm, the barrier layer had a thickness of 15 nm, the Au thin film had a thickness of 40 nm, and the portion other than the electron emission portion was covered with the silica layer. An electron source was obtained.
[0073]
Next, using the obtained electron source, a display device was assembled in the same manner as in Example 1, and an electron emission start voltage and a dielectric breakdown voltage were measured. The measurement results are shown in Table 1.
[0074]
In the display device of Example 2, electron emission started at a sufficiently low voltage (4 V), and a good light emission state was obtained. In addition, it was found that the voltage causing dielectric breakdown was very high, more than twice that of the display device of Example 1, and the voltage resistance was extremely excellent.
[0075]
Example 3
One surface of a 10 cm long × 10 cm wide glass plate was thoroughly washed with a surfactant and acetone, and then aluminum was deposited thereon to form an aluminum layer having a thickness of 0.3 μm.
[0076]
Next, anodization of the aluminum layer thus formed was performed at a voltage of 20 V using sulfuric acid as an electrolytic solution, as in Example 1. The anodic oxidation time was controlled in such a range that conductivity was found in the obtained aluminum anodic oxide film, that is, the aluminum layer was not oxidized over the entire thickness and the aluminum layer remained on the glass plate side.
[0077]
Next, a Ni buried layer was formed in the micropores of the porous aluminum oxide layer formed by anodic oxidation by electrolytic deposition in the same manner as in Example 1.
[0078]
Next, after forming a stripe-shaped protective layer pattern on the laminated film of the aluminum layer and the porous aluminum oxide layer thus formed by photolithography, unnecessary portions of the laminated film are etched with phosphoric acid chromic acid mixed acid or the like. The protective layer was peeled off with peroxide. Thus, a multilayer film pattern having a stripe shape (a stripe interval of 0.5 mm) having a width of 0.5 mm was obtained.
[0079]
Next, an Au thin film pattern was formed on the laminated film pattern in the same manner as in Example 1 so as to be in contact with the Ni buried layer.
[0080]
Thus, an electron source having a porous aluminum oxide layer thickness of 250 nm, a fine pore diameter of 10 nm, a barrier layer thickness of 15 nm, and an Au thin film thickness of 40 nm was obtained.
[0081]
Next, using the obtained electron source, a display device was assembled in the same manner as in Example 1, and an electron emission start voltage and a dielectric breakdown voltage were measured. The measurement results are shown in Table 1.
[0082]
In the display device of Example 3, electron emission started at a low voltage (3 V), and a good light emission state was obtained. Further, the dielectric breakdown voltage was high, and the voltage resistance was sufficiently satisfactory.
[0083]
Example 4
The formation of the aluminum layer and its anodic oxidation, the formation of the Ni buried layer in the micropores of the porous aluminum oxide layer, and the patterning of the laminated film of the aluminum layer and the porous aluminum oxide layer were performed in the same manner as in Example 3. went.
[0084]
Next, a photoresist layer is formed on the pattern of the porous aluminum oxide layer, patterned by photolithography to form a protective layer made of resist at the electron emission portion, and then a silica layer is formed on the entire surface of the substrate by sputtering. Formed. Next, after removing the silica layer formed in the electron emission portion together with the undercoat protective layer with peroxide, the Au thin film is contacted with the exposed Ni buried layer of the electron emission portion in the same manner as in Example 1. Pattern was formed.
[0085]
Thus, the porous aluminum oxide layer had a thickness of 250 nm, the pore diameter was 10 nm, the barrier layer had a thickness of 15 nm, the Au thin film had a thickness of 40 nm, and the portion other than the electron emission portion was covered with the silica layer. An electron source was obtained.
[0086]
Next, using the obtained electron source, a display device was assembled in the same manner as in Example 1, and an electron emission start voltage and a dielectric breakdown voltage were measured. The measurement results are shown in Table 1.
[0087]
In the display device of Example 4, electron emission started at a low voltage (3 V), and a good light emission state was obtained. In addition, it was found that the voltage causing dielectric breakdown was very high, more than twice that of the display device of Example 3, and the voltage resistance was extremely excellent.
[0088]
[Table 1]

[0089]
The present invention is not limited to the above-described embodiment, and various modifications can be made within the scope of the present invention. For example, the material to be used is not limited to the above-described embodiment, and can be variously selected as necessary. Further, the present invention is not limited to the FED but can be applied to other flat display devices.
[0090]
【The invention's effect】
As is apparent from the above description, according to the present invention, a bright and reliable display device having an electron emission capability and a long-life electron source can be obtained simply and inexpensively.
[0091]
In addition, an electron source with ultra-fine units and excellent uniformity is provided, and thousands or more unit electron sources correspond to one picture element, so that highly efficient and reliable display can be realized. it can.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view schematically showing the structure of an FED according to an embodiment of the present invention.
FIG. 2 is a cross-sectional view showing the structure of an electron source used in an embodiment of the present invention.
FIG. 3 is a top view showing a first example of an electron source used in the embodiment of the present invention.
4 is a cross-sectional view showing a first example of an electron source used in the embodiment of the present invention. FIG. 4 (a) is a cross-sectional view taken along line AA in FIG. 3, and FIG. b) is a sectional view taken along line BB in FIG.
FIG. 5 is a top view showing a second example of the electron source used in the embodiment of the present invention.
6 is a cross-sectional view showing a second example of the electron source used in the embodiment of the present invention. FIG. 6A is a cross-sectional view taken along line AA in FIG. b) is a sectional view taken along line BB in FIG.
7A and 7B show a third example of the electron source used in the embodiment of the present invention, FIG. 7A is a top view, and FIG. 7B is an enlarged view of a part of FIG. FIG.
8 is a cross-sectional view showing a third example of the electron source used in the embodiment of the present invention, and FIG. 8 (a) is a cross-sectional view taken along line AA in FIG. 7 (a); FIG.8 (b) is sectional drawing along line BB of Fig.7 (a).
FIG. 9 is a cross-sectional view showing a first manufacturing method for manufacturing the electron source of the first embodiment.
FIG. 10 is a cross-sectional view showing a second manufacturing method for manufacturing the electron source of the first embodiment.
FIG. 11 is a cross-sectional view showing a third manufacturing method for manufacturing the electron source of the third embodiment.
FIG. 12 is a cross-sectional view showing a fourth manufacturing method for manufacturing the electron source of the third embodiment.
[Explanation of symbols]
5 ......... phosphor screen, 7 ......... electron source, 9, 22 ......... conductive layer, 10, 21 ......... nanohole, 11, 23 ......... insulator layer, 12 ......... metal buried layer, 13 ......... Barrier layer, 14 ......... conductive metal thin film, 15 ......... conductive layer pattern, 16 ......... metal thin film pattern, 17 ......... porous insulator layer pattern, 20 ......... insulation coating layer

Claims (12)

A first substrate and a second substrate disposed opposite to each other; a phosphor layer provided on an inner surface of the first substrate; and an inner surface side of the second substrate, the phosphor layer An electron source that emits electrons that excite
The electron source includes an insulating layer including a conductive layer having a predetermined pattern formed on an insulating substrate, and a plurality of fine holes having the same pattern as the conductive layer disposed on the conductive layer. And a conductor or semiconductor buried layer formed in the fine hole of the insulator layer, and a pattern different from the conductive layer formed on the surface of the insulator layer in contact with the conductor or semiconductor buried layer. A conductive metal thin film having
The bottom end of the micropores of the insulator layer and the conductive layer are separated by a barrier layer made of the insulator, and a voltage applied between the conductive layer and the conductive metal thin film, A display device characterized in that electrons are emitted. The display device according to claim 1, wherein in the electron source, the insulator layer having the fine holes is a porous alumina layer. 3. The display device according to claim 2, wherein the porous alumina layer is an aluminum oxide layer obtained by anodizing a layer mainly composed of aluminum. 4. The display device according to claim 1, wherein a third electrode is provided on the opposite side of the conductive layer with the conductive metal thin film interposed therebetween. An insulating coating layer is formed on at least a pattern edge portion of the conductive layer and the insulator layer having the same pattern as the conductive layer, and the conductive metal thin film is formed thereon. Item 5. The display device according to any one of Items 1 to 4. 6. The insulating coating layer according to claim 1, wherein an insulating coating layer is formed on a part or all of a portion other than the electron emission portion on the surface of the insulator layer and on a part or all of the surface of the insulating substrate. A display device according to claim 1. Forming a phosphor layer on the inner surface of the first substrate; forming an electron source that emits electrons that excite the phosphor on the inner surface of the second substrate; and the phosphor layer and the electron source. And arranging and bonding the first substrate and the second substrate so that they face each other with a gap,
The step of forming the electron source includes:
Forming a conductive layer containing aluminum as a main component in a predetermined pattern on an insulating substrate;
Anodizing step of forming an aluminum oxide layer having micropores on the opposite side of the substrate while anodizing the conductive layer, leaving the substrate side as the conductive layer;
A buried layer forming step of forming a buried layer of a conductor or semiconductor in the micropores of the aluminum oxide layer;
A thin film pattern forming step of forming a conductive metal thin film in contact with the conductor or semiconductor buried layer on the surface of the aluminum oxide layer in a pattern different from the conductive layer;
In the anodizing step, a barrier layer made of the aluminum oxide is formed between a bottom end portion of the fine hole and the conductive layer. 8. The display according to claim 7, further comprising a step of forming an insulating coating layer on at least an edge portion of the pattern of the conductive layer and the aluminum oxide layer between the buried layer forming step and the thin film pattern forming step. Device manufacturing method. Between the buried layer forming step and the thin film pattern forming step, an insulating coating layer is formed on a part or all of a portion other than the electron emission portion on the surface of the insulator layer and a part or all of the surface of the insulating substrate. The method of manufacturing a display device according to claim 7, further comprising a step of forming the display device. Forming a phosphor layer on the inner surface of the first substrate; forming an electron source that emits electrons that excite the phosphor on the inner surface of the second substrate; and the phosphor layer and the electron source. And arranging and bonding the first substrate and the second substrate so that they face each other with a gap,
The step of forming the electron source includes:
Forming a conductive layer mainly composed of aluminum on an insulating substrate;
Anodizing step of forming an aluminum oxide layer having micropores on the opposite side of the substrate while anodizing the conductive layer, leaving the substrate side as the conductive layer;
A buried layer forming step of forming a buried layer of a conductor or semiconductor in the micropores of the aluminum oxide layer;
A laminated film patterning step of forming a laminated film of the conductive layer and the aluminum oxide layer in which a buried layer of a conductor or a semiconductor is formed in the fine hole by etching into a predetermined pattern;
A thin film pattern forming step of forming, on the surface of the pattern of the aluminum oxide layer, a conductive metal thin film in contact with the conductor or semiconductor buried layer in a pattern different from the aluminum oxide layer;
In the anodizing step, a barrier layer made of the aluminum oxide is formed between a bottom end portion of the fine hole and the conductive layer. 11. The display according to claim 10, further comprising a step of forming an insulating coating layer on at least an edge portion of the pattern of the conductive layer and the aluminum oxide layer between the laminated film patterning step and the thin film pattern forming step. Device manufacturing method. Between the laminated film patterning step and the thin film pattern forming step, an insulating coating layer is formed on a part or the whole of the insulating layer surface other than the electron emission portion and a part or the whole of the insulating substrate surface. The method of manufacturing a display device according to claim 10, further comprising a forming step.

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