JP3820329B2 - Semiconductor substrate plating method - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for plating a semiconductor substrate, and more particularly to a plating method suitable for forming fine wirings used for a semiconductor substrate such as an LSI.
[0002]
[Prior art]
Conventionally, an aluminum sputtering method or a tungsten CVD method has been employed to form a metal film constituting a wiring on a semiconductor substrate. However, if the miniaturization of wiring advances with the high integration of LSIs, the wiring material such as aluminum or tungsten has a high resistivity, which causes a problem of signal transmission delay. In addition, these wiring materials have low migration resistance and have a problem with reliability. On the other hand, copper is expected as a metal film constituting the wiring of the semiconductor substrate because it has low resistance and high migration resistance.
[0003]
When copper is used as the wiring material, it is difficult to use the dry etching method employed when aluminum is used. For this reason, a damascene method, that is, a method in which an insulating layer is formed in advance on a semiconductor substrate, then a recess is formed in the insulating layer corresponding to a wiring layer, and then the recess is filled with copper is adopted. .
[0004]
The method of filling the concave portion with copper includes a method of selectively filling the concave portion with copper, and metallizing the entire surface of the substrate including the concave portion and then performing chemical mechanical polishing (CMP) to form the concave portion. There is a method of selectively leaving copper, and the latter is usually adopted. The metallization method includes a dry metallization method such as sputtering or chemical vapor deposition (CVD), and a wet metallization method such as electroless plating or electroplating.
[0005]
Since the wet metallization method is excellent in embedding in fine recesses, a process combining the wet metallization method and chemical mechanical polishing has recently attracted attention.
[0006]
For example, Japanese Patent Laid-Open No. 8-83796 discloses a method of embedding a wiring material such as silver, copper, gold, nickel, cobalt, and palladium in a wiring groove by electroless plating. Among these wiring materials, materials having a lower resistance than aluminum are silver, copper, and gold. In forming the wiring, first, a palladium seed layer is formed by collimator sputtering, and the wiring material is formed on the seed layer by electroless plating.
[0007]
Japanese Patent Application Laid-Open No. 6-29246 discloses that a material (palladium) serving as a catalyst for an electroless plating reaction is applied to a recess formed in an insulating layer, and the recess is filled with a metal by electroless plating. ing.
[0008]
Japanese Patent Laid-Open No. 7-321111 discloses that a zinc oxide layer is sprayed on a silicon oxide film (dielectric film) having fine recesses (an atomized zinc oxide aqueous solution is sprayed on a heated substrate). Zinc oxide layer is obtained, and then palladium or the like is displacement plated while dissolving the zinc oxide layer, and then electroplating or electroless plating is performed using the palladium as a seed layer to form a wiring layer such as copper or gold. The method of forming is shown.
[0009]
In JP-A-7-283219, titanium, titanium nitride, and tantalum are sequentially formed on the surface of the insulating layer formed with a recess by sputtering, and then copper is electroplated on these layers to form wiring. Has been shown to form.
[0010]
Also, “Electroless Copper metallization of titanium nitride”, J. C. Patterson et al. , Applied Surface Science, 91, 124 (1995), shows that a seed layer is formed using a palladium displacement plating method.
[0011]
[Problems to be solved by the invention]
As described above, various methods for embedding recesses made of grooves or holes by the wet metallization method are known, but each has its own problems.
[0012]
For example, in the forming method disclosed in Japanese Patent Application Laid-Open No. 8-83796, the step of forming a palladium seed layer by collimator sputtering becomes a bottleneck, and the miniaturization of the wiring cannot be sufficiently achieved.
[0013]
Further, in the forming method disclosed in Japanese Patent Application Laid-Open No. 6-29246, when copper formed by electroless copper plating is used for the purpose of reducing the resistance of the wiring layer as the metal filling the recess formed in the insulating layer, the palladium There is a possibility that the resistance of copper which forms a wiring layer by reacting with copper increases. Further, since palladium is deposited in an island shape with a size of several tens of nm, the unevenness of the copper film forming the wiring layer becomes large. For this reason, the embedding property required when forming fine wiring is lowered.
[0014]
Further, in the method disclosed in Japanese Patent Application Laid-Open No. 7-321111, as described above, the use of palladium reduces the embedding property, and the element characteristics deteriorate due to the mixing of zinc.
[0015]
Moreover, in the method shown in JP-A-7-283219, in order to perform uniform deposition by electroplating, it is necessary to apply a uniform electric field. However, the electric resistance of the layers sequentially formed on the surface of the insulating layer by the sputtering method is large, so that it is difficult to apply an electric field near the bottom of the recess. In particular, as the concave portion becomes finer and deeper (high aspect ratio), it becomes difficult to fill the concave portion with copper, and the embedding property decreases.
[0016]
Also, “Electroless Copper metallization of titanium nitride”, J. C. Patterson et al. In the method shown in Applied Surface Science, 91, 124 (1995), since palladium is used as a seed layer, the embedding property required when forming a fine wiring is lowered as described above. In addition, the wiring resistance may increase.
[0017]
By the way, in the case of forming a wiring by embedding a low resistance metal in the recess instead of an aluminum wiring having a high resistivity and thus a signal transmission speed is likely to be delayed, the metal materials that can be substituted are copper, silver, gold, etc. is there. When these metals diffuse into the adjacent insulating layer or semiconductor layer, the device characteristics deteriorate, so it is necessary to surround these metals with a barrier layer to prevent their diffusion. Examples of the conductor functioning as the barrier layer include metal nitrides such as titanium nitride, tungsten nitride, and tantalum nitride, and refractory metals such as tantalum and tungsten, and alloys thereof.
[0018]
Since the barrier layer made of the metal nitride, the refractory metal and an alloy thereof is inactive with respect to the electroless plating, the electroless plating cannot be directly applied on the barrier layer. Further, since the barrier layer has a large electric resistance, it is difficult to perform electroplating directly on the barrier layer.
[0019]
Furthermore, many seed layers formed by the wet metallization method have poor adhesion, and may peel off together with the wiring layer filled during chemical mechanical polishing (CMP) performed after filling the recess.
[0020]
On the other hand, when a seed layer such as copper or palladium is formed by a dry metallization method such as a sputtering method, the adhesion is improved. However, it is difficult to uniformly form the seed layer on the bottom or side wall of the fine recess, which hinders the formation of a fine wiring layer.
[0021]
The present invention has been made in view of the above-mentioned problems. Regardless of the coverage of the seed layer formed by the dry metallization method in the concave portion, the coverage is good and the adhesion is good enough to withstand the chemical mechanical polishing process. A method for forming a seed layer in the recess is provided.
[0022]
[Means for Solving the Problems]
The present invention employs the following means in order to solve the above problems.
[0023]
  Forming a recess on the surface of the dielectric layer formed on the semiconductor substrate; forming a first conductive layer covering the surface of the dielectric layer on which the recess is formed; and at least a surface of the first conductive layer. A step of forming a second conductive layer on the surface of the first conductive layer including a portion thereof by vapor deposition, a step of removing an oxide film on the surface of the first conductive layer, a surface of the first conductive layer, and a second Forming a plating deposited metal layer on the surface of the conductive layer by electroless plating.
[0025]
DETAILED DESCRIPTION OF THE INVENTION
As described above, when a wiring is formed by embedding a low-resistance metal in a recess made of a groove or a hole, usable metal materials are copper, silver, gold, and the like. When these metal materials are diffused into an adjacent insulating layer or semiconductor layer, device characteristics are deteriorated. Therefore, the metal is surrounded by a barrier layer to prevent the diffusion. Examples of the conductor functioning as the barrier layer include metal nitrides such as titanium nitride, tungsten nitride, and tantalum nitride, and refractory metals such as tantalum and tungsten, and alloys thereof.
[0026]
Since the barrier layer made of the metal nitride, the refractory metal and its alloy cannot be directly electroless plated on the barrier layer, a seed layer is formed on the barrier layer by electroless plating. There are various combinations of materials for forming the barrier layer and the seed layer. Here, a case where titanium nitride is used as the barrier layer forming material and copper is used as the seed layer forming material will be described.
[0027]
First, a dielectric layer is formed on a silicon substrate, a groove is formed in the dielectric layer, and then a titanium nitride barrier layer as a conductor is formed as a first conductive layer. A sputtering method or a CVD method can be used to form the barrier layer. In consideration of the uniformity of precipitation in the groove, the CVD method is advantageous. However, unlike the seed layer, the barrier layer is not required to be uniform on the surface of the dielectric layer and in the groove. It is only necessary to secure a thickness capable of exhibiting the above functions. Therefore, a sputtering method can also be used.
[0028]
Next, a seed layer is formed as a second conductive layer on the barrier layer surface. The seed layer desirably has a uniform film thickness on the dielectric surface and in the groove.
[0029]
By the way, electroless copper plating is a method capable of uniformly forming a film even in a complicated shape. The reaction formula of electroless copper plating is represented by the following formula.
[0030]
Cu²⁺(L) + 2HCHO + 4 OH^-  → Cu + 2HCOO^-  + 2H₂O + H2 + L (Chemical formula 1)
Here, L is a complex-forming agent that forms a complex with copper, and ethylenediaminetetraacetic acid (hereinafter referred to as EDTA) is often used.
[0031]
The electroless copper plating reaction proceeds selectively on a metal such as copper or palladium. This is because the metal exhibits catalytic activity for the oxidation reaction of formaldehyde. When formaldehyde is oxidized, it emits electrons, which are received by copper ions and reduced to metallic copper and deposited.
[0032]
However, normally, titanium nitride forming the barrier layer is inactive to the electroless copper plating reaction, so that copper does not deposit on the titanium nitride surface.
[0033]
However, after copper is deposited as a seed layer on a part of the titanium nitride surface by sputtering, when immersed in an electroless copper plating solution, the electroless copper plating is directly applied to the titanium nitride surface where there is no copper seed layer. The present inventors have found that they precipitate.
[0034]
The copper seed layer deposited by sputtering may be at least on the surface, and is not necessarily on the bottom or side wall of the groove or hole. That is, if copper is deposited on at least a part, copper as the second seed layer can be uniformly deposited on the entire surface of the substrate in the next electroless plating process using this copper as the first seed layer.
[0035]
Thus, after depositing copper as a seed layer on at least a part of the surface of titanium nitride by the sputtering method, titanium nitride in which the seed layer was not formed by the immersion in an electroless copper plating solution It is possible to uniformly apply electroless copper plating directly to the entire surface of the substrate including the surface.
[0036]
In addition, after the step of depositing copper as the first seed layer by sputtering on the surface of titanium nitride as the barrier layer, a portion of the oxide film on the surface of the barrier layer where the copper seed layer is not present is further treated with a treatment liquid. By removing, the adhesiveness of the electroless copper plating is improved.
[0037]
Since the titanium nitride itself is also etched by the treatment liquid for removing the oxide film on the surface of the barrier layer made of titanium nitride, when the etching rate is high, the barrier layer is formed thick and the etching time is strictly set. It is necessary to control.
[0038]
When an aqueous solution containing EDTA 0.001 to 1 mol / l and hydrogen peroxide 0 to 1 mol / l is used as the treatment liquid, the control of the etching time becomes easy, and the barrier layer has a thickness of 10 nm or more. It is possible to form a seed layer having good adhesiveness while ensuring the properties.
[0039]
As described above, after depositing copper as a first seed layer on the surface of the barrier layer by sputtering, it is immersed in an electroless plating solution, whereby the second surface by electroless plating is formed on the entire surface of the barrier layer including the inside of the recess. It is possible to form a seed layer.
[0040]
The seed layer formed by electroless plating has a film thickness distribution within about ± 5% even in the surface portion and inside the groove, and the film thickness uniformity is very good.
[0041]
Further, since the first seed layer is formed by sputtering, the adhesion of the film is good.
[0042]
For forming the second seed layer on the semiconductor substrate, electroless nickel plating, electroless gold plating, electroless cobalt plating, or the like can be used in addition to the electroless copper plating described above. In addition to the sputtering method, a vapor deposition method or a CVD method can be used as the vapor phase growth method for forming the first seed layer.
[0043]
【Example】
In carrying out the present invention, the following semiconductor substrates and processing solutions were used.
[0044]
"Semiconductor substrate"
SiO on silicon substrate₂A dielectric layer of 1 μm is formed, a via hole having a diameter of 0.25 μm and a depth of 1 μm is formed in the dielectric layer by a conventional dry etching, and the first conductor layer is sputtered on the dielectric layer including the via hole. To deposit 100 nm of titanium nitride.
[0045]
"Electroless copper plating solution"
Copper sulfate 0.04 mol / l
Ethylenediaminetetraacetic acid disodium 0.1 mol / l
Formaldehyde 0.03 mol / l
2,2'-bipyridyl 0.0002 mol / l
Polyethylene glycol (average molecular weight 600) 0.03 mol / l
Sodium hydroxide adjusted to PH = 12.8
Liquid temperature 70 ℃
"Electrolytic copper plating solution"
Copper sulfate 0.3 mol / l
Sulfuric acid 1.9 mol / l
Liquid temperature 25 ℃
Hereinafter, a method for plating a semiconductor substrate according to an embodiment of the present invention will be described.
[0046]
Example 1
FIG. 1 is a diagram showing a substrate plating method according to a first embodiment of the present invention. In the figure, 1 is a silicon substrate, 2 is a dielectric layer formed on the silicon substrate, and SiO 2₂Consists of. 3 is a via hole formed in the dielectric layer 2, and 4 is a barrier layer made of titanium nitride. Reference numeral 5 denotes a first seed layer formed by sputtering and made of copper. 6 is an electroless plating deposition metal layer which forms a 2nd seed layer, and consists of copper. Reference numeral 7 denotes an electroplating deposited metal layer embedded in the via hole by electroplating.
[0047]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1.₂The dielectric layer 2 is formed to a thickness of 1 μm, the via hole 3 having a diameter of 0.25 μm and a depth of 1 μm is formed in the dielectric layer 2 by dry etching, and the first conductor is formed on the dielectric layer including the via hole. A semiconductor substrate on which a titanium nitride barrier layer 4 was deposited to a thickness of 100 nm by sputtering was prepared.
[0048]
Next, as shown in FIG. 1B, a copper first seed layer 5 was deposited on the titanium nitride barrier layer 4 as a second conductor layer by sputtering. The seed layer was formed at a rate of 200 to 400 nm / min using a long distance sputtering apparatus for copper sputtering, Ceraus ZX-1000 (Japan Vacuum Technology Co., Ltd.).
[0049]
At this time, the side wall of the via hole 3 was not completely covered with copper, and there was a portion where the titanium nitride was exposed. As described above, titanium nitride usually cannot form a plated metal directly on its surface by electroless plating.
[0050]
Next, as shown in FIG. 1 (c), the substrate 1 is immersed in an electroless copper plating solution for about 5 minutes, and the entire surface of the titanium nitride barrier layer 4 and the copper seed layer 5 is formed by electroless copper plating. An electroless plating deposited metal layer 6 of about 30 nm of copper was formed.
[0051]
Since the titanium nitride barrier layer 4 is not dissolved by the electroless copper plating solution, the barrier property can be secured if the thickness of the titanium nitride barrier layer 4 is 10 nm or more.
[0052]
Here, FIG. 2 is a schematic cross-sectional view of the semiconductor substrate, and shows an upper measurement position a and a lower measurement position b of the film thickness used for coverage evaluation. In the figure, the same parts as those shown in FIG.
[0053]
As shown in FIG. 2, the coverage was evaluated by measuring the film thicknesses A and B at the measurement positions a and b on the side wall of the via hole 3 and using the value of B / A. When B / A was expressed as a percentage, it was 97%, and formation of a uniform copper seed layer composed of the first seed layer 5 and the electroless plating deposited metal layer 6 as the second seed layer was confirmed.
[0054]
The 10 × 10 mm range of this seed layer is divided into 100 1 mm square sizes so that via holes are included in each divided piece, that is, a 10 mm × 10 mm range including 100 via holes is extracted, When the Scotch tape (trade name) was pasted on the range and further peeled, the proportion (adhesiveness) of the cells where the seed layer was peeled was 33%. This is a polishing pressure of 200 g / cm for chemical mechanical polishing.²The following is equivalent to having adhesion that does not cause peeling during chemical mechanical polishing.
[0055]
From the above, by using the plating method of this embodiment shown in FIG. 1, it is possible to form a uniform seed layer inside the hole, and the seed layer has an adhesion property that can withstand chemical mechanical polishing. The effect of the present embodiment that it can be ensured was confirmed.
[0056]
Next, the silicon substrate 1 on which the copper electroless plating deposited metal layer 6 was formed was taken out of the electroless copper plating solution and washed with pure water.
[0057]
Next, as shown in FIG. 1 (d), it was treated with a 10% dilute sulfuric acid aqueous solution for 2 minutes, immersed in an electrolytic copper plating solution and subjected to electroplating, and the electroplating deposited metal layer 7 was embedded in the via hole 3.
[0058]
Next, as shown in FIG.1 (e), in order to isolate | separate the electroplating deposit metal layer 7, chemical mechanical polishing was performed. For chemical mechanical polishing, alumina dispersed abrasive grains containing 1-2% hydrogen peroxide and a pad (IC-1000 manufactured by Rodel) were used with a 472 type chemical mechanical polishing apparatus manufactured by IPEC. Polishing pressure 190g / cm²As a result of polishing that reaches the barrier layer, no peeling occurs at each interface, and the chemical mechanical polishing separates the wiring conductor composed of the seed layer 5, the electroless plating deposited metal 6 and the electroplating deposited metal layer 7. did it.
[0059]
The substrate thus formed was processed by FIB (focused ion beam), and the cross section of the 100-hole via hole was observed with a scanning electron microscope (hereinafter referred to as SEM). As a result, no void was found and the via hole was made of copper. It was found to be completely filled.
[0060]
From the above, the effect of this example that a uniform seed layer can be formed with good adhesion inside the hole by using the plating method of this example as shown in FIG. 1 was confirmed. Moreover, the effect of the present Example that the fine hole can be filled by performing electroplating after electroless plating was confirmed.
[0061]
Comparative Example 1
For comparison, an example is shown in which the second conductor layer (first seed layer) is not formed by the vapor phase growth method, which is a feature of the present invention.
[0062]
Similar to Example 1, SiO₂A via hole was processed in the dielectric layer, and a titanium nitride barrier layer was deposited to a thickness of 100 nm as a first conductor layer on the dielectric layer including the via hole by a sputtering method.
[0063]
Thereafter, in Example 1, the copper seed layer 5 was formed as the second conductor layer by sputtering, but here, the semiconductor substrate was directly placed in the electroless plating solution without forming the second conductor layer. Soaked in.
[0064]
As a result, copper was not deposited on the titanium nitride barrier layer, and a copper seed layer could not be formed. Since there is no copper seed layer, copper is not uniformly deposited even by electrolytic copper plating in the next step.
[0065]
Next, as a result of processing the semiconductor substrate with FIB and observing the cross section of the 100-hole via hole with SEM, it can be seen that voids are observed in all the via holes and the via holes are not filled with copper.
[0066]
From the above, it was found that when not according to the present invention, the copper seed layer was not formed and the via hole was not filled with copper.
[0067]
Comparative Example 2
For comparison, an example in which palladium displacement plating is used for forming the second conductor layer is shown.
[0068]
Similar to Example 1, SiO₂A via hole was processed in the dielectric layer, and a titanium nitride barrier layer was deposited to a thickness of 100 nm as a first conductor layer on the dielectric layer including the via hole by a sputtering method.
[0069]
Thereafter, the semiconductor substrate was immersed in a palladium displacement plating solution for 60 seconds. An aqueous solution containing 0.2 g / l of palladium chloride, 1 ml / l of hydrochloric acid, 500 ml / l of acetic acid, and 5 ml / l of hydrofluoric acid was used as the palladium displacement plating solution. With the palladium displacement plating solution, palladium was deposited in an island shape with an average size of 50 nm.
[0070]
Thereafter, the substrate was immersed in an electroless plating solution for 5 minutes. An electroless plating deposited metal layer of about 30 nm of copper was formed on titanium nitride and palladium by electroless plating.
[0071]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 55 to 211%, and a uniform seed layer could not be formed.
[0072]
Further, when the ratio of peeling with a Scotch tape was examined in the same manner as in Example 1, it was found to be 33%, and it was found to have adhesion that can withstand chemical mechanical polishing.
[0073]
Next, after filling the via hole by electrolytic copper plating, the semiconductor substrate was processed by FIB, and the cross section of the 100 hole via hole was observed by SEM. As a result, voids were found in 94 holes out of 100 holes.
[0074]
Thus, since the unevenness | corrugation of the surface will become large when palladium displacement plating is used, the inside of a via hole could not be completely filled with copper by the electrolytic copper plating in the next process.
[0075]
In addition, titanium nitride is eluted with displacement plating reaction, and SiO₂Since copper diffuses therein, the thickness of the titanium nitride barrier layer is required to be 50 nm or more in order to ensure barrier properties.
[0076]
From the above, it was found that when the present invention was not used, a uniform seed layer was not formed and the via hole could not be filled.
[0077]
Example 2
A substrate plating method according to a second embodiment of the present invention will be described with reference to FIG. In the following description, the description overlapping with the first embodiment is omitted as long as it is not complicated.
[0078]
In this example, electroless nickel plating was used instead of electroless copper plating in Example 1. The rest was performed in the same manner as in Example 1. The electroless nickel plating solution is an aqueous solution containing nickel sulfate 0.15 mol / l, sodium citrate 0.3 mol / l, dimethylamine borane 0.03 mol / l and lactic acid 0.1 mol / l with aqueous ammonia at pH = 5. What was adjusted to 0 was used, and the liquid temperature was 50 degreeC.
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1 as in the first embodiment.₂A semiconductor substrate was prepared in which a dielectric layer 2 was formed, a via hole 3 was processed therein, and a titanium nitride barrier layer 4 was deposited thereon.
[0079]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited as a second conductor layer on the titanium nitride barrier layer 4 by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where titanium nitride was exposed.
[0080]
Next, as shown in FIG. 1C, the substrate is immersed in an electroless nickel plating solution for about 5 minutes, and the entire surface of the titanium nitride barrier layer 4 and the copper seed layer 5 is formed by electroless nickel plating. About 30 nm of nickel electroless plating deposited metal layer 6 was formed.
[0081]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 96%, and formation of a uniform seed layer was confirmed.
[0082]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 31%, and the adhesiveness to withstand chemical mechanical polishing was obtained.
[0083]
From the above, the effect of this example that a uniform seed layer can be formed inside the hole by using the plating method of this example as shown in FIG. 1 was confirmed.
[0084]
Next, after filling the via hole by electroplating, the substrate was processed by FIB, and the cross section of the 100 hole via hole was observed by SEM. As a result, it was found that no void was observed and the via hole was completely filled with copper. It was.
[0085]
Therefore, by using the plating method of this example, it is possible to confirm the effect of this example that a uniform seed layer can be formed with good adhesion inside the hole, and further, after electroless plating, electroplating to fine holes. The effect of the present embodiment that filling can be performed was confirmed.
[0086]
Example 3
A substrate plating method according to a third embodiment of the present invention will be described with reference to FIG. The seed layer 5 was formed by the same method as in Example 1 except that the CVD method was used instead of the sputtering method as the seed layer 5 formation method. Film formation was performed at 200 ° C. using copper hexafluoroacetylacetonate trimethylvinylsilane as a source gas for the CVD method.
[0087]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1.₂The dielectric layer 2 is formed to a thickness of 1 μm, and a via hole 3 having a diameter of 0.25 μm and a depth of 1 μm is processed by dry etching in accordance with a conventional method. A semiconductor substrate having a barrier layer 4 of 100 nm deposited thereon was prepared.
[0088]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited as a second conductor layer on the titanium nitride barrier layer 4 by the CVD method. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where the titanium nitride barrier layer 4 was exposed.
[0089]
Next, as shown in FIG. 1 (c), the substrate 1 is immersed in an electroless copper plating solution for about 5 minutes, and the entire surface of the titanium nitride barrier layer 4 and the copper seed layer 5 is formed by electroless copper plating. An electroless plating deposited metal layer 6 of about 30 nm of copper was formed.
[0090]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 97%, and formation of a uniform seed layer was confirmed.
[0091]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 35%, and the adhesion to withstand chemical mechanical polishing was obtained.
[0092]
From the above, the effect of this example that a uniform seed layer can be formed inside the hole by using the plating method of this example as shown in FIG. 1 was confirmed.
[0093]
Next, after filling the via hole by electroplating, the substrate was processed by FIB, and the cross section of the 100 hole via hole was observed by SEM. As a result, it was found that no void was observed and the via hole was completely filled with copper. It was.
[0094]
Therefore, by using the plating method of this example, it is possible to confirm the effect of this example that a uniform seed layer can be formed with good adhesion inside the hole, and further, after electroless plating, electroplating to fine holes. The effect of the present embodiment that filling can be performed was confirmed.
[0095]
Example 4
A substrate plating method according to a fourth embodiment of the present invention will be described with reference to FIG. All were carried out in the same manner as in Example 1 except that tantalum was used instead of titanium nitride 4 as the barrier layer.
[0096]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1.₂The dielectric layer 2 is formed to a thickness of 1 μm, and a via hole 3 having a diameter of 0.25 μm and a depth of 1 μm is processed by dry etching, and a tantalum layer of tantalum is formed thereon as a first conductor layer by sputtering. A semiconductor substrate on which the barrier layer 4 was deposited to 100 nm was prepared.
[0097]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited on the tantalum barrier layer 4 as a second conductor layer by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where tantalum was exposed.
[0098]
Next, as shown in FIG. 1 (c), the substrate 1 is immersed in an electroless copper plating solution for about 5 minutes, and the entire surface of the titanium nitride barrier layer 4 and the copper seed layer 5 is formed by electroless copper plating. An electroless plating deposited metal layer 6 of about 30 nm of copper was formed.
[0099]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 95%, and formation of a uniform seed layer was confirmed.
[0100]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 30%, and to have an adhesive property that can withstand chemical mechanical polishing.
[0101]
From the above, the effect of this example that a uniform seed layer can be formed inside the hole by using the plating method of this example as shown in FIG. 1 was confirmed.
[0102]
Next, after filling the via hole by electroplating, the substrate was processed by FIB, and the cross section of the 100-hole via hole was observed by SEM. As a result, no void was observed and the via hole was completely filled with copper. I understood.
[0103]
Therefore, by using the plating method of this example, it is possible to confirm the effect of this example that a uniform seed layer can be formed with good adhesion inside the hole, and further, after electroless plating, electroplating to fine holes. The effect of the present embodiment that filling can be performed was confirmed.
[0104]
Example 5
A substrate plating method according to a fifth embodiment of the present invention will be described with reference to FIG. All were carried out in the same manner as in Example 1 except that the barrier layer was tantalum nitride instead of titanium nitride.
[0105]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1.₂The dielectric layer 2 is formed to a thickness of 1 μm, and a via hole 3 having a diameter of 0.25 μm and a depth of 1 μm is processed by dry etching in a conventional manner, and a tantalum nitride film is formed thereon by sputtering as a first conductor layer. A semiconductor substrate having a barrier layer 4 of 100 nm deposited thereon was prepared.
[0106]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited as a second conductor layer on the tantalum nitride barrier layer 4 by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where titanium nitride was exposed.
[0107]
Next, as shown in FIG. 1 (c), the substrate 1 is immersed in an electroless copper plating solution for about 5 minutes, and the entire surface of the titanium nitride barrier layer 4 and the copper seed layer 5 is formed by electroless copper plating. An electroless plating deposited metal layer 6 of about 30 nm of copper was formed.
[0108]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 97%, and formation of a uniform seed layer was confirmed.
[0109]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 31%, and the adhesiveness to withstand chemical mechanical polishing was obtained.
[0110]
From the above, the effect of this example that a uniform seed layer can be formed inside the hole by using the plating method of this example as shown in FIG. 1 was confirmed.
[0111]
Next, after filling the via hole by electroplating, the substrate was processed by FIB, and the cross section of the 100 hole via hole was observed by SEM. As a result, it was found that no void was observed and the via hole was completely filled with copper. It was.
[0112]
Therefore, by using the plating method of this example, it is possible to confirm the effect of this example that a uniform seed layer can be formed with good adhesion inside the hole, and further, after electroless plating, electroplating to fine holes. The effect of the present embodiment that filling can be performed was confirmed.
[0113]
Example 6
A substrate plating method according to a sixth embodiment of the present invention will be described with reference to FIG. The same method as in Example 1 was performed except that tungsten was used instead of titanium nitride as the barrier layer.
[0114]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1.₂The dielectric layer 2 is formed to a thickness of 1 μm, a via hole 3 having a diameter of 0.25 μm and a depth of 1 μm is processed there by dry etching, and a tungsten layer is formed as a first conductor layer thereon by sputtering. A semiconductor substrate on which the barrier layer 4 was deposited to 100 nm was prepared.
[0115]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited on the tungsten barrier layer 4 as a second conductor layer by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where tungsten was exposed.
[0116]
Next, as shown in FIG. 1 (c), the substrate 1 is immersed in an electroless copper plating solution for about 5 minutes, and the entire surface of the titanium nitride barrier layer 4 and the copper seed layer 5 is formed by electroless copper plating. An electroless plating deposited metal layer 6 of about 30 nm of copper was formed.
[0117]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 96%, and formation of a uniform seed layer was confirmed.
[0118]
Further, when the ratio of peeling with the Scoteh tape was examined in the same manner as in Example 1, it was found to be 34%, indicating that it has an adhesive property that can withstand chemical mechanical polishing.
[0119]
From the above, the effect of this example that a uniform seed layer can be formed inside the hole by using the plating method of this example as shown in FIG. 1 was confirmed.
[0120]
Next, after filling the via hole by electroplating, the substrate was processed by FIB, and the cross section of the 100 hole via hole was observed by SEM. As a result, it was found that no void was observed and the via hole was completely filled with copper. It was.
[0121]
Therefore, by using the plating method of this example, it is possible to confirm the effect of this example that a uniform seed layer can be formed with good adhesion inside the hole, and further, after electroless plating, electroplating to fine holes. The effect of the present embodiment that filling can be performed was confirmed.
[0122]
Example 7
A substrate plating method according to a seventh embodiment of the present invention will be described with reference to FIG. The same method as in Example 1 was performed except that tungsten nitride was used instead of the barrier layer 4 of titanium nitride.
[0123]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1.₂The dielectric layer 2 is formed to a thickness of 1 μm, and a via hole 3 having a diameter of 0.25 μm and a depth of 1 μm is processed by dry etching in accordance with a conventional method, and tungsten nitride is formed thereon as a first conductor layer by sputtering. A semiconductor substrate having a barrier layer 4 of 100 nm deposited thereon was prepared.
[0124]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited on the tungsten nitride as a second conductor layer by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where tungsten nitride was exposed.
[0125]
Next, as shown in FIG. 1 (c), the substrate 1 is immersed in an electroless copper plating solution for about 5 minutes, and the entire surface of the titanium nitride barrier layer 4 and the copper seed layer 5 is formed by electroless copper plating. An electroless plating deposited metal layer 6 of about 30 nm of copper was formed.
[0126]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 95%, and formation of a uniform seed layer was confirmed.
[0127]
Further, when the ratio of peeling with a Scotch tape was examined in the same manner as in Example 1, it was found to be 34%, indicating that it has an adhesive property that can withstand chemical mechanical polishing.
[0128]
From the above, as shown in FIG. 1, the effect of this example that a uniform layer can be formed inside the hole by using the plating method of this example was confirmed.
[0129]
Next, after filling the via hole by electroplating, the substrate was processed by FIB, and the cross section of the 100 hole via hole was observed by SEM. As a result, it was found that no void was observed and the via hole was completely filled with copper. It was.
[0130]
Therefore, by using the plating method of this example, it is possible to confirm the effect of this example that a uniform seed layer can be formed with good adhesion inside the hole, and further, after electroless plating, electroplating to fine holes. The effect of the present embodiment that filling can be performed was confirmed.
[0131]
Example 8
A substrate plating method according to an eighth embodiment of the present invention will be described with reference to FIG. Except that a titanium-tungsten alloy was used in place of the barrier layer 4 of titanium nitride as the barrier layer, the same method as in Example 1 was used.
[0132]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1.₂The dielectric layer 2 is formed to a thickness of 1 μm, a via hole 3 having a diameter of 0.25 μm and a depth of 1 μm is processed there by dry etching, and titanium tungsten is formed thereon as a first conductor layer by sputtering. A semiconductor substrate having a barrier layer 4 of 100 nm deposited thereon was prepared.
[0133]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited as a second conductor layer on the titanium tungsten alloy barrier layer 4 by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where titanium tungsten was exposed.
[0134]
Next, as shown in FIG. 1 (c), the substrate 1 is immersed in an electroless copper plating solution for about 5 minutes, and the entire surface of the titanium nitride barrier layer 4 and the copper seed layer 5 is formed by electroless copper plating. An electroless plating deposited metal layer 6 of about 30 nm of copper was formed.
[0135]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 95%, and formation of a uniform seed layer was confirmed.
[0136]
Further, when the ratio of peeling with a Scotch tape was examined in the same manner as in Example 1, it was found to be 33%, and it was found to have adhesion that can withstand chemical mechanical polishing.
[0137]
From the above, the effect of this example that a uniform seed layer can be formed inside the hole by using the plating method of this example as shown in FIG. 1 was confirmed.
[0138]
Next, after filling the via hole by electroplating, the substrate was processed by FIB, and the cross section of the 100 hole via hole was observed by SEM. As a result, it was found that no void was observed and the via hole was completely filled with copper. It was.
[0139]
Therefore, by using the plating method of this example, it is possible to confirm the effect of this example that a uniform seed layer can be formed with good adhesion inside the hole, and further, after electroless plating, electroplating to fine holes. The effect of the present embodiment that filling can be performed was confirmed.
[0140]
Example 9
A substrate plating method according to a ninth embodiment of the present invention will be described with reference to FIG. In the figure, the same parts as those shown in FIG.
[0141]
First, as shown in FIG. 3A, SiO 2 is formed on the silicon substrate 1 as in the first embodiment.₂A semiconductor substrate was prepared in which a dielectric layer 2 was formed, a via hole 3 was processed therein, and a titanium nitride barrier layer 4 was deposited thereon.
[0142]
Next, as shown in FIG. 3B, a copper seed layer 5 was deposited as a second conductor layer on the titanium nitride barrier layer 4 by sputtering.
[0143]
At this time, the side wall of the via hole 3 is not completely covered with copper, and there is a portion where the titanium nitride is exposed.
[0144]
Next, as shown in FIG. 3C, the substrate 1 was immersed in an electroless copper plating solution for about 60 minutes and plated to a thickness of about 1 μm to form an electroless copper plating layer 6. Similarly to Example 1, when the ratio of peeling with the Scotch tape was examined, it was found to be 33%, and it was found to have adhesion that can withstand chemical mechanical polishing.
[0145]
Next, as shown in FIG. 3D, chemical mechanical polishing was performed to separate the electroless plating deposited metal layer 6 to form a wiring layer. The figure is a cross-sectional view after separating the electroless plating deposited metal layer 6 by chemical mechanical polishing.
[0146]
Next, the substrate was processed by FIB, and the cross section of the 100-hole via hole was observed by SEM. As a result, no void was observed, and all the via holes 3 were completely filled with copper as shown in FIG. I found out that
[0147]
Therefore, by using the plating method of this example, it was possible to confirm the effect of this example that the fine holes can be filled by electroless plating.
[0148]
Example 10
A substrate plating method according to a tenth embodiment of the present invention will be described with reference to FIG.
[0149]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1 as in the first embodiment.₂A semiconductor substrate was prepared in which a dielectric layer 2 was formed, a via hole 3 was processed therein, and a titanium nitride barrier layer 4 was deposited thereon.
[0150]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited as a second conductor layer on the titanium nitride barrier layer 4 by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where titanium nitride was exposed.
[0151]
Next, the substrate is bonded to EDTAl. Surface treatment was performed by immersing in an aqueous solution containing 5 mol / l and hydrogen peroxide 1.2 mol / l for 5 seconds.
[0152]
Next, as shown in FIG.3 (c), it was immersed in the electroless copper plating solution for about 1 minute, without washing with water. An electroless plating deposited metal layer 6 of about 30 nm was formed on the entire surface of the titanium nitride barrier layer 4 and the seed layer 5 by electroless copper plating.
[0153]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 100%, and formation of a uniform seed layer was confirmed.
[0154]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was 20%, and EDTAl. It has been found that the adhesion is improved by removing the oxide film with a treatment solution containing 5 mol / l and hydrogen peroxide 1.2 mol / l.
[0155]
From the above, by using the plating method of this embodiment as shown in FIG. 1 and removing the oxide film with the treatment liquid, it is possible to form a uniform seed layer with better adhesion. The effect of this example was confirmed.
[0156]
Since the process of removing the oxide film with the treatment liquid involves etching of titanium nitride, the thickness of titanium nitride before treatment needs to be 30 nm or more in order to ensure barrier properties after the surface treatment.
[0157]
Next, the substrate on which the electroless plating deposited metal layer 6 was formed was taken out of the electroless copper plating solution and washed with pure water.
[0158]
Next, as shown in FIG.1 (d), it processed for 2 minutes by 10% dilute sulfuric acid aqueous solution, and it immersed in the electrolytic copper plating solution, and electroplated. The figure is a cross-sectional view after the electroplating deposited metal layer 7 is embedded in the via hole 3 by electroplating.
[0159]
Next, as shown in FIG.1 (e), in order to isolate | separate the electroplating deposit metal layer 7, chemical mechanical polishing was performed. The figure is a cross-sectional view after the conductor 7 is separated by chemical mechanical polishing.
[0160]
The substrate thus formed was processed by FIB, and the cross section of the 100-hole via hole was observed by SEM. As a result, no void was observed and it was found that the via hole was completely filled with copper.
[0161]
From the above, by using the plating method of this example, the effect of this example that a uniform seed layer with better adhesion can be formed inside the hole with good adhesion can be confirmed. Thereafter, the effect of this example that the fine holes can be filled by electroplating was confirmed.
[0162]
Example 11
A substrate plating method according to an eleventh embodiment of the present invention will be described with reference to FIG. In the figure, the same parts as those shown in FIG. In the figure, reference numeral 8 denotes a wiring forming groove formed in the dielectric layer 2. In the figure, the same parts as those shown in FIG.
[0163]
First, as shown in FIG. 4A, SiO 2 is formed on the silicon substrate 1 as in the first embodiment.₂The dielectric layer 2 is formed, the via hole 3 reaching the silicon substrate 1 and the wiring forming groove 8 are formed therein, and the titanium nitride barrier layer 4 is deposited on the dielectric layer including the via hole and the groove. A semiconductor substrate was prepared.
[0164]
Next, as shown in FIG. 4B, a copper seed layer 5 was deposited as a second conductor layer on the titanium nitride barrier layer 4 by sputtering. At this time, the side walls of the holes and grooves were not completely covered with copper, and there were portions where titanium nitride was exposed.
[0165]
This substrate is connected to EDTAl. Surface treatment was performed by immersing in an aqueous solution containing 5 mol / l and hydrogen peroxide 1.2 mol / l for 5 seconds.
[0166]
Next, as shown in FIG.4 (c), it was immersed in the electroless copper plating solution for about 1 minute, without washing with water. As shown in the figure, an electroless plating deposited metal layer 6 having a thickness of about 30 nm was formed on the entire surface of the titanium nitride barrier layer 4 by electroless copper plating.
[0167]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 100%, and formation of a uniform seed layer was confirmed.
[0168]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was 18%, and EDTAl. It has been found that the adhesion is improved by removing the oxide film with a treatment solution containing 5 mol / l and hydrogen peroxide 1.2 mol / l.
[0169]
From the above, by using the plating method of this embodiment as shown in FIG. 1 and removing the oxide film with the treatment liquid, it is possible to form a uniform seed layer with better adhesion. The effect of this example was confirmed.
[0170]
Since the process of removing the oxide film with the treatment liquid involves etching of titanium nitride, the thickness of titanium nitride before treatment needs to be 30 nm or more in order to ensure barrier properties after the surface treatment.
[0171]
Next, the substrate on which the electroless plating deposited metal layer 6 was formed was taken out from the electroless copper plating solution and washed with pure water.
[0172]
Next, as shown in FIG.4 (d), it processed for 2 minutes with 10% dilute sulfuric acid aqueous solution, and it immersed in the copper electroplating liquid and performed electroplating. The figure is a cross-sectional view after the electroplating deposited metal layer 7 is embedded in the via hole 3 and the groove 8 by electroplating.
[0173]
Next, as shown in FIG.4 (e), in order to isolate | separate the electroplating deposit metal layer 7, chemical mechanical polishing was performed. The figure is a cross-sectional view after separating the electroplated metal layer 7 by chemical mechanical polishing.
[0174]
The substrate thus formed was processed by FIB, and the cross section of 100 grooves and 100 via holes was observed by SEM. As a result, no voids were observed and the grooves and via holes were completely filled with copper. I understood.
[0175]
From the above, by using the plating method of this example, it is possible to confirm the effect of this example that a uniform seed layer with better adhesion can be formed inside the grooves and holes, and further after the electroless plating In addition, the effect of this example that the filling of the grooves and holes can be performed by electroplating was confirmed.
[0176]
Example 12
A substrate plating method according to a twelfth embodiment of the present invention will be described with reference to FIG. In the figure, the same parts as those shown in FIG. 4 are denoted by the same reference numerals and description thereof is omitted.
[0177]
First, as shown in FIG. 5A, SiO 2 is formed on the silicon substrate 1.₂The dielectric layer 2 is formed, the via hole 3 reaching the silicon substrate 1 and the wiring forming groove 8 are processed therein, and the titanium nitride barrier layer 4 is deposited on the upper surface of the dielectric layer including the via hole and the groove. A prepared semiconductor substrate was prepared.
[0178]
Next, as shown in FIG. 5B, a copper seed layer 5 was deposited as a second conductor layer on the titanium nitride barrier layer 4 by sputtering. At this time, the side walls of the holes and grooves were not completely covered with copper, and there were portions where titanium nitride was exposed.
[0179]
This substrate was immersed in an aqueous solution containing EDTA 2 mol / l and hydrogen peroxide 2 mol / l at 65 ° C. for 1 second to perform surface treatment.
[0180]
Next, as shown in FIG. 5 (c), the electroless plating deposited metal layer 6 was formed by immersing in an electroless copper plating solution for about 30 minutes without plating and plating to a thickness of about 1 μm.
[0181]
Since the process of removing the oxide film with the treatment liquid involves etching of titanium nitride, the thickness of titanium nitride before treatment needs to be 30 nm or more in order to ensure barrier properties after the surface treatment.
[0182]
When the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 19%, and it was found to have adhesion that can withstand chemical mechanical polishing.
[0183]
Next, as shown in FIG.5 (d), in order to isolate | separate the electroless-plating deposit metal layer 6, chemical mechanical polishing was performed. The figure is a cross-sectional view after separating the electroless plating deposited metal 6 by chemical mechanical polishing.
[0184]
As a result of processing the substrate with FIB and observing the cross section of 100 grooves and 100 via holes with SEM, no voids were observed, and as shown in FIG. It was found to be completely filled with copper.
[0185]
As described above, by removing the oxide film with the treatment liquid using the plating method of the present embodiment, a film having better adhesion can be formed, and a micro groove of copper by electroless plating, The effect of this example that the hole can be filled easily was confirmed.
[0186]
Example 13
A substrate plating method according to a thirteenth embodiment of the present invention will be described with reference to FIG.
[0187]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1 as in the first embodiment.₂A semiconductor substrate was prepared in which a dielectric layer 2 was formed, a via hole 3 was processed therein, and a tantalum barrier layer 4 was deposited thereon.
[0188]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited on the barrier layer 4 as a second conductor layer by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where tantalum was exposed.
[0189]
Next, the substrate was immersed in an aqueous solution containing 5 mol / l of hydrofluoric acid for 10 seconds to perform surface treatment.
[0190]
Next, as shown in FIG.1 (c), it was immersed in the electroless copper plating solution for about 1 minute, without washing with water. An electroless plated metal layer 6 of about 30 nm was formed on the entire surface of the tantalum barrier layer 4 and the seed layer 5 by electroless copper plating.
[0191]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 100%, and formation of a uniform seed layer was confirmed.
[0192]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 17%, and it was found to have adhesion that can withstand chemical mechanical polishing.
[0193]
From the above, as shown in FIG. 1, by using the plating method of the present embodiment, the oxide film is removed with a treatment solution containing 5 mol / l of hydrofluoric acid, so that a uniform seed layer with better adhesion can be obtained. The effect of the present embodiment that it was possible to form was confirmed.
[0194]
Since the process of removing the oxide film with the treatment liquid containing 5 mol / l of hydrofluoric acid involves tantalum etching, the thickness of tantalum before treatment is 30 nm or more in order to ensure barrier properties after surface treatment. is necessary.
[0195]
Next, the substrate on which the electroless plating deposited metal layer 6 was formed was taken out of the electroless copper plating solution and washed with pure water.
[0196]
Next, as shown in FIG.1 (d), it processed for 2 minutes by 10% dilute sulfuric acid aqueous solution, and it immersed in the electrolytic copper plating solution, and electroplated. The figure is a cross-sectional view after the electroplating deposited metal layer 7 is embedded in the via hole 3 by electroplating.
[0197]
Next, as shown in FIG. 1 (e), chemical mechanical polishing was performed to separate the electroplated metal layer 7. The figure is a cross-sectional view after the electroplating deposited metal layer 7 is separated by chemical mechanical polishing.
[0198]
The substrate thus formed was processed by FIB, and the cross section of the 100-hole via hole was observed by SEM. As a result, no void was observed and it was found that the via hole was completely filled with copper.
[0199]
In this example, since the electroless plating is performed as it is after the surface treatment, hydrofluoric acid is accumulated during the night of the electroless plating. However, no problem occurred even when about 500 8-inch wafers were plated.
[0200]
From the above, by using the plating method of this example, the effect of this example of forming a uniform seed layer with better adhesion inside the hole can be confirmed, and further after electroless plating, The effect of this example that a fine hole can be filled by electroplating was confirmed.
[0201]
Example 14
A substrate plating method according to a fourteenth embodiment of the present invention will be described with reference to FIG.
[0202]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1 as in the first embodiment.₂A semiconductor substrate was prepared in which a dielectric layer 2 was formed, a via hole 3 was processed therein, and a titanium nitride barrier layer 4 was deposited thereon.
[0203]
Next, as in Example 1, as shown in FIG. 1B, a copper seed layer 5 was deposited on the titanium nitride barrier layer 4 as a second conductor layer by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where titanium nitride was exposed.
[0204]
This substrate was immersed in an aqueous solution containing EDTA 0.1 mol / l and hydrogen peroxide 0.08 mol / l at 66 ° C. for 2 minutes to perform surface treatment.
[0205]
Next, as shown in FIG.1 (c), it was immersed in the electroless copper plating solution for about 1 minute, without washing with water. An electroless plated metal layer 6 of about 30 nm of copper was formed on the entire surface of the titanium nitride barrier layer 4 and the seed layer 5 by electroless copper plating.
[0206]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 100%, and formation of a uniform seed layer was confirmed.
[0207]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 8%, and it was found that the adhesion was further improved by removing the oxide film with the treatment liquid.
[0208]
By performing the surface treatment with the treatment liquid as in this embodiment, the treatment time can be easily controlled, and if the thickness of the titanium nitride is 10 nm or more, the barrier property can be secured even if the surface treatment is performed. I understood.
[0209]
Next, the substrate on which the electroless plating deposited metal layer 6 was formed was taken out of the electroless copper plating solution and washed with pure water.
[0210]
Next, as shown in FIG.1 (d), it processed for 2 minutes by 10% dilute sulfuric acid aqueous solution, and it immersed in the electrolytic copper plating solution, and electroplated. The figure is a cross-sectional view after embedding a copper electroplating deposited metal layer 7 in the via hole 3 by electroplating.
[0211]
Next, chemical mechanical polishing was performed to separate the electroplated metal layer 7 as shown in FIG. The figure is a cross-sectional view after the electroplating deposited metal layer 7 is separated by chemical mechanical polishing.
[0212]
The substrate thus formed was processed by FIB, and the cross section of the 100-hole via hole was observed by SEM. As a result, no void was observed and it was found that the via hole was completely filled with copper.
[0213]
From the above, by using the plating method of this example, it is possible to confirm the effect of this example that a uniform seed layer with better adhesion can be formed inside the hole. Further, after electroless plating, The effect of this example that the fine holes can be filled by plating was confirmed.
[0214]
Example 15
A substrate plating method according to a fifteenth embodiment of the present invention will be described with reference to FIG. In this example, all the processes were performed in the same manner as in Example 14 except that the surface treatment for removing the oxide film was performed with a treatment liquid containing 0.001 mol / l of EDTA and no hydrogen peroxide for 30 minutes.
[0215]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1 as in the first embodiment.₂A semiconductor substrate was prepared in which a dielectric layer 2 was formed, a via hole 3 was processed therein, and a titanium nitride barrier layer 4 was deposited thereon.
[0216]
Next, as in Example 1, as shown in FIG. 1B, a copper seed layer 5 was deposited on the titanium nitride barrier layer 4 as a second conductor layer by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where titanium nitride was exposed.
[0217]
Next, this substrate was immersed in an aqueous solution containing 0.001 mol / l EDTA and not containing hydrogen peroxide at 66 ° C. for 2 minutes to perform surface treatment.
[0218]
Next, as shown in FIG.1 (c), it was immersed in the electroless copper plating solution for about 1 minute, without washing with water. An electroless plating metal layer 6 of about 30 nm of copper was formed on the entire surface of the titanium nitride barrier layer 4 and the seed layer 5 by electroless copper plating.
[0219]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 100%, and formation of a uniform seed layer was confirmed.
[0220]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 18%, and it was found that the adhesion was further improved by removing the oxide film with the treatment liquid.
[0221]
Next, the substrate on which the electroless plating deposited metal layer 6 was formed was taken out of the electroless copper plating solution and washed with pure water.
[0222]
Next, as shown in FIG.1 (d), it processed for 2 minutes by 10% dilute sulfuric acid aqueous solution, and it immersed in the electrolytic copper plating solution, and electroplated. The figure is a cross-sectional view after embedding a copper electroplating deposited metal layer 7 in the via hole 3 by electroplating.
[0223]
Next, chemical mechanical polishing was performed to separate the electroplated metal layer 7 as shown in FIG. The figure is a cross-sectional view after the electroplating deposited metal layer 7 is separated by chemical mechanical polishing.
[0224]
The substrate thus formed was processed by FIB, and the cross section of the 100-hole via hole was observed by SEM. As a result, no void was observed and it was found that the via hole was completely filled with copper.
[0225]
As in this example, the surface treatment with the treatment liquid facilitates the control of the treatment time, and if the thickness of the titanium nitride is 10 nm or more, it is understood that the barrier property can be secured even if the surface treatment is performed. It was.
[0226]
From the above, by using the plating method of this embodiment as shown in FIG. 1 and removing the oxide film with the treatment liquid, the treatment time can be easily controlled and the adhesion is further improved. The effect of the present embodiment that a uniform seed layer can be formed was confirmed.
[0227]
Example 16
A substrate plating method according to a sixteenth embodiment of the present invention will be described with reference to FIG. In this example, everything was carried out in the same manner as in Example 14 except that the surface treatment for removing the oxide film was carried out for 10 minutes with an aqueous solution containing 1 mol / l of EDTA and no hydrogen peroxide.
[0228]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1 as in the first embodiment.₂A semiconductor substrate was prepared in which a dielectric layer 2 was formed, a via hole 3 was processed therein, and a titanium nitride barrier layer 4 was deposited thereon.
[0229]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited as a second conductor layer on the titanium nitride barrier layer 4 by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where titanium nitride was exposed.
[0230]
This substrate was dipped in an aqueous solution containing 1 mol / l of EDTA and not containing hydrogen peroxide at 66 ° C. for 2 minutes for surface treatment.
[0231]
Next, as shown in FIG.1 (c), it was immersed in the electroless copper plating solution for about 1 minute, without washing with water. An electroless plating metal layer 6 of about 30 nm of copper was formed on the entire surface of the titanium nitride barrier layer 4 and the seed layer 5 by electroless copper plating.
[0232]
When the coverage of the seed layer was calculated in the same manner as in Example 1, it was 100%, and formation of a uniform seed layer was confirmed.
[0233]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 16%, and it was found that the adhesion was further improved by removing the oxide film with the treatment liquid.
[0234]
Next, the substrate on which the electroless plating deposited metal layer 6 was formed was taken out of the electroless copper plating solution and washed with pure water.
[0235]
Next, as shown in FIG.1 (d), it processed for 2 minutes by 10% dilute sulfuric acid aqueous solution, and it immersed in the electrolytic copper plating solution, and electroplated. The figure is a cross-sectional view after embedding a copper electroplating deposited metal layer 7 in the via hole 3 by electroplating.
[0236]
Next, chemical mechanical polishing was performed to separate the electroplated metal layer 7 as shown in FIG. The figure is a cross-sectional view after the electroplating deposited metal layer 7 is separated by chemical mechanical polishing.
[0237]
The substrate thus formed was processed by FIB, and the cross section of the 100-hole via hole was observed by SEM. As a result, no void was observed and it was found that the via hole was completely filled with copper.
[0238]
By performing the surface treatment with the treatment liquid as in this embodiment, the treatment time can be easily controlled, and if the thickness of the titanium nitride is 10 nm or more, the barrier property can be secured even if the surface treatment is performed. I understood.
[0239]
From the above, by using the plating method of this embodiment as shown in FIG. 1 and removing the oxide film with the treatment liquid, the treatment time can be easily controlled and the adhesion is further improved. The effect of the present embodiment that a uniform seed layer can be formed was confirmed.
[0240]
Example 17
A substrate plating method according to a seventeenth embodiment of the present invention will be described with reference to FIG. In this example, all the processes were performed in the same manner as in Example 14 except that the surface treatment for removing the oxide film was performed for 2 minutes with a treatment liquid containing 0.001 mol / l EDTA and 1 mol / l hydrogen peroxide.
[0241]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1 as in the first embodiment.₂A semiconductor substrate was prepared in which a dielectric layer 2 was formed, a via hole 3 was processed therein, and a titanium nitride barrier layer 4 was deposited thereon.
[0242]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited on the titanium nitride 4 as a second conductor layer by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where titanium nitride was exposed.
[0243]
This substrate was immersed in an aqueous solution containing EDTA 0.001 mol / l and hydrogen peroxide 1 mol / l at 66 ° C. for 2 minutes to perform surface treatment.
[0244]
Next, as shown in FIG.1 (c), it was immersed in the electroless copper plating solution for about 1 minute, without washing with water. An electroless plated metal layer 6 of about 30 nm of copper was formed on the entire surface of the titanium nitride barrier layer 4 and the seed layer 5 by electroless copper plating.
[0245]
Further, when the coverage of the seed layer was calculated in the same manner as in Example 1, it was 100%, and formation of a uniform seed layer was confirmed.
[0246]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 13%, and it was found that the adhesion was further improved by removing the oxide film with the treatment liquid.
[0247]
Next, the substrate on which the electroless plating deposited metal layer 6 was formed was taken out of the electroless copper plating solution and washed with pure water.
[0248]
Next, as shown in FIG.1 (d), it processed for 2 minutes by 10% dilute sulfuric acid aqueous solution, and it immersed in the electrolytic copper plating solution, and electroplated. The figure is a cross-sectional view after embedding a copper electroplating deposited metal layer 7 in the via hole 3 by electroplating.
[0249]
Next, chemical mechanical polishing was performed to separate the electroplated metal layer 7 as shown in FIG. The figure is a cross-sectional view after the electroplating deposited metal layer 7 is separated by chemical mechanical polishing.
[0250]
The substrate thus formed was processed by FIB, and the cross section of the 100-hole via hole was observed by SEM. As a result, no void was observed and it was found that the via hole was completely filled with copper.
[0251]
By performing the surface treatment with the treatment liquid as in this embodiment, the treatment time can be easily controlled, and if the thickness of the titanium nitride is 10 nm or more, the barrier property can be secured even if the surface treatment is performed. I understood.
[0252]
From the above, by using the plating method of this embodiment as shown in FIG. 1 and removing the oxide film with the treatment liquid, the treatment time can be easily controlled and the adhesion is further improved. The effect of the present embodiment that a uniform seed layer can be formed was confirmed.
[0253]
Example 18
A substrate plating method according to a seventeenth embodiment of the present invention will be described with reference to FIG. In this example, all the processes were performed in the same manner as in Example 14 except that the surface treatment for removing the oxide film was performed for 1 minute with an aqueous solution containing EDTA 1 mol / l and hydrogen peroxide 1 mol / l.
[0254]
First, as shown in FIG. 1A, SiO 2 is formed on a silicon substrate 1 as in the first embodiment.₂A semiconductor substrate was prepared in which a dielectric layer 2 was formed, a via hole 3 was processed therein, and a titanium nitride barrier layer 4 was deposited thereon.
[0255]
Next, as shown in FIG. 1B, a copper seed layer 5 was deposited as a second conductor layer on the titanium nitride barrier layer 4 by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where titanium nitride was exposed.
[0256]
This substrate was immersed in an aqueous solution containing 1 mol / l of EDTA and 1 mol / l of hydrogen peroxide for 1 minute at 66 ° C. for surface treatment.
[0257]
Next, as shown in FIG.1 (c), it was immersed in the electroless copper plating solution for about 1 minute, without washing with water. An electroless plated metal layer 6 of about 30 nm of copper was formed on the entire surface of the titanium nitride barrier layer 4 and the seed layer 5 by electroless copper plating.
[0258]
Further, when the coverage of the seed layer was calculated in the same manner as in Example 1, it was 100%, and formation of a uniform seed layer was confirmed.
[0259]
Further, when the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was found to be 13%, and it was found that the adhesion was further improved by removing the oxide film with the treatment liquid.
[0260]
Next, the substrate on which the electroless plating deposited metal layer 6 was formed was taken out of the electroless copper plating solution and washed with pure water.
[0261]
Next, as shown in FIG.1 (d), it processed for 2 minutes by 10% dilute sulfuric acid aqueous solution, and it immersed in the electrolytic copper plating solution, and electroplated. The figure is a cross-sectional view after embedding a copper electroplating deposited metal layer 7 in the via hole 3 by electroplating.
[0262]
Next, chemical mechanical polishing was performed to separate the electroplated metal layer 7 as shown in FIG. The figure is a cross-sectional view after the electroplating deposited metal layer 7 is separated by chemical mechanical polishing.
[0263]
The substrate thus formed was processed by FIB, and the cross section of the 100-hole via hole was observed by SEM. As a result, no void was observed and it was found that the via hole was completely filled with copper.
[0264]
By performing the surface treatment with the treatment liquid as in this embodiment, the treatment time can be easily controlled, and if the thickness of the titanium nitride is 10 nm or more, the barrier property can be secured even if the surface treatment is performed. I understood.
[0265]
From the above, by using the plating method of this embodiment as shown in FIG. 1 and removing the oxide film with the treatment liquid, the treatment time can be easily controlled and the adhesion is further improved. The effect of the present embodiment that a uniform seed layer can be formed was confirmed.
[0266]
Example 19
A substrate plating method according to the seventeenth embodiment of the present invention will be described with reference to FIG.
First, as shown in FIG. 3A, the SiO 2 is formed on the silicon substrate 1 as in the first embodiment.₂A semiconductor substrate was prepared in which a dielectric layer 2 was formed, a via hole 3 was processed therein, and a titanium nitride barrier layer 4 was deposited thereon.
[0267]
Next, as shown in FIG. 3B, a copper seed layer 5 was deposited as a second conductor layer on the titanium nitride barrier layer 4 by sputtering. At this time, the side wall of the hole was not completely covered with copper, and there was a portion where titanium nitride was exposed.
[0268]
This substrate was immersed in an aqueous solution containing EDTA 0.2 mol / l and hydrogen peroxide 0.05 mol / l at 65 ° C. for 5 minutes to perform surface treatment.
[0269]
Next, as shown in FIG.3 (c), without washing with water, it was immersed in the electroless copper plating solution for about 30 minutes, and the electroless-plating deposit metal layer 6 with a thickness of about 1 micrometer was formed.
[0270]
When the ratio of peeling with the Scotch tape was examined in the same manner as in Example 1, it was 10%, and it was found that the film had adhesion that could withstand chemical mechanical polishing.
[0271]
Further, it was found that by performing the surface treatment with the treatment liquid, the treatment time can be easily controlled, and if the titanium nitride film thickness is 10 nm or more, the barrier property can be secured even if the surface treatment is performed.
[0272]
Next, as a result of processing this substrate by FIB and observing the cross section of the 100-hole via hole by SEM, no voids were observed, and all the via holes 3 were completely filled with copper as shown in FIG. I found out that
[0273]
Next, as shown in FIG.3 (d), in order to isolate | separate the electroless-plating deposit metal 6, chemical mechanical polishing was performed. FIG. 4D is a cross-sectional view after the electroless plating deposited metal 6 is separated by chemical mechanical polishing.
[0274]
As described above, by using the plating method of this embodiment, removal during oxidation with a treatment liquid containing 0.2 mol / l of EDTA and 0.05 mol / l of hydrogen peroxide makes it easy to control the treatment time. Thus, it was possible to form a film with even better adhesion and to confirm the effect of this example that the copper microgrooves and holes can be easily filled by electroless plating.
[0275]
FIG. 6 is a diagram showing the evaluation results of the above-described embodiment in comparison with the comparative example. As shown in the figure, in Examples 1 to 9, good adhesion, coverage and embedding can be obtained by setting the thickness of the barrier layer to 10 nm or more. Further, in Examples 10 to 13, the aqueous solution treatment for 1 to 10 seconds, that is, the oxide film removal treatment on the surface of the barrier layer, and the thickness of the barrier layer is set to 30 nm or more, thereby providing good adhesion, coverage, And embedding can be obtained. In Examples 14 to 19, good adhesion, coverage and embedding can be obtained by immersing the treatment solution for 60 to 1800 seconds and setting the thickness of the barrier layer to 10 nm or more.
[0276]
【The invention's effect】
As described above, according to the present invention, a seed layer is formed on at least a part of the barrier layer that is inactive with respect to the electroless plating reaction by a vapor phase growth method. Therefore, a uniform seed layer is formed by electroless plating. Can be formed.
[0277]
Moreover, since the said barrier layer surface is processed with a process liquid, the adhesiveness of the said electroless copper plating improves.
[Brief description of the drawings]
FIG. 1 is a diagram showing a method for plating a semiconductor substrate according to a first embodiment of the present invention.
FIG. 2 is a schematic cross-sectional view of a semiconductor substrate showing measurement positions of film thickness used for coverage evaluation.
FIG. 3 is a diagram showing a method for plating a semiconductor substrate according to a ninth embodiment of the present invention.
FIG. 4 is a diagram showing a method for plating a semiconductor substrate according to an eleventh embodiment of the present invention.
FIG. 5 is a diagram showing a method for plating a semiconductor substrate according to a twelfth embodiment of the present invention.
FIG. 6 is a diagram showing evaluation results of examples of the present invention in comparison with comparative examples.
[Explanation of symbols]
1 Silicon substrate
2 Dielectric layer
3 Beer hall
4 Barrier layer
5 Seed layer
6 Electroless plating deposited metal layer
7 Electroplated metal layer
8 Groove for wiring formation

Claims (3)

  Forming a recess on the surface of the dielectric layer formed on the semiconductor substrate; forming a first conductive layer covering the surface of the dielectric layer formed with the recess; and at least a surface of the first conductive layer. A step of forming a second conductive layer on the surface of the first conductive layer including a part thereof by vapor deposition, a step of removing an oxide film on the surface of the first conductive layer, a surface of the first conductive layer and a second And a step of forming a plated metal layer on the surface of the conductive layer by electroless plating.   2. The method for plating a semiconductor substrate according to claim 1, wherein the electroless plating is electroless copper plating, and the treatment liquid used in the step of removing the oxide film on the surface of the first conductive layer is at least ethylenediaminetetraacetic acid 0.001. A method for plating a semiconductor substrate, which is an aqueous solution containing 1 mol / l or less and 1 mol / l or less of hydrogen peroxide.   2. The method of plating a semiconductor substrate according to claim 1, wherein the first conductive layer is one metal selected from titanium nitride, tungsten nitride, tantalum nitride, tantalum, tungsten, tantalum alloy, and tungsten alloy. Substrate plating method.

Images