JP3812988B2 - Circuit board - Google Patents

Circuit board Download PDF

Info

Publication number
JP3812988B2
JP3812988B2 JP11827797A JP11827797A JP3812988B2 JP 3812988 B2 JP3812988 B2 JP 3812988B2 JP 11827797 A JP11827797 A JP 11827797A JP 11827797 A JP11827797 A JP 11827797A JP 3812988 B2 JP3812988 B2 JP 3812988B2
Authority
JP
Japan
Prior art keywords
heat sink
metal
circuit board
component
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP11827797A
Other languages
Japanese (ja)
Other versions
JPH10308563A (en
Inventor
好彦 辻村
美幸 中村
康人 伏井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denka Co Ltd
Original Assignee
Denki Kagaku Kogyo KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denki Kagaku Kogyo KK filed Critical Denki Kagaku Kogyo KK
Priority to JP11827797A priority Critical patent/JP3812988B2/en
Publication of JPH10308563A publication Critical patent/JPH10308563A/en
Application granted granted Critical
Publication of JP3812988B2 publication Critical patent/JP3812988B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0306Inorganic insulating substrates, e.g. ceramic, glass
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/05Insulated conductive substrates, e.g. insulated metal substrate
    • H05K1/053Insulated conductive substrates, e.g. insulated metal substrate the metal substrate being covered by an inorganic insulating layer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/09Use of materials for the conductive, e.g. metallic pattern

Landscapes

  • Structure Of Printed Boards (AREA)

Description

【0001】
【発明の属する技術分野】
本発明は、セラミックス基板に金属回路と金属放熱板とが設けられてなる回路基板の改良に関するものであって、回路基板をヒートシンク材に半田付けする際に発生するクラックを抑止することを目的とするものである。本発明の回路基板は、電子部品のパワーモジュール等の組立に好適なものである。
【0002】
近年、ロボットやモーター等の産業機器の高性能化に伴い、大電力・高能率インバーター等パワーモジュールの変遷が進んでおり、半導体素子から発生する熱も増加の一途をたどっている。この熱を効率よく放散させるため、パワーモジュール基板では従来より様々な方法が取られてきた。特に最近、良好な熱伝導を有するセラミックス基板が利用できるようになったため、その基板上に銅板等の金属板を接合し、回路を形成後、そのままあるいはNiメッキ等の処理を施してから半導体素子を実装する構造も採用されつつある。
【0003】
このようなモジュールは、当初、簡単な工作機械に使用されてきたが、ここ数年、溶接機、電車の駆動部、電気自動車に使用されるようになり、より厳しい環境条件下における耐久性と更なる小型化が要求されるようになってきた。そこで、セラミックス基板に対しても、電流密度を上げるための金属回路厚の増加、熱衝撃等に対する耐久性の向上が要求され、セラミックス焼結体の新たな製造研究により対応している。
【0004】
【発明が解決しようとする課題】
セラミックス基板自体の耐久性が向上すると、今度は回路基板をヒートシンク材(通常は銅部材)に半田付けする際に、半田部分で剥離が起こるような現象(以下、「半田クラック」という。)が生じ始めた。本発明の目的は、半田クラックの抑止効果に優れた回路基板を提供することである。
【0005】
【課題を解決するための手段】
すなわち、本発明は、セラミックス基板の一方の面に金属回路、他方の面に金属放熱板が設けられてなるものであって、上記金属放熱板の周囲の少なくとも一部に、上記金属放熱板と接触させて又は接触させないで、TiNを含みAg成分又はCu成分を含まない帯状層を形成させてなることを特徴とする回路基板、及び上記帯状層にNiメッキが施されてなるものであることを特徴とする回路基板である。
【0006】
【発明の実施の形態】
以下、更に詳しく本発明について説明すると、半田クラックは、半田厚みに依存することは一般的に知られており、その厚みの厚い方が起こりにくいが、その反面、半田部分の熱抵抗が大きくなり問題となる。また一方で、半田クラックの起点は必ず放熱金属板の周囲から起こることもわかっている。
【0007】
従来、活性金属を含むろう材を金属回路又は金属放熱板の端部からはみ出させてセラミックス基板とそれらを接合し、Ag、Cu等の主成分以外にTi等の活性金属成分を含む接合層を金属回路又は金属放熱板の周囲に形成させる技術が提案されているが、この接合層はAg−Cu合金等のAg成分又はCu成分が主体となっており、しかもその厚みは20〜50μm程度と厚いものであったので、厳しい条件下の使用では半田クラックが発生しやすいものであった。
【0008】
本発明者らは、放熱金属板の周囲にTiNを含みAg成分又はCu成分を含まない帯状層(以下、単に「帯状層」という。)を形成させることによって、放熱金属板自体の外周部の厚みを薄くする従来技術よりも、半田クラックを防ぐことができることを見いだしたものである。
【0009】
本発明で使用されるセラミックス基板の材質としては、窒化ケイ素、窒化アルミニウム、アルミナ等であるが、パワーモジュールには窒化アルミニウムが適している。セラミックス基板の厚みとしては、厚すぎると熱抵抗が大きくなり、薄すぎると耐久性がなくなるため、0.5〜0.8mm程度が好ましい。
【0010】
セラミックス基板の表面性状は重要であり、微少な欠陥や窪み等は、金属回路、金属放熱板あるいはそれらの前駆体である金属板をセラミックス基板に接合する際に悪影響を与えるため、平滑であることが望ましい。従って、セラミックス基板は、ホーニング処理や機械加工等による研磨処理が施されていることが好ましい。
【0011】
金属回路及び金属放熱板の材質としては、銅又は銅合金が一般的であるが、これに限定されることはない。その厚みは、近年、電流密度が向上していく傾向から、金属回路は0.3mm以上で、金属放熱板は0.2mm以上であることが好ましい。
【0012】
セラミックス基板の一方の面に金属回路、他方の面には金属放熱板を形成する方法としては、セラミックス基板と金属板との接合体をエッチングする方法、金属板から打ち抜かれた金属回路、放熱金属板のパターンをセラミックス基板に接合する方法等によって行うことができ、これらの際における接合方法としては、Mo−Mn法、活性金属ろう付け法、硫化銅法、DBC法、銅メタライズ法等の種々の方法を採用することができるが、パワーモジュール用としては、活性金属ろう付け法が好ましい。
【0013】
活性金属ろう付け法については、例えば特開昭60−177634号公報に記載されている。活性金属ろう付け法におけるろう材の金属成分は、銀と銅を主成分とし、溶融時のセラミックス基板との濡れ性を確保するために活性金属を副成分とする。活性金属成分は、セラミックス基板と反応して酸化物や窒化物を生成し、ろう材とセラミックス基板との結合を強固なものにする。活性金属の具体例をあげれば、チタン、ジルコニウム、ハフニウム、ニオブ、タンタル、バナジウムやこれらの化合物である。本発明においては、帯状層を金属放熱板の周囲に形成させるに際し、活性金属ろう付け法で生成した接合層を利用することができるので、その場合は活性金属として少なくともチタンを含ませる。これらの比率としては、銀80〜95重量部と銅20〜5重量部の合計量100重量部あたり活性金属1〜7重量部である。接合温度は、800〜840℃が望ましい。
【0014】
本発明は、上記したセラミックス基板の一方の面に金属回路、他方の面に金属放熱板が設けられたものにおいて、金属放熱板の周囲の少なくとも一部に帯状層を、上記金属放熱板と接触させて又は接触させないで形成させた点に大きな特徴がある。
【0015】
本発明における帯状層は、0.5mm以上の幅を持っていることが好ましく、またその長さと形成場所は任意に定めることができる。すなわち、帯状層は、金属放熱板に接触させその周囲の全てに形成させることが望ましいが、必ずしもそのようにする必要はなく、半田クラックが頻発する例えばコーナー部にのみ形成させてもよい。更には、帯状層は必ずしも金属放熱板に接触させて形成させる必要はなく、0.5mm程度以内に離して形成することもできる。
【0016】
また、帯状層の組成は、TiNを含むがAg成分又はCu成分を含んでいないことが必要であり、Ag成分又はCu成分を含んでいると半田クラックの抑制効果は従来と同程度となり所期の目的を達成することができない。本発明の帯状層には、上記した活性金属成分又はその化合物が含まれていてもよい。
【0017】
更には、帯状層と半田は十分に濡れる必要があるので、帯状層にはNiメッキが施されていることが好ましい。Niメッキの厚みは10μm以下が好ましい。
【0018】
本発明の帯状層を形成させるには、セラミックス基板として窒化物基板を用い、しかも活性金属成分としてチタンを含ませたろう材を用いて生成させた接合層を利用する方法と利用しない方法の二通りがある。
【0019】
接合層を利用する場合は、先ず金属放熱板の周囲にもはみ出た接合層が形成するように金属放熱板とセラミックス基板とを接合させる。次いで、このはみ出た接合層の大部分はAg−Cu合金層であるが、Ti成分が窒化物基板のN分と反応して生成したTiN層等も含んでいるので、Ag−Cu合金層を選択エッチングすることによって、本発明の帯状層を形成させることができる。その際のエッチング液としては、5〜15%過酸化水素水溶液等を使用することができる。
【0020】
金属放熱板の周囲にはみ出た接合層を形成させるには、チタンを含むろう材をセラミックス基板に塗布した後、その塗布面積よりも小さい金属放熱板を配置して加熱する方法、チタンを含むろう材を用いて金属放熱板とセラミックス基板とを加熱接合した後、金属放熱板の縁をエッチング除去して接合層を露出させる方法等によって行うことができる。
【0021】
接合層を利用しない場合は、セラミックス基板と金属放熱板とを接合させた後に、金属放熱板の周囲に新たにTiNを含む層を形成させることが必要であるが、その方法としては、チタンを含むろう材を用い上記に準じて形成させる方法、スパッタリング法等がある。
【0022】
このようにして形成された帯状層は、ろう材のTi成分が窒化物基板のN分と反応して生成したTiN層を主成分とするものであり、その厚みは接合層厚みの20〜50μm程度から数μm程度にまで薄くなるのでその部分の半田厚みが厚くなり、回路基板の半田クラック発生の抑止効果が向上する。
【0023】
【実施例】
以下、本発明を実施例と比較例をあげて具体的に説明する。
【0024】
実施例1〜6
重量割合で、銀粉末90部、銅粉末10部、ジルコニウム粉末3部、チタン粉末3部及びテルピネオール15部を配合し、ポリイソブチルメタアクリレートのトルエン溶液を加えてよく混練し、ろう材ペーストを調整した。このろう材ペーストを窒化アルミニウム基板(サイズ:60mm×36mm×0.65mm 曲げ強さ:40kg/mm2 熱伝導率:135W/mK)の両面にスクリーン印刷によって全面に塗布した。その際の塗布量(乾燥後)は9mg/cm2 とした。
【0025】
次に、金属回路形成面に60mm×36mm×0.3mmの銅板を、また金属放熱板形成面に60mm×36mm×0.15mmの銅板をそれぞれ接触配置してから、真空度1×10-5Torr以下の真空下、830℃で30分加熱した後、2℃/分の降温速度で冷却して接合体を製造した。
【0026】
次いで、この接合体の銅板上にUV硬化タイプのエッチングレジストをスクリーン印刷で塗布後、塩化第2銅溶液を用いてエッチング処理を行って銅板不要部分を溶解除去し、更にエッチングレジストを5%苛性ソーダ溶液で剥離した。このエッチング処理後の接合体には、銅回路パターン間に残留不要ろう材や活性金属成分と窒化アルミニウム基板との反応物があるので、それを除去するため、20%過酸化水素と10%フッ化アンモニウムの混合溶液(60℃)に10分間浸漬した。
【0027】
上記のようにして、窒化アルミニウム基板の一方の面に銅回路、他方の面に銅放熱板(外周部がエッチング除去されている)が設けられてなる回路基板を製造した後、銅回路面の全面を覆うように再度レジストインクを塗布する一方、銅放熱板にはその端部から所定幅を残して再度レジストインクを塗布し、塩化第2銅溶液を用いてエッチング処理を行い、銅放熱板の端部を溶解除去し、表1に示す幅の接合層を露出させた。
【0028】
これを40℃、10%過酸化水素溶液に浸漬し、露出させた接合層に存在するAg−Cu合金等のAg成分及びCu成分を溶解除去し(マイクロX線回折により確認)、帯状層を形成させた。その後、一部の回路基板には、更に無電解Niメッキを施した。
【0029】
比較例1
帯状層を形成させなかったこと以外は、実施例1と同様にして回路基板を製造した。
【0030】
比較例2〜4
露出させた接合層からAg−Cu合金等のAg成分及びCu成分を溶解除去しなかったこと以外は、実施例1〜3と同様にして回路基板を製造した。
【0031】
これら一連の処理を経て製作された回路基板について、ヒートシンク材(100mm×50mm×3mmの銅板)に共晶半田にて半田付けした後、気中、−40℃×30分保持後、25℃×10分間放置を1サイクルとするヒートサイクル試験を行い、半田クラックの発生サイクル数を測定した。その結果を表1に示す。
【0032】
【表1】

Figure 0003812988
【0033】
【発明の効果】
本発明によれば、半田クラック発生の抑止効果に優れた回路基板が提供される。[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an improvement of a circuit board in which a ceramic circuit is provided with a metal circuit and a metal heat sink, and an object thereof is to suppress cracks that occur when the circuit board is soldered to a heat sink material. To do. The circuit board of the present invention is suitable for assembling power modules and the like for electronic components.
[0002]
In recent years, with the improvement in performance of industrial equipment such as robots and motors, the transition of power modules such as high-power and high-efficiency inverters is progressing, and the heat generated from semiconductor elements is steadily increasing. In order to dissipate this heat efficiently, various methods have been conventionally used for power module substrates. In particular, since a ceramic substrate having good heat conduction has recently become available, a metal plate such as a copper plate is joined to the substrate, and after forming a circuit, the semiconductor element is subjected to a treatment such as Ni plating or the like. A structure for mounting is also being adopted.
[0003]
Such modules were initially used in simple machine tools, but have been used in welding machines, train drives, and electric vehicles over the last few years, and are more durable in harsh environmental conditions. Further miniaturization has been demanded. Therefore, the ceramic substrate is also required to increase the thickness of the metal circuit for increasing the current density and to improve the durability against thermal shock, and is responding to the new manufacturing research of the ceramic sintered body.
[0004]
[Problems to be solved by the invention]
When the durability of the ceramic substrate itself is improved, when the circuit board is soldered to a heat sink material (usually a copper member), a phenomenon that peeling occurs at the solder portion (hereinafter referred to as “solder crack”) will occur. Began to occur. The objective of this invention is providing the circuit board excellent in the inhibitory effect of a solder crack.
[0005]
[Means for Solving the Problems]
That is, the present invention comprises a ceramic circuit board provided with a metal circuit on one side and a metal heat sink on the other side, wherein at least a part of the periphery of the metal heat sink has the metal heat sink and A circuit board characterized in that a band-like layer containing TiN and not containing an Ag component or Cu component is formed in contact with or without contact, and the belt-like layer is formed by Ni plating. Is a circuit board characterized by
[0006]
DETAILED DESCRIPTION OF THE INVENTION
In the following, the present invention will be described in more detail. It is generally known that solder cracks depend on the thickness of the solder, and the thicker one is less likely to occur, but on the other hand, the thermal resistance of the solder portion is increased. It becomes a problem. On the other hand, it is known that the starting point of the solder crack always occurs from the periphery of the heat radiating metal plate.
[0007]
Conventionally, a brazing material containing an active metal is protruded from an end of a metal circuit or a metal heat sink, and the ceramic substrate is joined to them, and a joining layer containing an active metal component such as Ti in addition to a main component such as Ag or Cu is provided. A technique for forming a metal circuit or a metal heat sink is proposed, but this bonding layer is mainly composed of an Ag component or a Cu component such as an Ag-Cu alloy, and its thickness is about 20 to 50 μm. Since it was thick, solder cracks were likely to occur under severe conditions.
[0008]
The inventors of the present invention have formed a belt-like layer containing TiN and not containing an Ag component or a Cu component (hereinafter simply referred to as “band-like layer”) around the heat-dissipating metal plate. The present inventors have found that solder cracks can be prevented as compared with the conventional technique for reducing the thickness.
[0009]
The material of the ceramic substrate used in the present invention is silicon nitride, aluminum nitride, alumina or the like, but aluminum nitride is suitable for the power module. The thickness of the ceramic substrate is preferably about 0.5 to 0.8 mm because if it is too thick, the thermal resistance increases, and if it is too thin, the durability is lost.
[0010]
The surface properties of the ceramic substrate are important, and minute defects and dents must be smooth because they adversely affect the metal circuit, the metal heat sink or their precursor metal plates when they are joined to the ceramic substrate. Is desirable. Therefore, the ceramic substrate is preferably subjected to a polishing process such as a honing process or a machining process.
[0011]
As a material of the metal circuit and the metal heat sink, copper or a copper alloy is generally used, but is not limited thereto. The thickness of the metal circuit is preferably 0.3 mm or more and the metal heat sink is preferably 0.2 mm or more in view of the tendency of current density to improve in recent years.
[0012]
As a method of forming a metal circuit on one surface of a ceramic substrate and a metal heat sink on the other surface, a method of etching a joined body of a ceramic substrate and a metal plate, a metal circuit punched from a metal plate, a heat dissipation metal The pattern of the plate can be performed by a method of bonding to a ceramic substrate, and the bonding methods in these cases include various methods such as Mo-Mn method, active metal brazing method, copper sulfide method, DBC method, copper metallization method, etc. However, the active metal brazing method is preferable for the power module.
[0013]
The active metal brazing method is described in, for example, JP-A-60-177634. The metal component of the brazing material in the active metal brazing method contains silver and copper as main components, and an active metal as a subcomponent in order to ensure wettability with the ceramic substrate during melting. The active metal component reacts with the ceramic substrate to generate oxides and nitrides, and strengthens the bond between the brazing material and the ceramic substrate. Specific examples of the active metal include titanium, zirconium, hafnium, niobium, tantalum, vanadium, and compounds thereof. In the present invention, when the belt-like layer is formed around the metal heat radiating plate, the bonding layer generated by the active metal brazing method can be used. In that case, at least titanium is included as the active metal. These ratios are 1 to 7 parts by weight of active metal per 100 parts by weight of the total of 80 to 95 parts by weight of silver and 20 to 5 parts by weight of copper. The bonding temperature is desirably 800 to 840 ° C.
[0014]
In the present invention, a metal circuit is provided on one surface of the ceramic substrate, and a metal heat sink is provided on the other surface. A belt-like layer is provided on at least a part of the periphery of the metal heat sink and is in contact with the metal heat sink. There is a great feature in that it is formed with or without contact.
[0015]
The belt-like layer in the present invention preferably has a width of 0.5 mm or more, and its length and formation place can be arbitrarily determined. That is, it is desirable that the belt-like layer is formed on the entire periphery of the metal heat sink, but it is not always necessary to do so. For example, the belt-like layer may be formed only at the corner portion where solder cracks frequently occur. Furthermore, the strip layer does not necessarily need to be formed in contact with the metal heat radiating plate, but can be formed within about 0.5 mm.
[0016]
In addition, the composition of the belt-like layer needs to contain TiN but does not contain an Ag component or a Cu component, and if it contains an Ag component or a Cu component, the effect of suppressing solder cracks will be comparable to the conventional one. Cannot achieve the goal. The band-shaped layer of the present invention may contain the above-described active metal component or a compound thereof.
[0017]
Further, since the strip layer and the solder need to be sufficiently wetted, it is preferable that the strip layer is plated with Ni. The thickness of the Ni plating is preferably 10 μm or less.
[0018]
In order to form the belt-like layer of the present invention, there are two methods: a method using a bonding layer formed using a nitride substrate as a ceramic substrate and a brazing material containing titanium as an active metal component, and a method not using it. There is.
[0019]
When using the bonding layer, first, the metal heat sink and the ceramic substrate are bonded so as to form a bonding layer that also protrudes around the metal heat sink. Next, most of the protruding bonding layer is an Ag—Cu alloy layer. However, since the Ti component also includes a TiN layer generated by reacting with the N content of the nitride substrate, the Ag—Cu alloy layer is formed. By performing selective etching, the belt-like layer of the present invention can be formed. As an etchant at that time, a 5 to 15% hydrogen peroxide aqueous solution or the like can be used.
[0020]
In order to form a bonding layer that protrudes around the metal heat sink, a method in which a brazing material containing titanium is applied to a ceramic substrate and then a metal heat sink smaller than the coating area is disposed and heated, including titanium After the metal heat radiating plate and the ceramic substrate are heat-bonded using a material, the edge of the metal heat radiating plate can be removed by etching to expose the bonding layer.
[0021]
When the bonding layer is not used, it is necessary to newly form a layer containing TiN around the metal heat sink after bonding the ceramic substrate and the metal heat sink. There are a method of forming in accordance with the above using a brazing filler metal, a sputtering method and the like.
[0022]
The band-shaped layer formed in this way is mainly composed of a TiN layer formed by reacting the Ti component of the brazing material with the N content of the nitride substrate, and the thickness thereof is 20 to 50 μm of the thickness of the bonding layer. Since the thickness is reduced to about several μm, the solder thickness of the portion is increased, and the effect of suppressing the occurrence of solder cracks in the circuit board is improved.
[0023]
【Example】
Hereinafter, the present invention will be specifically described by way of examples and comparative examples.
[0024]
Examples 1-6
In a weight ratio, 90 parts of silver powder, 10 parts of copper powder, 3 parts of zirconium powder, 3 parts of titanium powder and 15 parts of terpineol were added, and a toluene solution of polyisobutyl methacrylate was added and kneaded well to prepare a brazing material paste. did. This brazing paste was applied to the entire surface of the aluminum nitride substrate (size: 60 mm × 36 mm × 0.65 mm bending strength: 40 kg / mm 2 thermal conductivity: 135 W / mK) by screen printing. The coating amount (after drying) at that time was 9 mg / cm 2 .
[0025]
Next, a 60 mm × 36 mm × 0.3 mm copper plate is placed in contact with the metal circuit forming surface, and a 60 mm × 36 mm × 0.15 mm copper plate is placed in contact with the metal heat sink plate forming surface, and then the degree of vacuum is 1 × 10 −5. After heating at 830 ° C. for 30 minutes under a vacuum of Torr or lower, the bonded body was manufactured by cooling at a rate of temperature decrease of 2 ° C./min.
[0026]
Next, after applying a UV-curable etching resist on the copper plate of this joined body by screen printing, etching is performed using a cupric chloride solution to dissolve and remove unnecessary portions of the copper plate, and the etching resist is further removed by 5% caustic soda. It peeled with the solution. In the bonded body after the etching treatment, there are residual unnecessary brazing material and active metal components between the copper circuit patterns and a reaction product of the aluminum nitride substrate. In order to remove this, 20% hydrogen peroxide and 10% fluorine are removed. It was immersed in a mixed solution of ammonium fluoride (60 ° C.) for 10 minutes.
[0027]
As described above, after manufacturing a circuit board in which a copper circuit is provided on one surface of the aluminum nitride substrate and a copper heat sink (the outer peripheral portion is etched away) on the other surface, The resist ink is applied again so as to cover the entire surface, while the copper heat radiation plate is again coated with the resist ink leaving a predetermined width from the end thereof, and etched using a cupric chloride solution. The edge part of this was dissolved and removed, and the bonding layer having the width shown in Table 1 was exposed.
[0028]
This is immersed in a 10% hydrogen peroxide solution at 40 ° C., and the Ag component and Cu component such as an Ag—Cu alloy existing in the exposed bonding layer are dissolved and removed (confirmed by micro X-ray diffraction). Formed. Thereafter, some circuit boards were further subjected to electroless Ni plating.
[0029]
Comparative Example 1
A circuit board was manufactured in the same manner as in Example 1 except that no band-shaped layer was formed.
[0030]
Comparative Examples 2-4
A circuit board was manufactured in the same manner as in Examples 1 to 3, except that the Ag component and the Cu component such as an Ag-Cu alloy were not dissolved and removed from the exposed bonding layer.
[0031]
The circuit board manufactured through these series of treatments is soldered to a heat sink material (100 mm × 50 mm × 3 mm copper plate) with eutectic solder, held in the air at −40 ° C. × 30 minutes, and then 25 ° C. × A heat cycle test was performed in which the sample was allowed to stand for 10 minutes, and the number of solder crack generation cycles was measured. The results are shown in Table 1.
[0032]
[Table 1]
Figure 0003812988
[0033]
【The invention's effect】
ADVANTAGE OF THE INVENTION According to this invention, the circuit board excellent in the suppression effect of solder crack generation is provided.

Claims (2)

窒化アルミニウム基板の一方の面に銅回路、他方の面に銅放熱板が、活性金属成分としてチタンを含み、 Ag 及び Cu を主成分とするろう材を用いて接合されてなるものであって、先ず金属放熱板の周囲にはみ出た接合層が形成するように銅放熱板と窒化アルミニウム基板とを接合させ、次に Ag-Cu 合金層を選択エッチング処理することにより、上記銅放熱板の端部から0.6〜1.0mmの幅に、TiNを含みAg成分及びCu成分を含まない帯状の接合層を露出させてなることを特徴とする半田クラックの抑止効果に優れた回路基板の製造方法。Copper circuitry on one surface of the aluminum nitride substrate, a copper heat sink other surface, see contains titanium as an active metal component, it is comprised are joined using a brazing material composed mainly of Ag and Cu First, the copper heat sink and the aluminum nitride substrate are bonded so that a bonding layer protruding around the metal heat sink is formed, and then the Ag-Cu alloy layer is selectively etched to end the copper heat sink. Of a circuit board excellent in the effect of suppressing solder cracks, characterized by exposing a strip-shaped bonding layer containing TiN and not containing an Ag component and a Cu component within a width of 0.6 to 1.0 mm from the portion Method. 請求項1記載の製造方法により得られる回路基板の露出した帯状の接合層に、Niメッキが施されてなるものであることを特徴とする回路基板。  A circuit board obtained by applying Ni plating to an exposed belt-like bonding layer of a circuit board obtained by the manufacturing method according to claim 1.
JP11827797A 1997-05-08 1997-05-08 Circuit board Expired - Lifetime JP3812988B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11827797A JP3812988B2 (en) 1997-05-08 1997-05-08 Circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11827797A JP3812988B2 (en) 1997-05-08 1997-05-08 Circuit board

Publications (2)

Publication Number Publication Date
JPH10308563A JPH10308563A (en) 1998-11-17
JP3812988B2 true JP3812988B2 (en) 2006-08-23

Family

ID=14732680

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11827797A Expired - Lifetime JP3812988B2 (en) 1997-05-08 1997-05-08 Circuit board

Country Status (1)

Country Link
JP (1) JP3812988B2 (en)

Also Published As

Publication number Publication date
JPH10308563A (en) 1998-11-17

Similar Documents

Publication Publication Date Title
JP3211856B2 (en) Circuit board
JP4811756B2 (en) Method for manufacturing metal-ceramic bonding circuit board
JP5741971B2 (en) Method for manufacturing metal-ceramic bonding circuit board
JP3449458B2 (en) Circuit board
JP4703377B2 (en) Stepped circuit board, manufacturing method thereof, and power control component using the same.
JPH11195854A (en) Board, its manufacture and metal bonding body suitable for board
JPH09181423A (en) Ceramic circuit board
JP3933287B2 (en) Circuit board with heat sink
JP5643959B2 (en) Method for manufacturing metal-ceramic bonding circuit board
JP3812988B2 (en) Circuit board
JP3257869B2 (en) Circuit board
JP3155874B2 (en) Circuit board
JP3190282B2 (en) Circuit board manufacturing method
JP3729637B2 (en) Electronic components
JP3734359B2 (en) Circuit board
JP3155885B2 (en) Circuit board
JP3537320B2 (en) Circuit board
JP3260222B2 (en) Circuit board manufacturing method
JP3260213B2 (en) Circuit board
JP3797784B2 (en) Circuit board
JP3354002B2 (en) Circuit board manufacturing method
JP3830263B2 (en) substrate
JP2000031609A (en) Circuit board
JP3526711B2 (en) Aluminum nitride circuit board
JP4059539B2 (en) Aluminum nitride circuit board

Legal Events

Date Code Title Description
A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20050314

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20050928

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20051003

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20060411

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060419

A911 Transfer of reconsideration by examiner before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20060426

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20060530

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20060530

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100609

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20100609

Year of fee payment: 4

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110609

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20110609

Year of fee payment: 5

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20120609

Year of fee payment: 6

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20130609

Year of fee payment: 7

EXPY Cancellation because of completion of term