JP3784148B2 - Wafer cassette - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a wafer cassette used for simultaneously inspecting a plurality of integrated circuits of chips formed on a semiconductor wafer in a wafer state.
[0002]
[Prior art]
2. Description of the Related Art In recent years, electronic devices equipped with semiconductor integrated circuit devices have made remarkable progress in downsizing and cost reduction, and accordingly, demands for downsizing and cost reduction of semiconductor integrated circuit devices have become stronger.
[0003]
Usually, in a semiconductor integrated circuit device, after a semiconductor chip and a lead frame are electrically connected by a bonding wire, the semiconductor chip is supplied in a state of being sealed with resin or ceramics and mounted on a printed board. However, due to the demand for downsizing of electronic equipment, a method of directly mounting a semiconductor integrated circuit device on a circuit board in a state where the semiconductor integrated circuit device is cut out from a semiconductor (hereinafter, the semiconductor integrated circuit device in this state is referred to as a bare chip or simply a chip). Has been developed and it is desired to supply bare chips with guaranteed quality at a low price.
[0004]
In order to perform quality assurance for a bare chip, it is necessary to burn in the semiconductor integrated circuit device in a wafer state.
[0005]
However, burn-in to a semiconductor wafer cannot meet the demand for cost reduction because the handling of the semiconductor wafer becomes very complicated. In addition, since it takes a lot of time to perform burn-in by dividing a plurality of bare chips formed on one semiconductor wafer one by one or several times many times, it is realistic in terms of time and cost. Therefore, it is required that all bare chips be burned in simultaneously in a wafer state.
[0006]
A conventional wafer cassette that can be burned in simultaneously in a wafer state as disclosed in Nikkei Microdevice (July 1997, p. 129) will be described with reference to the drawings.
[0007]
FIG. 5 shows a cross-sectional structure of a conventional wafer cassette for batch burn-in (hereinafter referred to as wafer burn-in). As shown in FIG. 5, the peripheral portion is held by a rigid ring 101 made of ceramics or the like, and a probe card 102 made of a polyimide thin film has an electrode for inspecting integrated circuit elements on a semiconductor wafer 103 on its main surface. A plurality of bumps 104 to be probe terminals provided at corresponding positions are formed. The bump 104 is electrically connected to a wiring board (not shown) through a contact penetrating the surface (back surface) opposite to the main surface of the probe card 102.
[0008]
In order to perform wafer burn-in using the probe card 102, it is necessary to completely contact each bump 104 of the probe card 102 and each electrode of the integrated circuit element formed on the semiconductor wafer 103. As a jig for that purpose, a wafer tray 111 made of a metal such as aluminum and holding the semiconductor wafer 103 is required.
[0009]
A seal made of silicon rubber or the like for forming a sealed space together with the main surface of the probe card 102 and the main surface of the wafer tray 111 at the peripheral portion of the surface (= main surface) facing the main surface of the probe card 102 in the wafer tray 111. A ring 112 is provided, and a vacuum valve 113 is provided on the side to connect the sealed space and the outside and maintain a reduced pressure state.
[0010]
By exhausting the air in the sealed space from the vacuum valve 113 and depressurizing the sealed space, the back surface of the probe card 102 and the back surface of the wafer tray 111 are pressed against each other at atmospheric pressure. The formed bumps 104 and the electrodes formed on the semiconductor wafer 103 approach each other and are further pressure-bonded. As a result, when the probe card 102, the semiconductor wafer 103, and the wafer tray 111 are integrated, the back surface of the probe card 102 and the wiring board are brought into contact with each other, and the wiring board is connected to the burn-in apparatus to perform wafer burn-in. be able to.
[0011]
[Problems to be solved by the invention]
However, in the conventional wafer / burn-in wafer cassette, the sealed space formed by the main surface of the probe card 102, the main surface of the wafer tray 111 and the seal ring 112 is decompressed, and each bump 104 of the probe card 102 is When the semiconductor wafer 103 is taken out from the container after the burn-in process is completed after the electrodes of the integrated circuit elements formed on the semiconductor wafer 103 are electrically connected to each other, the seal ring 112 is at a temperature of 100 ° C. or higher. In addition, since the probe card 102 and the wafer tray 111 are left to be pressed for a long time, they are fixed to the main surface of the probe card 102 and the semiconductor wafer 103 cannot be easily taken out.
[0012]
An object of the present invention is to solve the above-described conventional problems and to easily take out a semiconductor wafer from a wafer cassette after completion of an inspection process such as burn-in.
[0013]
[Means for Solving the Problems]
In order to achieve the above-mentioned object, the present invention provides an annular seal member provided at a peripheral portion of a wafer tray for keeping the wafer tray and the probe card opposed to each other in an airtight state. The internal pressure can be changed.
[0014]
A first wafer cassette according to the present invention applies a voltage to each electrode of a plurality of semiconductor integrated circuit elements formed on a semiconductor wafer, and collects electrical characteristics of the plurality of semiconductor integrated circuit elements at a wafer level. A wafer tray for holding a semiconductor wafer and a wafer holding portion of the wafer tray, the probe terminal being provided at a position corresponding to each electrode of a plurality of semiconductor integrated circuit elements. An annular and hollow seal member provided to form a sealed space together with the wafer tray and the probe card on the outside of the wafer holder in the wafer tray, and the seal member. A valve that opens and closes a fluid inflow / outflow passage and a semiconductor integrated circuit element of a semiconductor wafer by reducing the pressure of the sealed space And a decompression means for electrically connecting each probe terminals of the electrodes and the probe card.
[0015]
According to the first wafer cassette, a hollow and annular seal member provided so as to form a sealed space together with the wafer tray and the probe card outside the wafer holding portion in the wafer tray, and the seal member are provided. And a valve that opens and closes a passage for fluid inflow and outflow to the inside of the semiconductor wafer, so that when the semiconductor wafer is taken out from the wafer cassette held in a reduced pressure state, the reduced pressure is applied to the sealed space. The probe in the sealing member is broken by breaking the airtightness of the sealed space using a pressure reducing means and changing the cross-sectional area with respect to the annular center of the seal ring by, for example, inflowing or outflowing air from a valve provided in the sealing member. The area of the portion in contact with the card can be reduced.
[0016]
A second wafer cassette according to the present invention applies a voltage to each electrode of a plurality of semiconductor integrated circuit elements formed on a semiconductor wafer, and collects electrical characteristics of the plurality of semiconductor integrated circuit elements at a wafer level. A wafer tray for holding a semiconductor wafer and a wafer holding portion of the wafer tray, the probe terminal being provided at a position corresponding to each electrode of a plurality of semiconductor integrated circuit elements. An annular and hollow seal member provided to form a sealed space together with the wafer tray and the probe card on the outside of the wafer holder in the wafer tray , and the seal member. a valve for opening and closing of the flow of the fluid path, a semiconductor integrated circuit element of the semiconductor wafer by vacuum a closed space The pressure reducing means for electrically connecting each electrode of the probe and each probe terminal of the probe card, pressurizing the sealed space, and the interval between the surface of the probe card on which the probe terminal is formed and the wafer holding portion on the wafer tray Pressurizing means for enlarging.
[0017]
According to the second wafer cassette, the sealed space formed by the wafer tray, the probe card, and the annular seal member is pressurized, so that the space between the surface of the probe card on which the probe terminal is formed and the wafer holding portion in the wafer tray is increased. And a pressurizing means for increasing the pressure, so that when the semiconductor wafer is taken out from the wafer cassette in which the semiconductor wafer is held in a reduced pressure state, the reduced pressure state of the sealed space is only returned to the same pressure as the atmospheric pressure. In addition, if the sealed space is pressurized by positively flowing air from the pressurizing means into the sealed space, the distance between the probe terminal forming surface in the probe card and the wafer holding portion in the wafer tray increases. In addition, the area of the seal member in contact with the probe card can be reduced.
[0018]
DETAILED DESCRIPTION OF THE INVENTION
An embodiment of the present invention will be described with reference to the drawings.
[0019]
FIG. 1 shows a cross-sectional structure of a wafer / burn-in wafer cassette according to an embodiment of the present invention. As shown in FIG. 1, a wafer tray 11 for holding a semiconductor wafer has a semiconductor wafer 12 on which a plurality of semiconductor integrated circuit elements and their electrodes are formed on an upper surface. A probe card 22 having a plurality of bump groups 21 as a plurality of probe terminals is provided at a position facing the element formation surface of the semiconductor wafer 12 and corresponding to each electrode of the plurality of semiconductor integrated circuit elements.
[0020]
The probe card 22 is made of, for example, an insulating thin film such as polyimide. Each bump of the bump group 21 formed on the main surface penetrates the surface (back surface) opposite to the main surface of the probe card 22. Thus, input / output terminals (not shown) are formed, and the input / output terminals are electrically connected to a wiring board (not shown).
[0021]
The peripheral edge of the probe card 22 on the bump forming surface side is held by a rigid ring 23 made of ceramics or the like.
[0022]
A seal ring 15 made of silicon rubber or the like as an annular and hollow seal member is provided outside the wafer holding portion in the wafer tray 11 so as to face the peripheral portion of the bump group 21 on the main surface of the probe card 22. .
[0023]
Further, a valve 16 is provided on the side of the wafer tray 11 so as to be electrically connected to the hollow seal ring 15 and to open and close a passage for fluid flow into and out of the seal ring 15. Further, a bump of the probe card 22 is provided. A pressure adjusting valve 18 is provided as a pressurizing unit and a depressurizing unit that electrically connect the sealed space 17 formed by the forming surface, the wafer holding portion of the wafer tray 11 and the seal ring 16 to the outside and maintain the internal pressure state. ing.
[0024]
Hereinafter, a method of using the wafer cassette configured as described above will be described with reference to the drawings.
[0025]
2A to 2C show a method of using the wafer cassette according to the present embodiment, and show cross sections in which the seal ring changes in the order of steps.
[0026]
First, as shown in FIG. 2A, the internal pressure of the seal ring 15 is set to about atmospheric pressure, and each bump position of the bump group in the probe card 22 and each electrode of a plurality of integrated circuit elements in the semiconductor wafer 12 are set. Match the position of.
[0027]
Next, as shown in FIG. 2 (b), the air in the sealed section 17 formed by the bump forming surface of the probe card 22, the wafer holding portion of the wafer tray 11, and the seal ring 15 from the pressure regulating valve of the probe card 22. When the sealed space 17 is decompressed by suction, the back surface of the probe card 22 and the back surface of the wafer tray 11 are pressed against each other at atmospheric pressure, so that each bump of the bump group formed on the probe card 22 and the semiconductor wafer are formed. As a result, the bumps of the bump group formed on the probe card 22 and the electrodes of the plurality of integrated circuit elements formed on the semiconductor wafer are electrically connected. Connected to. Next, in a state where the probe card 22, the semiconductor wafer, and the wafer tray 11 are integrated, the back surface of the probe card 22 and a wiring board (not shown) are brought into contact with each other, and the wiring board is connected to a burn-in device (not shown). If connected, wafer burn-in can be performed.
[0028]
Next, as shown in FIG. 2C, after the wafer cassette is taken out from the burn-in apparatus, the pressure regulating valve is opened with respect to the sealed space in the wafer cassette to break the airtightness, and the hollow seal ring The area of the portion of the seal ring 15 in contact with the probe card 22 can be reduced by increasing the cross-sectional area of the seal ring 15 with respect to the annular center by introducing air from the valve 16 provided in the valve 15. The seal ring 15 and the probe card 22 that have been in close contact with each other for a long time can be easily peeled off.
[0029]
Here, it is preferable not only to break the airtightness by opening the pressure regulating valve, but also to increase the internal pressure of the sealed space to atmospheric pressure or higher by introducing air from the pressure regulating valve. In this case, since the gap between the bump forming surface of the probe card 22 and the wafer holding portion of the wafer tray 11 is widened, the area of the seal ring 15 in contact with the probe card 22 is further reduced. 22 can be peeled off more easily.
[0030]
As described above, according to the present embodiment, the annular and hollow seal ring 15 provided so as to form a sealed space together with the wafer tray 11 and the probe card 22 outside the wafer holding portion in the wafer tray 11 includes: Since the valve 16 that opens and closes the air flow passage with respect to the inside of the seal ring 15 is provided, when air is flowed into the seal ring 15 from the valve 16 to increase the internal pressure, Since the cross-sectional area increases, the area of the portion in contact with the probe card 22 in the seal ring 15 is reduced. For this reason, the seal ring 15 and the probe card 22 that are in close contact with each other can be easily peeled off.
[0031]
Further, when the semiconductor wafer is taken out from the wafer cassette, not only the internal pressure of the sealed space is returned to the atmospheric pressure but also the pressure ring is shifted to a pressurized state, so that the seal ring 15 and the probe card 22 can be more easily separated. .
[0032]
Hereinafter, a first modification according to the usage method of the present embodiment will be described with reference to the drawings. First, as shown in FIG. 3B, when the sealed space 17 is depressurized, air as shown in FIG. 3A flows into the seal ring 15 by flowing air from the valve 16. It is larger than the cross-sectional area of the seal ring 15 with respect to the previous annular center (hereinafter referred to as a predetermined cross-sectional area).
[0033]
Next, as shown in FIG. 3C, when the semiconductor wafer is taken out after completion of the inspection, the valve 16 and the inside of the seal ring 15 are reduced so that the cross-sectional area with respect to the annular center of the seal ring 15 is reduced to a predetermined cross-sectional area or less. To reduce the internal pressure. As a result, the area of the seal ring 15 in contact with the probe card 22 is reduced, so that the seal ring 15 and the probe card 22 that are in close contact with each other are easily peeled off.
[0034]
As a second modification, as shown in FIG. 4B, the sealed space 17 may be decompressed without changing the internal pressure with respect to the seal ring 15, that is, with a predetermined cross-sectional area. After the inspection, as shown in FIG. 4C, the internal pressure of the seal ring 15 is lowered and the seal ring 15 and the probe card 22 are peeled off as in the first modification.
[0035]
As described above, at the time of inspection such as wafer burn-in, each bump formed on the probe card 22 and each electrode of the semiconductor integrated circuit element formed on the semiconductor wafer are electrically and reliably connected. Therefore, each bump and the electrode are pressure-bonded by depressurizing the sealed section 17 formed by the bump forming surface of the probe card 22, the wafer holding portion of the wafer tray 11, and the seal ring 15. The dimension of the seal ring 15 in the height direction is an important factor. Therefore, in this embodiment and each modification, it is necessary to optimize the predetermined cross-sectional area and elastic modulus of the seal ring 15 in each case.
[0036]
【The invention's effect】
According to the first wafer cassette of the present invention, when taking out the semiconductor wafer from the wafer cassette in which the semiconductor wafer is held in a depressurized state, the sealed space is used for the sealed space that has been depressurized. The area of the seal member in contact with the probe card is reduced by changing the cross-sectional area with respect to the annular center of the seal ring, for example, by allowing air to flow in or out from a valve provided on the seal member. To do. As a result, the area of the seal member that contacts the probe card is reduced, so that the seal ring and the probe card can be easily peeled off, reducing the time required for the inspection process and facilitating the automation of the inspection. Can be.
[0037]
According to the second wafer cassette of the present invention, when the semiconductor wafer is taken out from the wafer cassette in which the semiconductor wafer is held in a reduced pressure state, the reduced pressure state of the sealed space is only returned to the same pressure as the atmospheric pressure. In addition, if the sealed space is pressurized by positively flowing air from the pressurizing means into the sealed space, the distance between the probe terminal forming surface in the probe card and the wafer holding portion in the wafer tray increases. The area of the seal member in contact with the probe card is reduced. As a result, the seal ring and the probe card are easily peeled off, so that the time required for the inspection process can be shortened and the inspection can be automated.
[Brief description of the drawings]
FIG. 1 is a sectional view showing a configuration of a wafer cassette according to an embodiment of the present invention.
FIGS. 2A to 2C show a method for using a wafer cassette according to an embodiment of the present invention, and are partial cross-sectional views of a seal ring portion in the wafer cassette.
FIGS. 3A to 3C are sectional views of a seal ring portion in the wafer cassette, showing a method of using the wafer cassette according to the first modification of the embodiment of the present invention. FIGS.
FIGS. 4A to 4C are sectional views of a seal ring portion in a wafer cassette, showing a method of using a wafer cassette according to a second modification of the embodiment of the present invention.
FIG. 5 is a structural sectional view showing a conventional wafer cassette.
[Explanation of symbols]
11 Wafer tray 12 Semiconductor wafer 15 Seal ring (seal member)
16 Valve 17 Sealed space 18 Pressure regulating valve (pressure reducing / pressurizing)
21 Bump group (probe terminal)
22 Probe card 23 Rigid ring

Claims (2)

A wafer cassette for applying a voltage to each electrode of a plurality of semiconductor integrated circuit elements formed on a semiconductor wafer and collectively inspecting electrical characteristics of the plurality of semiconductor integrated circuit elements at a wafer level. And
A wafer tray for holding the semiconductor wafer;
A probe card provided to face the wafer holding portion of the wafer tray and having a probe terminal at a position corresponding to each electrode of the plurality of semiconductor integrated circuit elements;
An annular and hollow seal member provided outside the wafer holding portion in the wafer tray so as to form a sealed space together with the wafer tray and the probe card;
A valve provided in the seal member, for opening and closing a passage for fluid inflow and outflow to the inside of the seal member;
A wafer cassette comprising pressure reducing means for decompressing the sealed space to electrically connect each electrode of the semiconductor integrated circuit element of the semiconductor wafer and each probe terminal of the probe card. A wafer cassette for applying a voltage to each electrode of a plurality of semiconductor integrated circuit elements formed on a semiconductor wafer and collectively inspecting electrical characteristics of the plurality of semiconductor integrated circuit elements at a wafer level. And
A wafer tray for holding the semiconductor wafer;
A probe card provided to face the wafer holding portion of the wafer tray and having a probe terminal at a position corresponding to each electrode of the plurality of semiconductor integrated circuit elements;
An annular and hollow seal member provided outside the wafer holding portion in the wafer tray so as to form a sealed space together with the wafer tray and the probe card;
A valve provided in the seal member, for opening and closing a passage for fluid inflow and outflow to the inside of the seal member;
Pressure reducing means for reducing the pressure of the sealed space and electrically connecting each electrode of the semiconductor integrated circuit element of the semiconductor wafer and each probe terminal of the probe card;
A wafer cassette comprising pressurizing means that pressurizes the sealed space to increase a distance between a surface of the probe card on which the probe terminals are formed and a wafer holding portion of the wafer tray. .

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