JP3768871B2 - Manufacturing method of semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device and a manufacturing method thereof.
[0002]
[Prior art]
When manufacturing a CMOS (Complementary Metal-Oxide-Semiconductor) device with a gate length of submicron (0.1 μm), silicon used in previous generations may not be used as it is as a gate electrode. High nature.
[0003]
The first reason is that, since silicon has a high specific resistance of several tens of Ω / □, RC delay cannot be ignored in device operation when used as a gate electrode. In devices with a gate length of the submicron generation, it is considered that the RC delay cannot be ignored unless the specific resistance of the gate electrode is 2 Ω / □ or less.
[0004]
As a second reason, there is a problem that the silicon gate electrode is depleted. This is because the solubility limit of dopant impurities added to silicon is at most 1 × 10.²⁰cm^-3This is a phenomenon in which a depletion layer having a finite length spreads on the silicon gate electrode side at the interface between the silicon gate electrode and the gate insulating film.
[0005]
Since this depletion layer is substantially a capacitance connected in series with the gate insulating film, this capacitance is added to the gate insulating film. The added capacity is 0.3 nm in terms of silicon oxide equivalent film thickness. The gate insulating film of a future device is required to have a silicon oxide equivalent film thickness of 1.5 nm or less, and the added silicon oxide equivalent film thickness of 0.3 nm is a thickness that cannot be ignored.
[0006]
On the other hand, attempts have been made to lower the resistance by adding high-concentration impurities (such as phosphorus or boron) to the silicon gate electrode. However, in the submicron generation, the thickness of the gate insulating film is required to be 1.5 nm or less in terms of silicon oxide, and this high-concentration impurity passes through the thinned gate insulating film and reaches the silicon substrate. The problem that will be revealed. This causes a problem that the impurity concentration in the channel region is deviated from the design and the threshold voltage fluctuates.
[0007]
Therefore, it is considered to use a refractory metal such as molybdenum, tungsten, or tantalum or a nitride thereof for the gate electrode. This is so-called metal gate technology.
[0008]
Since the metal gate has a lower specific resistance than silicon in principle, the RC delay can be ignored. In addition, since a metal gate does not generate a depletion layer in principle, no additional capacitance is generated. Furthermore, the metal gate is expected to solve the problem of the silicon gate such that there is no problem that the impurity penetrates the gate insulating film because it is not necessary to add an impurity for reducing the resistance.
[0009]
However, the metal gate has the following specific problems when producing a CMOS device.
[0010]
The metal gate is p when forming a CMOS device.⁺Metal material with silicon work function and n⁺A so-called dual φ (phi) metal gate technique has been proposed in which a metal material having a silicon work function is used as a gate electrode of a p-channel MOS transistor and an n-channel MOS transistor, respectively.
[0011]
By doing so, the threshold voltages of the p-channel MOS transistor and the n-channel MOS transistor can be completely controlled. However, the dual φ metal gate is p⁺Metal material with silicon work function and n⁺It is predicted that it will be quite difficult to find the optimal combination of materials due to limitations such as finding each metal material having a work function of silicon and further having to have heat resistance.
[0012]
Even if two types of metal materials with good heat resistance and proper work function are found, the LSI manufacturing process requires separate gate electrodes for p-channel MOS transistors and n-channel MOS transistors. There is a problem that it is necessary to form the process, and the manufacturing process becomes complicated.
[0013]
[Problems to be solved by the invention]
As described above, since the conventional silicon gate electrode has a high specific resistance, the RC delay cannot be ignored, the capacity is reduced due to depletion of the silicon gate electrode, and further, impurities are insulated from the silicon gate electrode. There is a problem that the threshold voltage fluctuates through the film.
[0014]
Further, in the method of using two kinds of metal gates (dual φ metal gate technology) for the n-channel MOS and p-channel MOS as the gate electrode, a combination of metal materials used for the gate electrodes of the p-channel MOS transistor and the n-channel MOS transistor is used. In addition to being predicted to be extremely difficult to find, there is a problem that the manufacturing process becomes complicated.
[0015]
The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor device having a gate electrode that does not have a problem of lowering the resistance of the gate electrode, lowering the insulating film capacity due to depletion, and causing impurities to penetrate.
[0016]
Another object of the present invention is to provide a method for manufacturing the semiconductor device by a simple method using a silicon process.
[0017]
[Means for Solving the Problems]
  In order to achieve the above object, the present invention provides:Forming a gate insulating film on the silicon substrate;
Forming a metal thin film made of at least one metal selected from titanium, zirconium and hafnium on the gate insulating film;
Forming at least a silicon or silicon-germanium thin film on the metal thin film;
Adding boron to at least a portion of the thin film;
Forming a metal silicide layer to be a gate electrode of an n-channel MOS transistor by reacting all of the metal thin film and a part of the thin film;
A step of reacting a part of the metal silicide layer with boron to form a metal boron compound layer that becomes a gate electrode of a p-channel MOS transistor, and the absolute value of the free energy of the metal boron compound is the metal silicide. Method for manufacturing a semiconductor device, characterized in that the absolute value of the free energy of the semiconductor device is largerI will provide a.
[0021]
The metal boron compound layer contains at least one metal selected from titanium, zirconium, and hafnium, and the gate insulating film includes zirconium, hafnium, titanium, tantalum, aluminum, yttrium, lanthanum, cerium, and other rare earths. An oxide film of at least one metal selected from any one of the elements is preferable.
[0022]
In the present invention, the atomic composition ratio of the metal boron compound layer is preferably metal: boron = 1: 1.5-2.
[0024]
  The present invention also includes a step of forming a gate insulating film on a silicon substrate;
  On the gate insulating filmMade of at least one metal selected from titanium, zirconium, and hafniumForming a metal thin film;
  At least silicon on the metal thin filmOr silicon germaniumForming a thin film;
  Adding boron to the first region of the thin film;
  Adding an n-type dopant to the second region of the thin film;
  All of the metal thin film reacts with a part of the thin film.Said 1 The region and the first 2 Becomes the gate electrode of the n-channel MOS transistor in the regionForming a metal silicide layer;
  Reacting part of the metal silicide layer in the first region with boron;Becomes the gate electrode of p-channel MOS transistorForming a metal boron compound layerAnd the absolute value of the free energy of the metal boron compound is larger than the absolute value of the free energy of the metal silicide.A method for manufacturing a semiconductor device is provided.
[0025]
  The present invention also provides a silicon substrate.At least one selected from titanium, zirconium and hafniumForming a gate insulating film doped with metal;
  At least silicon on the gate insulating filmOr silicon germaniumForming a thin film;
  Adding boron to the first region of the thin film;
  Adding an n-type dopant to the second region of the thin film;
  The metal added to the surface of the gate insulating film reacts with a part of the thin film.Said 1 The region and the first 2 Becomes the gate electrode of the n-channel MOS transistor in the regionForming a metal silicide layer;
  Reacting part of the metal silicide layer in the first region with boron;Becomes the gate electrode of p-channel MOS transistorForming a metal boron compound layerAnd the absolute value of the free energy of the metal boron compound is larger than the absolute value of the free energy of the metal silicide.A method for manufacturing a semiconductor device is provided.
[0026]
  The present invention also provides a silicon substrate.It is an oxide of at least one metal selected from titanium, zirconium and hafniumForming a gate insulating film made of a metal oxide;
  Reducing the surface of the gate insulating film;
  At least silicon on the gate insulating filmOr silicon germaniumForming a thin film;
  Adding boron to the first region of the thin film;
  Adding an n-type dopant to the second region of the thin film;
  The reduced metal present on the surface of the gate insulating film is allowed to react with a part of the thin film.Said 1 The region and the first 2 Becomes the gate electrode of the n-channel MOS transistor in the regionForming a metal silicide layer;
  Reacting part of the metal silicide layer in the first region with boron;Becomes the gate electrode of p-channel MOS transistorForming a metal boron compound layerAnd the absolute value of the free energy of the metal boron compound is larger than the absolute value of the free energy of the metal silicide.A method for manufacturing a semiconductor device is provided.
[0028]
Moreover, Ti (titanium) is preferable as the metal of the metal boron compound layer or the metal siliceous layer, but Zr (zirconium), Hf (hafnium) and the like, which are the same elements as Ti, have similar chemical properties. There is also a possibility that it can be used.
[0029]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following embodiments, and can be implemented with various ideas.
[0030]
(Embodiment 1)
FIG. 1 is a cross-sectional view of a semiconductor device according to the present invention.
[0031]
As shown in FIG. 1, this semiconductor device is formed on an n-type silicon layer 3, a gate insulating film 7 formed thereon, a metal boron compound layer 8 formed thereon, and the semiconductor device. p⁺And a gate electrode 9 made of polycrystalline silicon.
[0032]
Although not shown in FIG. 1, the n-type silicon layer 3 has a n-type silicon layer 3 sandwiched between n insulating layers 7.⁺A source region and a drain region made of a silicon region are provided. These constitute a p-channel MOS transistor.
[0033]
This semiconductor device is characterized in that a metal boron compound layer 8 is formed on the gate insulating film 7. Since the metal boron compound layer 8 exhibits conductivity and has a sufficiently low specific resistance and behaves like a metal, p⁺There is no problem of reducing the gate parasitic resistance in the gate electrode 9 made of polycrystalline silicon and spreading the depletion layer.
[0034]
As an example, the case where titanium is used as the metal material of the metal boron compound will be described. The specific resistance of the titanium boron compound is about 10 μΩcm, which is a value comparable to that of the metal gate material. In addition to titanium, examples of the metal material include zirconium and hafnium. In any metal material, the resistance value of the metal boron compound is sufficiently low and the depletion layer does not spread.
[0035]
Furthermore, the present invention is preferably a semiconductor device in which the p-channel MOS transistor shown in FIG. 1 and the n-channel MOS transistor shown in FIG. 2 are arranged on the same substrate.
[0036]
The n-channel MOS transistor shown in FIG. 2 includes a p-type silicon layer 5, a gate insulating film 7 formed thereon, a metal silicide layer 11 formed thereon, and an n-type layer formed thereon.⁺And a gate electrode 12 made of polycrystalline silicon.
[0037]
Although not shown in FIG. 2, the p-type silicon layer 5 has a gate insulating film 7 sandwiched between p⁺A source region and a drain region made of a silicon region are provided. These constitute an n-channel MOS transistor.
[0038]
In the present invention, the p-channel MOS transistor includes a metal boron compound layer 8 and a gate insulating film 7 and p.⁺It is formed between the polycrystalline silicon gate electrode 9. The metal boron compound layer 8 is p⁺Since it has a work function very close to the work function of polycrystalline silicon, no major problem arises in controlling the threshold value. For an n-channel MOS transistor, a metal silicide layer 11 is connected to the gate insulating film 2 and n⁺It is formed between the polycrystalline silicon gate electrode 7. The metal silicide layer 11 is n⁺Since it has a work function very close to that of polycrystalline silicon, no major problem occurs in controlling the threshold value.
[0039]
Thus, in the present invention, the metal boron compound layer 8 is inserted between the gate insulating film 7 and the gate electrodes 9 and 11 in the n-channel MOS transistor and the metal silicide layer 11 is inserted in the p-channel MOS transistor. Thus, it is possible to control each threshold value satisfactorily.
[0040]
FIG. 3 shows a case where titanium is used as an example of the metal material of the metal boron compound layer 8 and the metal silicide layer 11.₂), Titanium silicide (TiSi)₂) And silicon (n⁺Si, p⁺The relationship of the band diagram of Si) will be described.
[0041]
The work function of the titanium boron compound used for the p-channel MOS transistor is 4.8 to 5.2 eV, and the work function of the titanium silicide used for the n-channel MOS transistor is 4.4 eV.⁺Work function of polycrystalline silicon 5.2 eV, n⁺It can be seen that the value is very close to the work function of polycrystalline silicon of 4.1 eV. Therefore, the threshold values of the p-channel MOS transistor and the n-channel MOS transistor can be well controlled.
[0042]
Moreover, the specific resistance of titanium silicide is 20 μΩcm or less, which is a value comparable to that of a metal gate material.
[0043]
Next, FIG. 4 shows a cross-sectional view of a CMOS device in which the p-channel MOS transistor shown in FIG. 1 and the n-channel MOS transistor shown in FIG. 2 are formed on the same substrate.
[0044]
As shown in FIG. 4, a p-channel MOS transistor 1 and an n-channel MOS transistor 2 are formed on a silicon substrate 4 in a state where they are separated from each other by an element isolation 6 having a shallow trench structure.
[0045]
N silicon well 3 is formed on silicon substrate 4 in the region where p channel MOS transistor 1 is formed. A P silicon well 5 is formed on the silicon substrate 4 of the n-channel MOS transistor 2.
[0046]
The p-channel MOS transistor 1 includes a gate insulating film 7 formed on an N silicon well 3, a metal boron compound layer 8 formed thereon, and a p-type MOS formed thereon.⁺It has a laminated structure (MIS structure) composed of a polycrystalline silicon electrode 9 and a salicide 10 formed thereon. Gate sidewalls 17 are formed on the sidewalls of the stacked structure.
[0047]
At a position sandwiching the gate insulating film 7 in the N silicon well 3, a deep p doped with a high concentration of impurities is added.⁺Impurity diffusion layer 13 and shallow p⁺Impurity diffusion layers 15 are formed, and these serve as a source and a drain. Deep p⁺A salicide 10 is formed on the impurity diffusion layer 13.
[0048]
On the other hand, a P silicon well 5 is formed on the silicon substrate 4 in the region where the n-channel MOS transistor 2 is formed.
[0049]
The n-channel MOS transistor 2 includes a gate insulating film 7 formed on a P silicon well 5, a metal silicide layer 11 formed thereon, and an n-type formed thereon.⁺It has a laminated structure (MIS structure) comprising a polycrystalline silicon electrode 12 and a salicide 10 formed thereon. Gate sidewalls 17 are formed on the sidewalls of the stacked structure.
[0050]
Deep n doped with impurities at a high concentration at a position sandwiching the gate insulating film 7 in the P silicon well 5⁺Impurity diffusion layer 14 and shallow n⁺Impurity diffusion layers 16 are formed, and these serve as a source and a drain. Deep n⁺A salicide 10 is formed on the impurity diffusion layer 14.
[0051]
Next, a manufacturing method of the CMOS device shown in FIG. 5 will be described with reference to FIGS.
[0052]
First, as shown in FIG. 5, an element isolation 6 having a shallow trench structure is formed on a silicon substrate 4. Next, after the N silicon well 3 and the P silicon well 5 are formed, the gate insulating film 7 is formed.
[0053]
As the gate insulating film 7, silicon oxide (SiO₂) Film, silicon oxynitride (SiON) film, other metal oxide films, metal silicate films, and the like. In the case of a metal oxide film, an oxide film of at least one metal selected from any of zirconium, hafnium, titanium, tantalum, aluminum, yttrium, lanthanum, cerium, and other rare earth elements can be used.
[0054]
Next, as shown in FIG. 6, a metal thin film 18 is deposited on the gate insulating film 7. Here, a titanium film was deposited as a metal thin film by a thickness of 1 nm by a chemical vapor deposition method.
[0055]
In addition to titanium, zirconium, hafnium, or the like can be used as the metal material. In addition, as a film forming method, it is preferable to use a CVD method capable of forming a film evenly in close contact with a step of the substrate. However, substantially the same effect can be obtained by using a vapor deposition method or a sputtering method. The film thickness of the metal thin film 18 is desirably 0.5 nm or more and 2 nm or less. If the film thickness is 0.5 nm or less, pinholes may occur on the substrate and the metal thin film may have a two-dimensional discontinuous structure. It is. On the other hand, the film thickness is set to 2 nm or less because a metal thin film having a thickness larger than this has a metal-rich composition when a boron compound is formed in a later step, and the metal-rich boron compound is chemically This is because it is unstable. At this time, the film thickness of the metal boron compound is 1 nm or more and 4 nm or less. The film thickness of the metal silicide is also 1 nm or more and 4 nm or less.
[0056]
Next, as shown in FIG. 7, a non-doped polycrystalline silicon layer 19 is deposited on the metal thin film 18 by a normal method. Here, as an example, SiH₄A polycrystalline silicon layer 19 was deposited to a thickness of 200 nm by a chemical vapor deposition method using a gas.
[0057]
Next, as shown in FIG. 8, boron serving as an acceptor impurity is added to the non-doped polycrystalline silicon layer 19 in the region 1 to be a p-channel MOS transistor to form a polycrystalline silicon layer 20 doped with p-type impurities.
[0058]
On the other hand, phosphorus or arsenic as a donor impurity is added to the non-doped polycrystalline silicon layer 19 in the region 2 to be an n-channel MOS transistor to form a polycrystalline silicon 21 doped with n-type impurities.
[0059]
As an impurity addition method, an ion implantation method, a vapor phase diffusion method, or the like can be used. At this time, it is necessary to add boron impurity only to the vicinity of the surface of the non-doped polycrystalline silicon layer 19 so as not to reach the metal thin film 18. Otherwise, the metal thin film 18 and boron react in this impurity addition step, and the uniformity may be impaired.
[0060]
Here, a dose energy of 30 keV and a dose amount of 5 × 10 are applied to the non-doped polycrystalline silicon layer 19 in the region 1 where the p-channel MOS transistor is formed by an ion implantation method used in a normal process.¹⁵/ Cm²BF under the injection conditions₂Were ion-implanted.
[0061]
On the other hand, with respect to the non-doped polycrystalline silicon 19 in the region 2 where the n-channel MOS transistor is formed, the dose energy is 50 keV and the dose amount is 3 × 10.¹⁵/ Cm²As ions were implanted under the following implantation conditions.
[0062]
Next, as shown in FIG. 9, by performing a first heat treatment (700 ° C. to 800 ° C.), the metal thin film in the region 1 where the p-channel MOS transistor is formed and the region 2 where the n-channel MOS transistor is formed. All of 18 react with a part of polycrystalline silicon 20 and 21, and a uniform and flat metal silicide layer 11 is formed.
[0063]
Here, as an example, by performing heat treatment in an Ar atmosphere at 750 ° C. for 30 seconds, the titanium thin film 18 having a thickness of 1 nm reacts with the polycrystalline silicon 20 and 21, and titanium silicide having a thickness of about 2 nm (TiSi₂(C49)) Layer 11 was formed.
[0064]
Next, as shown in FIG. 10, by performing a second heat treatment (850 ° C. to 1000 ° C.) higher in temperature than the first heat treatment, the metal silicide layer 11 in the region 1 where the p-channel MOS transistor is formed. Only the boron added to the polycrystalline silicon layer 20 is reacted to form a uniform and flat metal boron compound 8.
[0065]
Here, as an example, by performing heat treatment in a nitrogen atmosphere at 1000 ° C. for 20 seconds, titanium silicide (TiSi₂(C49)) The layer 11 and boron are reacted to form a titanium boron compound (TiB₂) Layer 8 was formed.
[0066]
At this time, the titanium silicide (TiSi) in the region 2 where the n-channel MOS transistor is formed.₂(C49)) Layer 11 is made of titanium silicide (TiSi).₂(C54)) Phase transition to layer 11 reduces specific resistance. At this time, titanium silicide (TiSi₂(C54)) The flatness of the layer 11 is maintained.
[0067]
Further, the second heat treatment process simultaneously activates the impurities added to the polycrystalline silicon layers 20 and 21, and p.⁺Polycrystalline silicon layers 9 and n⁺A polycrystalline silicon layer 12 is formed.
[0068]
Next, as shown in FIG. 11, in the region 1 of the p-channel MOS transistor, the gate insulating film 7, the metal boron compound layer 8, p⁺A laminated structure (MIS structure) composed of the polycrystalline silicon electrode 9 and the salicide 10 is formed by a gate processing step. On the other hand, in the region 2 of the n-channel MOS transistor, the gate insulating film 7, the metal silicide layer 11, n⁺A laminated structure (MIS structure) composed of the polycrystalline silicon electrode 12 and the salicide 10 is simultaneously formed by gate processing.
[0069]
Here, as an example, p is formed by reactive ion etching using a CF-based reaction gas.⁺Polycrystalline silicon electrode 9, n⁺The polycrystalline silicon electrode 12, the titanium boron compound layer 8, and the titanium silicide layer 11 were etched, and the gate insulating film 7 was etched by another existing gas system. The titanium boron compound and titanium silicide can be sufficiently processed in the same gas system as the silicon etching gas. The same applies if zirconium or hafnium is replaced in addition to titanium.
[0070]
Next, as shown in FIG. 4, shallow impurity diffusion layers 15 and 16 are formed by ion implantation in a self-aligned manner using the stacked portion as a mask. Next, the gate sidewall 17 is formed of silicon oxide or the like on the sidewall of the stacked portion. Next, deep impurity diffusion layers 13 and 14 are formed by ion implantation in a self-aligning manner using the gate sidewall 17 as a mask. Finally, the salicide 10 is formed on the deep impurity diffusion layers 13 and 14 to complete the process.
[0071]
The most important manufacturing method of the CMOS device described above is that both the p-channel MOS transistor 1 and the n-channel MOS transistor 2 form the metal silicide layer 11 by the first heat treatment, and then the p-channel MOS transistor 1 and the n-channel MOS transistor 2 by the second heat treatment. Only the MOS transistor 1 reacts with a part of boron added to the polycrystalline silicon layer 20 and the metal silicide layer 11 to form the metal boron compound layer 7.
[0072]
In this way, a metal boron compound and a metal silicide each having a work function suitable for both the p-channel MOS transistor 1 and the n-channel MOS transistor 2 can be obtained by adding only one heat treatment from the conventional silicon process. Can be formed as a part of the electrode. Furthermore, in the heat treatment, the uniformity and flatness of the metal boron compound layer 8 and the metal silicide layer 11 can be improved.
[0073]
That is, in the first heat treatment, the metal thin film and the silicon gate electrode are reacted with each other by a heat treatment under a condition that a chemically stable metal silicide is formed flat and uniformly. In this state, a uniform and flat metal silicide electrode is formed in both the p-channel MOS transistor 1 and the p-channel MOS transistor 2.
[0074]
In the second heat treatment, the metal silicide layer 11 formed in the region of the p-channel MOS transistor 1 is transformed into the boron compound layer 8. Thanks to the original metal silicide layer 11 being formed uniformly and flat, the metal boron compound layer 8 can also be formed flat and uniformly. Further, the second heat treatment also serves as an electrical activation step of impurities added to the silicon gates of the p-channel MOS transistor and the n-channel MOS transistor.
[0075]
Next, an example in which a metal silicide reacts with boron and transforms into a metal boron compound will be described using titanium as a metal. It is theoretically predicted that this chemical reaction is a reasonable reaction process that is allowed thermodynamically.
[0076]
As an example, p with 1 atomic% boron added⁺Titanium silicide (TiSi) on a silicon substrate₂) Consider a chemical reaction when a layer is formed and subjected to high temperature heat treatment (850 ° C.).
[0077]
P with boron added⁺Silicon and titanium silicide (TiSi₂) To silicon (Si) and titanium boron compound (TiB)₂) Is formed as follows.
[0078]
2 / 3Si_0.99B_0.01+ TiSi₂→ 2 / 3Si + TiB₂
The point to be noted is the generation free energy ΔG = −10192J (1000 K) of this reaction formula. That is, in this system, if there is boron, titanium silicide (TiSi₂) To titanium boron compound (TiB)₂) Is a chemical reaction that proceeds spontaneously.
[0079]
  In order to actually confirm the above theoretical prediction, zirconium oxide is used as a gate insulating film.TheA titanium thin film is formed thereon, a silicon layer doped with boron is deposited thereon, heat-treated at about 800 ° C., and then heat-treated at about 1000 ° C. to form a titanium boron compound. Whether or not an experiment was conducted.
[0080]
FIG. 12 shows the experimental results of analyzing the formed laminated structure by SIMS. The horizontal axis is the depth from the back surface of the substrate, and the vertical axis is the density of boron.
[0081]
As shown in FIG. 12, with respect to the zirconium peak coming from the zirconium oxide film, the peaks of titanium and boron are distributed in the same shape and biased toward the silicon gate electrode side, and the compound consisting of titanium and boron on the zirconium oxide film It was actually shown that
[0082]
This is also clear from the fact that the boron concentration in the silicon gate electrode once decreases near the interface with the zirconium oxide film (indicated by arrow A in FIG. 12).
[0083]
For comparison, FIG. 13 shows an experimental result analyzed by SIMS of a laminated structure when the above heat treatment step is performed without inserting a titanium thin film.
[0084]
In this case, as a matter of course, since a boron compound is not formed on the zirconium oxide, the boron concentration in the silicon gate electrode is flat.
[0085]
What should be noted is the difference in the removal behavior with boron toward the silicon substrate in FIGS.
[0086]
That is, the titanium boron compound (TiB in FIG.₂) Is formed, this titanium boron compound (TiB₂) Serves as a suction port for boron and effectively suppresses the diffusion of boron to the silicon substrate side.
[0087]
On the other hand, in the case of FIG. 13, it can be seen that a large amount of boron is diffused toward the silicon substrate.
[0088]
Thus, it can be seen that the present invention also has an effect of preventing boron penetration.
[0089]
The metal boron compound layer is preferably formed in the range of metal: boron = 1: 1.5-2. This is because when the ratio of boron to metal is 1.5 or less, the chemical stability of the metal boron compound is lowered and the effects of the present invention cannot be exhibited.
[0090]
The effect of the present invention can be expected by using a metal element in which the absolute value of the free energy of the metal boron compound is larger than the absolute value of the free energy of the metal silicide.
[0091]
Further, a SiGe electrode containing germanium may be used for the silicon electrode.
[0092]
(Embodiment 2)
Next, another method for forming the metal silicide layer will be described. In this embodiment, a metal element is added to the gate insulating film when the gate insulating film is formed. Next, a silicon film is deposited, and a metal silicide layer is formed by reacting the metal added to the gate insulating film with the silicon film by heat treatment.
[0093]
FIG. 14 shows a conceptual diagram thereof.
[0094]
As shown in FIG. 14A, a metal-added gate insulating film 100 is formed on the silicon substrate 4. Here, an example is shown in which sputtering is used and titanium metal is added to the zirconium oxide film.
[0095]
First, a zirconium oxide target and a titanium metal target were used as sputtering targets, and argon gas alone or a gas obtained by adding an extremely small amount of oxygen gas to argon gas was used as the sputtering gas.
[0096]
When adding oxygen gas to argon gas, the flow rate of oxygen gas is desirably 1 sccm or less. According to such a film formation means, the zirconium oxide film to be formed has a stoichiometric composition, and the added titanium element is in a state where the bond with the oxygen element is insufficient.
[0097]
Next, as shown in FIG. 14B, a silicon film, for example, is deposited as the conductive film 101 on the metal-added gate insulating film 100, and a heat treatment at about 750 ° C. is performed. By doing so, a metal silicide layer 11 is formed between the metal-added gate insulating film 100 and the conductive film 101.
[0098]
This is because a metal element that is insufficiently bonded to oxygen in the gate insulating film 100 to which metal is added is reduced and bonded to silicon in the conductive film 101 to form the titanium silicide layer 11.
[0099]
The advantage of taking such a manufacturing method is the following two points.
[0100]
First, in the step of forming a metal thin film on the gate insulating film as shown in the first embodiment, a flat metal thin film is extremely formed when the gate insulating film and the metal thin film have poor wettability. It becomes difficult. However, this method can easily solve this problem.
[0101]
Secondly, according to the method of the present embodiment, the metal thin film forming process can be reduced, and there is an advantage that the process can be shortened.
[0102]
In the method of this embodiment, it is preferable to use titanium, zirconium, or hafnium as the metal element added to the gate insulating film in order to make it into a silicide and a boron compound. Of these, it is most desirable to add titanium that has the proposed oxidation state and is easily reduced. As the gate insulating film to be added, the material system exemplified in Embodiment 1 can be used as it is.
[0103]
In addition, although an example by sputtering is shown here as a method for forming the metal-added gate insulating film, the method is not limited thereto.
[0104]
(Embodiment 3)
Next, another method for forming the metal silicide layer will be described. In this embodiment, a reduced metal oxide film (for example, a metal thin film) is obtained by forming a gate insulating film and reducing the surface thereof. Next, a silicon film is deposited thereon, and a metal silicide layer is formed by reacting the reduced metal oxide film with the silicon film by heat treatment.
[0105]
FIG. 15 shows a conceptual diagram thereof.
[0106]
First, as shown in FIG. 15A, a gate insulating film 102 made of a metal oxide is formed on a silicon substrate 4. Titanium, zirconium, or hafnium can be used as the metal. Next, a reduced metal oxide film, here, a metal thin film 103 is formed by reducing a part of the surface of the gate insulating film 102 made of the metal oxide.
[0107]
As a reduction method, heat treatment in a reducing atmosphere such as hydrogen can be used. Although it is technically difficult to reduce only part of the gate insulating film 102 made of a metal oxide in a normal hydrogen molecule atmosphere or the like, for example, gate insulation made of a metal oxide due to exposure to hydrogen radicals, inert gas plasma, etc. It is technically possible to partially reduce only the vicinity of the outermost surface of the film 102.
[0108]
In this case, even if the metal oxide is not completely reduced to the metal by the reducing action, it may be in a low-order metal oxide state that is an unstable oxidation state.
[0109]
In this partial reduction method, metal silicate can be used instead of metal oxide.
[0110]
Next, as shown in FIG. 15B, for example, a silicon film is formed on the metal thin film 103 as the conductive thin film 104.
[0111]
Next, as shown in FIG. 15C, the silicon silicide layer 105 can be formed by reacting the silicon in the conductive thin film 104 with the metal in the metal thin film 103 by heat-treating the substrate. .
[0112]
The advantage of adopting such a manufacturing method is that a flat metal silicide and a metal boron compound can be formed even in a system in which it is difficult to form a flat metal thin film on the gate insulating film.
[0113]
【The invention's effect】
It is possible to provide a semiconductor device having a gate electrode which does not have a problem of lowering the resistance of the gate electrode, lowering the insulating film capacity due to depletion, and causing impurities to penetrate.
[0114]
In addition, a method for manufacturing the semiconductor device can be provided by a simple method using a silicon process.
[Brief description of the drawings]
FIG. 1 is a cross-sectional view of a p-channel MOS transistor according to the present invention.
FIG. 2 is a cross-sectional view of an n-channel MOS transistor in a CMOS device according to the present invention.
FIG. 3 Titanium silicide, titanium boron compound, n⁺Silicon and p⁺Silicon band diagram.
FIG. 4 is a cross-sectional view of a CMOS device according to the present invention.
FIG. 5 is a cross-sectional view showing an example of a manufacturing process of a CMOS according to the present invention.
FIG. 6 is a cross-sectional view showing an example of a manufacturing process of a CMOS according to the present invention.
FIG. 7 is a cross-sectional view showing an example of a manufacturing process of a CMOS according to the present invention.
FIG. 8 is a cross-sectional view showing an example of a manufacturing process of a CMOS according to the present invention.
FIG. 9 is a cross-sectional view showing an example of a manufacturing process of a CMOS according to the present invention.
FIG. 10 is a cross-sectional view showing an example of a manufacturing process of a CMOS according to the present invention.
FIG. 11 is a cross-sectional view showing an example of a manufacturing process of a CMOS according to the present invention.
FIG. 12 shows SIMS experimental results showing the feasibility of forming a metal boron compound according to the present invention.
FIG. 13 shows SIMS experimental results when no metal boron compound is formed.
14A and 14B are cross-sectional views of main processes in another method for forming a metal silicide layer.
FIGS. 15A, 15B, and 15C are cross-sectional views of main processes in another method for forming a metal silicide layer. FIGS.
[Explanation of symbols]
1 ... p-channel MOS transistor
2 ... n-channel MOS transistor
3 ... N silicon well
4 ... Silicon substrate
5 ... P silicon well
6 ... Isolation of shallow trench structure
7 ... Gate insulation film
8 ... Metal boron compound layer
9 ... p⁺Polycrystalline silicon
10 ... Salicide
11 ... Metal silicide layer
12 ... n⁺Polycrystalline silicon
13 ... deep p⁺Impurity diffusion layer
14 ... deep n⁺Impurity diffusion layer
15 ... shallow p⁺Impurity diffusion layer
16 ... shallow n⁺Impurity diffusion layer
17 ... Gate side wall
18 ... Metal thin film
19: Non-doped polycrystalline silicon layer
20 ... p-type impurity doped silicon layer
21... Silicon layer doped with n-type impurity
100 ... Metal-added gate insulating film
101... Conductive film
102 ... Gate insulating film
103 ... Reduced gate insulating film
104 ... Conductive film
105 ... Metal silicide layer

Claims (4)

Forming a gate insulating film on the silicon substrate;
Forming a metal thin film made of at least one metal selected from titanium, zirconium and hafnium on the gate insulating film;
Forming at least a silicon or silicon-germanium thin film on the metal thin film;
Adding boron to at least a portion of the thin film;
Forming a metal silicide layer to be a gate electrode of an n-channel MOS transistor by reacting all of the metal thin film and a part of the thin film;
A step of reacting a part of the metal silicide layer with boron to form a metal boron compound layer that becomes a gate electrode of a p-channel MOS transistor, and the absolute value of the free energy of the metal boron compound is the metal silicide. A method for manufacturing a semiconductor device, wherein the absolute value of the free energy of the semiconductor device is larger. Forming a gate insulating film on the silicon substrate;
Forming a metal thin film made of at least one metal selected from titanium, zirconium and hafnium on the gate insulating film;
Forming at least a silicon or silicon-germanium thin film on the metal thin film;
Adding boron to the first region of the thin film;
Adding an n-type dopant to the second region of the thin film;
Reacting all of the metal thin film with a part of the thin film to form a metal silicide layer that becomes a gate electrode of an n-channel MOS transistor in the first region and the second region;
A step of reacting a part of the metal silicide layer in the first region with boron to form a metal boron compound layer that becomes a gate electrode of a p-channel MOS transistor, and the absolute energy of the free energy of the metal boron compound A method for manufacturing a semiconductor device, wherein the value is larger than the absolute value of the free energy of the metal silicide. Forming a gate insulating film to which at least one metal selected from titanium, zirconium, and hafnium is added on a silicon substrate;
Forming at least a silicon or silicon-germanium thin film on the gate insulating film;
Adding boron to the first region of the thin film;
Adding an n-type dopant to the second region of the thin film;
A step of reacting a metal added to the surface of the gate insulating film with a part of the thin film to form a metal silicide layer that becomes a gate electrode of an n-channel MOS transistor in the first region and the second region. When,
A step of reacting a part of the metal silicide layer in the first region with boron to form a metal boron compound layer that becomes a gate electrode of a p-channel MOS transistor, and the absolute energy of the free energy of the metal boron compound A method for manufacturing a semiconductor device, wherein the value is larger than the absolute value of the free energy of the metal silicide. Forming a gate insulating film made of a metal oxide that is an oxide of at least one metal selected from titanium, zirconium, and hafnium on a silicon substrate;
Reducing the surface of the gate insulating film;
Forming at least a silicon or silicon-germanium thin film on the gate insulating film;
Adding boron to the first region of the thin film;
Adding an n-type dopant to the second region of the thin film;
The reduced metal present on the surface of the gate insulating film is reacted with a part of the thin film to form a metal silicide layer that becomes a gate electrode of an n-channel MOS transistor in the first region and the second region. And a process of
A step of reacting a part of the metal silicide layer in the first region with boron to form a metal boron compound layer that becomes a gate electrode of a p-channel MOS transistor, and the absolute energy of the free energy of the metal boron compound A method for manufacturing a semiconductor device, wherein the value is larger than the absolute value of the free energy of the metal silicide.

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