JP3764074B2 - 電子機器の製造方法および加工システム - Google Patents
電子機器の製造方法および加工システム Download PDFInfo
- Publication number
- JP3764074B2 JP3764074B2 JP2001236547A JP2001236547A JP3764074B2 JP 3764074 B2 JP3764074 B2 JP 3764074B2 JP 2001236547 A JP2001236547 A JP 2001236547A JP 2001236547 A JP2001236547 A JP 2001236547A JP 3764074 B2 JP3764074 B2 JP 3764074B2
- Authority
- JP
- Japan
- Prior art keywords
- hole
- electronic component
- wire
- width
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W44/00—Electrical arrangements for controlling or matching impedance
- H10W44/20—Electrical arrangements for controlling or matching impedance at high-frequency [HF] or radio frequency [RF]
- H10W44/203—Electrical connections
- H10W44/206—Wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
- H10W70/68—Shapes or dispositions thereof
- H10W70/685—Shapes or dispositions thereof comprising multiple insulating layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/015—Manufacture or treatment of bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
- H10W72/075—Connecting or disconnecting of bond wires
- H10W72/07511—Treating the bonding area before connecting, e.g. by applying flux or cleaning
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/531—Shapes of wire connectors
- H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/50—Bond wires
- H10W72/541—Dispositions of bond wires
- H10W72/547—Dispositions of multiple bond wires
- H10W72/5475—Dispositions of multiple bond wires multiple bond wires connected to common bond pads at both ends of the wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Wire Bonding (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001236547A JP3764074B2 (ja) | 2001-08-03 | 2001-08-03 | 電子機器の製造方法および加工システム |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001236547A JP3764074B2 (ja) | 2001-08-03 | 2001-08-03 | 電子機器の製造方法および加工システム |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2003051579A JP2003051579A (ja) | 2003-02-21 |
| JP2003051579A5 JP2003051579A5 (https=) | 2004-08-26 |
| JP3764074B2 true JP3764074B2 (ja) | 2006-04-05 |
Family
ID=19067794
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001236547A Expired - Fee Related JP3764074B2 (ja) | 2001-08-03 | 2001-08-03 | 電子機器の製造方法および加工システム |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3764074B2 (https=) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100751471B1 (ko) | 2006-02-02 | 2007-08-23 | 영풍전자 주식회사 | 연성인쇄회로기판의 윈도우 오픈부 형성 방법 |
| CN101578695B (zh) * | 2006-12-26 | 2012-06-13 | 松下电器产业株式会社 | 半导体元件的安装结构体及半导体元件的安装方法 |
| JP6956823B2 (ja) * | 2015-05-08 | 2021-11-02 | アジャイル・パワー・スイッチ・3・ディー−インテグレイション・エイ・ピー・エス・アイ・3・ディー | 半導体パワーデバイスの組立て方法 |
| KR102763727B1 (ko) * | 2019-05-28 | 2025-02-07 | 캐논 톡키 가부시키가이샤 | 기판 반송 시스템, 기판 반송 방법, 기판 처리 시스템 및 기판 처리 방법 |
-
2001
- 2001-08-03 JP JP2001236547A patent/JP3764074B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2003051579A (ja) | 2003-02-21 |
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