JP3756786B2 - Filter automatic adjustment circuit - Google Patents

Description

となる。Ｋ₁、Ｋ₂は定数である。ここで、Ｑファクタが非常に大きいものとすると、
Ｋ₁×ｅｘｐ（ｊω₀ｔ）＋Ｋ₂×ｅｘｐ（−ｊω₀ｔ） …（３）
となり、中心角周波数ω₀の振動波形がフィルタ出力に現れる。つまり、ｇｍ−Ｃフィルタ１１の中心周波数ｆ₀の成分を含んだテスト信号を当該ｇｍ−Ｃフィルタ１１に与えれば、これに応答して当該ｇｍ−Ｃフィルタ１１の出力に周波数ｆ₀の振動波形が現れることとなる。
【００２０】
ここで、ｇｍ−Ｃフィルタ１１に与えられるテスト信号は、当該ｇｍ−Ｃフィルタ１１の中心周波数ｆ₀の半分より低い繰り返し周波数をもつ信号であることが好ましい。カウンタ３３による最低限１周期の時間計測が保証されるからである。中心周波数ｆ₀に係るＭ周期分のカウント値をＮ_Cとすると、
ｆ₀＝ｆclk×Ｍ／Ｎ_C …（４）
の関係がある。したがって、中心周波数ｆ₀の高精度検出のためには、基準信号としてＰＬＬ回路５０からカウンタ３３に与えられるクロック信号の周波数ｆclkを大きく、かつ計測周期の数Ｍを大きくすればよい。
【００２１】
図２は、図１中のアップダウンカウンタ３５の動作を説明するための図である。検出された中心周波数ｆ₀と目標周波数ｆ_0tとの差、すなわちｇｍ−Ｃフィルタ１１の周波数誤差Δｆを横軸（対数目盛）に、アップダウンカウンタ３５の出力値変化ΔＮを縦軸にとってある。Δｆ_aは量子化された周波数誤差である。アップダウンカウンタ３５は、図２中に実線（特性Ａ）で示すとおり、周波数誤差Δｆが大きいほど出力値を大きく変化させる。これにより、中心周波数調整を高速化することができ、消費電力が低減される。しかも、アップダウンカウンタ３５は、図２中に破線（特性Ｂ）で示すとおり、検出された中心周波数ｆ₀が目標周波数ｆ_0tに近づいた時点で出力値の制御感度を落とすように構成されている。これにより、ノイズによる制御の乱れを低減でき、中心周波数調整を安定化することができる。なお、アップダウンカウンタ３５の入力ビットは、ｎを整数とするとき、各々に±２^k（ｋは０からｎ−１までの整数）の重み付けをした２ｎビットでもよいし、アップ／ダウンの２ビットでもよい。
【００２２】
図３は、図１中のｇｍ−Ｃフィルタ１１の第１の構成例を示している。図３のｇｍ−Ｃフィルタ１１は、４個のトランスコンダクタンスアンプ（ｇｍアンプ）１１０，１１１，１１２，１１３と、２個のキャパシタ１１９，１２０とを有する２次のＢＰＦである。ｇｍアンプ１１０，１１１，１１２，１１３は各々トランスコンダクタンスｇｍ１，ｇｍ２，ｇｍ３，ｇｍ４を持ち、キャパシタ１１９，１２０は各々キャパシタンスＣ₁，Ｃ₂を持つものとする。Ｖｉｎはフィルタ入力電圧、Ｖｏはキャパシタ１１９の両端に現れるフィルタ出力電圧である。実際はＤＡＣ４０のアナログ制御出力に応じてフィルタ特性を可変制御できるように４個のｇｍアンプ１１０〜１１３にそれぞれ可変電流源が接続されているのであるが、このうち初段ｇｍアンプ１１０に接続された電流源（Ｉ₀₁）１２４のみが図示されている。この初段ｇｍアンプ１１０は、ｇｍ−Ｃフィルタ１１のゲインを決めるアンプであって、スイッチ（Ｓ₁）１２３を介してフィルタ調整専用の電流源（Ｉ₀₂）１２５が更に接続されている。図３のｇｍ−Ｃフィルタ１１の伝達関数Ｈ（ｓ）、ゲインＧ、中心角周波数ω₀、Ｑファクタはそれぞれ、
Ｈ（ｓ）＝（ｓ・ｇｍ１／Ｃ₁）
／｛（ｓ²＋ｓ・ｇｍ２／Ｃ₁＋ｇｍ３・ｇｍ４／（Ｃ₁・Ｃ₂）｝ …（５）
Ｇ＝ｇｍ１／ｇｍ２ …（６）
ω₀＝２πｆ₀＝√｛ｇｍ３・ｇｍ４／（Ｃ₁・Ｃ₂）｝ …（７）
Ｑ＝√（ｇｍ３・ｇｍ４・Ｃ₁／Ｃ₂）／ｇｍ２ …（８）
である。
【００２３】
図４は、図３中の初段ｇｍアンプ１１０の内部構成例を示している。初段ｇｍアンプ１１０は、２個のバイポーラトランジスタ１４０，１４１と、２個の電流源１４２，１４３とで構成されている。Ｖｃｃは電源である。両バイポーラトランジスタ１４０，１４１は、キャパシタ１１９及び電流源１４２，１４３とともに積分器を構成している。図３中の他のｇｍアンプ１１１，１１２，１１３の内部構成も図４の初段ｇｍアンプ１１０と同様である。なお、バイポーラトランジスタ１４０，１４１に代えてＭＯＳＦＥＴを採用することも可能である。
【００２４】
スイッチ１２３は、フィルタ調整時に限って閉じられる。両トランジスタ１４０，１４１の共通エミッタ電流は、スイッチ１２３が開いた状態ではＩ₀₁であり、スイッチ１２３が閉じた状態ではＩ₀₁＋Ｉ₀₂である。ここで、温度をＴ、ボルツマン定数をｋ、電子の電荷をｑとすると、両トランジスタ１４０，１４１の各々のしきい値電圧Ｖｔは、
Ｖｔ＝ｋＴ／ｑ …（９）
であり、フィルタ非調整時には、
ｇｍ１＝Ｉ₀₁／Ｖｔ …（１０）
であり、フィルタ調整時には、
ｇｍ１＝（Ｉ₀₁＋Ｉ₀₂）／Ｖｔ …（１１）
である。つまり、フィルタ調整時にはｇｍ１が大きくなり、式（６）からｇｍ−Ｃフィルタ１１のゲインが増大することが判る。ただし、式（７）及び式（８）から判るように、ｇｍ１が大きくなってもｇｍ−Ｃフィルタ１１の中心角周波数及びＱファクタは変化しない。
【００２５】
ところで、図４での主要なノイズ源として、両トランジスタ１４０，１４１が発生するショットノイズが考えられる。両トランジスタ１４０，１４１の共通エミッタ電流をＩ₀（Ｉ₀₁又はＩ₀₁＋Ｉ₀₂）、帯域幅をΔＦとすると、ショットノイズＩｎは、
Ｉｎ²＝２ｑＩ₀ΔＦ …（１２）
のように表され、初段ｇｍアンプ１１０の入力換算ノイズＶｎは、

である。つまり、フィルタ調整時に電流Ｉ₀が大きくなることにより入力換算ノイズは減少し、ｇｍ−Ｃフィルタ１１のＳＮ比が改善される。
【００２６】
以上のとおり、図３のｇｍ−Ｃフィルタ１１を採用すれば、その特性調整時にスイッチ１２３を閉じることで当該フィルタのゲインを増大させることにより、本来の回路構成と同じ中心周波数ｆ₀を持ち、かつ改善されたＳＮ比を持つ調整専用のフィルタ構成を実現することができる。したがって、ノイズに強くかつ高精度のフィルタ調整を達成することが可能となる。スイッチ１２３のオン・オフ制御は、マイクロコンピュータ２０の調整命令により起動されるテスト信号発生器３２又はマイクロコンピュータ２０自身が司る。ｇｍ−Ｃフィルタ１１を含む受信部１０の使用時にはスイッチ１２３が開かれて当該フィルタ本来の回路構成に戻される結果、ｇｍ−Ｃフィルタ１１自身の消費電力も削減される。
【００２７】
図５は、図１中のｇｍ−Ｃフィルタ１１の第２の構成例を示している。図５のｇｍ−Ｃフィルタ１１は、図３の構成に加えて５個のｇｍアンプ１１４，１１５，１１６，１１７，１１８と、２個のキャパシタ１２１，１２２とを有する４次のＢＰＦである。ｇｍアンプ１１４，１１５，１１６，１１７，１１８は各々トランスコンダクタンスｇｍ５，ｇｍ６，ｇｍ７，ｇｍ８，ｇｍ９を持ち、キャパシタ１２１，１２２は各々キャパシタンスＣ₃，Ｃ₄を持つものとする。Ｖｉｎはフィルタ入力電圧、Ｖｏはキャパシタ１２２の両端に現れるフィルタ出力電圧である。実際はＤＡＣ４０のアナログ制御出力に応じてフィルタ特性を可変制御できるように５個のｇｍアンプ１１４〜１１８にそれぞれ可変電流源が接続されているのであるが、このうちゲイン調整用のｇｍアンプ１１４に接続された電流源（Ｉ₀₃）１２７のみが図示されている。ただし、この電流源１２７は、フィルタ調整時に限って開かれるスイッチ（Ｓ₂）１２６を介して、当該ｇｍアンプ１１４に接続されている。
【００２８】
図５のｇｍ−Ｃフィルタ１１においてｇｍアンプ１１４と電流源１２７とを繋ぐスイッチ１２６が開くと、ｇｍアンプ１１５の入力へのフィルタ出力電圧Ｖｏのフィードバック経路が絶たれるため、４次ＢＰＦが２個の２次ＢＰＦの縦続接続に切り替えられる。ここで、初段の２次ＢＰＦは４個のｇｍアンプ１１０〜１１３と、２個のキャパシタ１１９，１２０とにより、２段目のＢＰＦは４個のｇｍアンプ１１５〜１１８と、２個のキャパシタ１２１，１２２とによりそれぞれ構成される。そして、この切り替えにより、当該ｇｍ−Ｃフィルタ１１の中心周波数は変化しないが、Ｑファクタは１／（√２−１）倍、つまり約２．４倍に増大する。この結果、３ｄＢダウンの帯域幅が約２．４分の１に狭められるので、帯域内ノイズが減ることになる。しかも、Ｑファクタの増大によりフィルタ出力の振動周波数が安定するため、フィルタ調整精度を高めることが可能となる。
【００２９】
図６は、図１中のｇｍ−Ｃフィルタ１１の第３の構成例を示している。図６のｇｍ−Ｃフィルタ１１は、図３の構成に加えてｇｍアンプ１２８と、スイッチ（Ｓ₃）１２９と、電流源（Ｉ₀₄）１３０とを有する２次のＢＰＦである。ｇｍアンプ１２８はトランスコンダクタンスｇｍ１０を持つものとする。スイッチ１２９はフィルタ調整時に限って閉じられる。
【００３０】
スイッチ１２９が閉じた状態の図６のｇｍ−Ｃフィルタ１１の伝達関数Ｈ（ｓ）は、
Ｈ（ｓ）＝（ｓ・ｇｍ１／Ｃ₁）
／｛（ｓ²＋ｓ・（ｇｍ２−ｇｍ１０）／Ｃ₁
＋ｇｍ３・ｇｍ４／（Ｃ₁・Ｃ₂）｝ …（１４）
である。したがって、
ｇｍ１０＞ｇｍ２ …（１５）
を満たすｇｍ１０を選ぶと、ｇｍアンプ１２８が負性抵抗として機能することとなって、フィルタ本来の中心周波数ｆ₀と同じ周波数で発振するＶＣＯが得られる。したがって、式（４）中の計測周期数Ｍを大きくとれ、ノイズの影響が緩和されて調整精度が向上する。
【００３１】
図７は、図１中のｇｍ−Ｃフィルタ１１の第４の構成例を示している。図７のｇｍ−Ｃフィルタ１１は、図５の構成に加えて２個のｇｍアンプ１２８，１３１と、２個のスイッチ（Ｓ₃，Ｓ₄）１２９，１３２と、２個の電流源（Ｉ₀₄，Ｉ₀₅）１３０，１３３とを有する４次のＢＰＦである。ｇｍアンプ１２８，１３１は各々トランスコンダクタンスｇｍ１０，ｇｍ１１を持つものとする。スイッチ１２９，１３２はフィルタ調整時に限って閉じられる。
【００３２】
スイッチ１２９，１３２が閉じた状態では、
ｇｍ１０＞ｇｍ２ かつ ｇｍ１１＞ｇｍ９ …（１６）
を満たすｇｍ１０及びｇｍ１１を選ぶと、ｇｍアンプ１２８、１３１がそれぞれ負性抵抗として機能することとなって、フィルタ本来の中心周波数ｆ₀と同じ周波数で発振するＶＣＯが得られる。したがって、式（４）中の計測周期数Ｍを大きくとれ、ノイズの影響が緩和されて調整精度が向上する。
【００３３】
図８は、本発明に係るフィルタ自動調整回路の他の構成例を示している。図８によれば、ｇｍ−Ｃフィルタ１１は、各々ＤＡＣ４０の制御出力に応じて中心周波数を可変制御できるマスターフィルタ１１ａとスレーブフィルタ１１ｂとを有し、その回路構成を調整時に限って高ＳＮ比構成に変更し得るものである。マスターフィルタ１１ａはスレーブフィルタ１１ｂに対していわゆるリファレンスフィルタとして機能し、基準信号より分周器３１で分周された第２の基準信号がマスターフィルタ１１ａに与えられてプリ調整された後、テスト信号発生器３２で発生したテスト信号を用いたスレーブフィルタ１１ｂの調整が行われるようになっている。これにより、高精度の中心周波数調整を達成できる。
【００３４】
図９は、本発明に係るフィルタ自動調整回路を用いた携帯電話システムのブロック図である。図９中の集積回路６０は、周波数変換復調部６１と、シンセサイザＰＬＬ６２と、変調部６３とを１チップ化したものであって、被調整フィルタであるｇｍ−Ｃフィルタとその自動調整回路とが周波数変換復調部６１の中にある。
【００３５】
図９の携帯電話システムでは、アンテナ７０で受信されたＲＦ信号が共用器７２を経て受信アンプ７１へ導かれ、ＢＰＦにより受信信号を選択・増幅する。その受信信号をシンセサイザＰＬＬ６２からの信号でチャンネル選択し、第１及び第２ＩＦ（４００ｋＨｚ）に変換増幅され、復調された音声信号を出力する。この音声信号は音声信号処理部７４で復号化され、スピーカ７７から音として取り出される。またデータ信号はデータ処理部７５で復号化され、制御部７６により表示部８１に表示される。一方、マイク７８から取り込まれた音声信号は、キーマトリックス８０から入力されたデータ信号をデータ処理部７５で符号化した信号とともに、符号化され、変調部６３に加えられる。この信号は、シンセサイザＰＬＬ６２からの信号でＲＦ信号に変調される。この変調信号は送信アンプ７３にて送信出力に必要なレベルまで電力増幅され、共用器７２を通してアンテナ７０から出力される。なお、ＩＤ−ＲＯＭ７９は端末のＩＤ番号を記憶するものである。
【００３６】
携帯電話システムにおける各チャンネルの帯域幅は±１０ｋＨｚ程度（中心周波数に対して５％程度）に選ばれており、隣接チャンネル（５０ｋＨｚ離調信号）の妨害を防ぐため、狭帯域のＢＰＦが周波数変換復調部６１で使用される。このような携帯電話システムの受信部に上記本発明に係るフィルタ自動調整回路を採用することで、高精度の中心周波数調整と、待ち受け時間の長時間化を達成できる。
【００３７】
なお、以上の説明では被調整フィルタをｇｍ−Ｃフィルタとしたが、中心周波数を電圧又は電流で可変制御できる電子フィルタであればよい。また、本発明はＢＰＦに限らず、ＨＰＦ又はＬＰＦにも適用可能である。
【００３８】
【発明の効果】
以上説明してきたとおり、本発明によれば、被調整フィルタの回路構成を調整時に限って高ＳＮ比構成に変更し、インパルス信号、パルス信号又はステップ信号を利用して当該フィルタの特性周波数を検出・調整し、その調整結果をメモリに記憶して再利用することとしたので、携帯電話システムの受信部等に使用されるフィルタの調整に適した、ノイズに強く、高精度かつ低消費電力化の可能なフィルタ自動調整回路を提供することができる。
【図面の簡単な説明】
【図１】本発明に係るフィルタ自動調整回路の構成例を示すブロック図である。
【図２】図１中のアップダウンカウンタの動作を説明するための図である。
【図３】図１中のｇｍ−Ｃフィルタの第１の構成例を示すブロック図である。
【図４】図３中の初段トランスコンダクタンスアンプの内部構成例を示す回路図である。
【図５】図１中のｇｍ−Ｃフィルタの第２の構成例を示すブロック図である。
【図６】図１中のｇｍ−Ｃフィルタの第３の構成例を示すブロック図である。
【図７】図１中のｇｍ−Ｃフィルタの第４の構成例を示すブロック図である。
【図８】本発明に係るフィルタ自動調整回路の他の構成例を示すブロック図である。
【図９】本発明に係るフィルタ自動調整回路を用いた携帯電話システムのブロック図である。
【符号の説明】
１０ 受信部
１１ ｇｍ−Ｃフィルタ
１１ａ マスターフィルタ
１１ｂ スレーブフィルタ
２０ 不揮発性メモリ付きマイクロコンピュータ（コントローラ）
３０ 特性調整回路
３１ 分周器
３２ テスト信号発生器
３３ カウンタ
３４ 周波数検出器
３５ アップダウンカウンタ
４０ デジタル・アナログコンバータ（ＤＡＣ）
５０ 位相同期ループ（ＰＬＬ）回路
６０ 集積回路
６１ 周波数変換復調部
６２ シンセサイザＰＬＬ
６３ 変調部
１１０〜１１８ トランスコンダクタンスアンプ（ｇｍアンプ）
１１９，１２０，１２１，１２２ キャパシタ
１２３，１２６，１２９，１３２ スイッチ（回路構成変更手段）
１２４，１２５，１２７，１３０，１３３ 電流源（回路構成変更手段）
１２８，１３１ トランスコンダクタンスアンプ（回路構成変更手段）
１４０，１４１ トランジスタ
１４２，１４３ 電流源
Δｆ ｇｍ−Ｃフィルタの周波数誤差
ΔＮ アップダウンカウンタの出力値変化[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an automatic filter adjustment circuit for adjusting a characteristic frequency of a filter to a target frequency, and more particularly to reduction in power consumption and improvement in accuracy of the circuit. Here, the characteristic frequency means a center frequency in the case of a band-pass filter (BPF), and a cutoff frequency in the case of a high-pass filter (HPF) or a low-pass filter (LPF).
[0002]
[Prior art]
In integrated circuits for communication, gm-C filters are often used. This is a filter using a transconductance (gm; also referred to as transconductance) of a transistor and a capacitor (C) so that the frequency characteristic can be variably controlled by voltage or current, and disclosed in JP-A-7-297777. An example of the configuration is shown in Japanese Patent Laid-Open No. 2000-101392.
[0003]
Conventionally, in an automatic filter adjustment circuit used in a receiving unit of a communication device, power consumption increases because filter adjustment is performed for each reception. In particular, in a mobile phone system, it is difficult to lengthen the standby time, and the adjustment time is low. Power consumption was an issue. Further, in the cellular phone system, a narrow band BPF having a bandwidth of about 5% with respect to the center frequency is required, and the center frequency is set in a short time and with high accuracy (about 0.2 to 0.3%). There is a need to adjust.
[0004]
Japanese Patent Application Laid-Open No. 63-167511 (Japanese Patent Publication No. 7-120923) discloses an automatic filter adjustment circuit for adjusting the dip frequency of a biquad filter which is one of gm-C filters. Yes. This adjustment circuit is incorporated in an integrated circuit for sound multiplex demodulation in a television receiver, inputs a sine wave signal having a constant frequency to an adjusted filter, and controls the output of a digital / analog converter (DAC) by a microcomputer. The filter characteristic is gradually changed at, and the average value of the two DAC input values when the level detection output of the filter output crosses a predetermined reference level is set as the optimum adjustment value, and this adjustment value is stored in the nonvolatile memory. Is.
[0005]
Japanese Patent Application Laid-Open No. 5-114836 discloses an automatic filter adjustment circuit for adjusting the characteristic frequency and quality factor (Q factor: representing frequency selectivity of the filter) of the gm-C filter. This adjustment circuit inputs an impulse signal, a pulse signal or a step signal instead of a sine wave signal to the adjusted filter, and digitizes the vibration waveform appearing at the output of the filter by an analog / digital converter (ADC) to the microcomputer. The microcomputer calculates the characteristic frequency and Q factor of the filter to be adjusted by taking in and performing Laplace transform processing on the vibration waveform. After detecting the characteristics of the adjusted filter in this way, the adjustment values of the characteristic frequency DAC and the Q factor DAC are determined so as to correct the deviation from the target characteristic, and these adjustment values are stored in the nonvolatile memory. Remember me. When the filter is used, the filter characteristic is controlled with the adjustment value stored in the nonvolatile memory.
[0006]
An automatic filter adjustment circuit disclosed in Japanese Patent Application Laid-Open No. 2000-59162 inputs an impulse signal or a step signal to a filter to be adjusted, measures a period of a vibration waveform that appears in the output of the filter, and uses the measurement result to determine the filter. This characteristic frequency is detected, and the characteristic of the filter is controlled so as to correct the deviation from the target frequency. However, the filter adjustment is executed every time the power supply voltage fluctuation or the temperature fluctuation occurs.
[0007]
[Problems to be solved by the invention]
The prior art disclosed in Japanese Patent Laid-Open No. 63-167511 (Japanese Patent Publication No. 7-120923) searches for the optimum adjustment value by changing the DAC input value little by little, so that it takes a long time to adjust the filter. . In particular, in application to a mobile phone system, filter adjustment is performed each time reception is performed, so that much power is consumed for adjustment. In addition, it is difficult to realize a high-precision analog level detector, and it has been difficult to realize a high frequency adjustment accuracy of about 0.2 to 0.3% required for a mobile phone system.
[0008]
In the prior art disclosed in Japanese Patent Application Laid-Open No. 5-1114836, the microcomputer executes Laplace transform processing for calculating the characteristic frequency and the Q factor of the filter to be adjusted. Therefore, an excessive burden is placed on the microcomputer. .
[0009]
Since the prior art disclosed in Japanese Patent Laid-Open No. 2000-59162 performs filter adjustment every time power supply voltage fluctuation or temperature fluctuation occurs, power consumption for adjusting filter characteristics increases. In addition, if noise is superimposed on the vibration waveform appearing in the filter output, a large error occurs in the period measurement result, and high-precision characteristic frequency adjustment cannot be realized.
[0010]
An object of the present invention is to provide an automatic filter adjustment circuit that is suitable for adjustment of a filter used in a receiving unit or the like of a mobile phone system, is resistant to noise, and has high accuracy and low power consumption.
[0011]
[Means for Solving the Problems]
In order to achieve the above object, the present invention detects and adjusts the characteristic frequency of the tuned filter using an impulse signal, a pulse signal or a step signal, and stores the adjustment result in a memory for reuse. Is. Moreover, only when the filter is adjusted, the circuit configuration of the filter is changed to a circuit configuration having a high SN ratio (signal-to-noise ratio) suitable for adjustment.
[0012]
  More specifically, the filter automatic adjustment circuit of the present invention is a circuit for adjusting the characteristic frequency of a filter to a target frequency, and the original circuit configuration of the filter is changed to the original frequency when the filter is adjusted. Has the same characteristic frequency as the circuit configuration, andBy reducing the noise of the filterCircuit configuration changing means for changing to a circuit configuration dedicated to adjustment having an improved S / N ratio compared to the original circuit configuration;Arranged in the same integrated circuit as the filter,When an impulse signal, pulse signal, or step signal is input as a test signal to a filter having a circuit configuration dedicated to adjustment, the period of the vibration waveform that appears at the output of the filter is measured, and the characteristic frequency of the filter is determined from the result of the period measurement. And a characteristic adjustment circuit for giving an adjustment signal to the filter so as to correct a deviation from the target frequency, and an adjustment instruction for starting the characteristic adjustment circuit, and then the characteristics of the filter Store the adjustment signal when the difference between the frequency and the target frequency is within an allowable range, and when using the filter, return to the original circuit configuration of the filter, stop the operation of the characteristic adjustment circuit, And adopting a configuration including a controller for controlling the characteristics of the filter with the stored adjustment signal.
[0013]
  The circuit configuration changing means is configured to adjust the filter when adjusting the filter.By increasing the current of the variable current source connected toMeans for improving the S / N ratio of the filter,AhAlternatively, there is provided means for causing the filter to oscillate at the same frequency as the characteristic frequency of the filter when the filter is adjusted.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 shows a configuration example of an automatic filter adjustment circuit according to the present invention. In FIG. 1, reference numeral 10 denotes a receiving unit of a communication device, and includes a gm-C filter 11 that is a narrowband BPF. The microcomputer 20 with nonvolatile memory, the characteristic adjustment circuit 30, the DAC 40, and the phase-locked loop (PLL) circuit 50 in FIG. 1 have the center frequency f of the gm-C filter 11.₀The target frequency f_0tThe filter automatic adjustment circuit for adjusting to is configured. As will be described later, the gm-C filter 11 itself also has the same center frequency f as the original circuit configuration when the center frequency is adjusted.₀The circuit configuration can be changed to a circuit configuration dedicated to adjustment having an improved S / N ratio.
[0015]
The characteristic adjustment circuit 30 includes a frequency divider 31, a test signal generator 32, a counter 33, a frequency detector 34, and an up / down counter 35, and the center frequency f of the gm-C filter 11.₀Target frequency f_0tThe deviation from is corrected with high accuracy. First, the frequency divider 31 is a circuit block for frequency-dividing a clock signal (frequency fclk: for example, 88.2 MHz) given from the PLL circuit 50 as a reference signal. The test signal generator 32 is activated by an adjustment instruction issued by the microcomputer 20, generates a test signal from the divided clock signal, and supplies the test signal to the gm-C filter 11. This test signal is the center frequency f of the gm-C filter 11.₀Any signal including the above components may be used, and may be an impulse signal, a pulse signal, or a step signal. Particularly, the impulse signal is preferable because it includes sinusoidal components of all frequencies. In response to this, the output of the gm-C filter 11 has a frequency f.₀The vibration waveform appears. The counter 33 is a circuit block for measuring the period of the vibration waveform appearing at the output of the gm-C filter 11 using the clock signal given from the PLL circuit 50 as a reference signal. The frequency detector 34 determines the center frequency f of the gm-C filter 11 from the measurement result by the counter 33.₀, And this center frequency f₀And target frequency f_0t, That is, the frequency error Δf is transmitted to the up / down counter 35. As described later, the up / down counter 35 changes the digital output value in accordance with the frequency error Δf.
[0016]
The DAC 40 receives the output value of the up / down counter 35 as an adjustment signal, and gives an analog control output (voltage or current) corresponding to the adjustment signal to the gm-C filter 11, whereby the center frequency of the gm-C filter 11 is obtained. f₀Adjust.
[0017]
The PLL circuit 50 includes a temperature compensated crystal oscillator (TCXO) 51, a phase comparator (PD) 52, a charge pump (CP) 53, an LPF 54, a voltage so as to generate a highly accurate reference signal to be given to the characteristic adjustment circuit 30. A controlled oscillator (VCO) 55 and a frequency divider (1 / N) 56 are included. The oscillation frequency of the VCO 55 is, for example, 705.6 MHz. A programmable counter can be used for the frequency divider 56 so that a reference signal having an arbitrary frequency other than 88.2 MHz can be generated.
[0018]
The microcomputer 20 with the non-volatile memory issues an adjustment command for starting the test signal generator 32, and then the center frequency f of the gm-C filter 11.₀And target frequency f_0tWhen the receiving unit 10 including the gm-C filter 11 is used, the operation of the characteristic adjustment circuit 30 is stopped. And a function of giving the stored value to the DAC 40. Thereby, the power consumption of the characteristic adjustment circuit 30 can be reduced. In addition, if a plurality of DAC input values related to a plurality of trials are averaged and stored in the microcomputer 20 with a nonvolatile memory, the quantization error of the period measurement result is alleviated and the statistical variance is reduced. Therefore, the adjustment accuracy is improved.
[0019]
When the gm-C filter 11 is a second-order BPF, the transfer function H (s) has an angular frequency ω and a central angular frequency of the filter ω.₀When the Q factor is Q, j = √ (−1), and s = jω,
H (s) = (ω₀× s / Q) / (s²+ Ω₀× s / Q + ω₀ ²(1)
It is expressed as The Laplace inverse transformed time domain response of this filter is

It becomes. K₁, K₂Is a constant. Here, if the Q factor is very large,
K₁Xexp (jω₀t) + K₂Xexp (-jω₀t) (3)
And the central angular frequency ω₀The vibration waveform of appears in the filter output. That is, the center frequency f of the gm-C filter 11₀If a test signal including the above component is applied to the gm-C filter 11, the frequency f is output to the output of the gm-C filter 11 in response thereto.₀Will appear.
[0020]
Here, the test signal given to the gm-C filter 11 is the center frequency f of the gm-C filter 11.₀It is preferable that the signal has a repetition frequency lower than half of the signal. This is because a time measurement of at least one cycle by the counter 33 is guaranteed. Center frequency f₀The count value for M cycles related to N_CThen,
f₀= Fclk × M / N_C                                         (4)
There is a relationship. Therefore, the center frequency f₀Therefore, the frequency fclk of the clock signal supplied from the PLL circuit 50 to the counter 33 as the reference signal may be increased and the number M of measurement periods may be increased.
[0021]
FIG. 2 is a diagram for explaining the operation of the up / down counter 35 in FIG. Detected center frequency f₀And target frequency f_0t, That is, the frequency error Δf of the gm-C filter 11 is on the horizontal axis (logarithmic scale), and the output value change ΔN of the up / down counter 35 is on the vertical axis. Δf_aIs the quantized frequency error. As shown by the solid line (characteristic A) in FIG. 2, the up / down counter 35 changes the output value more greatly as the frequency error Δf is larger. Thereby, center frequency adjustment can be speeded up, and power consumption is reduced. Moreover, the up / down counter 35 detects the detected center frequency f as indicated by a broken line (characteristic B) in FIG.₀Is the target frequency f_0tIt is configured to reduce the control sensitivity of the output value when approaching. Thereby, control disturbance due to noise can be reduced, and the center frequency adjustment can be stabilized. The input bits of the up / down counter 35 are each ± 2 when n is an integer.^kThe weight may be 2n bits (k is an integer from 0 to n-1) or may be 2 bits up / down.
[0022]
FIG. 3 shows a first configuration example of the gm-C filter 11 in FIG. The gm-C filter 11 in FIG. 3 is a second-order BPF having four transconductance amplifiers (gm amplifiers) 110, 111, 112, and 113 and two capacitors 119 and 120. The gm amplifiers 110, 111, 112, and 113 have transconductances gm1, gm2, gm3, and gm4, respectively, and the capacitors 119 and 120 each have a capacitance C.₁, C₂Shall have. Vin is a filter input voltage, and Vo is a filter output voltage appearing at both ends of the capacitor 119. Actually, variable current sources are connected to the four gm amplifiers 110 to 113 so that the filter characteristics can be variably controlled according to the analog control output of the DAC 40. Of these, the currents connected to the first stage gm amplifier 110 are connected. Source (I₀₁) 124 only. The first-stage gm amplifier 110 is an amplifier that determines the gain of the gm-C filter 11 and includes a switch (S₁) 123 through a current source (I₀₂) 125 is further connected. The transfer function H (s), gain G, center angular frequency ω of the gm-C filter 11 of FIG.₀, Q factor is
H (s) = (s · gm1 / C₁)
/ {(S²+ S · gm2 / C₁+ Gm3 · gm4 / (C₁・ C₂)}… (5)
G = gm1 / gm2 (6)
ω₀= 2πf₀= √ {gm3 · gm4 / (C₁・ C₂)}… (7)
Q = √ (gm3 · gm4 · C₁/ C₂) / Gm2 (8)
It is.
[0023]
FIG. 4 shows an internal configuration example of the first stage gm amplifier 110 in FIG. The first stage gm amplifier 110 is composed of two bipolar transistors 140 and 141 and two current sources 142 and 143. Vcc is a power source. Both bipolar transistors 140 and 141 constitute an integrator together with a capacitor 119 and current sources 142 and 143. The internal configurations of the other gm amplifiers 111, 112, and 113 in FIG. 3 are the same as those of the first stage gm amplifier 110 in FIG. In place of the bipolar transistors 140 and 141, MOSFETs may be employed.
[0024]
The switch 123 is closed only during filter adjustment. The common emitter current of both transistors 140 and 141 is I when the switch 123 is open.₀₁When the switch 123 is closed, I₀₁+ I₀₂It is. Here, when the temperature is T, the Boltzmann constant is k, and the electron charge is q, the threshold voltages Vt of the transistors 140 and 141 are as follows:
Vt = kT / q (9)
And when the filter is not adjusted,
gm1 = I₀₁/ Vt (10)
And when adjusting the filter,
gm1 = (I₀₁+ I₀₂) / Vt (11)
It is. In other words, it can be seen that gm1 increases during filter adjustment, and the gain of the gm-C filter 11 increases from equation (6). However, as can be seen from the equations (7) and (8), the center angular frequency and the Q factor of the gm-C filter 11 do not change even when gm1 increases.
[0025]
By the way, as a main noise source in FIG. 4, shot noise generated by both transistors 140 and 141 can be considered. The common emitter current of both transistors 140 and 141 is I₀(I₀₁Or I₀₁+ I₀₂) If the bandwidth is ΔF, the shot noise In is
In²= 2qI₀ΔF (12)
The input conversion noise Vn of the first stage gm amplifier 110 is expressed as follows:

It is. In other words, the current I₀Increases, the input conversion noise is reduced, and the SN ratio of the gm-C filter 11 is improved.
[0026]
As described above, when the gm-C filter 11 of FIG. 3 is adopted, the gain of the filter is increased by closing the switch 123 at the time of adjusting the characteristics, thereby the same center frequency f as the original circuit configuration.₀And a filter configuration dedicated to adjustment having an improved S / N ratio. Therefore, it is possible to achieve high-accuracy filter adjustment that is resistant to noise. The on / off control of the switch 123 is controlled by the test signal generator 32 activated by the adjustment command of the microcomputer 20 or the microcomputer 20 itself. When the receiving unit 10 including the gm-C filter 11 is used, the switch 123 is opened and returned to the original circuit configuration of the filter. As a result, the power consumption of the gm-C filter 11 itself is also reduced.
[0027]
FIG. 5 shows a second configuration example of the gm-C filter 11 in FIG. The gm-C filter 11 of FIG. 5 is a fourth-order BPF having five gm amplifiers 114, 115, 116, 117, 118 and two capacitors 121, 122 in addition to the configuration of FIG. The gm amplifiers 114, 115, 116, 117, and 118 have transconductances gm5, gm6, gm7, gm8, and gm9, respectively, and the capacitors 121 and 122 each have a capacitance C._Three, C_FourShall have. Vin is a filter input voltage, and Vo is a filter output voltage appearing across the capacitor 122. Actually, variable current sources are connected to the five gm amplifiers 114 to 118 so that the filter characteristics can be variably controlled according to the analog control output of the DAC 40. Of these, the variable current sources are connected to the gm amplifier 114 for gain adjustment. Current source (I₀₃) 127 only is shown. However, this current source 127 is a switch (S₂) 126, and is connected to the gm amplifier 114.
[0028]
When the switch 126 that connects the gm amplifier 114 and the current source 127 is opened in the gm-C filter 11 of FIG. 5, the feedback path of the filter output voltage Vo to the input of the gm amplifier 115 is interrupted, so that there are two fourth-order BPFs. Are switched to the cascade connection of the secondary BPF. Here, the first-stage secondary BPF is composed of four gm amplifiers 110 to 113 and two capacitors 119 and 120, and the second-stage BPF is composed of four gm amplifiers 115 to 118 and two capacitors 121. , 122 respectively. By this switching, the center frequency of the gm-C filter 11 does not change, but the Q factor increases to 1 / (√2-1) times, that is, about 2.4 times. As a result, the bandwidth of 3 dB down is narrowed to about 2.4, so that in-band noise is reduced. In addition, since the vibration frequency of the filter output is stabilized by increasing the Q factor, it is possible to improve the filter adjustment accuracy.
[0029]
FIG. 6 shows a third configuration example of the gm-C filter 11 in FIG. The gm-C filter 11 of FIG. 6 includes a gm amplifier 128 and a switch (S_Three129 and current source (I₀₄) 130 is a secondary BPF. The gm amplifier 128 has a transconductance gm10. Switch 129 is closed only during filter adjustment.
[0030]
The transfer function H (s) of the gm-C filter 11 of FIG. 6 with the switch 129 closed is
H (s) = (s · gm1 / C₁)
/ {(S²+ S · (gm2−gm10) / C₁
+ Gm3 · gm4 / (C₁・ C₂)} ... (14)
It is. Therefore,
gm10> gm2 (15)
If gm10 satisfying the above is selected, the gm amplifier 128 functions as a negative resistance, and the filter's original center frequency f₀A VCO that oscillates at the same frequency is obtained. Therefore, the number of measurement periods M in the equation (4) can be increased, the influence of noise is reduced, and the adjustment accuracy is improved.
[0031]
FIG. 7 shows a fourth configuration example of the gm-C filter 11 in FIG. The gm-C filter 11 of FIG. 7 includes two gm amplifiers 128 and 131 and two switches (S_Three, S_Four129, 132 and two current sources (I₀₄, I₀₅) 130, 133. The gm amplifiers 128 and 131 are assumed to have transconductances gm10 and gm11, respectively. The switches 129 and 132 are closed only when the filter is adjusted.
[0032]
When the switches 129 and 132 are closed,
gm10> gm2 and gm11> gm9 (16)
If gm10 and gm11 satisfying the above are selected, the gm amplifiers 128 and 131 function as negative resistances, respectively, and the original center frequency f of the filter is obtained.₀A VCO that oscillates at the same frequency is obtained. Therefore, the number of measurement periods M in the equation (4) can be increased, the influence of noise is reduced, and the adjustment accuracy is improved.
[0033]
FIG. 8 shows another configuration example of the automatic filter adjustment circuit according to the present invention. According to FIG. 8, the gm-C filter 11 has a master filter 11a and a slave filter 11b each of which can variably control the center frequency according to the control output of the DAC 40, and has a high SN ratio only when the circuit configuration is adjusted. The configuration can be changed. The master filter 11a functions as a so-called reference filter for the slave filter 11b, and the second reference signal divided by the frequency divider 31 from the reference signal is supplied to the master filter 11a and pre-adjusted, and then the test signal The slave filter 11b is adjusted using the test signal generated by the generator 32. Thereby, highly accurate center frequency adjustment can be achieved.
[0034]
FIG. 9 is a block diagram of a cellular phone system using the filter automatic adjustment circuit according to the present invention. An integrated circuit 60 in FIG. 9 is a frequency conversion demodulator 61, a synthesizer PLL 62, and a modulator 63 which are integrated on a single chip, and includes a gm-C filter that is a filter to be adjusted and its automatic adjustment circuit. It is in the frequency conversion demodulator 61.
[0035]
In the mobile phone system of FIG. 9, the RF signal received by the antenna 70 is guided to the reception amplifier 71 via the duplexer 72, and the received signal is selected and amplified by the BPF. The received signal is channel-selected by a signal from the synthesizer PLL 62, converted to a first IF and a second IF (400 kHz), and a demodulated audio signal is output. This audio signal is decoded by the audio signal processing unit 74 and extracted from the speaker 77 as sound. The data signal is decoded by the data processing unit 75 and displayed on the display unit 81 by the control unit 76. On the other hand, the audio signal captured from the microphone 78 is encoded together with the signal obtained by encoding the data signal input from the key matrix 80 by the data processing unit 75 and is added to the modulation unit 63. This signal is modulated into an RF signal by a signal from the synthesizer PLL 62. This modulated signal is amplified by the transmission amplifier 73 to a level necessary for transmission output, and is output from the antenna 70 through the duplexer 72. The ID-ROM 79 stores a terminal ID number.
[0036]
The bandwidth of each channel in the mobile phone system is selected to be about ± 10 kHz (about 5% of the center frequency), and a narrow band BPF converts the frequency to prevent interference with adjacent channels (50 kHz detuning signal). Used in the demodulator 61. By adopting the filter automatic adjustment circuit according to the present invention in the receiving unit of such a cellular phone system, it is possible to achieve highly accurate center frequency adjustment and a long standby time.
[0037]
In the above description, the adjusted filter is a gm-C filter. However, any electronic filter that can variably control the center frequency with voltage or current may be used. In addition, the present invention is not limited to BPF, but can be applied to HPF or LPF.
[0038]
【The invention's effect】
As described above, according to the present invention, the circuit configuration of the tuned filter is changed to a high signal-to-noise ratio configuration only during adjustment, and the characteristic frequency of the filter is detected using an impulse signal, a pulse signal, or a step signal.・ Adjustment, and the adjustment result is stored in memory and reused, making it suitable for adjustment of filters used in mobile phone system receivers, etc., noise-resistant, high accuracy, and low power consumption Therefore, it is possible to provide an automatic filter adjustment circuit.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration example of an automatic filter adjustment circuit according to the present invention.
FIG. 2 is a diagram for explaining the operation of an up / down counter in FIG. 1;
FIG. 3 is a block diagram illustrating a first configuration example of a gm-C filter in FIG. 1;
4 is a circuit diagram illustrating an internal configuration example of a first-stage transconductance amplifier in FIG. 3;
FIG. 5 is a block diagram illustrating a second configuration example of the gm-C filter in FIG. 1;
6 is a block diagram illustrating a third configuration example of the gm-C filter in FIG. 1. FIG.
7 is a block diagram illustrating a fourth configuration example of the gm-C filter in FIG. 1. FIG.
FIG. 8 is a block diagram showing another configuration example of the filter automatic adjustment circuit according to the present invention.
FIG. 9 is a block diagram of a mobile phone system using an automatic filter adjustment circuit according to the present invention.
[Explanation of symbols]
10 Receiver
11 gm-C filter
11a Master filter
11b Slave filter
20 Microcomputer with nonvolatile memory (controller)
30 characteristic adjustment circuit
31 divider
32 Test signal generator
33 counter
34 Frequency detector
35 Up / Down Counter
40 Digital-to-analog converter (DAC)
50 Phase-locked loop (PLL) circuit
60 Integrated circuits
61 Frequency conversion demodulator
62 Synthesizer PLL
63 Modulator
110-118 transconductance amplifier (gm amplifier)
119, 120, 121, 122 capacitor
123, 126, 129, 132 switches (circuit configuration changing means)
124, 125, 127, 130, 133 Current source (circuit configuration changing means)
128, 131 transconductance amplifier (circuit configuration changing means)
140,141 transistor
142,143 current source
Δf gm-C filter frequency error
ΔN Change in output value of up / down counter

Claims (12)

An automatic filter adjustment circuit for adjusting a characteristic frequency of a filter to a target frequency,
The original circuit configuration of the filter has the same characteristic frequency as the original circuit configuration at the time of adjustment of the filter, and the signal pair improved compared to the original circuit configuration by reducing the noise of the filter. A circuit configuration changing means for changing to a circuit configuration dedicated to adjustment having a noise ratio;
Measuring the period of the vibration waveform that appears in the output of the filter when the impulse signal, the pulse signal, or the step signal is input as a test signal to the filter that is arranged in the same integrated circuit as the filter and has a circuit configuration dedicated to the adjustment, A characteristic adjustment circuit for detecting a characteristic frequency of the filter from a result of the period measurement and providing an adjustment signal to the filter so as to correct a deviation from the target frequency;
After issuing an adjustment instruction for starting the characteristic adjustment circuit, the adjustment signal when the difference between the characteristic frequency of the filter and the target frequency is within an allowable range is stored, and when using the filter, An automatic filter adjustment circuit comprising: a controller for returning to the original circuit configuration of the filter, stopping the operation of the characteristic adjustment circuit, and controlling the characteristic of the filter with the stored adjustment signal . In the filter automatic adjustment circuit according to claim 1,
The filter automatic adjustment circuit, wherein the filter is a gm-C filter having a plurality of transconductance amplifiers and a plurality of capacitors. In the filter automatic adjustment circuit according to claim 1,
The circuit configuration changing means includes means for improving a signal-to-noise ratio of the filter by increasing a current of a variable current source connected to the filter at the time of adjustment of the filter. circuit. In the filter automatic adjustment circuit according to claim 1,
The automatic filter adjustment circuit according to claim 1, wherein the circuit configuration changing means includes means for causing the filter to oscillate at the same frequency as the characteristic frequency of the filter when the filter is adjusted. In the filter automatic adjustment circuit according to claim 1,
The controller is configured to average and store a plurality of the adjustment signals related to a plurality of trials, and to control the characteristics of the filter with the averaged adjustment signals. . In the filter automatic adjustment circuit according to claim 1,
The characteristic adjustment circuit includes:
A frequency divider for dividing a clock signal given as a reference signal;
A test signal generator for generating the test signal from the divided clock signal;
A counter for measuring the period of the vibration waveform appearing at the output of the filter in response to the test signal using the clock signal;
A frequency detector for detecting a characteristic frequency of the filter from a measurement result by the counter;
An automatic filter adjustment circuit, comprising: an up / down counter for changing the adjustment signal in accordance with a difference between the detected characteristic frequency and the target frequency. The automatic filter adjustment circuit according to claim 6 ,
An automatic filter adjustment circuit, further comprising a digital / analog converter for receiving an adjustment signal in digital form from the characteristic adjustment circuit or the controller and providing an analog control signal corresponding to the adjustment signal to the filter. The automatic filter adjustment circuit according to claim 6 ,
An automatic filter adjustment circuit, further comprising a phase-locked loop circuit for generating the reference signal. The automatic filter adjustment circuit according to claim 6 ,
The automatic filter adjustment circuit, wherein the up / down counter is configured to change the adjustment signal as the difference between the detected characteristic frequency and the target frequency increases. The automatic filter adjustment circuit according to claim 6 ,
The automatic filter adjustment circuit, wherein the change amount of the up / down counter is configured to decrease when the detected characteristic frequency approaches the target frequency. The automatic filter adjustment circuit according to claim 6 ,
Each of the filters includes a master filter and a slave filter that can variably control a characteristic frequency according to the adjustment signal,
The slave filter is adjusted using the test signal after the master filter is supplied with a second reference signal divided by the reference signal and pre-adjusted. Automatic filter adjustment circuit. A mobile phone system comprising the automatic filter adjustment circuit according to any one of claims 1 to 11 in a receiving unit.

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