JP3711244B2 - Wafer inspection system - Google Patents

Description

[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a technique for evaluating a processing state of a semiconductor device, and more particularly, the present invention relates to a defect for detecting a defect of a wafer or a mask of a semiconductor device processed in various processes with high throughput and high reliability. The present invention relates to an inspection apparatus and a semiconductor device manufacturing method using the apparatus.
[0002]
[Prior art]
2. Description of the Related Art Conventionally, in a semiconductor device manufacturing process, when a fine pattern defect or the like on a processed wafer is inspected using an electron beam apparatus, an electron beam emitted from an electron gun, that is, a charged particle beam, is narrowed down, and the electron beam The wafer surface is scanned with, and image data of the wafer surface is created based on the secondary electron beam generated thereby, and the image data is compared with the standard pattern image data to inspect defects such as scratches. Yes. Such a defect inspection method is referred to as an SEM (scanning electron microscope) method.
The defects include not only scratches but also the precision of fine patterns drawn on a resist-coated wafer and the precision of masks. For example, line width defects can be inspected by measuring the line width of a fine pattern based on image data obtained by a similar method.
Furthermore, the image data obtained in this way can be displayed on a monitor device, and a defect review, that is, a defect can be inspected by the human eye.
[0003]
[Problems to be Solved by the Invention]
In such a conventional wafer defect inspection apparatus, for example, an electron beam with a spot diameter of about 0.1 μm is irradiated onto the wafer, and the electron beam is scanned on the wafer. The charge is charged up or charged. Such charging is a phenomenon that occurs because the secondary electron emission coefficient is a value other than 1 and charges remain on the surface. When such charging occurs, the irradiation beam is bent by the potential due to charging, so that distortion and blurring of the image occur, and a moire pattern with a line and space pattern of a minimum of about 0.1 μm occurs. There is a case. Furthermore, due to the increase in the intensity of the secondary electrons emitted from the edge of the wafer, there is a problem that the intensity of the detection signal at the edge portion increases and distortion occurs in the image at the edge portion.
Furthermore, the emission coefficient of secondary electrons generated from the wafer varies depending on the substrate material and the wiring material of the wafer, and the substrate potential is charged in either the + or − direction depending on these materials. Since the primary electron beam is bent depending on whether the substrate potential is charged in the + direction or in the − direction, there is also a problem that an image that appropriately reflects the structure of the wafer surface cannot be obtained.
[0004]
The present invention has been made in order to improve such problems of the conventional example, and its purpose is to generate image distortion, blurring, moire patterns, and increase in signal strength at the edge portion caused by wafer charging. It is an object of the present invention to provide a wafer defect inspection apparatus capable of obtaining an image with reduced or the like.
[0005]
[Means for Solving the Problems]
In order to achieve the above object, in the defect inspection apparatus for inspecting a defect of a wafer according to the present invention,
A stage on which a wafer can be placed and moved;
A reference electron gun and an inspection electron gun arranged on the same line along a moving direction of the stage, the reference electron gun and the inspection electron gun for irradiating a primary electron beam to an inspection region of a wafer;
A substrate potential measuring device that is disposed between the reference electron gun and the inspection electron gun and measures the substrate potential of the wafer portion irradiated with the primary electron beam from the reference electron gun;
Acceleration voltage to inspection electron gun or wafer based on substrate potential measured by substrate potential measuring device using function table that shows correlation between substrate potential and landing voltage to wafer depending on wafer material An accelerating voltage controller that controls the efficiency of secondary electron emission from the wafer by changing the landing voltage to reduce or cancel the effects of wafer charging
It is characterized by having.
[0006]
In the defect inspection apparatus according to the present invention described above, the acceleration voltage controller is preferably configured to change the acceleration voltage or the landing voltage until the substrate potential converges to substantially zero. The acceleration voltage controller further controls the primary electron beam by controlling the lens system of the primary electron beam associated with the electron gun as the acceleration voltage of the electron gun or the landing voltage to the wafer changes. It is preferably configured to perform focus control.
[0007]
In order to achieve the above-described object, the present invention further provides a defect inspection method for inspecting a defect on a wafer surface.
While moving the stage on which the wafer is placed in the scanning direction, a primary electron beam is applied to the inspection area of the wafer by a reference electron gun arranged on the same line as the inspection electron gun along the moving direction of the stage. Irradiating step;
Measuring the substrate potential of the wafer portion irradiated with the primary electron beam from the reference electron gun using a substrate potential measuring device disposed between the reference electron gun and the inspection electron gun;
Acceleration voltage to inspection electron gun or wafer based on substrate potential measured by substrate potential measuring device using function table that shows correlation between substrate potential and landing voltage to wafer depending on wafer material Controlling the efficiency of secondary electron emission from the wafer by changing the landing voltage to reduce or offset the effects of wafer charging;
There is provided a defect inspection method characterized by comprising:
[0008]
BEST MODE FOR CARRYING OUT THE INVENTION
First, an embodiment of a defect inspection apparatus for detecting defects on the surface of a wafer of a semiconductor device according to the present invention will be described with reference to FIG.
In FIG. 1, 1 is an XY stage (hereinafter simply referred to as “stage”), 2 is a wafer that is placed on the stage 1 and is an inspection sample, and 3 and 4 are inspections that emit electron beams for inspection and reference, respectively. Electron guns and reference electron guns, and these electron guns are spaced apart by a predetermined distance. Reference numerals 5 and 6 denote acceleration voltage power supplies for supplying an acceleration voltage Vacc and an emission current A to the inspection electron gun 3 and the reference electron gun 4, respectively. Reference numeral 7 denotes an acceleration voltage Vacc and emission from these acceleration voltage sources 5 and 6. It is an acceleration voltage controller for controlling the current A. Reference numeral 8 denotes a substrate potential measuring device disposed between the inspection electron gun 3 and the reference electron gun 4. The substrate potential measuring device 8 is spaced apart from the surface of the wafer 2 and supplies the detected substrate potential to the acceleration voltage controller 7. To do. 9 is a secondary electron multiplier that amplifies the secondary electron beam emitted from the wafer 2 by the electron beam from the inspection electron gun 3, 10 is a line sensor, 11 is an image processing device, and 12 is a monitor such as a CRT display. Device. Reference numerals 13 and 14 denote electrostatic lenses for adjusting the focus of the electron beam.
[0009]
FIG. 2 shows the stage 1, the inspection area of the wafer 2, the electron beam B3 and its irradiation spot S3 from the inspection electron gun 3, the electron beam B4 and its irradiation spot S4 from the reference electron gun 4, and the substrate potential measurement. The relative positional relationship of the vessel 8 is schematically shown, with (a) showing a top view and (b) showing a front view.
[0010]
As is apparent from FIG. 2, the reference electron gun 4, the substrate potential measuring device 8, and the inspection electron gun 3 are arranged in this order in a line in the X direction, that is, the line direction, and an electron beam B3 generated by these electron guns. And B4 beam spots S3 and S4 are formed on the same line. The reference electron gun 4 is arranged closest to the scanning start point.
The electron beams B3 and B4 are adjusted so as to irradiate the wafer 2 vertically, and the beam spots S3 and S4 are spaced apart (between the optical axis and the optical axis). The substrate potential measuring device 8 has a predetermined measurement region, and is arranged spaced apart upward from the surface of the wafer 2.
[0011]
The stage 1 is arranged in the X direction with the wafer 2 mounted so that the electron beam B3 from the inspection electron gun 3 raster scans the entire surface of the inspection area D (see FIG. 2A) of the wafer 2. And moved in the Y direction. That is, the electron beam B4 of the reference electron gun 4 is inspected at the inspection start point (−X _m , Y _n To Y _n The line is sequentially scanned in the X direction, and thereafter, the electron beam B3 of the inspection electron gun 3 is scanned. Then, the electron beam B3 becomes a point (X _m , Y _n ) -X when it reaches _m And move forward by 1 pitch in the Y direction. _m , Y _n-1 To Y _n-1 Scan the line and do the same _n-2 Line, Y _n-3 Line, ..., -Y _n The line is scanned, and the inspection end point (X _m , -Y _n ), The movement of the stage 1 is stopped when the electron beam B3 of the inspection electron gun 3 arrives. As is clear from this description, the stage 1 has the X-direction distance (2X in the inspection region D) in the X-direction. _m ) To the distance obtained by adding the distance between S3 and S4.
[0012]
The acceleration voltage power supplies 5 and 6 are configured to supply an emission current A of about 200 μA to the inspection electron gun 3 and the reference electron gun 4 at an acceleration voltage Vacc of about 10 KV at the maximum, for example. It is controlled by the acceleration voltage controller 7. At this time, when a voltage of −20 KV is applied to the cathode of the electron gun and a voltage of −19.8 KV is applied to the wafer, the landing voltage of the wafer becomes −19.8 KV − (− 20 KV) = 200V. . The acceleration voltage is a voltage between the electron gun and the ground, and the landing voltage is a voltage between the wafer and the electron gun.
The optical systems such as the electrostatic lenses 13 and 14 are adjusted so that the electron beams B3 and B4 from the inspection electron gun 3 and the reference electron gun 4 irradiate the wafer 2 with spots having an appropriate diameter. Note that the spot diameter is about 0.1 μm in the SEM type defect inspection apparatus, and is adjusted to about several hundred μm in the case of the mapping projection type defect inspection apparatus.
[0013]
The acceleration voltage controller 7 includes a function generator 71, an acceleration voltage command device 72, an emission current command device 73, and an initial value setting device 74, as shown in FIG. In order to minimize charging caused by beam irradiation, a function table as shown in FIG. 3B is provided.
That is, as shown in FIG. 3C, when the landing voltage Vld between the electron gun and the wafer is about 200 V, the secondary electron emission coefficient γ from the substrate is 1. However, when the substrate is charged by irradiation with the electron beam when the landing voltage Vld = 200 V, the substrate potential increases or decreases depending on the wafer material, as shown in FIG. For example, in the case of inspecting the wafer material having the characteristics shown by the curve f1 in FIG. 3B, if a voltage that gives a landing voltage of Vld = 200 V is supplied to the electron gun, the secondary electron emission coefficient γ is 1 The substrate potential Vsub is + 0.5V.
Therefore, the function generator 71 selects an accelerating voltage such that the substrate potential becomes 0 according to the substrate potential Vsub from the substrate potential measuring device 8 so that the landing voltage Vld = 200−ΔV = 190V. To do. As a result, the secondary electron emission coefficient γ can be about 1, and the substrate potential Vsub can be almost zero. When the substrate potential Vsub is negative, the function generator 71 instructs to increase the acceleration voltage, and thereby the substrate potential can be made zero.
[0014]
Therefore, according to the present invention, it is possible to minimize the charging of a wafer having any charging characteristics, and at that time, charging characteristics that differ depending on the wafer material are measured before defect inspection. There is no need to do.
In the initial stage of the inspection, the acceleration voltage controller 7 sends the acceleration voltage Vacc and the emission current A based on the data set in the initial value setting unit 74 from the acceleration voltage command unit 72 and the emission current command unit 73, respectively. 5 and 6 and then receiving a signal representing the substrate potential from the substrate potential measuring device 8, the landing voltage Vld is determined based on the function table shown in FIG. The voltage Vacc is determined and the value is commanded to the acceleration voltage power supplies 5 and 6 via the acceleration voltage command unit 72.
[0015]
Secondary electrons generated from the inspection region D of the wafer 8 by the electron beam generated by the inspection electron gun 3 are amplified by the secondary electron multiplier 9 and then detected by the line sensor 10, and the detection signal The image processing device 11 generates an image based on the above and displays it on the monitor device 12. Thus, the operator can monitor the image displayed on the monitor device 12 and inspect whether or not the wafer is defective. Further, if necessary, it is possible to automatically detect a defect on the wafer by electronically comparing the reference image and the inspection image for each corresponding pixel.
[0016]
In the defect inspection apparatus having such a configuration, a case where the entire inspection area of about 130 mm × about 130 mm of the DRAM wafer is inspected will be specifically described as an example.
As described above, the inspection electron gun 3, the substrate potential measuring device 8, and the reference electron gun 4 are arranged along the line direction for scanning the inspection region D of the wafer on the stage 1, that is, the X direction. . The reference electron gun 3 and the inspection electron gun 4 are installed 10 mm apart from each other at the center of the optical axis, and the electron beams from the electron guns 3 and 4 are transmitted by a lens system such as an electrostatic lens 13. It is adjusted so that a spot beam having a diameter φ = 0.1 μm is generated on the surface of the wafer 2.
Further, the substrate potential measuring device 8 is installed 1 mm above the surface of the wafer 2 and has a measurement area of 3 mm × 3 mm and can measure the substrate potential of the wafer in the range of −5V to + 5V. Note that the charge amount of the wafer by electron beam irradiation can also be calculated by measuring the potential before and after electron beam irradiation and obtaining the potential difference between them.
[0017]
When the defect inspection is started, a command signal is supplied from the acceleration voltage controller 7 to the acceleration voltage power supplies 5 and 6 based on the data set in the initial value setting unit 74, whereby the inspection electron gun 3 The initial acceleration voltage Vacc = 200 V and the emission current A = 200 μA are set to the reference electron gun 4. Note that Vld = 200 V is a value of the acceleration voltage at which the secondary electron emission coefficient becomes 1 when the substrate potential Vsub is substantially zero, as shown in FIG.
At the same time, raster scanning is started in the stage 1, and the raster scanning is performed at a scanning speed of 10 mm / sec in the X direction, that is, the line direction, a scanning width of 500 μm in the Y direction, and a frequency of 2.5 KHz.
As a result, a beam spot S4 having a diameter of 0.1 μm is first sequentially formed on the pixels in the inspection region D of the wafer 2 by the reference electron gun 4, and then a group of pixels on which the beam spots are formed is formed on the substrate. When reaching below the potential measuring device 8, the substrate potential is measured by the substrate potential measuring device 8.
[0018]
When an actual machine test was performed under such conditions, the substrate potential measured by the substrate potential measuring device 8 was about +0.5 V after 2 to 3 seconds from the start of the inspection. The substrate potential of +0.5 V was supplied to the acceleration voltage controller 7, and as a result, the landing voltage Vld supplied from the acceleration voltage power source 5 to the inspection electron gun 3 changed from 200V to 190V. That is, the function generator 71 indicates that the acceleration voltage Vacc for canceling the substrate potential of 0.5 V is 190 V, and the value is commanded to the acceleration voltage power source 5 via the acceleration voltage command unit 73. It was.
Thereafter, the acceleration voltage supplied from the acceleration voltage power source 6 to the reference electron gun 4 is also changed to 190V.
[0019]
Although the substrate potential also changes due to the change in the acceleration voltage to the reference electron gun 4, the change in the substrate potential is fed back to the acceleration voltage controller 7, and by repeatedly executing such an operation, the substrate potential is reduced to about 0V. It can be converged. In the above-described actual machine test, the substrate potential converged to almost 0 V after repeating the above operation several times. When the substrate potential converges, the acceleration voltage becomes a constant value, and the remaining inspection area D of the wafer 2 is inspected with this acceleration voltage. If necessary, the acceleration voltage may be feedback-adjusted at several places in one inspection region D. As a result of adjusting the acceleration voltage so as to cancel or reduce the substrate potential, the potential of the inspection region D became substantially uniform, and thus an image with reduced distortion, blur, etc. could be displayed on the monitor device 12.
[0020]
In such an inspection apparatus, the initial acceleration voltage Vacc of the reference and inspection electron guns is selected so that the secondary electron emission coefficient γ is 1 (see FIG. 3C). Variations due to electron beam irradiation can be suppressed, and therefore the control range of increase / decrease in acceleration voltage can be narrowed. Such a defect inspection may be performed for all wafers. However, if wafers of the same material or the like exhibit substantially the same charging characteristics, a sample inspection is performed on one wafer, and the results are based on the results. If the acceleration voltage is determined in this way, it is not necessary to perform feedback control of the acceleration voltage for wafers of other same material.
[0021]
Further, the focal position of the electron beam changes with the change of the acceleration voltage. Therefore, the acceleration voltage controller 7 may be provided with a control function for adjusting the electrostatic lenses 13 and 14 so that the focal position becomes substantially constant regardless of changes in the acceleration voltage.
[0022]
The movement range of the stage 2 can be minimized by arranging the inspection electron gun 3, the substrate potential measuring device 8 and the reference electron gun 4 in the same line and close to each other.
[0023]
Further, since the saturation time of the substrate potential is changed by the beam irradiation amount, that is, the emission current, the initial emission current from the acceleration voltage power supplies 5 and 6 is supplied by the acceleration voltage controller 7 so that the saturation time is minimized. It is preferable to set.
In the above-described embodiment, two electron guns, that is, an inspection electron gun and a reference electron gun are used. However, only the inspection electron gun is used, and charging by the electron beam irradiated from the electron gun is performed on the substrate potential. You may comprise so that it may measure with the measuring device 8. FIG. Therefore, it is not always necessary to use two electron guns.
[0024]
FIG. 4A is a schematic diagram showing an optical system of a defect detection apparatus according to an embodiment of the present invention. In FIG. 4, the electron beam emitted from the electron gun 21 is focused by the condenser lens 22 to form a crossover at a point 24.
A first multi-aperture plate 23 having a plurality of openings is disposed below the condenser lens 22, thereby forming a plurality of primary electron beams. Each of the formed primary electron beams is reduced by the reduction lens 25 and projected onto 35. Then, after focusing at the point 35, the objective lens 27 focuses on the wafer 28 which is a sample. A plurality of primary electron beams from the first multi-aperture plate 23 are deflected by the deflector 39 disposed between the reduction lens 25 and the objective lens 27 so as to simultaneously scan the surface of the wafer 28.
[0025]
In order to prevent the field curvature aberration of the reduction lens 25 and the objective lens 27 from occurring, the first multi-aperture plate 23 has a plurality of small openings arranged on the circumference as shown in FIG. The points projected on the x-axis have a structure with equal intervals.
The plurality of focused primary electron beams irradiate a plurality of points on the wafer 28, and the secondary electron beams emitted from the irradiated plurality of points are attracted by the electric field of the objective lens 27 and focused finely. Then, the light is deflected by the EXB separator 26 and is input to the secondary optical system. The image by the secondary electron beam is focused on a point 36 closer to the objective lens 7 than the point 35. This is because each of the plurality of primary electron beams has an energy of about 500 eV on the surface of the wafer 28, whereas the secondary electron beam has an energy of only several eV.
[0026]
The secondary optical system has magnifying lenses 29 and 30, and the secondary electron beam that has passed through these magnifying lenses forms an image on the second multi-aperture plate 31. Then, the light passes through a plurality of openings of the second multi-aperture plate and is detected by a plurality of detectors 32. Note that the plurality of openings of the second multi-aperture plate 31 disposed in front of the detector 32 and the plurality of openings of the first multi-aperture plate 23 are 1 as shown in FIG. Corresponds to one-to-one.
Each detector 32 converts the received secondary electron beam into an electrical signal representing its intensity. The electric signal from each detector 32 is amplified by an amplifier 33 and then converted into image data by an image processing device 34. The image processing device 34 is also supplied with a scanning signal for deflecting the primary electron beam from the deflector 39, whereby the image processing device 34 obtains image data representing an image of the surface of the wafer 28. . By comparing the obtained image data with a standard pattern, a defect of the wafer 28 can be detected, and the pattern to be evaluated on the wafer 28 is moved to the vicinity of the optical axis of the primary optical system by registration, The line width evaluation signal is taken out by line scanning, and the line width of the pattern on the wafer 28 can be measured by appropriately configuring the signal.
[0027]
When the primary electron beam that has passed through the opening of the first multi-aperture plate 23 is focused on the surface of the wafer 28 and the secondary electron beam emitted from the wafer 28 is imaged on the detector 32, Care should be taken to minimize the effects of the three aberrations of distortion, field curvature, and field astigmatism caused by the primary and secondary optical systems.
Further, if the minimum value of the irradiation position intervals of the plurality of primary electron beams is separated by a distance larger than the aberration of the secondary optical system, crosstalk between the plurality of beams can be eliminated.
The optical system shown in FIG. 4 is used as the inspection optical system and the reference optical system shown in FIG. 1, and the acceleration voltage is controlled by the acceleration voltage controller 7 as described above. The influence can be reduced.
[0028]
Next, the semiconductor device manufacturing method of the present invention will be described. The semiconductor device manufacturing method of the present invention is performed using the above-described defect inspection apparatus. Before explaining the method, refer to the flowcharts of FIGS. 5 and 6 for general semiconductor device manufacturing methods. To explain.
As shown in FIG. 5, when roughly divided, the semiconductor device manufacturing method manufactures a wafer manufacturing step S1 for manufacturing a wafer, a wafer processing step S2 for performing processing necessary for the wafer, and a mask required for exposure. A mask manufacturing process S3, a chip assembling process S4 for cutting out chips formed on the wafer one by one and making them operable, and a chip inspection process S5 for inspecting completed chips. Each of these steps includes several sub-steps.
[0029]
Among the processes described above, a process that has a decisive influence on the manufacture of a semiconductor device is a wafer processing process. This is because, in this process, the designed circuit pattern is formed on the wafer and a large number of chips that operate as a memory or MPU are formed.
As described above, it is important to evaluate the processing state of the wafer executed in the sub-process of the wafer processing process that affects the manufacture of the semiconductor device. The sub-process will be described below.
[0030]
First, a dielectric thin film that forms an insulating layer is formed, and a metal thin film that forms a wiring portion and an electrode portion is formed. Thin film formation is performed by CVD, sputtering, or the like. Next, the formed dielectric thin film and metal thin film and the wafer substrate are oxidized, and a resist pattern is formed in the lithography process using the mask or reticle created in the mask manufacturing process S3. Then, the substrate is processed according to the resist pattern by dry etching technique or the like, and ions and impurities are implanted. Thereafter, the resist layer is peeled off and the wafer is inspected.
Such a wafer processing process is repeated for the required number of layers, and a wafer before being separated for each chip in the chip assembly process S4 is formed.
[0031]
FIG. 6 is a flowchart showing a lithography process which is a sub-process of the wafer processing process of FIG. As shown in FIG. 5, the lithography process includes a resist coating process S21, an exposure process S22, a developing process S23, and an annealing process S24.
In the resist coating step S21, a resist is coated on the wafer on which the circuit pattern is formed using CVD or sputtering, and in the exposure step S22, the coated resist is exposed. Then, in the developing step S23, the exposed resist is developed to obtain a resist pattern, and in the annealing step S24, the developed resist pattern is annealed and stabilized. These steps S21 to S24 are repeated for the required number of layers.
[0032]
In the semiconductor device manufacturing method of the present invention, the defect inspection apparatus described with reference to FIGS. 1 to 4 is used in the wafer inspection process in the wafer processing step S2 and the chip inspection process S5 for inspecting the completed chip. Thus, even a semiconductor device having a fine pattern can obtain an image with reduced distortion, blurring, etc., so that defects on the wafer can be reliably detected.
In addition, the processing apparatus in which the defect inspection apparatus is arranged in the vicinity may be any processing apparatus as long as it performs processing that requires evaluation.
[0033]
Since the defect inspection apparatus of the present invention is configured as described above, it is possible to reduce image distortion, blur, and the like due to wafer charging caused by electron beam inspection, and therefore, wafer defect detection can be performed with high accuracy. Can be executed.
[Brief description of the drawings]
FIG. 1 is a schematic block diagram showing an embodiment of a defect inspection apparatus according to the present invention.
FIG. 2 is a block diagram showing an arrangement relationship of components included in the defect inspection apparatus according to the present invention shown in FIG.
FIG. 3 is a block diagram showing a configuration of an acceleration voltage controller provided in the defect inspection apparatus according to the present invention.
FIG. 4 is a schematic diagram for explaining a configuration of an optical system of a defect detection apparatus according to the present invention.
FIG. 5 is a flowchart of a method of manufacturing a semiconductor device by applying the defect inspection apparatus according to the present invention.
6 is a flowchart showing a lithography process which is a sub-process of the wafer processing process shown in FIG. 5;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 ... XY stage 2 ... Wafer 3 ... Electron gun for inspection
4 ... Electron gun for reference 5, 6 ... Acceleration voltage power supply 7 ... Acceleration voltage controller
8 ... Board potential measuring instrument 9 ... Secondary electron multiplier 10 ... Line sensor
DESCRIPTION OF SYMBOLS 11, 34 ... Image processing apparatus 12 ... Monitor apparatus 21 ... Electron gun
22 ... Condenser lens 23 ... First multi-aperture plate 28 ... Objective lens
26 ... EXB separator 28 ... Wafer surface 31 ... Second multi-aperture plate
32 ... Detector

Claims (4)

In defect inspection equipment that inspects defects on the wafer surface,
A stage on which a wafer can be placed and moved;
A reference electron gun and an inspection electron gun disposed on the same line along a moving direction of the stage, the reference electron gun and the inspection electron gun each irradiating a primary electron beam to an inspection region of a wafer; ,
A substrate potential measuring device that is disposed between the reference electron gun and the inspection electron gun and measures the substrate potential of the wafer portion irradiated with the primary electron beam from the reference electron gun;
Acceleration voltage to inspection electron gun or wafer based on substrate potential measured by substrate potential measuring device using function table that shows correlation between substrate potential and landing voltage to wafer depending on wafer material A defect inspection apparatus comprising: an acceleration voltage controller configured to control a secondary electron emission efficiency from a wafer by adjusting a landing voltage to reduce or cancel an influence of charging of the wafer.   2. The defect inspection apparatus according to claim 1, wherein the acceleration voltage controller is configured to change the acceleration voltage or the landing voltage until the substrate potential converges to substantially zero.   3. The defect inspection apparatus according to claim 1, wherein the acceleration voltage controller further controls interlocking of a lens system of a primary electron beam associated with the electron gun as the acceleration voltage of the electron gun or the landing voltage to the wafer changes. A defect inspection apparatus configured to perform focus control of a primary electron beam by performing In the defect inspection method for inspecting defects on the wafer surface, at the time of defect inspection,
While moving the stage on which the wafer is placed in the scanning direction, a primary electron beam is applied to the inspection area of the wafer by a reference electron gun arranged on the same line as the inspection electron gun along the moving direction of the stage. Irradiating step;
Measuring the substrate potential of the wafer portion irradiated with the primary electron beam from the reference electron gun using a substrate potential measuring device disposed between the reference electron gun and the inspection electron gun;
Acceleration voltage to inspection electron gun or wafer based on substrate potential measured by substrate potential measuring device using function table that shows correlation between substrate potential and landing voltage to wafer depending on wafer material A defect inspection method comprising: adjusting a landing voltage to a wafer to control a secondary electron emission efficiency from the wafer to reduce or cancel the influence of the wafer charging.

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