JP3694817B2 - Programmable controller - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a programmable controller equipped with a special module such as a counter module, a positioning module, an ASCII module, and a CPU module, and more particularly to a power failure holding function of the special module.
[0002]
[Prior art]
Conventionally, in this type of programmable controller, when a production control is performed using a counter module, for example, a product sent on a belt conveyor is detected by a photoelectric switch, the quantity is counted by the counter module, When performing production management that divides by number, when it is necessary to stop the machine and turn off the power during production (in the middle of counting) (when stopping the machine for maintenance, rest time or the day In the case of the end of production, etc.), it is necessary to turn on the power again to perform the control operation following the previous time. In such a case, the counter module needs a power failure holding function.
[0003]
There are two conventional methods for maintaining the count value in the counter module in the event of a power failure.
a) A method of mounting a backup battery or a large capacity capacitor on the counter module side.
b) A method of performing backup using a power failure holding area (register) of the CPU module by a user program without providing a backup function on the counter module side. Specifically, in this method, the count value written in the elapsed value area of the counter is always read during operation and written to the power failure holding area of the CPU module. This is done by writing to the elapsed value area. FIG. 4 is a diagram showing an example of a user program for this processing method.
[0004]
[Problems to be solved by the invention]
The CPU module mounted on the programmable controller requires a memory backup due to its nature, and a backup battery for that purpose is mounted. However, when the processing method a) is adopted, only the CPU module is used. In addition, it is necessary to mount a backup battery and a large-capacity capacitor on the counter module, leading to an increase in cost. When a backup battery is used, not only the CPU module but also the counter module requires periodic maintenance work for battery replacement.
Further, the processing method of b) requires a user program, which places a burden on the user.
[0005]
The present invention has been made in order to solve the above-described problems. Information generated in a special module such as a counter module, information input from the outside, or a program or data that needs to maintain power failure in the module is stored. It is an object of the present invention to provide a programmable controller capable of avoiding a situation in which maintenance is not increased and the burden on the user is avoided without causing an increase in cost when the power is held during a power failure.
[0006]
[Means for Solving the Problems]
A programmable controller according to the present invention includes a special module that performs predetermined arithmetic processing and a power failure holding area that retains data and the like in the event of a power failure, and performs predetermined arithmetic processing based on various signals including special module output In a programmable controller having a module, the special module reads predetermined information written in the power failure holding area of the CPU module when power is turned on, performs predetermined arithmetic processing based on the information, and performs arithmetic processing The generated information or information input from the outside is transmitted as predetermined information to the CPU module and written in the power failure holding area.
When the special module is a counter module, the current elapsed value written in the power failure holding area of the CPU module is read when the power is turned on, and the counting process is performed based on the current elapsed value. Later, the count value is transmitted to the CPU module as the current elapsed value and written in the power failure holding area.
Therefore, the counter module transmits the count value as a current elapsed value to the CPU module after the count processing and writes it in the power failure holding area of the CPU module. Therefore, even if the power is turned off, the count value is The current elapsed value is stored in the CPU module. Thereafter, when the power is turned on, the current elapsed value written in the power failure holding area is read, and the counting process is performed based on the current elapsed value.
When the special module is a positioning module, the current position written in the power failure holding area of the CPU module is read when the power is turned on, the calculation process is performed based on the current position, and the new current position is When generated, it is transmitted to the CPU module as the current position and written in the power failure holding area. Therefore, when the positioning module performs a calculation process to generate a new current position, the positioning module transmits it to the CPU module and writes it in the power failure holding area of the CPU module. Is stored in the CPU module. Thereafter, when the power is turned on, the current position written in the power failure holding area is read out, and calculation processing is performed based on the current position.
[0008]
DETAILED DESCRIPTION OF THE INVENTION
(First embodiment)
FIG. 1 is a block diagram showing the configuration of the programmable controller according to the first embodiment of the present invention. In this figure, only the parts related to the present invention are shown, and the other parts are omitted. The counter module 10 includes a CPU 11, a RAM 12, a ROM 13, a power failure retention selection switch 14, a bus interface 15, and an input / output port 16. When a count signal is supplied to the input / output port 16 and the count signal is fetched, the CPU 11 performs an interrupt process, sets an interrupt flag 12 a secured in a predetermined area of the RAM 12, and sets the interrupt flag 12 a in the predetermined area of the RAM 12. The count value stored in the secured elapsed value area 12b is read, the count value is incremented by “1”, and written again in the elapsed value area 12b. This counting process itself is the same as the processing operation of the conventional counter module except that the interrupt flag 12a is set.
[0009]
The CPU module 20 includes a CPU 21, a RAM 22, a ROM 23, a battery 24 and a bus interface 25. The RAM 22 is backed up by a battery 24 and functions as a power failure holding area of the CPU module 20. The CPU module 20 is connected to the counter module 10 via the bus 30.
[0010]
FIG. 2 is an explanatory diagram showing the relationship between the counter module 10 and the CPU module 20 of FIG. FIG. 3 is a flowchart showing details of the operation of the counter module. The operation of the programmable controller in FIG. 1 will be described below based on these drawings.
[0011]
When the power of the counter module 10 is turned on, the CPU 11 performs an initial setting process (S11). As the initial setting process, the CPU 11 reads the setting contents of the power failure holding selection switch 14 and writes the contents to the power failure holding SW memory 12c secured in a predetermined area of the RAM 12, and at the same time, interrupt flag 12a is reset. Next, the CPU 11 determines whether or not the power failure holding SW memory 12c is set to ON (S12). If the CPU 11 determines that the power failure hold SW memory 12c is set to ON, the CPU 11 reads the current elapsed value from the CPU module 20 (S13). That is, the CPU 11 accesses the CPU module 20 via the bus interface 15 and the bus 30. The CPU 21 of the CPU module 20 reads the current elapsed value of the power failure holding area (RAM 22) by this access and sends it to the counter module 10 via the bus interface 25 and the bus 30. The CPU 11 of the counter module 10 writes the current elapsed value in the elapsed value area 12b of the RAM 12 via the bus interface 15 (S14).
[0012]
Next, the CPU 11 of the counter module 10 determines again whether or not the power failure holding SW memory 12c is set to ON (S15). If the CPU 11 determines that the power failure hold SW memory 12c is set to ON, it next determines whether the interrupt flag 12a is set (S16). Here, when the interrupt flag 12a is set, as described above, the count signal is input to the input / output port 16 to perform the count process, and the count value in the elapsed value area 12b changes (increases). This is the case. Therefore, if the CPU 11 determines that the interrupt flag 12a is set, the CPU 11 transmits the count value in the elapsed value area 12b as the current elapsed value and writes it in the CPU module 20 (S17). That is, the CPU 11 transmits the current elapsed value to the CPU module 20 via the bus interface 15 and the bus 30. The CPU 21 of the CPU module 20 writes the current elapsed value in the power failure holding area (RAM 22) and updates the value. Thereafter, the CPU 11 of the counter module 10 resets the interrupt flag 12a (S18), performs other necessary processing (S19), returns to the above processing (S15), and repeats the above processing. Note that when the power failure holding SW memory 12c is set to OFF, the processes of S13 to S18 are omitted.
[0013]
In the above description, the interrupt flag 12a is set by counter input interrupt processing, and the count value is stored in the power failure holding area (RAM 21) of the CPU module 20 later. However, in this method, high-speed pulse counting is performed. Sometimes power outages are frequently maintained, and particularly when a plurality of counter modules are installed, the load on the CUP module 20 becomes heavy, and the execution of the user program of the CPU module is delayed.
As a countermeasure, for example, when the machine is stopped and the power is turned off, the driver presses the power failure retention command switch, the switch input is detected by the counter module, and the above-described “interrupt flag 12a” is set. Only when this flag is set in accordance with the processing of FIG. 3, the count value is maintained during a power failure, so that the load on the CPU module can be ignored and the influence on the execution speed of the user program can be ignored.
Alternatively, the counter module may use the timer interrupt, periodically set the above-mentioned “interrupt flag 12a”, and hold the count value in the power failure according to the process of FIG. The interrupt flag 12a is not set in the process). Alternatively, a combination of a timer interrupt and a count interrupt may hold the count value during a power failure only when there is a count input periodically. Alternatively, the CPU module side is provided with the above-described timer interrupt function, and the "interrupt flag 12a" on the counter module side is also set periodically, when a power failure holding command switch is detected, or whenever the user program execution is completed for one scan The counter value may be retained in the counter module according to the processing of FIG.
[0014]
(Second Embodiment)
In the above-described embodiment, the case where the information generated by the counter module, that is, the count value is held during a power failure has been described. However, the present invention is similarly applied to the case where information input from the outside is held. In the above-described embodiment, the case of the counter module as the special module has been described. However, the present invention is similarly applied to the positioning module. In the case of this positioning module, the current position is written in the power failure holding area of the CPU module instead of the count value of the counter module.
[0015]
(Third embodiment)
By the way, in the above-mentioned embodiment, although the case where data was held by a power failure was described, for example, a program or data that needs to be maintained by a power failure may be targeted. In that case, programs and data for special modules (programs and data that require power outage maintenance) are written in advance in the power outage holding area of the CPU module, and the special modules are stored in the power outage holding area of the CPU module. The written program and data are read when the power is turned on, and written in the storage means built in itself. Thereafter, the special module starts operation according to the program and data. The special module in this case corresponds to a counter module, a positioning module, and an ASCII module.
[0016]
【The invention's effect】
As described above, according to the present invention, the information generated in the special module is written in the power failure holding area of the CPU module, and when the power is turned on, the information written in the power failure holding area is read and captured. Special module information is properly maintained even during power outages. Moreover, since the information is retained in the CPU module, the special module itself does not require a backup battery or capacitor, and it is not necessary to create a user program, which may impose a burden on the user. Absent.
[Brief description of the drawings]
FIG. 1 is a block diagram showing a configuration of a programmable controller according to a first embodiment of the present invention.
FIG. 2 is an explanatory diagram showing a relationship between a counter module and a CPU module in FIG. 1;
FIG. 3 is a flowchart showing details of the operation of the counter module of FIG. 1;
FIG. 4 is a diagram showing an example of a user program when a count value is backed up by a user program in a conventional programmable controller.

Claims (2)

In a programmable controller having a special module that performs predetermined arithmetic processing, and a CPU module that has a power failure holding area for retaining data and the like in the event of a power failure, and that performs predetermined arithmetic processing based on various signals including the special module output ,
The special module is composed of a counter module,
This counter module reads the current elapsed value written in the power outage holding area of the CPU module when the power is turned on, performs a counting process based on the current elapsed value, and after the counting process, counts the current value Programmer llama logic controllers for causing transmitted as a value to the CPU module written in the power outage holding area. In a programmable controller having a special module that performs predetermined arithmetic processing, and a CPU module that has a power failure holding area for retaining data and the like in the event of a power failure, and that performs predetermined arithmetic processing based on various signals including the special module output ,
The special module is composed of a positioning module,
This positioning module reads the current position written in the power failure holding area of the CPU module when the power is turned on, performs arithmetic processing based on the current position, and if a new current position is generated, A programmable controller, wherein the current position is transmitted to a CPU module and written in the power failure holding area.

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