JPH05189001A - Controller - Google Patents

Abstract

PURPOSE:To exert no adverse influence upon a process by preventing a microprocessor from running away even if some abnormality occurs to new control information which is received through a transmission line. CONSTITUTION:When control information stored in an operation memory circuit 8 is rewritten, the control information stored in the operation memory circuit 8 is saved in a buffer memory circuit 9 and new control information is written in the operation memory circuit 8. If this control information becomes abnormal, the microprocessor 1 puts the last control information saved in the buffer memory 9 back to the operation memory circuit 8 and the control process is restarted according to the control information.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a controller used for process control or the like, and more particularly to a controller for storing control information.
The present invention relates to a controller having one or more and preventing a runaway even if the newly supplied control information is abnormal.

[0002]

2. Description of the Related Art Generally, in a controller with a built-in microprocessor, the control function is programmable. Therefore, the controller function should be constructed according to the system, and the controller suitable for various systems should be made by this. You can do it.

FIG. 3 is a block diagram showing an example of a controller incorporating such a microprocessor.

The controller shown in this figure has a microprocessor 101 for performing various processes, a ROM 102 for storing a basic program defining the operation of the microprocessor 101 and various constant data, and a transmission line 10.
3, a transmission interface circuit 106 for receiving control information (adjustment operation program) output from the program creation device 104 via a memory 3, and a RAM 108 for storing and storing control information from the transmission interface circuit 106 via a bus 107. And program creation device 1
Each time new control information is output from 04, it is received by the transmission interface circuit 106 via the transmission line 103 and stored in the RAM 108, and when the storing operation is completed, the microprocessor 101 stores it in the RAM 108. Based on the new control information stored, control of the device (not shown) to be controlled is started.

[0005]

However, in the above-described conventional controller, when there is some abnormality in the new control information received via the transmission line 103,
Upon receiving this, the microprocessor 10 of the controller
There is a problem that 1 runs away and has a great adverse effect on the process.

In view of the above situation, the present invention can prevent the microprocessor from running out of control even if there is any abnormality in the new control information received via the transmission line. It is an object of the present invention to provide a controller that can prevent a process from being adversely affected even if it is abnormal.

[0007]

In order to achieve the above object, a controller according to the present invention is a controller for controlling a device to be controlled based on control information stored in an operation memory circuit. , When rewriting the control information stored in the operation memory circuit, a buffer memory circuit in which the previous control information stored in the operation memory circuit is saved and a new control information stored in the operation memory circuit. When there is an abnormality, there is provided an information restoring unit for returning the control information saved in the buffer memory circuit to the operation memory circuit.

[0008]

In the above structure, when the control information stored in the operation memory circuit is rewritten, the previous control information stored in the operation memory circuit is saved in the buffer memory circuit, When new control information is written and there is an abnormality in this control information, the information restoring unit restores the previous control information saved in the buffer memory circuit to the operation memory circuit, and based on this control information. Control processing is restarted.

[0009]

1 is a block diagram showing an embodiment of a controller according to the present invention.

The controller shown in this figure is provided with a microprocessor 1 for performing various processes, a ROM 2 in which a basic program for defining the operation of the microprocessor 1 and various constant data are stored, and a transmission line 3. A transmission interface circuit 5 for receiving control information (adjustment operation program) output from the program creation device 4, a buffer memory circuit 7 for fetching and storing control information from the transmission interface circuit 5 via a bus 6, and
An operation memory circuit 8 for storing control information being executed and a buffer memory circuit 9 used as a save area for this control information when the control information stored in this operation memory circuit 8 is rewritten are provided. There is.

Each time new control information is output from the program creating device 4, the transmission interface circuit 5 receives the control information via the transmission line 3 and stores it in the buffer memory circuit 7, as shown in FIG. When this storing operation is completed, the microprocessor 1 confirms whether the new control information stored in the buffer memory circuit 7 is normal.

Thereafter, the control information stored in the operation memory circuit 8 by the microprocessor 1 is transferred to and saved in the buffer memory circuit 9 serving as a save area, and also stored in the buffer memory circuit 7. The new control information is read out and transferred to the operation memory circuit 8.

When the transfer process is completed, the microprocessor 1 starts controlling the device (not shown) to be controlled based on the control information stored in the operation memory circuit 8. ..

At this time, there is an abnormality in the new control information stored in the operation memory circuit 8. If the abnormality causes control stoppage or runaway, the operation memory circuit 8 will occur.
The control operation based on the control information stored in is canceled and the previous control information stored in the buffer memory circuit 9 serving as the save area is transferred to the operation memory circuit 8 and based on this control information. The control of the device to be controlled is started.

As described above, in this embodiment, when the control information stored in the operation memory circuit 8 is rewritten, the previous control information is saved in the buffer memory circuit 9, and the new control information is defective. At this time, the control information before being saved in the buffer memory circuit 9 is returned to the operation memory circuit 8 and the control of the device to be controlled is restarted based on this control information. Even if there is some abnormality in the new control information received via the line 3, it is possible to prevent the microprocessor 1 from running out of control, thereby adversely affecting the process even if the new control information is abnormal. You can avoid it.

[0016]

As described above, according to the present invention, it is possible to prevent the microprocessor from running out of control even if there is some abnormality in the new control information received via the transmission line. Even if the control information is abnormal, the process can be prevented from being adversely affected.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a controller according to the present invention.

FIG. 2 is a schematic diagram showing an operation example of the controller shown in FIG.

FIG. 3 is a block diagram showing an example of a conventionally known controller.

[Explanation of symbols]

 1 Microprocessor (Information Restoration Unit) 3 Transmission Line 4 Program Creation Device 5 Transmission Interface Circuit 8 Operation Memory Circuit 9 Buffer Memory Circuit

Claims (1)

[Claims] 1. A controller for controlling a device to be controlled based on control information stored in an operation memory circuit, wherein the operation memory is stored when the control information stored in the operation memory circuit is rewritten. The buffer memory circuit in which the previous control information stored in the circuit is saved, and the previous control information saved in the buffer memory circuit when the new control information stored in the operation memory circuit is abnormal An information restoration unit for returning the data to the operation memory circuit, and a controller.