JP3673491B2

JP3673491B2 - Package for housing input/output terminals and semiconductor elements

Info

Publication number: JP3673491B2
Application number: JP2001296629A
Authority: JP
Inventors: 美津夫柳沢; 久義和田
Original assignee: Kyocera Corp
Current assignee: Kyocera Corp
Priority date: 2001-09-27
Filing date: 2001-09-27
Publication date: 2005-07-20
Anticipated expiration: 2021-09-27
Also published as: JP2003100922A

Description

【０００１】
【発明の属する技術分野】
本発明は、数十ＧＨｚ以上の高周波帯域で作動する半導体レーザ（ＬＤ）やフォトダイオード（ＰＤ）等の光半導体素子およびＩＣ，ＬＳＩ等の半導体素子を収納するための半導体素子収納用パッケージ等の入出力部に使用される入出力端子、およびこの入出力端子を用いた半導体素子収納用パッケージに関する。
【０００２】
【従来の技術】
従来の光通信やマイクロ波通信、ミリ波通信等の分野で用いられる高周波信号により作動するＬＤ，ＰＤ等の光半導体素子およびＩＣ，ＬＳＩ等の半導体素子を収納するための半導体素子収納用パッケージ（以下、半導体パッケージという）として、例えば光通信分野で用いられる光半導体パッケージを図４に示す。
【０００３】
同図に示すように、光半導体パッケージ１０９は、一般に、鉄（Ｆｅ）−ニッケル（Ｎｉ）−コバルト（Ｃｏ）合金や銅（Ｃｕ）−タングステン（Ｗ）合金等の金属材料から成る基体１１０を有する。この光半導体パッケージ１０９は、上側主面にＬＤやＰＤ等の光半導体素子１１３が載置固定される載置部１１０ａを有する基体１１０と、Ｆｅ−Ｎｉ−Ｃｏ合金やＦｅ−Ｎｉ合金等の金属材料からなり、載置部１１０ａを囲繞するように基体１１０の上側主面に接合された枠体１１１とから主に構成されている。この枠体１１１は、その側部に設けられた貫通孔１１２に、光半導体素子１１３と外部電気回路（図示せず）とを電気的に接続する絶縁端子である同軸コネクタ（ガラスビード端子ともいう）１０１が嵌着接合されている。
【０００４】
また、枠体１１１には、他の側部に光半導体素子１１３と光結合するための光伝送路である貫通孔１２１が形成されている。この貫通孔１２１の枠体１１１外側開口の周辺部には、枠体１１１の熱膨張係数に近似した金属材料からなる筒状の光ファイバの固定部材１１６が銀ロウ等のロウ材で接合される。固定部材１１６には、戻り光防止用の光アイソレータ１１８と光ファイバ１１４とが樹脂接着剤で接着された金属ホルダ１１９が固定されている。また、固定部材１１６の内部には、非晶質ガラス等からなり集光レンズとして機能するとともに光半導体パッケージ１０９内部を気密に塞ぐ機能を有する透光性部材１１５が固定される。
【０００５】
また、固定部材１１６と金属ホルダ１１９とは、各々の端面同士がレーザ溶接等により固定される。一方、固定部材１１６と透光性部材１１５とは、２００〜４００℃の融点を有する金（Ａｕ）−錫（Ｓｎ）合金等の低融点ロウ材によりロウ付けして固定される。
【０００６】
また、光半導体素子１１３の下面にはペルチェ素子等の電子冷却素子１２０が配置されており、光半導体素子１１３の作動時にそれを冷却する。さらに、載置部１１０ａ上には、光半導体素子１１３の駆動用または信号増幅用のＬＳＩ等の半導体素子１１３’が設けられる。半導体素子１１３’の下面にも電子冷却素子１２０またはヒートシンクを配設し得る。そして、光半導体素子１１３の電極が、ボンディングワイヤ（図示せず）を介して外部リード端子（図示せず）に電気的に接続される。
【０００７】
また、同軸コネクタ１０１は、金属材料から成る筒状の外周導体１０１ａと、絶縁体１０１ｂと、中心導体１０１ｃとから成る。絶縁体１０１ｂとしては、硼珪酸ガラス等が外周導体１０１ａの内部に充填されて成る。また、中心導体１０１ｃは、外周導体１０１ａの中心軸部分に絶縁体１０１ｂを介して装着され、光半導体パッケージ１０９内外を導通させる機能を有する。また、外周導体１０１ａは枠体１１１の内側に設けた貫通孔１１２の内周面にＡｕ−Ｓｎ合金等の低融点ロウ材でロウ付けして固定される。この同軸コネクタ１０１は、外部電気回路と光半導体素子１１３とを電気的に接続する機能を有するとともに光半導体パッケージ１０９の内部を気密に塞ぐ機能も有する。
【０００８】
そして、基体１１０の載置部１１０ａに光半導体素子１１３を電子冷却素子１２０を介して樹脂接着剤、ロウ材等の接着剤により接着固定する。次に、半導体素子１１３’の電極をボンディングワイヤを介して同軸コネクタ１０１の中心導体１０１ｃに電気的に接続する。その後、光アイソレータ１１８と光ファイバ１１４が固定された金属ホルダ１１９を固定部材１１６に溶接する。次いで、枠体１１１の上面に蓋体１１７をシーム溶接やロウ接等によって接合して、基体１１０と枠体１１１および蓋体１１７とからなる容器内部に光半導体素子１１３および半導体素子１１３’を気密に収容して、製品としての光半導体装置となる。
【０００９】
このような光半導体装置は、例えば、外部電気回路から供給される駆動用の高周波信号により光半導体素子１１３を光励起させ、光励起されたレーザ光等の光を透光性部材１１５を通して光ファイバ１１４に授受させ、光ファイバ１１４内を伝送させることにより、大容量の情報を高速に伝送できる光電変換装置として機能し、光通信分野等に多用されている。
【００１０】
しかしながら、上記従来の光半導体パッケージにおいて、同軸コネクタ１０１の枠体１１１における基体１１０底面からの最大高さは、外周導体１０１ａの外径寸法と、絶縁体１０１ｂの外径寸法に支配される。この絶縁体１０１ｂの外径寸法は、外周導体１０１ａおよび枠体１１１と同軸コネクタ１０１の中心導体１０１ｃとの絶縁性が十分に確保できるように十分な体積および厚さを有するように設けられている。そのため、電気的な接続を行う中心導体１０１ｃの位置が基体１１０の底面からきわめて高くなる。
【００１１】
従って、同軸コネクタ１０１を嵌着接合する貫通孔１１２が大きくなるとともに、枠体１１１自体の高さも高くなる。その結果、光半導体パッケージ１０９の低背化、即ち小型化が極めて困難になるという問題点があった。
【００１２】
そこで、このような問題点を解消するために、上記同軸コネクタ１０１に代えて、例えば図５に示すようなセラミックスから成る入出力端子１０１’が用いられている。この入出力端子１０１’は、平板部１０４とその上面に設置された立壁部１０５とから成る。平板部１０４の上面には、高周波信号の伝送路（入力線路および／または出力線路）として線路導体１０２が設けられている。また、線路導体１０２の両側には所定間隔でもって同一面接地導体１０３が形成されている。平板部１０４と立壁部１０５はアルミナセラミックス等から成り、十分な絶縁性を有しているため、その厚さを厚くする必要がなく小型化が可能なものである。
【００１３】
【発明が解決しようとする課題】
しかしながら、最近のインターネット等を利用した光通信分野に用いられる光電変換装置に対する高速伝送化の要求はさらに高まり、数十ＧＨｚ帯域での高速化が切望されている。上記従来の入出力端子１０１’を用いた光半導体パッケージでも、高周波信号の周波数がさほど高くない場合には、高周波信号の伝送特性はほとんど問題とはならない。しかし、周波数が数十ＧＨｚ以上に高くなるにしたがって、立壁部１０５の側面の奥行き（線路方向の長さ）により高周波信号（電磁波）の共振が起こり、電磁波の放射現象が発生して入出力端子１０１’の特性インピーダンスの不連続が起こる。それを回避するため、絶縁体である立壁部１０５の横幅および奥行き（線路方向に平行な側面間の幅および線路方向の長さ）を極めて小さくしなければならない。例えば、立壁部１０５をアルミナセラミックスで形成すると、２０ＧＨｚの高周波信号を用いる場合立壁部１０５の奥行き（線路方向の長さ）は約１ｍｍ程度、３０ＧＨｚでは約０．５ｍｍ程度とする必要がある。
【００１４】
そのため、微細な配線を行なう必要があるうえ設計の自由度が制限される。さら、平板部１０４と立壁部１０５との接合の位置精度や枠体１１１への入出力端子１０１’の接合の位置精度がばらつき、入出力端子１０１’の線路導体１０２で特性インピーダンスが安定しなくなる。そのため、線路導体１０２における入射信号の反射が増大する。その結果、２０ＧＨｚ以上での高周波信号の伝送特性が劣化するという問題点があった。
【００１５】
また、入出力端子１０１’の線路方向に平行な側面間の幅が狭くなり、その強度が劣化するため、枠体１１１の取付部に入出力端子１０１’をロウ付けする際に、入出力端子１０１’と枠体１１１との熱膨張差により入出力端子１０１’にクラック等が生じて、光半導体パッケージ１０９の気密性が損なわれるという問題点もあった。
【００１６】
従って、本発明は、上記問題点に鑑みて完成されたものであり、その目的は、薄型化および小型化が可能となり、半導体素子および光半導体素子と外部電気回路との間で２０ＧＨｚ以上の高周波信号を入出力する際に、伝送損失を小さくして効率良く伝送させることができると共に必要な強度を確保できる入出力端子、およびこの入出力端子を用いた半導体パッケージを提供することにある。
【００１７】
【課題を解決するための手段】
本発明の入出力端子は、略長方形の誘電体板から成る平板部と、該平板部の上面の１辺から対向する他辺にかけて入力線路および／または出力線路として形成された、差動線路とされている２本の線路導体と、前記平板部の上面の前記２本の線路導体の両側に等間隔をもって形成された同一面接地導体と、前記平板部の上面に前記線路導体および前記同一面接地導体を間に挟んで接合された誘電体から成る立壁部とを具備した入出力端子において、前記立壁部の上面及び前記線路導体の線路方向に略平行な側面に、前記線路導体の線路方向に略垂直な側面全体が空白部となるようにして接地導体を形成するとともに、前記平板部の下面及び前記線路導体の線路方向に略平行な側面に接地導体が形成されており、前記平板部の前記線路導体が露出している部位に、前記同一面接地導体と前記平板部の下面の前記接地導体とを電気的に接続するとともに前記線路導体の線路方向に略平行な方向に並ぶように前記線路導体で伝送される高周波信号の波長の４分の１以下の間隔で複数の第一の貫通導体が設けられ、前記平板部の前記立壁部が接合された部位に、前記同一面接地導体を貫通して前記立壁部の上面の前記接地導体と前記平板部の下面の前記接地導体とを電気的に接続するとともに前記線路方向に略平行な方向に並ぶように前記高周波信号の波長の４分の１以下の間隔で複数の第二の貫通導体が設けられており、該第二の貫通導体は前記立壁部の前記線路方向に略垂直な隣接する側面との間隔が前記高周波信号の波長の８分の１以下であることを特徴とするものである。
【００１８】
また、本発明の入出力端子は、略長方形の誘電体板から成る平板部と、該平板部の上面の１辺から対向する他辺にかけて入力線路および／または出力線路として形成された、差動線路とされている２本の線路導体と、前記平板部の上面の前記２本の線路導体の両側に等間隔をもって形成された同一面接地導体と、前記平板部の上面に前記線路導体および前記同一面接地導体を間に挟んで接合された誘電体から成る立壁部とを具備した入出力端子において、前記立壁部の上面及び前記線路導体の線路方向に略平行な側面に、前記線路導体の線路方向に略垂直な側面全体が空白部となるようにして接地導体が、前記平板部の内部に内層接地導体が、前記線路導体の線路方向に略平行な前記平板部の側面に接地導体が形成されており、前記平板部の前記線路導体が露出している部位に、前記同一面接地導体と前記内層接地導体とを電気的に接続するとともに前記線路導体の線路方向に略平行な方向に並ぶように前記線路導体で伝送される高周波信号の波長の４分の１以下の間隔で複数の第一の貫通導体が設けられ、前記平板部の前記立壁部が接合された部位に、前記同一面接地導体を貫通して前記立壁部の上面の前記接地導体と前記内層接地導体とを電気的に接続するとともに前記線路方向に略平行な方向に並ぶように前記高周波信号の波長の４分の１以下の間隔で複数の第二の貫通導体が設けられており、該第二の貫通導体は前記立壁部の前記線路方向に略垂直な隣接する側面との間隔が前記高周波信号の波長の８分の１以下であることを特徴とするものである。
【００１９】
本発明は、第一の貫通導体および第二の貫通導体の間隔（中心間距離）を線路導体で伝送される高周波信号の波長の４分の１以下とすることにより、貫通導体の導体抵抗およびインダクタンス成分に起因する接地電位の不安定が解消される。これにより、数十ＧＨｚ以上という高い周波数帯域においても、接地電位が安定化する。また、第二の貫通導体は立壁部の線路方向に略垂直な隣接する側面との間隔（第二の貫通導体の中心と側面との距離）が高周波信号の波長の８分の１以下であることから、立壁部における電磁波の共振および放射現象が抑制され、線路導体を通る高周波信号の反射損失を極めて小さくすることができる。
【００２０】
その結果、数十ＧＨｚ帯域以上の高周波信号の入出力を伝送損失を小さくして、正確かつ円滑に行うことができるとともに、入出力端子の薄型化および小型化が可能となる。
【００２１】
また、ボンディングワイヤ等のインダクタンス（Ｌ）成分が発生しても、一対の線路導体で入出力される伝搬モードによりL成分の影響が緩和でき、かつ特性インピーダンスも整合がとれることから、線路導体での数十ＧＨｚ以上の高周波信号のさらに良好な伝送特性が実現できる。
【００２２】
本発明の半導体パッケージは、上側主面に半導体素子が載置される載置部を有する基体と、該基体の前記上側主面に前記載置部を囲繞するように取着され、側部に貫通孔または切欠き部から成る入出力端子の取付部が形成された枠体と、前記取付部に嵌着された本発明の入出力端子とを具備したことを特徴とする。
【００２３】
本発明は、上記の構成により、半導体パッケージの薄型化および小型化を実現でき、半導体素子と外部電気回路との間で数十ＧＨｚ以上の高周波信号の入出力を伝送損失を小さくして伝達可能なものとすることができる。
【００２４】
【発明の実施の形態】
本発明の入出力端子および半導体パッケージについて以下に詳細に説明する。図１は本発明の入出力端子について実施の形態の一例を示す斜視図である。図１において、１は線路導体２と同一面接地導体層３とを有する平板部４と、立壁部５と、貫通導体６とを具備した入出力端子であって、例えば光半導体パッケージに使用される入出力端子である。
【００２５】
本発明の入出力端子１の平板部４は、アルミナ（Ａｌ₂Ｏ₃）セラミックス、窒化アルミニウム（ＡｌＮ）セラミックス、ガラスセラミックス等の略長方形の誘電体からなる。平板部４は、この上面の略中央部に一辺から他辺にかけて形成された入力線路および／または出力線路として形成された差動線路とされている２本の線路導体２と、その両側に等間隔をもって形成された同一面接地導体３とを有する。即ち、２本の線路導体２は、一方が入力線路で他方が出力線路である構成、両方が入力線路である構成、両方が出力線路である構成とし得る。また、平板部４の側面には接地導体３ａ、下面には接地導体３ｂが形成されている。
【００２６】
この平板部４の上面には、線路導体２と同一面接地導体３を間に挟んで接合された立壁部５が設けられる。立壁部５は、その上面に接地導体３ｃが形成され、側面に接地導体３ａを延出するように接地導体３ｄが形成されており、Ａｌ₂Ｏ₃セラミックス、ＡｌＮセラミックス、ガラスセラミックス等の誘電体から成る。
【００２７】
本発明の入出力端子１は、図１のように、平板部４の線路導体２が露出している部位に、同一面接地導体３と平板部４下面の接地導体３ｂとを電気的に接続するとともに線路導体２の線路方向に略平行な方向に並ぶように線路導体２で伝送される高周波信号の波長の４分の１以下の間隔８で複数の第一の貫通導体６ａが設けられ、平板部４の立壁部５が接合された部位に、同一面接地導体３を貫通して立壁部５の上面の接地導体３ｃと平板部４の下面の接地導体３ｂとを電気的に接続するとともに線路方向に略平行な方向に並ぶように高周波信号の波長の４分の１以下の間隔８で複数の第二の貫通導体６ｂが設けられており、第二の貫通導体６ｂは立壁部５の線路方向に略垂直な隣接する側面との間隔８ａが高周波信号の波長の８分の１以下である。
【００２８】
また本発明の入出力端子１は、図２のように、平板部４の線路導体２が露出している部位に、同一面接地導体３と内層接地導体３ｅとを電気的に接続するとともに線路導体２の線路方向に略平行な方向に並ぶように線路導体２で伝送される高周波信号の波長の４分の１以下の間隔８で複数の第一の貫通導体６ａが設けられ、平板部４の立壁部５が接合された部位に、同一面接地導体３を貫通して立壁部５の上面の接地導体３ｃと内層接地導体３ｅとを電気的に接続するとともに線路方向に略平行な方向に並ぶように高周波信号の波長の４分の１以下の間隔８で複数の第二の貫通導体６ｂが設けられており、第二の貫通導体６ｂは立壁部５の線路方向に略垂直な隣接する側面との間隔８ａが高周波信号の波長の８分の１以下である。
【００２９】
そして、これら貫通導体６ａ，６ｂ同士の間隔（中心間距離）８が線路導体２で伝送される高周波信号の波長の４分の１以下であることが必要である。即ち、貫通導体６同士の間隔８を高周波信号の波長の４分の１以下とすることにより、数十ＧＨｚ以上の高い周波数帯域で問題となる、貫通導体６の導通抵抗およびインダクタンス成分による接地電位の不安定化が解消される。その結果、光半導体素子１３（図３）と入出力端子１とのインピーダンスの整合がとれ、光半導体素子１３と外部電気回路との数十ＧＨｚ以上の高周波信号の入出力が円滑に行われ、光半導体素子１３の作動性を良好なものとできる。
【００３０】
貫通導体６ａ，６ｂ同士の間隔８が高周波信号の波長４分の１を超える場合、外部との電磁的なシールド性（電磁遮蔽性）が損なわれ易くなり、そのため５ＧＨｚ以上、特に数十ＧＨｚ以上の高周波帯域で２本の線路導体２のそれぞれで行われるインピーダンス整合が困難になる。
【００３１】
また、貫通導体６のうち第二の貫通導体６ｂは、立壁部５の線路方向に略垂直な隣接する側面との間隔８ａが高周波信号の波長の８分の１以下である。即ち、入出力端子１は、下面グランド付きコプレーナ線路構造および両側グランド付きストリップ線路構造を有しており、下面グランド付きコプレーナ線路は、線路導体２と同一面接地導体３および接地導体３ｂとの間で電界が発生し、高周波信号を効率良く伝送させている。また、両側グランド付きストリップ線路は、線路線路２と同一面接地導体３、接地導体３ｂおよび接地導体３ｃとの間で電界が発生し、高周波信号を効率良く伝送させている。よって、線路方向に略垂直な立壁部５側面において電界分布の違いが生じている。この電界分布の違い、即ち伝送モードの違いにより、高周波信号に乱れが生じ反射損失が大きくなる。従って、第二の貫通導体６ｂと立壁部５の線路方向に略垂直な隣接する側面との間隔８ａを高周波信号の波長の８分の１以下とすることにより、伝送モードの乱れを少なくし、円滑に高周波信号を伝送できる。つまり、高周波信号の共振および放射現象を抑制することができ、光半導体素子と入出力端子１との特性インピーダンスの整合がとれることになる。
【００３２】
その結果、光半導体素子と外部電気回路との数十ＧＨｚ以上の高周波信号の入出力が円滑に行なわれ、光半導体素子の作動性を良好なものとすることができる。
【００３３】
本発明の図２の構成では平板部４の内部に内層接地導体３ｅが形成されているが、これにより以下のような利点がある。数十ＧＨｚ以上の高周波帯域では、平板部４を薄くしなければならず、単板では強度不足となるが、内層接地導体３ｅが形成されていることにより、平板部４の厚さを確保して強度を増大させることができる。また、内層接地導体３ｅが形成されていることにより、電磁波の共振を効果的に抑制することができ、電磁波の放射現象がほとんど発生しなくなる。
【００３４】
また本発明の入出力端子１は、図１に示すように、所定間隔でもって形成された２本の差動線路としての線路導体２と、それらの両側に沿って間隔Ｗを開けて形成された同一面接地導体３とを有し、枠体１１（図３）の内外を貫通するように形成した略長方形の誘電体板からなる厚さtの平板部４と、平板部４の上面に線路導体２および同一面接地導体３を間に挟んで接合され、半導体パッケージを構成する枠体１１の内外を遮断するように形成された立壁部５とから成っている。
【００３５】
平板部４および立壁部５は、Ａｌ₂Ｏ₃セラミックス、ＡＬＮセラミックス、ガラスセラミックス等の絶縁材料からなる。また、線路導体２は、Ｗ，Ｍｏ，Ｍｎ等で形成されており、例えばＷ等の粉末に有機溶剤、溶媒を添加混合して得た金属ペーストを、平板部４および立壁部５用のセラミックグリーンシートに、従来周知のスクリーン印刷法により所定パターンに印刷塗布しておくことによって平板部４および立壁部５に形成される。
【００３６】
また、貫通導体６は、Ｗ，Ｍｏ，Ｍｎ等から成り、例えば平板部４および立壁部５用のセラミックグリーンシートに所定の打ち抜き工程を施して貫通孔を形成した後、Ｗ等の粉末に有機溶剤、溶媒を添加混合して得た金属ペーストをスクリーン印刷法により貫通孔に充填することによって、平板部４および立壁部５に形成される。
【００３７】
尚、本発明に適用可能な高周波信号の周波数は、ＬＳＩ，ＬＤ等用の１ＭＨｚ〜数１００ＧＨｚ程度の高周波帯域、超高周波帯域であり、好ましくは光半導体素子駆動用の５〜１００ＧＨｚ程度、より好ましくは２０〜６０ＧＨｚ程度の帯域である。
【００３８】
また、本発明の入出力端子１において、２本の線路導体２に１つの高周波信号を同相モードと逆相モードをそれぞれ入力することで、高周波信号のノイズを小さくすることもできる。この線路導体２の表面には、酸化防止のためとボンディングワイヤやリード端子等を強固に接続するために、０．５〜９μｍのＮｉ層や０．５〜５μｍのＡｕ層等の金属層をメッキ法により被着させておくと良い。
【００３９】
次に、本発明の半導体パッケージを図３に基づいて説明する。同図は、本発明の半導体パッケージについて実施の形態の一例を示す断面図である。同図において、９は、基体１０、枠体１１、枠体１１の取付部１２に嵌着された高周波信号入出力用の入出力端子１、および基体１０の上側主面の載置部１０ａに載置されたＬＤ，ＰＤ等の光半導体素子１３から主に構成される半導体パッケージである。これらの基体１０、枠体１１、入出力端子１、光ファイバ１４や透光性部材１５を内部に設置固定する筒状の光ファイバの固定部材１６および蓋体１７とで、内部に光半導体素子１３を収容するための容器が構成される。
【００４０】
また、固定部材１６の外側端面には、光ファイバ１４と戻り光防止用の光アイソレータ１８とが樹脂接着剤で接着された金属ホルダ１９が、ＹＡＧレーザ溶接等により接合される。さらに、光半導体素子１３の下面にはペルチェ素子等の電子冷却素子２０が配置されており、光半導体素子１３の作動時にそれを冷却する。
【００４１】
また、載置部１０ａ上には、光半導体素子１３の駆動用または信号増幅用のＬＳＩ等の半導体素子１３'が設けられ、半導体素子１３' の下面にも電子冷却素子２０またはＣｕ−Ｗ合金からなるヒートシンクを配設し得る。そして、光半導体素子１３と半導体素子１３'とをボンディングワイヤ、内部配線パターン（図示せず）等を介して接続し、半導体素子１３'は入出力端子１にボンディングワイヤで接続される。そして、光半導体素子１３の各電極が、ボンディングワイヤを介して入出力端子１の枠体１１外側に設けられた外部リード端子に電気的に接続されることとなる。
【００４２】
基体１０は、光半導体素子１３を支持する支持部材および光半導体素子１３で発生した熱を放熱するための放熱板として機能し、その上側主面の略中央部に光半導体素子１３を載置するための載置部１０ａを有している。載置部１０ａには光半導体素子１３が鉛（Ｐｂ）−錫（Ｓｎ）半田等の接着剤を介して接着固定されるとともに、この接着剤を介して光半導体素子１３で発生した熱が載置部１０ａに伝えられ、外部に効率よく放熱され、光半導体素子１３の作動性を良好なものとする。
【００４３】
この基体１０は、Ｆｅ−Ｎｉ−Ｃｏ合金やＣｕ−Ｗ合金等の金属材料、またはＡｌ₂Ｏ₃、ＡＬＮ等のセラミックスから成る。金属材料から成る場合、そのインゴットに圧延加工や打ち抜き加工等の従来周知の金属加工方法を施すことによって所定の形状に製作される。一方、セラミックスから成る場合、その原料粉末に適当な有機バインダーや溶剤等を添加混合してペースト状と成し、このペーストを用いてドクターブレード法やカレンダーロール法によりセラミックグリーンシートに成形する。その後、セラミックグリーンシートに適当な打ち抜き加工を施し、これを複数枚積層し、１６００℃の高温で焼結することによって作製される。
【００４４】
なお、基体１０が金属材料から成る場合、その表面に耐食性に優れかつロウ材との濡れ性に優れる金属、具体的には厚さ０．５〜９μmのＮｉ層と厚さ０．５〜５μｍのＡｕ層をメッキ法により順次被着させておくのがよく、基体１０が酸化腐食するのを有効に防止できるとともに、基体１０の上側主面に光半導体素子１３を強固に接着固定することができる。
【００４５】
一方、基体１０がセラミックスから成る場合、光半導体素子１３を載置する載置部１０ａに耐食性に優れかつロウ材との濡れ性に優れる金属、具体的には厚さ０．５〜９μmのＮｉ層と厚さ０．５〜５μｍのＡｕ層とをメッキ法により順次被着させておくのがよく、基体１０の上側主面に光半導体素子１３を強固に接着固定することができる。
【００４６】
また、基体１０は、その上側主面に光半導体素子１３が載置される載置部１０ａを囲むように、貫通孔または切欠き部から成る入出力端子１の取付部１２が形成された枠体１１が接合されており、枠体１１の内側に光半導体素子１３を収容するための空所が形成される。この枠体１１は、基体１０と同様に金属材料またはセラミックスから成り、基体１０と同様の加工法によって、一側部に取付部１２を、他の側部に光透過用の貫通孔２１を有するような形状に作製される。
【００４７】
そして、枠体１１がＦｅ−Ｎｉ−Ｃｏ合金、Ｆｅ−Ｎｉ合金等の金属材料から成る場合、例えばＦｅ−Ｎｉ合金から成る場合、この合金のインゴットに圧延加工やプレス加工等の金属加工を施すことによって所定の形状に製作される。また、枠体１１の基体１０への接合は、基体１０の上側主面と枠体１１の下面とを、基体１０の上側主面に敷設した適度なボリュームを有するプリフォームとされた銀ロウ等のロウ材を介してロウ付け接合される。さらに、基体１０と同様にして、枠体１１の表面に０．５〜９μmのＮｉ層や０．５〜５μmのＡｕ層等の金属層をメッキ法により被着させておくと良い。一方、枠体１１がセラミックスから成る場合、光半導体素子１３と外部電気回路との電気的接続を行う手段として、枠体１１の内面の一部および外面の一部に、ボンディングワイヤやリード端子等を接続するための０．５〜９μmのＮｉ層や０．５〜５μmのＡｕ層等の金属層をメッキ法により被着させておくと良い。
【００４８】
また、枠体１１の貫通孔２１の枠体１１外側開口の周囲に、内部で光信号が伝送されるように筒状に形成され、Ｆｅ−Ｎｉ−Ｃｏ合金やＦｅ−Ｎｉ合金等の金属材料から成る光ファイバの固定部材１６が、銀ロウ等のロウ材を介して接合される。この固定部材１６は、基体１０や枠体１１と同様の加工法で所望の形状に加工製作されるとともに、その表面に０．５〜９μｍのＮｉ層や０．５〜５μｍのＡｕ層等の金属層をメッキ法により被着させておくと良い。
【００４９】
また、固定部材１６の内周面には、集光レンズとして機能するとともに光半導体パッケージ９の内部を塞ぐ機能を有する非晶質ガラス等からなる透光性部材１５が、その接合部の表面に形成されたメタライズ層を介して、２００〜４００℃の融点を有するＡｕ−Ｓｎ合金等の低融点のロウ材で接合される。
【００５０】
この透光性部材１５は、熱膨張係数が４×１０^-6〜１２×１０^-6／℃（室温〜４００℃）のサファイア（単結晶アルミナ）や非晶質ガラス等からなり、球状、半球状、凸レンズ状、ロッドレンズ状等とされ、外部のレーザ光等の光を光ファイバ１４を伝わって光半導体素子１３に入力させる、または光半導体素子１３で出力したレーザ光等の光を光ファイバ１４に入力させるための集光用部材として用いられる。透光性部材１５が、例えば結晶軸の存在しない非晶質ガラスの場合、酸化珪素（ＳｉＯ₂）、酸化鉛（ＰｂＯ）を主成分とする鉛系、または硼酸系やケイ砂を主成分とする硼珪酸系のものを用いる。
【００５１】
また、透光性部材１５は、その熱膨張係数が枠体１１のそれと異なっていても、固定部材１６が熱膨張差による応力を吸収緩和するので、結晶軸が応力のためにある方向に揃うことによって光の屈折率の変化を起こすようなことは発生し難い。従って、このような透光性部材１５を用いることによって、光半導体素子１３と光ファイバ１４との間の光の結合効率を高くできる。
【００５２】
また、蓋体１７は、枠体１１の上面にシーム溶接等によって接合され、光半導体素子１３を光半導体パッケージ９内に封止する。
【００５３】
このように、本発明の光半導体パッケージ９は、金属材料またはセラミックスからなる基体１０と、その上側主面に光半導体素子１３の載置部１０ａを囲むように接合され、取付部１２を有し金属材料またはセラミックスからなる枠体１１と、精密なインピーダンス制御が可能な入出力端子１とを具備する。
【００５４】
本発明の光半導体パッケージ９は、ＬＤ，ＰＤ等の光半導体素子１３およびＬＳＩ等の半導体素子１３'を収納した光通信用の場合、枠体１１の側部に内外を貫通する貫通孔２１を形成し、貫通孔２１の枠体１１外側開口の周囲に金属材料からなる筒状の固定部材１６を接合し、固定部材１６の内側に光半導体素子１３と光ファイバ１４との間で光を集光させ結合させる透光性部材１５が接合される。そして、光半導体素子１３と半導体素子１３'とをボンディングワイヤによって接続し、半導体素子１３'と入出力端子１の線路導体２の一端とをボンディングワイヤによって接続した後、枠体１１の上面に蓋体１７をシーム溶接等によって接合する。しかる後、固定部材１６の外側端面に、光ファイバ１４と戻り光防止用のアイソレータ１８とが樹脂接着剤で接着された金属ホルダ１９を、ＹＡＧレーザ溶接等で接合することによって、製品としての光半導体装置となる。
【００５５】
かくして、本発明の入出力端子は、薄型化および小型化され、精密なインピーダンス制御が可能であるとともに、光半導体素子及び半導体素子と外部電気回路との間で数十ＧＨｚ以上の高周波信号の入出力を正確かつ円滑、低損失に行うことができる。
【００５６】
なお、本発明は上記実施の形態に限定されず、本発明の要旨を逸脱しない範囲内において種々の変更を行うことは何等支障ない。
【００５７】
【発明の効果】
本発明は、平板部とその上に接合された立壁部とを具備した入出力端子において、立壁部の上面と平板部の下面に接地導体が形成されており、平板部の線路導体が露出している部位に、同一面接地導体と平板部の下面の接地導体とを電気的に接続するとともに線路導体の線路方向に略平行な方向に並ぶように線路導体で伝送される高周波信号の波長の４分の１以下の間隔で複数の第一の貫通導体が設けられ、平板部の立壁部が接合された部位に、同一面接地導体を貫通して立壁部の上面の接地導体と平板部の下面の接地導体とを電気的に接続するとともに線路方向に略平行な方向に並ぶように高周波信号の波長の４分の１以下の間隔で複数の第二の貫通導体が設けられており、第二の貫通導体は立壁部の線路方向に略垂直な隣接する側面との間隔が高周波信号の波長の８分の１以下である。また、本発明は、立壁部の上面に接地導体が、平板部の内部に内層接地導体が形成されており、平板部の線路導体が露出している部位に、同一面接地導体と内層接地導体とを電気的に接続するとともに線路導体の線路方向に略平行な方向に並ぶように線路導体で伝送される高周波信号の波長の４分の１以下の間隔で複数の第一の貫通導体が設けられ、平板部の立壁部が接合された部位に、同一面接地導体を貫通して立壁部の上面の接地導体と内層接地導体とを電気的に接続するとともに線路方向に略平行な方向に並ぶように高周波信号の波長の４分の１以下の間隔で複数の第二の貫通導体が設けられており、第二の貫通導体は立壁部の線路方向に略垂直な隣接する側面との間隔が高周波信号の波長の８分の１以下である。
【００５８】
本発明は、第一の貫通導体および第二の貫通導体の間隔を高周波信号の波長の４分の１以下とすることにより、貫通導体の導体抵抗およびインダクタンス成分に起因する接地電位の不安定が解消される。これにより、数十ＧＨｚ以上という高い周波数帯域においても、接地電位が安定化する。また、第二の貫通導体は立壁部の線路方向に略垂直な隣接する側面との間隔が高周波信号の波長の８分の１以下であることから、立壁部における電磁波の共振および放射現象が抑制され、線路導体を通る高周波信号の反射損失を極めて小さくすることができる。
【００５９】
その結果、数十ＧＨｚ帯域以上の高周波信号の入出力を伝送損失を小さくして、正確かつ円滑に行うことができるとともに、入出力端子の薄型化および小型化が可能となる。
【００６０】
また、ボンディングワイヤ等のインダクタンス（Ｌ）成分が発生しても、一対の線路導体で入出力される伝搬モードによりＬ成分の影響が緩和でき、かつ特性インピーダンスも整合がとれることから、線路導体での数十ＧＨｚ以上の高周波信号のさらに良好な伝送特性が実現できる。
【００６１】
本発明の半導体パッケージは、上側主面に半導体素子が載置される載置部を有する基体と、基体の上側主面に載置部を囲繞するように取着され、側部に貫通孔または切欠き部から成る入出力端子の取付部が形成された枠体と、取付部に嵌着された本発明の入出力端子とを具備したことにより、半導体パッケージの薄型化および小型化を実現でき、半導体素子と外部電気回路との間で数十ＧＨｚ以上の高周波信号の入出力を伝送損失を小さくして伝達可能なものとすることができる。
【図面の簡単な説明】
【図１】本発明の入出力端子について実施の形態の一例を示す斜視図である。
【図２】本発明の入出力端子について実施の形態の他の例を示す斜視図である。
【図３】本発明の半導体パッケージについて実施の形態の一例を示す断面図である。
【図４】従来の光半導体パッケージの断面図である。
【図５】従来の入出力端子の斜視図である。
【符号の説明】
１：入出力端子
２：線路導体
３：同一面接地導体
３ａ，３ｂ，３ｃ，３ｄ：接地導体
３ｅ：内層接地導体
４：平板部
５：立壁部
６ａ：第一の貫通導体
６ｂ：第二の貫通導体
７：平板部の下面
８：貫通導体同士の間隔
８ａ：第二の貫通導体と立壁部側面との間隔
９：半導体パッケージ
１０：基体
１０ａ：載置部
１１：枠体
１２：取付部
１３：光半導体素子
１３'：半導体素子[0001]
[Technical field to which the invention pertains]
The present invention relates to an input/output terminal used in the input/output portion of a semiconductor element housing package for housing optical semiconductor elements such as semiconductor lasers (LD) and photodiodes (PD) that operate in a high frequency band of several tens of GHz or more, and semiconductor elements such as ICs and LSIs, and to a semiconductor element housing package using this input/output terminal.
[0002]
2. Description of the Related Art
FIG. 4 shows an optical semiconductor package used in the field of optical communications, for example, as an example of a package for housing semiconductor elements (hereinafter referred to as a semiconductor package) for housing optical semiconductor elements such as LDs, PDs, and other semiconductor elements such as ICs and LSIs that operate on high frequency signals and are used in fields such as conventional optical communications, microwave communications, and millimeter wave communications.
[0003]
As shown in the figure, the optical semiconductor package 109 generally has a base 110 made of a metal material such as an iron (Fe)-nickel (Ni)-cobalt (Co) alloy or a copper (Cu)-tungsten (W) alloy. The optical semiconductor package 109 is mainly composed of the base 110 having a mounting portion 110a on the upper main surface of which an optical semiconductor element 113 such as an LD or PD is mounted and fixed, and a frame 111 made of a metal material such as an Fe-Ni-Co alloy or an Fe-Ni alloy and joined to the upper main surface of the base 110 so as to surround the mounting portion 110a. A coaxial connector (also called a glass bead terminal) 101, which is an insulating terminal that electrically connects the optical semiconductor element 113 to an external electric circuit (not shown), is fitted and joined to a through hole 112 provided on the side of the frame 111.
[0004]
Further, the frame 111 has a through hole 121 formed on the other side thereof as an optical transmission path for optically coupling with the optical semiconductor element 113. A cylindrical optical fiber fixing member 116 made of a metal material having a thermal expansion coefficient similar to that of the frame 111 is joined to the periphery of the opening of the through hole 121 on the outer side of the frame 111 with a brazing material such as silver brazing. A metal holder 119 is fixed to the fixing member 116, to which an optical isolator 118 for preventing return light and the optical fiber 114 are bonded with a resin adhesive. A light-transmitting member 115 made of amorphous glass or the like and having the function of functioning as a condenser lens and airtightly sealing the inside of the optical semiconductor package 109 is fixed inside the fixing member 116.
[0005]
The fixing member 116 and the metal holder 119 are fixed to each other at their end faces by laser welding or the like. Meanwhile, the fixing member 116 and the light-transmitting member 115 are fixed to each other by brazing with a low-melting point brazing material such as a gold (Au)-tin (Sn) alloy having a melting point of 200 to 400° C.
[0006]
Further, an electronic cooling element 120 such as a Peltier element is disposed on the underside of the optical semiconductor element 113, and cools the optical semiconductor element 113 during operation. Furthermore, a semiconductor element 113' such as an LSI for driving the optical semiconductor element 113 or amplifying a signal is provided on the mounting portion 110a. An electronic cooling element 120 or a heat sink may also be disposed on the underside of the semiconductor element 113'. Then, electrodes of the optical semiconductor element 113 are electrically connected to external lead terminals (not shown) via bonding wires (not shown).
[0007]
The coaxial connector 101 is made of a cylindrical outer conductor 101a made of a metal material, an insulator 101b, and a central conductor 101c. The insulator 101b is formed by filling the inside of the outer conductor 101a with borosilicate glass or the like. The central conductor 101c is attached to the central axis of the outer conductor 101a via the insulator 101b, and has a function of electrically connecting the inside and outside of the optical semiconductor package 109. The outer conductor 101a is fixed to the inner surface of a through hole 112 provided inside the frame 111 by brazing with a low melting point brazing material such as an Au-Sn alloy. The coaxial connector 101 has a function of electrically connecting an external electric circuit and an optical semiconductor element 113, and also has a function of airtightly sealing the inside of the optical semiconductor package 109.
[0008]
Then, the optical semiconductor element 113 is bonded and fixed to the mounting portion 110a of the base 110 via the electronic cooling element 120 using an adhesive such as a resin adhesive or a brazing material. Next, the electrode of the semiconductor element 113' is electrically connected to the central conductor 101c of the coaxial connector 101 via a bonding wire. Thereafter, the metal holder 119 to which the optical isolator 118 and the optical fiber 114 are fixed is welded to the fixing member 116. Next, the lid 117 is joined to the upper surface of the frame 111 by seam welding, brazing, or the like, and the optical semiconductor element 113 and the semiconductor element 113' are airtightly housed inside the container consisting of the base 110, the frame 111, and the lid 117, thereby forming an optical semiconductor device as a product.
[0009]
Such an optical semiconductor device functions as a photoelectric conversion device that can transmit large amounts of information at high speed, for example, by optically exciting an optical semiconductor element 113 with a driving high-frequency signal supplied from an external electric circuit, and transmitting light such as optically excited laser light through an optical fiber 114 via a light-transmitting member 115, and thereby is widely used in fields such as optical communications.
[0010]
However, in the above-mentioned conventional optical semiconductor package, the maximum height of the frame 111 of the coaxial connector 101 from the bottom surface of the base 110 is governed by the outer diameter of the peripheral conductor 101a and the outer diameter of the insulator 101b. The outer diameter of the insulator 101b is set to have a sufficient volume and thickness to ensure sufficient insulation between the peripheral conductor 101a and the frame 111 and the central conductor 101c of the coaxial connector 101. Therefore, the position of the central conductor 101c, which makes an electrical connection, becomes extremely high from the bottom surface of the base 110.
[0011]
Therefore, the through hole 112 for fitting and joining the coaxial connector 101 becomes large, and the height of the frame 111 itself also becomes large. As a result, there is a problem that it becomes extremely difficult to reduce the height of the optical semiconductor package 109, that is, to make it compact.
[0012]
In order to solve these problems, an input/output terminal 101' made of ceramics as shown in Fig. 5 is used instead of the coaxial connector 101. This input/output terminal 101' comprises a flat plate portion 104 and a vertical wall portion 105 disposed on the upper surface thereof. A line conductor 102 is disposed on the upper surface of the flat plate portion 104 as a transmission line (input line and/or output line) for a high-frequency signal. Furthermore, a ground conductor 103 having the same surface is formed on both sides of the line conductor 102 at a predetermined interval. The flat plate portion 104 and the vertical wall portion 105 are made of alumina ceramics or the like and have sufficient insulation properties, so that there is no need to increase their thickness and they can be made compact.
[0013]
[Problem to be solved by the invention]
However, the demand for high-speed transmission of photoelectric conversion devices used in the field of optical communication using the Internet and the like has been increasing recently, and high speed in the band of several tens of GHz is desired. Even in the optical semiconductor package using the above-mentioned conventional input/output terminal 101', the transmission characteristics of the high-frequency signal are hardly a problem when the frequency of the high-frequency signal is not so high. However, as the frequency increases to several tens of GHz or more, the depth (length in the line direction) of the side of the standing wall portion 105 causes resonance of the high-frequency signal (electromagnetic wave), and the radiation phenomenon of the electromagnetic wave occurs, causing discontinuity in the characteristic impedance of the input/output terminal 101'. In order to avoid this, the width and depth (width between the side surfaces parallel to the line direction and length in the line direction) of the standing wall portion 105, which is an insulator, must be extremely small. For example, if the standing wall portion 105 is made of alumina ceramics, the depth (length in the line direction) of the standing wall portion 105 needs to be about 1 mm when a high-frequency signal of 20 GHz is used, and about 0.5 mm when a high-frequency signal of 30 GHz is used.
[0014]
This requires fine wiring and limits the freedom of design. Furthermore, the positional accuracy of the joint between the flat plate portion 104 and the vertical wall portion 105 and the positional accuracy of the joint between the input/output terminal 101' and the frame body 111 vary, making the characteristic impedance of the line conductor 102 of the input/output terminal 101' unstable. This increases the reflection of the incident signal at the line conductor 102. As a result, there is a problem in that the transmission characteristics of high-frequency signals at 20 GHz or higher deteriorate.
[0015]
Furthermore, since the width between the side surfaces of the input/output terminal 101' parallel to the line direction becomes narrower and its strength deteriorates, when the input/output terminal 101' is brazed to the mounting portion of the frame body 111, a problem occurs in that cracks or the like are generated in the input/output terminal 101' due to the difference in thermal expansion between the input/output terminal 101' and the frame body 111, compromising the airtightness of the optical semiconductor package 109.
[0016]
Therefore, the present invention has been completed in consideration of the above problems, and its object is to provide an input/output terminal that can be made thinner and smaller, and that can reduce transmission loss and transmit high-frequency signals of 20 GHz or more efficiently while ensuring the necessary strength when inputting/outputting high-frequency signals between semiconductor elements and optical semiconductor elements and external electric circuits, and a semiconductor package that uses this input/output terminal.
[0017]
[Means for solving the problem]
The input/output terminal of the present invention comprises a flat plate portion made of a substantially rectangular dielectric plate, two line conductors formed as input lines and/or output lines extending from one side of an upper surface of the flat plate portion to the opposing other side thereof, which are differential lines, a ground conductor with the same surface area formed at equal intervals on both sides of the two line conductors on the upper surface of the flat plate portion, and a vertical wall portion made of a dielectric joined to the upper surface of the flat plate portion with the line conductors and the ground conductor with the same surface area sandwiched therebetween, wherein a ground conductor is formed on the upper surface of the vertical wall portion and on a side surface of the line conductor that is substantially parallel to the line direction, such that the entire side surface of the line conductor that is substantially perpendicular to the line direction is left as a blank space, and a ground conductor is formed on the lower surface of the flat plate portion and on the side surface of the line conductor that is substantially parallel to the line direction, a plurality of first through conductors are provided at a portion where the vertical wall portion of the flat plate portion is joined, the plurality of second through conductors are provided at a portion where the vertical wall portion of the flat plate portion is joined, the plurality of second through conductors are provided at intervals of not more than one-fourth of the wavelength of the high frequency signal, the plurality of second through conductors penetrating the same surface ground conductor and electrically connecting the ground conductor on the upper surface of the vertical wall portion and the ground conductor on the lower surface of the flat plate portion, the plurality of second through conductors being provided at a portion where the vertical wall portion of the flat plate portion is joined, the plurality of second through conductors being provided at intervals of not more than one-fourth of the wavelength of the high frequency signal, the plurality of second through conductors being provided at
[0018]
The input/output terminal of the present invention comprises a flat plate portion made of a substantially rectangular dielectric plate, two line conductors formed as input lines and/or output lines from one side to the opposing other side of the upper surface of the flat plate portion and serving as differential lines, a ground conductor with the same surface area formed at equal intervals on both sides of the two line conductors on the upper surface of the flat plate portion, and a standing wall portion made of a dielectric joined to the upper surface of the flat plate portion with the line conductors and the ground conductor with the same surface area sandwiched therebetween, wherein a ground conductor is formed on the upper surface of the standing wall portion and on a side surface of the line conductor that is substantially parallel to the line direction, such that the entire side surface of the line conductor that is substantially perpendicular to the line direction is left blank, an inner layer ground conductor is formed inside the flat plate portion, and a ground conductor is formed on a side surface of the flat plate portion that is substantially parallel to the line direction of the line conductor, A plurality of first through conductors are provided at a portion of the flat plate portion where the line conductor is exposed, the first through conductors electrically connect the same surface area ground conductor and the inner-layer ground conductor, and are aligned in a direction approximately parallel to the line direction of the line conductor, at intervals of not more than one-fourth of the wavelength of the high-frequency signal transmitted by the line conductor; and a plurality of second through conductors are provided at a portion of the flat plate portion where the vertical wall portion is joined, the first through conductors pass through the same surface area ground conductor to electrically connect the ground conductor on the upper surface of the vertical wall portion and the inner-layer ground conductor, and are aligned in a direction approximately parallel to the line direction, the second through conductors being spaced at intervals of not more than one-fourth of the wavelength of the high-frequency signal.
[0019]
In the present invention, the interval (center distance) between the first and second through conductors is set to 1/4 or less of the wavelength of the high-frequency signal transmitted by the line conductor, thereby eliminating the instability of the ground potential caused by the conductor resistance and inductance components of the through conductors. This stabilizes the ground potential even in high frequency bands of several tens of GHz or more. In addition, the interval between the second through conductor and the adjacent side surface of the vertical wall portion that is approximately perpendicular to the line direction (the distance between the center and side surface of the second through conductor) is set to 1/8 or less of the wavelength of the high-frequency signal, thereby suppressing the resonance and radiation of electromagnetic waves in the vertical wall portion and extremely reducing the reflection loss of the high-frequency signal passing through the line conductor.
[0020]
As a result, high frequency signals in the band of several tens of GHz or more can be input and output accurately and smoothly with reduced transmission loss, and the input and output terminals can be made thinner and more compact.
[0021]
Furthermore, even if an inductance (L) component such as a bonding wire occurs, the influence of the L component can be mitigated by the propagation mode input and output by a pair of line conductors, and the characteristic impedance can also be matched, thereby achieving even better transmission characteristics for high-frequency signals of tens of GHz or more in the line conductors.
[0022]
The semiconductor package of the present invention is characterized by comprising a base having a mounting portion on an upper main surface of which a semiconductor element is placed, a frame body attached to the upper main surface of the base so as to surround the mounting portion and having an attachment portion for an input/output terminal formed on the side thereof, the attachment portion consisting of a through hole or a notch, and the input/output terminal of the present invention fitted into the attachment portion.
[0023]
With the above-described configuration, the present invention can realize a thinner and smaller semiconductor package, and can transmit input and output of high-frequency signals of tens of GHz or more between a semiconductor element and an external electric circuit with reduced transmission loss.
[0024]
[0023]
The input/output terminal and semiconductor package of the present invention will be described in detail below. Fig. 1 is a perspective view showing an example of an embodiment of the input/output terminal of the present invention. In Fig. 1, reference numeral 1 denotes an input/output terminal having a flat plate portion 4 having a line conductor 2 and a ground conductor layer 3 with the same surface, a vertical wall portion 5, and a through conductor 6, and is, for example, an input/output terminal used in an optical semiconductor package.
[0025]
The flat plate portion 4 of the input/output terminal 1 of the present invention is made of a substantially rectangular dielectric material such as alumina ( _Al2O3 ) ceramics, _aluminum nitride (AlN) ceramics, glass ceramics, etc. The flat plate portion 4 has two line conductors 2 formed as differential lines as input and/or output lines extending from one side to the other side in the substantially central portion of the upper surface, and a ground conductor 3 having the same surface and formed at equal intervals on both sides. That is, the two line conductors 2 may be configured such that one is an input line and the other is an output line, that both are input lines, or that both are output lines. A ground conductor 3a is formed on the side surface of the flat plate portion 4, and a ground conductor 3b is formed on the lower surface.
[0026]
An upright wall 5 is provided on the upper surface of the flat plate portion 4, and is joined to the line conductor 2 with a flush ground conductor ₃ sandwiched therebetween. The upright wall 5 has a ground conductor 3c formed on its upper surface and a ground conductor 3d formed on its side so as to extend the ground conductor 3a, and is made of a dielectric material such as _Al2O3 ceramics, AlN ceramics, glass ceramics, etc.
[0027]
As shown in FIG. 1 , in the input/output terminal 1 of the present invention, a plurality of first penetrating conductors 6a are provided at a portion where the line conductor 2 of the flat portion 4 is exposed, the first penetrating conductors 6a electrically connect the ground conductor 3 having the same surface area to the ground conductor 3b on the underside of the flat portion 4, and are arranged in a direction approximately parallel to the line direction of the line conductor 2, at intervals 8 of not more than one-quarter of the wavelength of the high-frequency signal transmitted by the line conductor 2; and a plurality of second penetrating conductors 6b are provided at a portion where the vertical wall portion 5 of the flat portion 4 is joined, the second penetrating conductors 6b are provided at intervals 8 of not more than one-quarter of the wavelength of the high-frequency signal, penetrating the ground conductor 3 having the same surface area to electrically connect the ground conductor 3c on the upper surface of the vertical wall portion 5 to the ground conductor 3b on the underside of the flat portion 4, and are arranged in a direction approximately parallel to the line direction, the distance 8a between the second penetrating conductors 6b and an adjacent side surface of the vertical wall portion 5 that is approximately perpendicular to the line direction is not more than one-eighth of the wavelength of the high-frequency signal.
[0028]
As shown in FIG. 2 , in the input/output terminal 1 of the present invention, a plurality of first through conductors 6a are provided at a portion of the flat portion 4 where the line conductor 2 is exposed, the first through conductors 6a electrically connect the same surface ground conductor 3 and the inner-layer ground conductor 3e, and are aligned in a direction approximately parallel to the line direction of the line conductor 2, at intervals 8 of not more than one-fourth of the wavelength of the high-frequency signal transmitted by the line conductor 2; and a plurality of second through conductors 6b are provided at a portion of the flat portion 4 where the vertical wall portion 5 is joined, the second through conductors 6b are provided at intervals 8 of not more than one-fourth of the wavelength of the high-frequency signal, the second through conductors 6b pass through the same surface ground conductor 3 and electrically connect the ground conductor 3c on the upper surface of the vertical wall portion 5 and the inner-layer ground conductor 3e, and are aligned in a direction approximately parallel to the line direction, the distance 8a between the second through conductors 6b and an adjacent side surface of the vertical wall portion 5 that is approximately perpendicular to the line direction is not more than one-eighth of the wavelength of the high-frequency signal.
[0029]
The spacing (center distance) 8 between these through conductors 6a, 6b must be equal to or less than one-quarter of the wavelength of the high-frequency signal transmitted by the line conductor 2. That is, by making the spacing 8 between the through conductors 6 equal to or less than one-quarter of the wavelength of the high-frequency signal, instability of the ground potential caused by the conduction resistance and inductance components of the through conductors 6, which is a problem in high-frequency bands of several tens of GHz or more, is eliminated. As a result, impedance matching is achieved between the optical semiconductor element 13 (FIG. 3) and the input/output terminal 1, and input/output of high-frequency signals of several tens of GHz or more between the optical semiconductor element 13 and an external electric circuit is smoothly performed, thereby improving the operability of the optical semiconductor element 13.
[0030]
If the distance 8 between the through conductors 6a, 6b exceeds one-fourth the wavelength of the high-frequency signal, the electromagnetic shielding properties (electromagnetic shielding properties) from the outside are easily impaired, making it difficult to perform impedance matching between each of the two line conductors 2 in the high-frequency band of 5 GHz or more, particularly in the high-frequency band of several tens of GHz or more.
[0031]
In addition, the second through conductor 6b of the through conductor 6 has a distance 8a between the adjacent side surface of the vertical wall portion 5 that is approximately perpendicular to the line direction and is equal to or less than one eighth of the wavelength of the high frequency signal. That is, the input/output terminal 1 has a coplanar line structure with a ground on the bottom surface and a strip line structure with a ground on both sides, and the coplanar line with a ground on the bottom surface generates an electric field between the line conductor 2 and the ground conductor 3 with the same surface and the ground conductor 3b, allowing the high frequency signal to be transmitted efficiently. In addition, the strip line with a ground on both sides generates an electric field between the line conductor 2 and the ground conductor 3 with the same surface and the ground conductor 3b and the ground conductor 3c, allowing the high frequency signal to be transmitted efficiently. Therefore, a difference in electric field distribution occurs on the side surface of the vertical wall portion 5 that is approximately perpendicular to the line direction. This difference in electric field distribution, i.e., a difference in transmission mode, causes a disturbance in the high frequency signal and increases the reflection loss. Therefore, by setting the distance 8a between the second through conductor 6b and the adjacent side surface of the standing wall portion 5 that is substantially perpendicular to the line direction to 1/8 or less of the wavelength of the high frequency signal, it is possible to reduce the disturbance of the transmission mode and transmit the high frequency signal smoothly. In other words, it is possible to suppress the resonance and radiation phenomenon of the high frequency signal, and the characteristic impedance of the optical semiconductor element and the input/output terminal 1 can be matched.
[0032]
As a result, high frequency signals of several tens of GHz or more can be smoothly input and output between the optical semiconductor element and an external electric circuit, improving the operability of the optical semiconductor element.
[0033]
2 of the present invention, an inner-layer ground conductor 3e is formed inside the flat plate portion 4, which has the following advantages: In high-frequency bands of several tens of GHz or more, the flat plate portion 4 must be made thin, and a single plate would be insufficient in strength, but by forming the inner-layer ground conductor 3e, the thickness of the flat plate portion 4 can be ensured and the strength can be increased. In addition, by forming the inner-layer ground conductor 3e, it is possible to effectively suppress resonance of electromagnetic waves, and electromagnetic wave radiation phenomenon hardly occurs.
[0034]
As shown in FIG. 1, the input/output terminal 1 of the present invention has two line conductors 2 serving as differential lines formed at a predetermined distance, and a common-surface ground conductor 3 formed along both sides of the line conductors with a distance W therebetween, and is composed of a flat plate portion 4 of a substantially rectangular dielectric plate of thickness t formed so as to penetrate the inside and outside of a frame body 11 (FIG. 3), and a standing wall portion 5 joined to the upper surface of the flat plate portion 4 with the line conductors 2 and the common-surface ground conductor 3 sandwiched therebetween, and formed so as to isolate the inside and outside of the frame body 11 that constitutes a semiconductor package.
[0035]
The flat plate portion 4 and the vertical wall portion 5 are made of insulating materials such as _Al2O3 ceramics, _ALN ceramics, glass ceramics, etc. The line conductor 2 is made of W, Mo, Mn, etc., and is formed into the flat plate portion 4 and the vertical wall portion 5 by printing and applying a metal paste obtained by mixing, for example, powder of W or the like with an organic solvent or solvent onto a ceramic green sheet for the flat plate portion 4 and the vertical wall portion 5 in a predetermined pattern by a conventionally known screen printing method.
[0036]
The through conductors 6 are made of W, Mo, Mn or the like, and are formed in the flat portion 4 and the vertical wall portion 5, for example, by forming through holes in the ceramic green sheets for the flat portion 4 and the vertical wall portion 5 by subjecting them to a predetermined punching process, and then filling the through holes with a metal paste obtained by adding and mixing powder of W or the like with an organic solvent or solvent by a screen printing method.
[0037]
The frequency of the high frequency signal applicable to the present invention is a high frequency band or ultra-high frequency band of about 1 MHz to several hundreds of GHz for LSI, LD, etc., preferably a band of about 5 to 100 GHz for driving optical semiconductor elements, and more preferably a band of about 20 to 60 GHz.
[0038]
In addition, in the input/output terminal 1 of the present invention, it is also possible to reduce noise in the high frequency signal by inputting one high frequency signal in in-phase mode and one in out-of-phase mode to each of the two line conductors 2. It is advisable to deposit a metal layer such as a 0.5 to 9 μm Ni layer or a 0.5 to 5 μm Au layer by plating on the surface of the line conductor 2 to prevent oxidation and to firmly connect bonding wires, lead terminals, etc.
[0039]
Next, the semiconductor package of the present invention will be described with reference to Fig. 3. This figure is a cross-sectional view showing an example of an embodiment of the semiconductor package of the present invention. In this figure, reference numeral 9 denotes a semiconductor package mainly composed of a base body 10, a frame body 11, an input/output terminal 1 for inputting and outputting high-frequency signals fitted into an attachment portion 12 of the frame body 11, and an optical semiconductor element 13 such as an LD or PD mounted on a mounting portion 10a on the upper main surface of the base body 10. The base body 10, the frame body 11, the input/output terminal 1, a cylindrical optical fiber fixing member 16 for installing and fixing an optical fiber 14 and a light-transmitting member 15 therein, and a lid body 17 constitute a container for accommodating the optical semiconductor element 13 therein.
[0040]
A metal holder 19, to which the optical fiber 14 and an optical isolator 18 for preventing return light are bonded with a resin adhesive, is joined to the outer end face of the fixing member 16 by YAG laser welding or the like. Furthermore, an electronic cooling element 20 such as a Peltier element is disposed on the lower surface of the optical semiconductor element 13 to cool it during operation.
[0041]
Furthermore, a semiconductor element 13' such as an LSI for driving the optical semiconductor element 13 or amplifying a signal is provided on the mounting portion 10a, and a heat sink made of an electronic cooling element 20 or a Cu-W alloy may be provided on the underside of the semiconductor element 13'. The optical semiconductor element 13 and the semiconductor element 13' are connected via bonding wires, an internal wiring pattern (not shown), etc., and the semiconductor element 13' is connected to the input/output terminals 1 by bonding wires. Each electrode of the optical semiconductor element 13 is electrically connected via a bonding wire to an external lead terminal provided on the outside of the frame 11 of the input/output terminals 1.
[0042]
The base 10 functions as a support member for supporting the optical semiconductor element 13 and as a heat sink for dissipating heat generated by the optical semiconductor element 13, and has a mounting portion 10a for mounting the optical semiconductor element 13 at approximately the center of its upper main surface. The optical semiconductor element 13 is bonded and fixed to the mounting portion 10a via an adhesive such as lead (Pb)-tin (Sn) solder, and the heat generated by the optical semiconductor element 13 is transferred to the mounting portion 10a via this adhesive and is efficiently dissipated to the outside, improving the operability of the optical semiconductor element 13.
[0043]
The substrate 10 is made of a metal material such as an Fe-Ni-Co alloy or a Cu-W alloy, or a ceramic such as _Al2O3 or _ALN . When made of a metal material, the ingot is processed into a desired shape by a conventional metal processing method such as rolling or punching. On the other hand, when made of ceramics, the raw material powder is mixed with an appropriate organic binder, solvent, etc. to form a paste, and this paste is formed into a ceramic green sheet by a doctor blade method or a calendar roll method. The ceramic green sheet is then subjected to an appropriate punching process, and multiple sheets are stacked and sintered at a high temperature of 1600°C to produce the substrate.
[0044]
In addition, when base 10 is made of a metallic material, it is preferable to sequentially plate its surface with a metal that has excellent corrosion resistance and excellent wettability with the brazing material, specifically, a Ni layer having a thickness of 0.5 to 9 μm and a Au layer having a thickness of 0.5 to 5 μm. This effectively prevents base 10 from being corroded by oxidation and enables optical semiconductor element 13 to be firmly adhered and fixed to the upper main surface of base 10.
[0045]
On the other hand, when the base 10 is made of ceramics, it is preferable to plate the mounting portion 10a on which the optical semiconductor element 13 is placed with a metal that has excellent corrosion resistance and excellent wettability with the brazing material, specifically, a Ni layer having a thickness of 0.5 to 9 μm and a Au layer having a thickness of 0.5 to 5 μm, in that order, so that the optical semiconductor element 13 can be firmly adhered and fixed to the upper main surface of the base 10.
[0046]
Furthermore, a frame 11 having mounting sections 12 for input/output terminals 1 consisting of through holes or notches formed therein is joined to the upper main surface of base 10 so as to surround mounting section 10a on which optical semiconductor element 13 is placed, and a space for accommodating optical semiconductor element 13 is formed inside frame 11. Like base 10, frame 11 is made of a metal material or ceramics, and is fabricated by the same processing method as base 10 into a shape having mounting section 12 on one side and through hole 21 for transmitting light on the other side.
[0047]
When the frame 11 is made of a metal material such as an Fe-Ni-Co alloy or an Fe-Ni alloy, for example, an ingot of this alloy is subjected to metal processing such as rolling or pressing to produce a predetermined shape. The frame 11 is joined to the base 10 by brazing the upper main surface of the base 10 and the lower surface of the frame 11 via a brazing material such as silver brazing that is a preform having an appropriate volume and is laid on the upper main surface of the base 10. Furthermore, similar to the base 10, it is preferable to coat the surface of the frame 11 with a metal layer such as a 0.5 to 9 μm Ni layer or a 0.5 to 5 μm Au layer by plating. On the other hand, when the frame body 11 is made of ceramics, as a means for electrically connecting the optical semiconductor element 13 to an external electric circuit, it is preferable to deposit a metal layer such as a 0.5 to 9 μm Ni layer or a 0.5 to 5 μm Au layer by plating on part of the inner surface and part of the outer surface of the frame body 11 for connecting bonding wires, lead terminals, etc.
[0048]
Additionally, an optical fiber fixing member 16 made of a metal material such as an Fe-Ni-Co alloy or an Fe-Ni alloy, which is formed in a cylindrical shape so that an optical signal can be transmitted inside, is joined to the periphery of the outer opening of the through hole 21 of the frame 11 via a brazing material such as silver brazing. This fixing member 16 is processed and manufactured into a desired shape by the same processing method as the base body 10 and the frame 11, and it is preferable to coat the surface of the fixing member 16 with a metal layer such as a 0.5 to 9 μm Ni layer or a 0.5 to 5 μm Au layer by plating.
[0049]
In addition, a light-transmitting member 15 made of amorphous glass or the like, which functions as a focusing lens and also has the function of sealing the inside of the optical semiconductor package 9, is joined to the inner surface of the fixing member 16 via a metallized layer formed on the surface of the joint, using a low-melting point solder material such as an Au-Sn alloy having a melting point of 200 to 400°C.
[0050]
This light-transmitting member 15 is made of sapphire (single crystal alumina) or amorphous glass with a thermal expansion coefficient of 4× ^10-6 to 12× ^10-6 /°C (room temperature to 400°C) and is in the shape of a sphere, hemisphere, convex lens, rod lens, or the like, and is used as a light-collecting member for inputting light such as external laser light to the optical semiconductor element 13 through the optical fiber 14, or for inputting light such as laser light output by the optical semiconductor element 13 to the optical fiber 14. When the light-transmitting member 15 is made of amorphous glass having no crystal axis, for example, a lead-based material mainly composed of silicon oxide ( _SiO2 ) or lead oxide (PbO), or a boric acid-based material mainly composed of silica sand is used.
[0051]
Furthermore, even if the thermal expansion coefficient of the light-transmitting member 15 is different from that of the frame 11, the fixing member 16 absorbs and relieves the stress caused by the difference in thermal expansion, so that the crystal axes are unlikely to be aligned in a certain direction due to stress, causing a change in the refractive index of light. Therefore, by using such a light-transmitting member 15, the optical coupling efficiency between the optical semiconductor element 13 and the optical fiber 14 can be increased.
[0052]
Furthermore, the lid 17 is joined to the upper surface of the frame 11 by seam welding or the like, and seals the optical semiconductor element 13 within the optical semiconductor package 9 .
[0053]
In this manner, the optical semiconductor package 9 of the present invention comprises a base 10 made of a metal material or ceramics, a frame 11 made of a metal material or ceramics and bonded to its upper main surface so as to surround the mounting portion 10a of the optical semiconductor element 13, the frame 11 having an attachment portion 12, and input/output terminals 1 capable of precise impedance control.
[0054]
In the case of the optical semiconductor package 9 of the present invention for optical communication, which houses an optical semiconductor element 13 such as an LD or PD and a semiconductor element 13' such as an LSI, a through hole 21 penetrating from inside to outside is formed in the side of the frame body 11, a cylindrical fixing member 16 made of a metal material is bonded around the outer opening of the frame body 11 of the through hole 21, and a light-transmitting member 15 for collecting and coupling light between the optical semiconductor element 13 and the optical fiber 14 is bonded to the inside of the fixing member 16. Then, the optical semiconductor element 13 and the semiconductor element 13' are connected by a bonding wire, and the semiconductor element 13' is connected to one end of the line conductor 2 of the input/output terminal 1 by a bonding wire, and then a cover 17 is bonded to the upper surface of the frame body 11 by seam welding or the like. Thereafter, a metal holder 19 to which the optical fiber 14 and an isolator 18 for preventing return light are bonded by a resin adhesive is bonded to the outer end face of the fixing member 16 by YAG laser welding or the like, thereby forming an optical semiconductor device as a product.
[0055]
Thus, the input/output terminal of the present invention is made thin and small, allows precise impedance control, and enables accurate, smooth, and low-loss input and output of high-frequency signals of tens of GHz or more between optical semiconductor elements and semiconductor elements and external electric circuits.
[0056]
The present invention is not limited to the above-described embodiment, and various modifications may be made without departing from the spirit and scope of the present invention.
[0057]
Effect of the Invention
The present invention relates to an input/output terminal having a flat plate portion and a vertical wall portion joined thereon, wherein ground conductors are formed on the upper surface of the vertical wall portion and the lower surface of the flat plate portion, and a plurality of first through conductors are provided at a portion where the line conductor of the flat plate portion is exposed, electrically connecting the ground conductor having the same surface area to the ground conductor on the lower surface of the flat plate portion, and aligned in a direction approximately parallel to the line direction of the line conductor, at intervals of not more than one-fourth of the wavelength of a high-frequency signal transmitted by the line conductor, and a plurality of second through conductors are provided at a portion where the vertical wall portion of the flat plate portion is joined, penetrating the ground conductor having the same surface area to electrically connect the ground conductor on the upper surface of the vertical wall portion to the ground conductor on the lower surface of the flat plate portion, and aligned in a direction approximately parallel to the line direction, at intervals of not more than one-fourth of the wavelength of the high-frequency signal, and In addition, the present invention provides a ground conductor on the top surface of the vertical wall portion and an inner-layer ground conductor formed inside the flat plate portion, and a plurality of first penetrating conductors are provided at a portion where the line conductor of the flat plate portion is exposed, electrically connecting the same surface ground conductor and the inner-layer ground conductor, and lining up in a direction approximately parallel to the line direction of the line conductor, at intervals of not more than one-fourth of the wavelength of the high-frequency signal transmitted by the line conductor, and a plurality of second penetrating conductors are provided at a portion where the vertical wall portion of the flat plate portion is joined, penetrating the same surface ground conductor and electrically connecting the ground conductor on the top surface of the vertical wall portion and the inner-layer ground conductor, and lining up in a direction approximately parallel to the line direction, at intervals of not more than one-fourth of the wavelength of the high-frequency signal, and a distance between the second penetrating conductors and adjacent side surfaces of the vertical wall portion that are approximately perpendicular to the line direction is not more than one-eighth of the wavelength of the high-frequency signal.
[0058]
In the present invention, the instability of the ground potential caused by the conductor resistance and inductance components of the penetrating conductors is eliminated by setting the interval between the first penetrating conductor and the second penetrating conductor to 1/4 or less of the wavelength of the high frequency signal. This stabilizes the ground potential even in a high frequency band of tens of GHz or more. In addition, since the interval between the second penetrating conductor and the adjacent side surface of the vertical wall portion that is substantially perpendicular to the line direction is 1/8 or less of the wavelength of the high frequency signal, the resonance and radiation phenomenon of the electromagnetic wave at the vertical wall portion is suppressed, and the reflection loss of the high frequency signal passing through the line conductor can be extremely reduced.
[0059]
As a result, high frequency signals in the band of several tens of GHz or more can be input and output accurately and smoothly with reduced transmission loss, and the input and output terminals can be made thinner and more compact.
[0060]
Furthermore, even if an inductance (L) component such as a bonding wire occurs, the influence of the L component can be mitigated by the propagation mode input and output by a pair of line conductors, and the characteristic impedance can also be matched, thereby achieving even better transmission characteristics for high-frequency signals of tens of GHz or more in the line conductors.
[0061]
The semiconductor package of the present invention comprises a base having a mounting portion on its upper main surface on which a semiconductor element is placed, a frame body attached to the upper main surface of the base so as to surround the mounting portion and having an input/output terminal mounting portion consisting of a through hole or cutout portion formed on the side, and the input/output terminal of the present invention fitted into the mounting portion.This makes it possible to achieve a thin and compact semiconductor package and enables input and output of high-frequency signals of tens of GHz or more to be transmitted between the semiconductor element and an external electrical circuit with minimal transmission loss.
[Brief description of the drawings]
FIG. 1 is a perspective view showing an example of an input/output terminal according to an embodiment of the present invention.
FIG. 2 is a perspective view showing another example of an input/output terminal according to the present invention;
FIG. 3 is a cross-sectional view showing an example of an embodiment of a semiconductor package of the present invention.
FIG. 4 is a cross-sectional view of a conventional optical semiconductor package.
FIG. 5 is a perspective view of a conventional input/output terminal.
[Explanation of symbols]
1: Input/output terminal 2: Line conductor 3: Same surface ground conductors 3a, 3b, 3c, 3d: Ground conductor 3e: Inner layer ground conductor 4: Flat plate portion 5: Standing wall portion 6a: First through conductor 6b: Second through conductor 7: Lower surface of flat plate portion 8: Distance between through conductors 8a: Distance between second through conductor and side surface of standing wall portion 9: Semiconductor package 10: Base body 10a: Mounting portion 11: Frame body 12: Mounting portion 13: Optical semiconductor element 13': Semiconductor element

Claims

An input/output terminal comprising a flat plate portion made of a substantially rectangular dielectric plate, two line conductors formed as input and/or output lines from one side of an upper surface of the flat plate portion to the other opposing side thereof, which are differential lines, a ground conductor having the same surface area formed at equal intervals on both sides of the two line conductors on the upper surface of the flat plate portion, and a vertical wall portion made of a dielectric joined to the upper surface of the flat plate portion with the line conductors and the ground conductor having the same surface area sandwiched therebetween, wherein a ground conductor is formed on the upper surface of the vertical wall portion and on a side surface of the line conductor that is substantially parallel to the line direction, such that the entire side surface of the line conductor that is substantially perpendicular to the line direction is left as a blank space, and a ground conductor is formed on the lower surface of the flat plate portion and on a side surface of the line conductor that is substantially parallel to the line direction , and the line conductor of the flat plate portion is exposed, and a plurality of first through conductors are provided at a portion where the vertical wall portion of the flat plate is joined, the first through conductors electrically connect the ground conductor on the upper surface of the vertical wall portion to the ground conductor on the lower surface of the flat plate portion, and are arranged at intervals of not more than one-fourth of the wavelength of a high-frequency signal transmitted by the line conductor, so as to be aligned in a direction approximately parallel to the line direction of the line conductor; and a plurality of second through conductors are provided at a portion where the vertical wall portion of the flat plate is joined, the first through conductors pass through the ground conductor on the same surface and electrically connect the ground conductor on the upper surface of the vertical wall portion to the ground conductor on the lower surface of the flat plate portion, and are arranged in a direction approximately parallel to the line direction, the second through conductors being spaced at intervals of not more than one-fourth of the wavelength of the high-frequency signal.

An input/output terminal comprising: a flat plate portion made of a substantially rectangular dielectric plate; two line conductors formed as input and/or output lines from one side of an upper surface of the flat plate portion to the other opposing side thereof, the two line conductors being differential lines; a ground conductor having the same surface area formed at equal intervals on both sides of the two line conductors on the upper surface of the flat plate portion; and a standing wall portion made of a dielectric joined to the upper surface of the flat plate portion with the line conductors and the ground conductor having the same surface area sandwiched therebetween; a ground conductor is formed on the upper surface of the standing wall portion and on a side surface of the line conductor that is substantially parallel to the line direction of the line conductor, such that the entire side surface of the line conductor that is substantially perpendicular to the line direction of the line conductor is left blank ; an inner layer ground conductor is formed inside the flat plate portion; and a ground conductor is formed on a side surface of the flat plate portion that is substantially parallel to the line direction of the line conductor; an input/output terminal comprising: a plurality of first through conductors provided in a portion where the line conductor is exposed, the first through conductors electrically connecting the same surface area ground conductor and the inner-layer ground conductor, and aligned in a direction approximately parallel to the line direction of the line conductor, at intervals of not more than one-fourth of the wavelength of a high-frequency signal transmitted by the line conductor; and a plurality of second through conductors provided in a portion where the vertical wall portion of the flat plate portion is joined, the first through conductors penetrating the same surface area ground conductor and electrically connecting the ground conductor on the upper surface of the vertical wall portion and the inner-layer ground conductor, the second through conductors being aligned in a direction approximately parallel to the line direction, the second through conductors being spaced not more than one-eighth of the wavelength of the high-frequency signal.

3. A package for storing semiconductor elements, comprising: a base having a mounting portion on an upper main surface on which a semiconductor element is placed; a frame body attached to the upper main surface of the base so as to surround the mounting portion and having an input/output terminal mounting portion formed on the side thereof, the mounting portion being a through hole or a notch; and the input/output terminal according to claim 1 or claim 2 fitted into the mounting portion.