JP3671943B2 - Active matrix substrate - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to an active matrix substrate on which a thin film transistor is formed.
[0002]
[Prior art]
3 and 4 are diagrams illustrating an active matrix substrate according to the prior art.
[0003]
The active matrix substrate shown in FIG. 3 uses coplanar TFTs as pixel switching elements. 3A is a plan view thereof, and FIG. 3-B is a cross-sectional view taken along the line BB ′. In this active matrix substrate, a TFT semiconductor layer including a channel region 301, a source region 302, and a drain region 303 is provided on the lowermost layer on the insulating substrate, and a gate insulating film 304 is provided so as to cover the TFT semiconductor layer. Furthermore, a gate electrode / line 305 is placed thereon, and an interlayer insulating film 306 covers the gate electrode / line 305 and the gate insulating film 304. The pixel electrode 308 is electrically connected to the drain region 303 through the contact hole 307 opened through the gate insulating film 304 and the interlayer insulating film 306, and the data line 309 is electrically connected to the source region 302. It has been. Since the material of the pixel electrode 308 and the material of the data line 309 are usually different, at least 6 photolithography processes are required for the film formation process at least 6 times to produce an active matrix substrate of this structure. On the other hand, there are two contact holes.
[0004]
The active matrix substrate shown in FIG. 4 uses staggered TFTs as pixel switching elements. 4A is a plan view thereof, and FIG. 4-B is a cross-sectional view taken along the line CC ′. In this active matrix substrate, a channel region 401, a source region 402, and a drain region 403 are provided on the lowermost layer on the insulating substrate, and a source pad 404 and a drain pad 405 that are thicker than these semiconductor layers are similarly semiconductors. Depending on the material, it is provided on the bottom layer. A part of the source region 402 covers a part of the source pad 404, and a part of the drain region 403 covers a part of the drain pad 405. Usually, the source region 402 and the drain region 403 and the source pad 404 and the drain pad 405 are made of the same material, and the electrical properties between them are the same. A gate insulating film 406 is provided so as to cover these semiconductor layers, and a gate electrode / line 407 is placed thereon, and an interlayer insulating film 408 covers the gate electrode / line 407 and the gate insulating film 406. The pixel electrode 410 is electrically connected to the drain pad 405 through the contact hole 409 opened through the gate insulating film 406 and the interlayer insulating film 408, and the data line 411 is electrically connected to the source pad 404. Has been taken. Normally, the material of the pixel electrode 410 and the material of the data line 411 are different. Therefore, in order to produce an active matrix substrate having this structure, at least 7 film formation processes require 6 photolithography processing steps. On the other hand, there are two contact holes.
[0005]
FIGS. 8 and 9 are diagrams for explaining another conventional active matrix substrate and a method for manufacturing the same.
[0006]
The active matrix substrate shown in FIGS. 8 and 9 uses a coplanar TFT as a pixel switching element, and a storage capacitor is formed by a polycrystalline silicon film containing an impurity serving as a donor or an acceptor and a previous gate line. (Japan Display '92 P.451, Hiroshima Japan 1992) FIG. 8-a is a plan view thereof, FIG. 8-b is a cross-sectional view taken along the line BB ′, and its manufacturing process is depicted in FIG. Yes. In this active matrix substrate, a lower electrode for a storage capacitor made of a semiconductor layer of a TFT composed of a channel region 301 on the lowermost layer on an insulating substrate, a source region 302, and a drain region 303 and an impurity serving as a donor or acceptor is formed by polycrystalline silicon. There is 811. A gate insulating film 304 is provided so as to cover these. Further, a gate electrode 813 in the previous row serving as the gate electrode / line 305 and the storage capacitor upper electrode is placed thereon, and an interlayer insulating film 306 is provided to cover them. The pixel electrode 308 is electrically connected to the drain region 303 through the contact hole 307 opened through the gate insulating film 304 and the interlayer insulating film 306, and the data line 309 is electrically connected to the source region 302. It has been. Further, the pixel electrode 308 is electrically connected to the storage capacitor lower electrode 811 through another contact hole 812.
[0007]
A method of manufacturing an active matrix substrate having this structure will be described with reference to FIG. First, a polycrystalline silicon film is deposited on an insulating substrate, the silicon film is patterned by photolithography, and then a gate insulating film 304 is deposited (FIG. 9A). Next, a photo resist 901 is formed so as to cover other regions except for a portion that becomes a lower electrode for a storage capacitor, and impurity ions 902 are implanted using this as a mask to form a lower electrode 811 for a storage capacitor ( FIG. 9-b). Further, after forming the gate electrodes / lines 305 and 813 with a silicon film or the like containing a donor or acceptor impurity, impurity ion implantation is performed using the gate electrode as a mask so that the TFT channel region 301, source region 302, and drain region 303 are formed. It is formed (FIG. 9-c). Thereafter, an interlayer insulating film 306 is deposited by the APCVD method or the like, contact holes 307 and 812 are opened (FIG. 9D), and finally a pixel electrode 308 made of ITO or the like and a data line 309 made of Al or the like are formed. Therefore, the active matrix substrate is completed (FIG. 9-e). Usually, the material of the pixel electrode 308 and the material of the data line 309 are different. Therefore, in order to produce an active matrix substrate having this structure, at least six film forming steps are required for forming the active matrix substrate, and each pixel needs to be processed. There are three contact holes. In addition, at the intersection of the data line and the gate line, the interlayer insulating film is insulated with a single layer, and the pixel electrode 308 and the data line 309 exist on the same layer.
[0008]
[Problems to be solved by the invention]
However, the following problems have been pointed out in the conventional method described above.
[0009]
In general, the TFT characteristics are improved as the channel region is made thinner. However, in the active matrix substrate structure of FIG. 3, when the thickness of the channel region 301 is reduced, the thickness of the source / drain regions is automatically reduced. When the film thickness of the source / drain region is small, contact failure occurs, and some of the TFTs have defects due to lack of electrical continuity between the data line and the source region or between the pixel electrode and the drain region. Further, when the contact hole is opened, the source region or the drain region under the contact hole is peeled off and separated from the substrate, so that it cannot function as a switch element. Therefore, in the substrate structure of FIG. 3, the channel region cannot be thinned, and a TFT having good characteristics cannot be used as a switching element.
[0010]
On the other hand, the active matrix substrate structure shown in FIG. 4 has a thick source pad and drain pad, so that a thin channel portion can be used, and the above-described problem does not occur. However, in order to produce this active matrix substrate, seven film forming steps and six photolithographic steps are required, which is a complicated and redundant process, resulting in a decrease in yield and an increase in product price. Further, in the case of the active matrix substrate shown in FIG. 3 or FIG. 4, there are two contact holes in each pixel, and there is a problem that a fine pixel cannot be formed.
[0011]
In order to increase the aperture ratio of the pixel area, the capacitor line is omitted, and the active matrix substrate having the structure shown in FIG. Six photolithography processes are required, and there is a problem that the process becomes a complicated and redundant process, resulting in a decrease in yield and an increase in product price.
[0012]
In the active matrix substrate having this structure, there are three contact holes in each pixel. When the contact hole size is 4 μm and the alignment margins on both sides are 3 μm each, the area of the pad region for forming the contact hole is 10 μm × 10 μm = 100 μm for one contact hole. ² Depending on the three contact holes, 300 μm ² Area will be occupied. In high-definition liquid crystal display devices, the pixel pitch tends to be reduced, and the size is currently about 30 μm × 40 μm = 1200 μm. ² As a result, three contact holes account for 25% of the total.
[0013]
Further advancement of high definition, for example, pixel pitch 20 μm × 30 μm = 600 μm ² Even if it is intended to realize the above, there is a problem that the presence of the above three contact holes alone loses 50% of the area, and in fact, no further high definition can be achieved. That is, there is a strong demand for reducing the number of contact holes.
[0014]
Further, the conventional active matrix substrate shown in FIGS. 3, 4, 8 and the like has a problem that the pixel electrode cannot be enlarged because the wiring of the data line and the pixel electrode are in the same layer. In addition, when making a liquid crystal display device using these conventional active matrix substrates, it is necessary to provide black stripes on the opposite substrate across the liquid crystal to prevent light leakage of adjacent pixels. The two substrates must be aligned so that the stripe completely covers the edge of each pixel electrode.
[0015]
The distance between the two substrates is usually several μm, and considering the alignment margin, the width of the black stripe must be increased, and the resulting pixel aperture of the liquid crystal display device is larger than the pixel electrode on the active matrix substrate. However, there is a problem that it becomes extremely small.
[0016]
The present invention has been made in view of the above circumstances, and an object of the present invention is to provide an active matrix substrate having a simple structure in which a semiconductor layer can be thinned and a TFT having good characteristics as a switching element, and an easy manufacturing method thereof. It is in providing.
[0017]
Another object of the present invention is to provide an active matrix substrate that reduces the number of contact holes and advances the definition, and improves the aperture ratio, and an easy manufacturing method thereof.
[0018]
[Means for Solving the Problems]
The present invention includes a thin film transistor including a semiconductor layer having a source region, a drain region, and a channel region sandwiched between them on a substrate, a data line connected to the source region, and a pixel electrode connected to the drain region. An extraction pad; a pixel electrode connected to the pixel electrode extraction pad through a contact hole; and a storage capacitor having the electrode connected to the pixel electrode as one electrode and the gate line as the other electrode, An active matrix substrate, wherein at least a part of the drain electrode region covers at least a part of the pixel electrode extraction pad, and at least a part of the data line covers the source region; The pad, one electrode of the storage capacitor, and the data line are made of the same light-shielding metal film, and the pixel electrode A gate insulating film is provided on the lead pad, the one electrode, and the data line, the gate line is provided on the gate insulating film, an interlayer insulating film is provided on the gate line, and the interlayer insulating film is provided on the interlayer insulating film. The pixel electrode is provided on the substrate. The pixel electrode may be provided to overlap the data line in a plane.
[0019]
The pixel electrode Is provided so as to overlap the gate line in a plane. It is characterized by becoming.
[0020]
Ma Further, at least a part of the one electrode is provided so as to overlap the gate line in a planar manner.
[0021]
【Example】
(Reference Example 1)
A reference example will be described in detail below with reference to the drawings.
[0022]
FIG. 1 is a diagram for explaining an example of an active matrix substrate according to the present reference example, and FIGS. 2A to 2C are cross-sectional views showing a manufacturing process of the active matrix substrate according to the present reference example.
[0023]
1A is a plan view, and FIG. 1B is a cross-sectional view taken along line AA ′. In the active matrix substrate according to this reference example, there is a semiconductor layer composed of a channel region 101, a source region 102, and a drain region 103 on the lowermost layer on an insulating substrate, and molybdenum, tungsten, chromium, vanadium, niobium, tantalum are formed on the same layer. A pixel electrode extraction pad 105 made of the same metal as the data line 104 made of refractory metal is provided. A part of the source region 102 covers a part of the data line 104, and a part of the drain region 103 covers a part of the metal pixel electrode extraction pad 105.
[0024]
A gate insulating film 106 is provided so as to cover these semiconductor layers, metal data lines, and metal pixel electrode extraction pads, and a gate electrode / line 108 is provided on the gate insulating film. A contact hole 107 is opened on the metal pad 105 in the gate insulating film, and a pixel electrode 109 is formed on the gate insulating film through the contact hole.
[0025]
In the first reference example, the pixel electrode and the gate electrode are formed of the same material and on the same layer. However, the materials may be different or may be formed on different layers. For example, the gate insulating film in the pixel electrode region may be removed at the same time when the contact hole is opened, and the pixel electrode may be provided in the lowermost layer of the same layer as the semiconductor layer.
[0026]
A method of manufacturing an active matrix substrate according to this reference example will be described with reference to FIG. First, a metal film is deposited on an insulating substrate such as a glass substrate by vapor deposition or sputtering. In this reference example 1, 2000 liters of chromium was deposited at a substrate temperature of 150 ° C. by sputtering. In addition, refractory metals such as molybdenum and tungsten are also possible. At this time, the sheet resistance of chromium was 1.12 Ω / □. Next, this metal film is processed by a photolithography process to form data lines 104 and pixel electrode extraction pads 105. (FIG. 2-a) Subsequently, a semiconductor film is formed by LPCVD or the like. In this reference example 1, a polycrystalline silicon film was deposited by LPCVD. The substrate temperature was 555 ° C., and the monosilane partial pressure during deposition of the polycrystalline silicon film was 0.94 mtorr. The thickness of the polycrystalline silicon film was 280 mm, and the deposition time was 1 hour 5 minutes 50 seconds. Subsequently, the semiconductor film is processed by a photolithography process, and then a gate insulating film 106 is formed by an ECR-PECVD method or the like. In this reference example 1, the substrate temperature is 1200 ° C. and the substrate temperature is 100 ° C. ₂ A film was deposited. (FIG. 2-b) Next, a contact hole 107 is formed on the pixel electrode extraction pad by a photolithography process to form a transparent electrically conductive film. In this reference example 1, 2500 mm of indium / tin oxide (ITO) was deposited by sputtering. The sheet resistance at this time was 28Ω / □. Thereafter, a gate electrode / line 108 and a pixel electrode 109 were formed by a photolithography process. Next, an impurity which becomes a donor or an acceptor is implanted into the semiconductor film using a gate electrode as a mask by a mass non-separation type ion implantation apparatus, thereby forming a channel region 101, a source region 102 and a drain region 103. In this reference example 1, a phosphine diluted with hydrogen (PH) is aimed at creating an n-type field effect transistor. _Three ) At an acceleration voltage of 90 kv and 5 × 10 ¹⁵ 1 / cm ² Typed in. Thereafter, the implanted ions are activated by a heat treatment at 350 ° C. for 2 hours in a nitrogen atmosphere to complete the active matrix substrate (FIG. 2-c).
[0027]
The TFT of the active matrix substrate thus fabricated has an on-current (Vds = 4v, Vgs = 10v L / W = 10 μm / 10 μm Ids) of 1.2 μA, an off-current (Vds = 4v, Vgs = 0v L / W). = 10 μm / 10 μm Ids) was 0.067 pA, indicating a good switching characteristic, and was an excellent active matrix substrate. This is due to the fact that the channel thickness can be made sufficiently thin in the active matrix substrate structure of this reference example. Also, problems such as poor contact could not occur. Furthermore, according to this reference example, the number of contact holes for each pixel was reduced by half, and the aperture ratio of the pixel area was improved accordingly, and defects caused by the contact holes could be reduced by half. In addition, the present invention comprises a simple manufacturing method of four film forming steps and four photolithographic steps.
[0028]
(Reference Example 2)
FIG. 5 is a diagram for explaining an example of an active matrix substrate according to Reference Example 2. FIG. 5-a is a plan view and FIG. 5-b is a cross-sectional view taken along line AA ′. In the active matrix substrate according to Reference Example 2, an active layer semiconductor film including a channel region 101, a source region 102, and a drain region 103 is provided on an insulating substrate that is a first insulating layer, and molybdenum, tungsten, and chromium are provided on the same layer. A pixel electrode extraction pad 105 made of the same metal as the data line 104 made of refractory metal such as vanadium, niobium or tantalum is provided. A part of the source region 102 covers a part of the data line 104, and a part of the drain region 103 covers a part of the metal pixel electrode extraction pad 105. A gate insulating film 106 as a second insulating layer is provided so as to cover the semiconductor layer, the metal data line, and the metal pixel electrode extraction pad, and a gate electrode / line 108 is provided on the second insulating layer. Furthermore, there is an interlayer insulating film 110 which is a third insulating layer on them. A contact hole 107 is opened on the metal pad 105 in the gate insulating film and the interlayer insulating film, and a pixel electrode 109 is formed on the interlayer insulating film which is the third insulating layer through the contact hole. Yes. In this reference example 2, the pixel electrode extraction pad 105 is provided on the first insulating layer. However, if the active layer semiconductor film has a sufficient thickness so as not to cause a problem such as contact failure, the pixel electrode extraction pad 105 is provided. The contact hole 107 may be directly opened on the drain region 103 without the pad. Accordingly, the pixel aperture ratio is improved by the amount of the pixel electrode extraction pad. As the gate electrode / line 108, various metals such as aluminum, copper, nickel, iron, chromium, molybdenum, tungsten, and tantalum can be used. In addition to the transparent conductive material such as indium tin oxide (ITO), the pixel electrode 109 may be a metal material when this reference example is used for a reflective liquid crystal display device. In Reference Example 2, since the data line, the gate line, and the pixel electrode are formed on different layers, the pixel electrode can be made as large as possible. The edge of the pixel electrode 109 overlaps with the gate line through an interlayer insulating film, and overlaps with the data line through the interlayer insulating film and the gate insulating film. Since the data line and the gate line are metal in the present Reference Example 2 and both are electrically conductive light-shielding materials, these two lines are black stripes because they overlap with the edge of the pixel electrode. In other words, when the active matrix substrate of the present Reference Example 2 is used, it is not necessary to create a thick black stripe on the counter substrate side, and the substantial aperture ratio of the completed liquid crystal display device is greatly improved.
[0029]
Next, a method for manufacturing an active matrix substrate according to this reference example will be described. First, a metal film is deposited on an insulating substrate such as a glass substrate by vapor deposition or sputtering. As the metal, the refractory metal described above is preferable, but a non-metal such as a metal silicide can be used as long as it is an electrically conductive light shielding material. Next, this metal film is processed by a photolithography process to form data lines 104 and pixel electrode extraction pads 105. Subsequently, a semiconductor film is formed. The semiconductor film can be formed in many ways other than the method of directly depositing the polycrystalline silicon film at a temperature of about 555 ° C. or less by the LPCVD method as described in Reference Example 1. For example, monosilane (SiH _Four ) And disilane (Si ₂ H ₆ ) Is used as a raw material, an amorphous semiconductor film is deposited at a temperature of about 550 ° C. or lower, and then subjected to heat treatment in a furnace of about 600 ° C. or lower for crystallization, or laser light or arc lamp light is irradiated for a short time. Thus, a method of crystallization is also effective. The semiconductor film is not limited to silicon, and various semiconductor films such as a silicon / germanium film are possible. All of these processes are about 600 ° C. or lower, and the temperature is lower than the melting point of the metal material such as the data line, so the data line is not deteriorated by heat. Subsequently, the semiconductor film is processed by a photolithography process, and then a gate insulating film 106 is formed by an ECR-PECVD method or the like.
[0030]
When the ECR-PECVD method is used, the gate insulating film can be formed at a temperature of about 100 ° C. In addition to this, the APCVD method and ozone (O _Three The gate insulating film may be formed at a temperature of 350.degree. Subsequently, a metal film is deposited on the gate insulating film by sputtering or the like, and gate electrodes and lines are formed by photolithography and lithography processes. When depositing a metal film by a sputtering method, the substrate temperature is preferably 300 ° C. or lower. Next, an impurity which becomes a donor or an acceptor is implanted into the semiconductor film using a gate electrode as a mask by a mass non-separation type ion implantation apparatus, thereby forming a channel region 101, a source region 102 and a drain region 103. When a hydride of an impurity element is ion-implanted by a mass non-separation type ion implantation apparatus, the impurity ions can be activated by a low-temperature heat treatment at about 350 ° C. or lower. Subsequently, the interlayer insulating film 110 is formed by various CVD methods at about 350 ° C. or less. After that, heat treatment is performed for 1 hour to 2 hours at a temperature of about 350 ° C. or less in a nitrogen atmosphere to serve as both the baking of the interlayer insulating film and the activation of the implanted ions. Finally, the contact hole 107 is opened, and a conductive material such as ITO is deposited on the interlayer insulating film by sputtering or the like, and the pixel electrode 109 is formed by a photolithographic process to complete the active matrix substrate. When a conductive material is deposited by the sputtering method, the substrate temperature can be suppressed to about 300 ° C. or lower. According to the second reference example, the maximum process temperature after forming the gate insulating film is as low as about 350 ° C., and the time is about several hours. For this reason, the heat degradation of the electrically conductive light shielding material such as the data line, the gate electrode and the line does not occur at all. In Reference Example 2, six film formation steps and five photolithographic processing steps are required until the active matrix substrate is completed. It is. However, the conventional data line wiring and the pixel electrode are in the same layer, but in this reference example, it can be made in a separate layer, and the pixel electrode area has been expanded accordingly. In addition, in this reference example, the pixel electrode, the data line, and the gate line can be overlapped, and the black stripe on the counter substrate can be omitted. Conventionally, there are two contact holes in each pixel. However, in this reference example, the number of contact holes is halved to one, thereby realizing a high-definition liquid crystal display device having fine pixels.
[0031]
( Reference example 3 )
Figure 6 shows the book Reference example 7A to 7D illustrate an example of an active matrix substrate according to FIG. Reference example FIG. 6 is a cross-sectional view showing the manufacturing process of the active matrix substrate according to FIG. 6A is a plan view, and FIG. 6B is a cross-sectional view taken along line AA ′.
[0032]
The active matrix substrate shown in FIGS. 6 and 7 uses a coplanar TFT as a pixel switching element and has a storage capacitor. Book Reference example In the active matrix substrate, an active layer semiconductor film including a channel region 101, a source region 102, and a drain region 103 on an insulating substrate which is a first insulating layer, and a high melting point such as molybdenum, tungsten, chromium, vanadium, niobium, and tantalum. A data line 104 made of metal, a pixel electrode extraction pad 105 made of the same metal, and a storage capacitor lower electrode 611 made of the same metal are formed. A gate insulating film 106 is provided so as to cover these. The gate insulating film is a second insulating layer, on which a previous gate line 613 serving as a gate electrode line 108, a pixel electrode 109, and a storage capacitor upper electrode is provided. The pixel electrode 109 is electrically connected to the pixel electrode take-out pad 105 through a contact hole 107 opened in the gate insulating film, and is connected to the storage capacitor lower electrode 611 through another contact hole 612. . With this structure, the active layer semiconductor film can be made as thin as several tens of millimeters, at which the film can exist as a film. If the active layer semiconductor film is sufficiently thick so as not to cause contact failure or the like, the pixel electrode 109 may be directly contacted with the drain region 103 without the pixel electrode extraction pad.
[0033]
A method of manufacturing an active matrix substrate having this structure will be described with reference to FIG. First, an electrically conductive substance such as a metal film is deposited on an insulating substrate, which is a first insulating layer, by vapor deposition or sputtering. As the metal, the above-mentioned refractory metal is preferable, but other conductive materials such as other metal materials and non-metal materials are also possible as long as they are stable to the thermal environment to be suffered in the subsequent semiconductor film formation process. . Next, this conductive material is patterned by a photolithography process to form a pixel electrode extraction pad 105, a data line 104, and a storage capacitor lower electrode 611 (FIG. 7A). When the pixel electrode extraction pad is unnecessary, it is not necessary to leave the pixel electrode extraction pad by this patterning. Subsequently, a semiconductor film is deposited. Book Reference example Since the semiconductor film deposition process is the most severe thermal environment during the manufacturing process of active matrix substrates, the selection of electrical conductive materials such as data lines widens when the temperature is lowered, and the insulating substrate becomes larger and lower in size. Pricing is also easy. When a polycrystalline silicon film is used as the semiconductor film, there is a method of directly depositing a high quality film at a deposition temperature of 555 ° C. or lower and a monosilane partial pressure of 1 mtorr or lower using monosilane as a source gas in the LPCVD method. In addition, disilane (Si ₂ H ₆ ) And depositing an amorphous silicon film at a deposition temperature of about 450 ° C. and a pressure of about 0.5 torr, followed by crystallization. In order to advance the crystallization of the amorphous film, a method of performing heat treatment at a temperature of about 600 ° C. for several hours, a method of heating to about 900 ° C. for several seconds by so-called rapid thermal annealing (RTA), And laser irradiation. In laser irradiation, for example, XeCl excimer laser is 50 mJ / cm. ² To 500mJ / cm ² In this method, irradiation is performed for about 50 ns for an intensity of 50 nm, and the silicon film is instantaneously melted and then crystallized. In this method, since the heating time is short and short, the electrically conductive material such as the insulating substrate and the data line hardly undergoes thermal degradation. If silicon / germanium is used as the semiconductor film, a polycrystal can be obtained at a lower temperature. In addition, it is also effective to proceed with crystallization by the above-mentioned methods after depositing an amorphous semiconductor film by a sputtering method. After the semiconductor film is formed in this way, the semiconductor film is processed by a photolithography process (FIG. 7B). Then ECR-PECVD method, ozone TEOS (Si-CH _Three -CH ₂ -O) _Four ) Method is used to form the gate insulating film 106, and contact holes 107 and 612 are opened by photolithography (FIG. 7C). Next, an electrically conductive material is deposited, and a gate electrode / line 108 pixel electrode 109 is formed on the gate insulating film, which is the second insulating layer, by photolithography. This pixel electrode is electrically connected to the lower electrode 611 for the storage capacitor through the contact hole 612, and the storage capacitor is formed by the lower electrode 611 and the previous gate line 613. Finally, ion implantation is performed using the gate electrode as a mask to form a channel region 101, a source region 102, and a drain region 103. For the activation of the implanted ions, light irradiation such as laser irradiation or RTA is effective. When a transparent material is used for the gate electrode / line or the pixel electrode, light is almost transmitted, and these temperature rises are not observed by short-time light irradiation, and there is no thermal degradation. Further, when a metal material is used for these, light is almost reflected, and thermal deterioration does not occur. The same applies to data lines, pixel electrode extraction pads, and the like. In addition, as described in Reference Example 1, ion implantation may be performed by a mass non-separation type ion implantation apparatus, and the implanted ions may be activated at a low temperature of 300 ° C. to 350 ° C. Thus, the active matrix substrate is completed (FIG. 7-d).
[0034]
Conventionally, in order to produce an active matrix substrate having a storage capacity, six photolithography processes were required in six film forming processes. Reference example Therefore, it is possible to simplify the film formation process four times and the photo lithography four times. Conventionally, there are three contact holes for each pixel. Reference example Then, this could be reduced to two. In addition, since a part of the source / drain region covers a part of the data line and the pixel electrode extraction pad, the thickness of the active layer semiconductor film can be reduced to several tens of millimeters, and a high-performance TFT can be obtained. Book Reference example 3 In this case, since the pixel electrode extraction pad and the lower electrode for the storage capacitor are formed separately, the pixel electrode is electrically connected through the two contact holes 107 and 612. If the islands are not separated but are formed by one connected island, only one contact hole is required. In this case, there is one contact hole for each pixel, and the pixel can be further miniaturized.
[0035]
(Example 1 )
FIG. 10 is a view for explaining an example of an active matrix substrate according to the present invention, and FIGS. 11A to 11D are cross-sectional views showing a manufacturing process of an active matrix substrate according to the present invention. 10A is a plan view, and FIG. 10B is a cross-sectional view taken along the line AA ′.
[0036]
The active matrix substrate shown in FIGS. 10 and 11 uses a coplanar TFT as a pixel switching element, and each pixel has a storage capacitor. In the active matrix substrate of the present invention, an active layer semiconductor film comprising a channel region 103 on an insulating substrate which is a first insulating layer, and a data line 104 made of a refractory metal such as molybdenum, tungsten, chromium, vanadium, niobium, and tantalum A pixel electrode take-out pad 105 made of the same metal and a storage capacitor lower electrode 611 made of the same metal are formed. A gate insulating film 106 is provided so as to cover these. The gate insulating film is a second insulating layer, and a previous gate line 613 serving as both the gate electrode / line 108 and the storage capacitor upper electrode is provided thereon. Furthermore, there is an interlayer insulating film 110 which is a third insulating layer on them. A pixel electrode 109 is provided on the interlayer insulating film. Contact holes 107 and 612 are opened in the interlayer insulating film and the gate insulating film, through which the pixel electrode is electrically connected to the pixel electrode extraction pad and the storage capacitor lower electrode. If there is a pixel electrode extraction pad, the active layer semiconductor film can be as thin as several tens of millimeters. Conversely, if the active layer semiconductor film is sufficiently thick, the pixel electrode lead pad may be omitted, and a contact hole may be directly formed in the drain region 103 to establish conduction with the pixel electrode. This example 1 Since the pixel electrode extraction pad and the lower electrode for the storage capacitor are separately formed, the pixel electrode is electrically connected to the pixel electrode extraction pad and the lower electrode for the storage capacitor through two contact holes. If the electrode take-out pad and the lower electrode for the storage capacitor are not separated but formed by one island, the number of contact holes is reduced to one. Example 1 In this case, the data line is formed on the first insulating layer, the gate line is formed on the second insulating layer, and the pixel electrode is formed on the third insulating layer in separate layers. Can be big. As shown in FIG. 8, conventionally, since the data line and the pixel electrode are on the same layer, a separation region is always required between the pixel electrode and the data line. However, in the present invention, since the data line, the gate line, and the pixel electrode are formed on different layers, the isolation is performed by the gate insulating film or the interlayer insulating film, and the isolation region on the plane is not necessary. Accordingly, the pixel electrode is enlarged as compared with the conventional case. Moreover, this example 1 Then, the edge of the pixel electrode overlaps the gate line and the data line. If the gate line and the data line are made of a light-shielding material such as a metal, both lines become black stripes. That is, this example 1 If the active matrix substrate is used, it is not necessary to form a thick black stripe on the counter substrate side, and the alignment of the active matrix substrate and the counter substrate becomes easy, and the substantial aperture ratio of the completed liquid crystal display device is significantly increased. Yes.
Next, a method for manufacturing an active matrix substrate according to the present invention will be described with reference to FIG. First, an electrically conductive substance such as a metal film is deposited on an insulating substrate such as a glass substrate. In addition to the refractory metal described above, metal compounds and non-metals are also effective as long as the conductive material is stable with respect to the semiconductor film formation process temperature. Next, this electric conductive material is processed by a photolithography process to form the data line 104, the pixel electrode extraction pad 105, and the storage capacitor lower electrode 611 (FIG. 11A). continue Reference example 3 A semiconductor film is deposited by the method described in detail in (4) and processed by a photolithography process (FIG. 11B). After that, the gate insulating film 106 is deposited at a substrate temperature of about 350 ° C. or lower by PECVD, ECR-PECVD, APCVD, CVD using an organic silicon compound and ozone, or the like. Subsequently, an electrically conductive material is deposited on the gate insulating film by vapor deposition or sputtering, and gate electrodes / lines 108 and 613 are formed by a photolithography process. Even when an electrically conductive material is deposited, the substrate temperature is preferably about 350 ° C. or lower in order to prevent thermal changes of the lower layer metal such as data lines, the semiconductor film, and the gate insulating film. Next, an impurity serving as a donor or acceptor is implanted using a gate electrode as a mask by a mass non-separation type ion implantation apparatus to form a channel region 101, a source region 102, and a drain region 103 (FIG. 11-c). When a hydride of an impurity element is ion-implanted by a mass non-separation type ion implantation apparatus, the impurity ions can be activated by a low-temperature heat treatment at about 350 ° C. or lower. Further, after the impurity ions are implanted by a normal mass separation type ion implantation apparatus, the implanted ions may be activated by laser irradiation. Next, the interlayer insulating film 110 is deposited by various CVD methods and PVD methods at a substrate temperature of about 350 ° C. or less. When source / drain region type ion implantation is performed by a mass non-separation type ion implantation apparatus, if an annealing process is performed at a temperature of about 300 ° C. to 350 ° C. for about 30 minutes to 2 hours after the interlayer insulating film is deposited, At the same time, if the film quality of the interlayer insulating film and the gate insulating film is different, they approach or become the same, and a contact hole in the next process is easily formed. If there is a thermal process at 350 ° C. or higher after the gate insulating film is deposited, a hydrogenation treatment such as hydrogen plasma irradiation may be performed here. Subsequently, contact holes 107 and 612 are formed by a photolithographic process, and then a pixel electrode material is deposited by sputtering or the like, and patterning is further performed by a photolithographic process to complete an active matrix substrate (FIG. 11-). d). As described above, according to the present invention, an active matrix substrate having a storage capacity is formed by five photolithographic processing steps in six film forming steps. Conventionally, as shown in FIG. 9, since six photolithography processing steps are required, in addition to the structural advantages described above, the manufacturing process is further simplified.
[0037]
(Example 2 )
FIG. 12 is a diagram for explaining an example of an active matrix substrate according to the present invention, and FIGS. 13A to 13E are cross-sectional views showing a manufacturing process of the active matrix substrate according to the present invention. 12A is a plan view, FIG. 12B is a cross-sectional view taken along line AA ′, and FIG. 12C is a cross-sectional view taken along line BB ′.
[0038]
The active matrix substrate shown in FIGS. 12 and 13 uses a coplanar TFT as a pixel switching element, each pixel has a storage capacitor, and data lines, gate lines, and pixel electrodes are formed on different layers. Yes. This is the example 2 Is the embodiment shown in FIGS. 1 It is only meant to be described in contrast to the above, and the present invention is not limited to this. That is, the active matrix substrate described in Reference Example 1 illustrated in FIGS. 1 and 2, the active matrix substrate described in Reference Example 2 using FIG. 5, and FIGS. 6 and 7. Reference example 3 The present invention can also be applied to the active matrix substrate described in (1).
[0039]
In the active matrix substrate of the present invention, an active layer semiconductor film comprising a channel region 101, a source region 102, and a drain region 103 on an insulating layer, and a data line 104 made of a refractory metal such as molybdenum, tungsten, chromium, vanadium, niobium, and tantalum. A pixel electrode take-out pad 105 made of the same metal and a storage capacitor lower electrode 611 made of the same metal are formed. These metal surfaces are not covered with a semiconductor film, and the portions where no contact holes are formed are covered with an oxide of the same metal. The thickness of the metal oxide 1201 is preferably about several tens of millimeters or less. When the active layer semiconductor film is sufficiently thick, the pixel electrode extraction pad may be omitted and a contact hole may be directly formed on the drain region. When the storage capacitor is not necessary, it is naturally not necessary to make a storage capacitor lower electrode. A gate insulating film 106 is provided so as to cover these, and a previous gate line 613 serving as a gate electrode / line 108 and a storage capacitor upper electrode is provided thereon. As shown in FIG. 12-c, the cross section of the intersection of the gate line and the data line is completely covered with the oxide of the metal constituting the data line, and the gate insulating film is provided thereon. It has been. Similarly, the surface of the lower electrode for the storage capacitor is completely covered with the metal oxide. Since the gate line is on the gate insulating film, two different types of insulating films are sandwiched between the gate line and the data line or between the gate line and the storage capacitor lower electrode. An interlayer insulating film 110 is provided on the gate electrode / line and the gate insulating film, and a pixel electrode 109 is provided thereon. The interlayer insulating film may be omitted, and the pixel electrode may be provided on the gate insulating film. Alternatively, the gate electrode / line may be made of a light-shielding material, and the pixel electrode may be formed of a transparent material on a separate layer or on the same layer. Both the gate electrode / line and the pixel electrode may be made of a transparent material on the same layer. Or you may form on another layer. Contact holes 107 and 612 are opened in the interlayer insulating film and the gate insulating film, through which the pixel electrode is electrically connected to the pixel electrode extraction pad and the storage capacitor lower electrode. When the pixel electrode extraction pad and the storage capacitor lower electrode are formed of one island, or when there is no storage capacitor lower electrode, one contact hole is provided for each pixel. Example 2 In FIG. 12, since the data line, the gate line, and the pixel electrode are formed in different layers, the pixel electrode can be made larger than the conventional one. In FIG. 12A, the edge part completely overlaps the gate line and the data line. . If the gate line is made of a light shielding material such as metal, the thick black stripe on the counter substrate can be omitted, and the substantial aperture ratio is further improved. In order to substitute the black stripes depending on the gate lines and the data lines in the prior art active matrix substrate shown in FIGS. 3 and 4, the data lines and the pixel electrodes must be formed in different layers. Another interlayer insulating film must be deposited on the interlayer insulating film 306 or 408, and a pixel electrode must be formed thereon. In this case, a gate insulating film (having a gate electrode thereon), a first interlayer insulating film (having a data line thereon), a second interlayer insulating film (having a pixel electrode thereon) And at least three insulating layers. These are SiO ₂ In the case of forming by film, if the total film thickness of the three layers is increased, these insulating films are cracked and cannot be used as an active matrix substrate. Therefore, the total thickness of the insulating film needs to be about 1.5 μm or less. If the thickness of the gate insulating film is about 1000 to 2000 mm, the thickness of the two interlayer insulating films is about 7000 mm, and the pixel electrode and the data line are 7000 mm of SiO. ₂ It will overlap through the membrane. Even when the pixel thin film transistor is in the off state and the data stored in the on state is held, various information is transmitted to the data line, and the potential fluctuates. When the overlap between the pixel electrode and the data line is large and the film thickness between them is thin, the value of the capacitance generated between the pixel electrode and the data line increases, and as a result, the pixel electrode potential that should be kept constant in the OFF state is the data line. It fluctuates under the influence of the information transmitted to the screen, resulting in inferior image quality such as crosstalk on the liquid crystal screen. Accordingly, it is preferable that the overlap between the pixel electrode and the data line is small, and that the interlayer insulating film separating the pixel electrode and the data line is thick. This requirement becomes stronger as the pixel electrode becomes smaller or as the storage capacitor becomes smaller. As described above, in the conventional active matrix substrate, the film thickness of the interlayer insulating film separating the pixel electrode and the data line is about 7000 mm at the maximum. In contrast, FIG. Reference examples shown in In the active matrix substrate of the present invention shown in FIG. 10, the data line is on the insulating substrate, and the film thickness of the insulating film (that is, the gate insulating film and the interlayer insulating film) separating the pixel electrode and the data line is as thick as about 1.5 μm. I can do it. Therefore, if the pixel pitch is the same as that of the conventional active matrix substrate and the overlapping area of the pixel electrode and the data line is the same, the active matrix substrate of the present invention is more than the thicker insulating film. Yes, because a good image can be obtained. Alternatively, if the image quality is the same, the active matrix substrate of the present invention can increase the ratio of the overlapping area to the pixel area, and can produce a high-definition active matrix substrate having fine pixels. On the other hand, the embodiment shown in FIG. 2 In the active matrix substrate of the present invention described above, the surface of the data line is covered with a metal oxide film, and a gate insulating film and an interlayer insulating film are placed thereon. Therefore, the coupling between the pixel electrode and the data line is shown in FIG. Compared with the active matrix substrate shown in FIG. In addition, as shown in FIG. 12C, the surface of the data line is covered with an insulating film called a metal oxide, and a gate insulating film is formed thereon with an insulating film different from the metal oxide film. Since the gate line is provided, there is an advantage that dielectric breakdown and leakage current between the gate line and the source line are reduced. In general, the type or cause of the current flowing through the insulating film varies depending on the insulating film type. For this reason, if the film thicknesses are approximately the same, two different types of insulating films are more resistant to dielectric breakdown and leakage current than a single type of thick insulating film. Based on this principle, the active matrix substrate of the present invention shown in FIGS. 12 and 13 significantly reduces the defect rate such as a short circuit occurring at the intersection of the data line and the gate line.
[0040]
Next, a method for manufacturing an active matrix substrate according to the present invention will be described with reference to FIG. First, an electrically conductive substance such as a metal film is deposited on an insulating substrate such as a glass substrate. In addition to the refractory metal described above, any metal that is stable with respect to the semiconductor film forming process is effective. Next, this electric conductive material is processed by a photolithography process to form the data line 104, the pixel electrode extraction pad 105, and the storage capacitor lower electrode 611 (FIG. 13A). continue Reference example 3 A semiconductor film is formed by the method described in detail in (1) and processed by a photolithography process (FIG. 13B). Next, the surface of the metal film such as the data line is oxidized in an oxidizing atmosphere of 600 ° C. or lower (FIG. 13C). Since the oxidation of the silicon film hardly proceeds at a low temperature of 600 ° C. or lower, a metal oxide 1201 having a desired film thickness can be obtained by appropriately adjusting the atmosphere and temperature, and at the same time, an extremely thin semiconductor film can be used as the active layer. It becomes possible. For example, when tantalum is used for the same metal, an oxide film of several tens of centimeters or more can be formed from a temperature of about 300 ° C. at one atmospheric pressure of oxygen. Absent. Even if the oxidation of the semiconductor film progresses to some extent, it does not cause any problems because they are only part of the gate insulating film. Here, the semiconductor film Reference example 3 However, other methods are possible. For example, after depositing and patterning an amorphous semiconductor film (FIG. 13B), oxygen or laughing gas (N ₂ O) and carbon dioxide (CO ₂ ), Water (H ₂ Heat treatment is performed for several hours to 24 hours in a temperature environment of about 600 ° C. or less in a weakly oxidizing atmosphere containing O) from several ppm to about 1%. As a result, the amorphous film is crystallized, and at the same time, a metal oxide film 1201 is formed (FIG. 13C). When heat treatment is performed in a weakly oxidizing atmosphere, there is an advantage that oxygen is replenished by intracrystalline defects generated during amorphous crystallization, and a semiconductor film having a low threshold voltage and a high mobility can be obtained. The kind and concentration of the oxide gas at the time of the heat treatment are appropriately determined depending on the metal material used for the data line and the desired metal oxide film thickness. After that, the example 1 The gate insulating film 106, the gate electrodes / lines 108 and 613 are formed by the same method as described in detail in FIG. 9, and the channel region 101, the source region 102, and the drain region 103 are formed by ion implantation (FIG. 13-d). ). Subsequently, the interlayer insulating film 110 is an example. 1 The contact holes 107 and 612 are formed by a photolithographic process. Since this contact hole must be opened in at least two types of insulating films, that is, an interlayer insulating film, a gate insulating film, and a metal oxide, it is generally necessary to perform two consecutive opening operations. For example, when tantalum is used as the metal constituting the pixel electrode extraction pad, the metal oxide is tantalum oxide, and the silicon oxide film is used for the gate insulating film and the interlayer insulating film, the silicon oxide is formed in the first opening operation. A contact hole is made in the film, followed by a hole opening operation for tantalum oxide. However, if reactive ion etching (RIE), chemical dry etching (CDE) or the like is used, it is possible to form contact holes in two types of insulating films by a single opening operation. After forming the contact holes in this way, the pixel electrode material is deposited by sputtering or the like, and further patterned by a photolithography process to complete the active matrix substrate (FIG. 13-e). Thus, according to the present invention, the embodiment 1 The above-described structural advantages can be obtained by the same six film forming steps and five photolithography processing steps as described in detail in (1).
[0041]
This example so far 2 Then, the oxidation of the surface of the metal film such as the data line 104 has been performed in an oxidizing atmosphere of about 600 ° C. or less. First, all the data lines are short-circuited and a metal oxide is formed by an anodic oxidation method. May be. In this case, the pixel electrode extraction pad 105 and the storage capacitor lower electrode 611 that are separated from the data line 104 are not oxidized, and the opening of the contact hole is facilitated. Even when an oxide film is formed on the data line by the anodic oxidation method, the intersection of the data line and the gate line has a two-layer structure of different kinds of insulating films, and the dielectric breakdown and leakage current are also reduced. In addition, when the data line and the pixel electrode overlap, the coupling between them also decreases. Further, according to this method, since the metal oxide film is not formed on the surface of the storage capacitor lower electrode 611, there is an advantage that the storage capacitor increases.
[0042]
【The invention's effect】
As described above, according to the present invention, the following effects can be obtained.
[0046]
According to the present invention, the pixel electrode extraction pad, the storage capacitor lower electrode, and the data line are made of the same metal, and the gate insulating film is provided on the pixel electrode extraction pad, the storage capacitor lower electrode, and the data line. Since the gate line is provided, the interlayer insulating film is provided on the gate line, and the pixel electrode is provided on the interlayer insulating film, the data line made of metal, the pixel electrode extraction pad, the storage capacitor lower electrode, the gate The line and the pixel electrode can be formed on different layers, respectively, so that the pixel electrode is provided so that the peripheral edge thereof is planarly overlapped with the data line and the gate line made of metal, and the storage capacitor lower electrode is A configuration in which at least a part of the pixel line is provided so as to overlap with the gate line is possible, and thus the pixel electrode can be enlarged.
[Brief description of the drawings]
FIG. 1 shows an active matrix substrate of Reference Example 1. FIG.
2 is a device cross-sectional view in each step of manufacturing an active matrix substrate of Reference Example 1. FIG.
FIG. 3 is a diagram showing an active matrix substrate according to the prior art.
FIG. 4 is a diagram showing an active matrix substrate according to the prior art.
5 is a diagram showing an active matrix substrate of Reference Example 2. FIG.
[Fig. 6] Reference example 3 The active matrix board | substrate of FIG.
[Fig. 7] Reference example 3 Sectional drawing in each process in each process of manufacturing an active matrix substrate.
FIG. 8 is a diagram showing an active matrix substrate according to the prior art.
FIG. 9 is a cross-sectional view of an element in each process of manufacturing an active matrix substrate according to the prior art.
FIG. 10 Example 1 The active matrix board | substrate of FIG.
FIG. 11 Example 1 Sectional drawing in each process in each process of manufacturing an active matrix substrate.
FIG. 12 Example 2 The active matrix board | substrate of FIG.
FIG. 13 Example 2 Sectional drawing in each process in each process of manufacturing an active matrix substrate.
[Explanation of symbols]
101 ... Channel area
102 ... Source region
103 ... Drain region
104: Data line
105 ... Pixel electrode extraction pad
106 ... Gate insulating film
107 ... Contact hole
108 ... Gate electrode / line
109 ... Pixel electrode
110 ... Interlayer insulating film
301 ... Channel region
302 ... Source region
303 ... Drain region
304 ... Gate insulating film
305 ... Gate electrode / line
306 ... Interlayer insulating film
307 ... Contact hole
308 ... Pixel electrode
309 ... Data line
401 ... channel region
402: Source region
403 ... Drain region
404 ... Source pad
405 ... Drain pad
406 ... Gate insulating film
407 ... Gate electrode / line
408 ... interlayer insulating film
409 ... Contact hole
410: Pixel electrode
411 ... Data line
611 ... Lower electrode for holding capacitor
612 ... Contact hole
613 ... Previous gate line
811: Lower electrode for storage capacitor
812 Contact hole
813 ... Previous gate line
901 ... Photo resist
902 ... Impurity ion implantation
1201 ... Metal oxide film

Claims (4)

A thin film transistor including a semiconductor layer having a source region, a drain region, and a channel region sandwiched between them on a substrate, a data line connected to the source region, a pixel electrode extraction pad connected to the drain region, An active matrix comprising: a pixel electrode connected to the pixel electrode take-out pad through a contact hole; and a storage capacitor having the electrode connected to the pixel electrode as one electrode and the gate line as the other electrode A substrate,
At least a part of the drain region covering at least a part of the pixel electrode extraction pad, and a source region covering at least a part of the data line;
The pixel electrode extraction pad, one electrode of the storage capacitor, and the data line are made of the same light-shielding metal film, and a gate insulating film is provided on the pixel electrode extraction pad, the one electrode, and the data line, An active matrix substrate, wherein the gate line is provided on a gate insulating film, an interlayer insulating film is provided on the gate line, and the pixel electrode is provided on the interlayer insulating film. The active matrix substrate according to claim 1,
The active matrix substrate, wherein the pixel electrode is provided to overlap the data line in a planar manner. An active matrix substrate according to claim 1 or 2,
The active matrix substrate, wherein the pixel electrode is provided to overlap the gate line in a planar manner. An active matrix substrate according to any one of claims 1 to 3,
An active matrix substrate, wherein at least a part of the one electrode is provided so as to overlap the gate line in a planar manner.

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