JP3654429B2 - Manufacturing method of optical semiconductor device - Google Patents

Description

[0001]
BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing an optical semiconductor device used in optical information communication and the like.
[0002]
[Prior art]
In recent years, many information communication networks have been used for optical communication due to its large capacity and ultra-high speed. In such an optical communication network, an optical semiconductor component is widely used for a light emitting element, a light receiving element, and the like, and its research and development is actively performed. Research and development of optical semiconductor components include not only individual components such as semiconductor lasers (LD) and photodiodes (PD), but also semiconductors such as LDs and PDs, semiconductor amplifiers (SOA), and electroabsorption optical modulators (EA). It has also been energetically performed to monolithically integrate optical devices that can be manufactured by the method on a semiconductor substrate. In monolithic integration, it is one of the important issues to use an active layer structure and a waveguide structure optimized for each function and to connect them while maintaining high coupling efficiency.
[0003]
On the other hand, current injection elements such as LDs require a reduction in operating current in order to achieve low power consumption, and for this purpose it is essential to improve injection efficiency. A buried structure manufactured by selective growth by a metal organic vapor phase epitaxy (MOVPE) method is widely used in a single element such as an LD because a strong current confinement effect can be obtained.
[0004]
However, when a monolithic integrated device has different types of waveguide layers and the waveguide structure also includes various structures such as a buried structure, a high mesa structure, and a ridge structure, the manufacturing method using a single element can be used as it is. It becomes difficult.
[0005]
A connection method (manufacturing method) of different types of waveguide structures in a conventional semiconductor device will be described with reference to FIG. Here, as an example, a case where an LD having an embedded structure and an arrayed waveguide grating (AWG) having a high mesa structure are matched will be described.
[0006]
As shown in FIG. 7A, first, an LD active layer 2 and a p-InP cladding layer 3 are formed on an InP substrate 1, and the right half in the figure is removed by wet etching, and then the AWG waveguide layer 4 and i The InP cladding layer 5 is formed sequentially by the MOVPE method. Since the MOVPE method allows selective growth using a dielectric film (SiO ₂ ), such a structure can be manufactured. Thereafter, in order to produce a buried structure, the LD forms a mesa stripe structure parallel to the [011] direction and performs MOVPE growth. At this time, since the AWG region does not require a buried structure, it is conceivable to form a dielectric film in the same manner as the upper part of the mesa stripe. FIG. 7B shows a state after selective growth.
[0007]
However, in this case, since the area of the dielectric film in the AWG region is sufficiently larger than the migration distance of the material molecules during the burying growth, it causes a polycrystalline abnormal growth on the dielectric film in the AWG region. is not. Therefore, as shown in FIG. 8 (a), a mesa stripe structure similar to that in FIG. 7 (a) is formed, the dielectric film in the AWG region is removed, and MOVPE growth is performed to produce a buried structure. Conceivable. FIG. 8B shows the state after selective growth.
[0008]
[Problems to be solved by the invention]
However, the case shown in FIG. 8 is also problematic because abnormal growth or the like occurs at the end face of the AWG region. The problem will be described in detail below.
[0009]
In general, a GaInAsP-based LD is manufactured on an InP substrate having a (100) plane as a surface. The mesa stripe is parallel to the [011] direction (reverse mesa direction), and this mesa stripe is embedded by selective MOVPE growth. This is because the growth rate on the (111B) plane is lower than the growth rate on the (100) plane due to the anisotropy of the MOVPE growth process, so that good selective growth can be obtained with good reproducibility as shown in the figure. Because.
[0010]
However, when parallel to the [01-1] direction (forward mesa direction), the growth rate in the reverse mesa direction is equivalent to the growth rate of the (100) plane, so IX in FIG. As shown in FIG. 9 showing the direction of the arrow, the growth also proceeds in the direction covering the mask. This corresponds to the mask end face portion between the mesa stripe and the AWG region. As a result, growth from the end face also occurs on the side of the mesa stripe, and the growth starts from here to grow on the mesa stripe near the end face. Since this growth layer has a narrow mesa width of 3 μm or less, it is easily joined to the growth layer from the side surface, and a plurality of crystal plane orientations are exposed in the vicinity of the end face. In such a growth region on the mask where the plane orientation is not fixed, abnormal growth is induced, and InP is also grown on the dielectric film. As a result, it becomes impossible to produce an electrode structure in this portion, and in the case of an LD, a large absorption loss region is obtained, and the characteristics are greatly deteriorated.
[0011]
The present invention has been made in view of the above situation, and an object thereof is to provide a method of manufacturing an optical semiconductor device capable of realizing a high-performance monolithic integrated element without impairing characteristics.
[0012]
[Means for Solving the Problems]
In order to achieve the above object, an optical semiconductor device manufacturing method according to the present invention includes a planar region having a planar structure formed on a semiconductor substrate and a stripe having a mesa stripe structure having a dielectric film connected to the planar region. And a mesa stripe structure having a mesa stripe structure in which a mesa width is gradually changed in contact with the first linear area. And a second linear region in contact with the planar region and in contact with the planar region and having a linear mesa stripe structure, and a metal organic vapor phase epitaxial method beside the stripe region and on the planar region. And a step of selectively growing a crystal.
[0013]
The mesa width of the straight mesa stripe structure in the first straight region is 3 μm or less, the mesa width of the straight mesa stripe structure in the second straight region is 1.5 to 5 times the mesa depth, And the mesa width of the transition region gradually changes from the mesa width in contact with the first straight region to the mesa width in contact with the second straight region, and the spread angle Is set from 10 degrees to 45 degrees.
[0014]
DETAILED DESCRIPTION OF THE INVENTION
FIG. 1 to FIG. 3 show process descriptions of a method of manufacturing an optical semiconductor device according to an embodiment of the present invention. FIG. 1 shows a state before selective growth, FIG. 2 shows a state after selective growth, and FIG. Is the state from the top as seen in the direction of arrow III in FIG.
[0015]
Here, as an example, an InP substrate having a (100) plane as a surface will be described. In the figure, 11 is an InP substrate, 12 is an LD active layer, 13 is a p-InP cladding layer, 14 is an AWG waveguide layer, and 15 is an i-InP cladding layer. Since the LD needs to satisfy the single mode condition of the optical waveguide mode, the waveguide width is set to 3 μm or less. In general, the mesa stripe is about 1.5 μm and is formed parallel to the reverse mesa direction in order to obtain a good buried structure.
[0016]
On the other hand, in the selective growth process, there is a method of embedding with InP doped with Fe which is a semi-insulating semiconductor. When this method is used, the device capacitance can be greatly reduced, so that high-speed operation of the optical device can be easily realized. At this time, in order to obtain a sufficient insulation resistance, a suitable buried layer thickness is required, and a typical buried layer thickness is about 3 μm or more. This corresponds to the first straight waveguide 21 as the first straight region. Following this, a transition region 22 and a second straight waveguide 23 as a second straight region are arranged. A dielectric film is disposed on the mesa stripe, and selective growth is performed using the dielectric film as a mask for selective growth to obtain the buried structure shown below.
[0017]
In the first straight waveguide 21, a good buried structure similar to a mesa stripe produced in parallel to the reverse mesa direction can be obtained.
[0018]
In the transition region 22, since the mesa stripe components parallel to the forward mesa direction and the reverse mesa direction described above coexist, the growth in the direction covering the mask also proceeds. At this time, the growth on the mask proceeds in the direction 1 (reverse mesa direction), but does not proceed in the direction of the first linear waveguide 21 due to the growth suppression on the (111B) plane. Further, the growth on the mask does not proceed to the same region as the mesa width of the first straight waveguide 21 in the transition region 22.
[0019]
This is because, in the conventional example, the end face of the derivative film is located closest to each other, and the growth from the end face and the growth from the both side faces are joined to form a plurality of crystal plane orientations to induce abnormal growth. On the other hand, in the present invention, abnormal growth is not induced by keeping the end face of the dielectric film far away from the second linear waveguide 23, and the mesa width of the transition region 22 reaches the mesa width of the second linear waveguide 23. This is because the width gradually increases, so that even if growth of the grown film thickness proceeds on the mask, it does not reach the inside of the mesa width of the first linear waveguide 21.
[0020]
Further, as the spread angle of the transition region 22 increases, the growth component in the reverse mesa direction on the side surface increases and the growth component in the forward mesa direction decreases. In order to obtain a good embedding shape, it is preferable that the growth component in the reverse mesa direction is small. Therefore, it is desirable that the spread angle is smaller than 45 degrees at which both growth components are 1: 1. The divergence angle is set from 10 degrees to 45 degrees.
[0021]
In the second straight waveguide 23, a good buried structure similar to a mesa stripe produced in parallel to the reverse mesa direction on the side surface can be obtained. On the end face, growth proceeds in the direction on the mask, that is, in the reverse mesa direction, as in the case of the mesa stripe parallel to the forward mesa direction. Since this is less than or equal to the thickness of the growth layer, it is sufficient if the length of the second straight waveguide 23 is less than twice the growth layer thickness, that is, the mesa depth.
[0022]
The length of the second straight waveguide 23 is set to 1 to 2 times the mesa depth. In the vicinity of the boundary between the end surface and the side surface, growth in the direction of covering on the mask is observed, but the mesa width is 1 of the growth layer thickness, that is, the mesa depth so that the distance to the other side surface is sufficiently wider than the growth layer thickness. Since it is 5 times or more and 5 times or less, there is no bonding with the growth layer from the side as in the conventional example, and the mask is completely covered and a plurality of crystal plane orientations are formed. It becomes unstable and InP does not grow by inducing abnormal growth.
[0023]
As described above, when the present invention is used, a selective growth dielectric film is used in an optical semiconductor device in which a mesa stripe-shaped buried region having a dielectric film directly above and a rising growth region having no dielectric film are mixed. During selective embedding MOVPE growth, growth on the mesa stripe and abnormal growth of InP on the dielectric film are suppressed. As a result, an abnormal growth region that becomes a large absorption loss region in the case of an LD or the like does not occur, and different element structures can be monolithically integrated without impairing element characteristics.
[0024]
(Example)
Embodiments of the present invention will be described below with reference to FIGS. All growth in the examples is based on the MOVPE method. 4 to 6 show a process description of a method of manufacturing an optical semiconductor device according to an embodiment of the present invention.
[0025]
First, as shown in FIG. 4A, a multiple quantum well (MQW) layer 32 and a p-type (p-) InP cladding layer 33 are formed on an n-type (n-) InP substrate 31 having a (100) plane as a surface. A p-InGaAs cap layer 34 is grown on the entire surface. A SiO ₂ film 35 is formed on the entire surface by sputtering, and as shown in FIG. 4B, the SiO ₂ film 35 other than the LD region is removed by photolithography and CF 4 / H ₂ -RIE. Using the SiO ₂ film 35 as a mask, the p-InGaAs cap layer 34, the (p-) InP cladding layer 33, and the MQW layer 32 are sequentially removed by wet etching.
[0026]
As shown in FIG. 4C, the AWG waveguide layer 36, the i-type (i-) InP clad layer 37, and the InGaAs cap layer 38 are successively and selectively grown again using the SiO ₂ film 35 as a selective growth mask. As shown in FIG. 4 (d), after the SiO ₂ film 35 is removed by wet etching to form the SiO ₂ film 35 again. Stripes are formed by photolithography and CF4 / H ₂ -RIE. At this time, the stripe has an LD region corresponding to the first straight region (first straight waveguide 21 shown in FIG. 1), a stripe width of 1.5 μm, and a transition region (the transition region shown in FIG. 1) in the AWG region. 22) and the second linear region (second linear waveguide 23 shown in FIG. 1), the stripe width of the second linear region is set to 10 μm, and the transition region has a stripe width linearly from 1.5 μm to 10 μm. Change.
[0027]
As shown in FIG. 5A, dry etching is performed by CF 4 / H ₂ -RIE using the SiO ₂ film 35 as a mask to form a mesa stripe structure 26 having a depth of 3 μm. As shown in FIG. 5B, the SiO ₂ film 35 other than the region from the first linear region 41 to the transition region 42 and the end surface of the second linear region 43 is removed by photolithography and CF4 / H ₂ -RIE. To do. Thereby, the structure of the dielectric film of the present invention shown in FIG. 1 can be formed.
[0028]
As shown in FIG. 5C, the Fe-doped (Fe-) InP buried layer 39 is selectively grown using the SiO ₂ film 35 as a selective growth mask. At this time, due to the effects of the present invention described above, abnormal growth occurs within a stripe width of 1.5 μm in a region 3 μm or more away from the end surfaces of the first linear region 41, the transition region 42, and the second linear region 43. It is suppressed. As shown in FIG. 5 (d), after the SiO ₂ film 35 is removed by wet etching to form the SiO ₂ film 35 again. Grown rides AWG region by photolithography and CF4 / H ₂ -RIE (Fe-) removing the InP buried layer 39.
[0029]
As shown in FIG. 6 (a), after the SiO ₂ film 35 is removed by wet etching to form the SiO ₂ film 35 again. The SiO ₂ film 35 is formed into an AWG waveguide shape by photolithography and CF 4 / H ₂ -RIE. As shown in FIG. 6B, a high mesa structure 27 is formed by dry etching with Br ₂ -RIE using the SiO ₂ film 35 as a mask. As shown in FIG. 6 (c), an AuZnNi electrode 28 is formed in the LD portion, an AuGeNi electrode 29 is formed on the entire back surface, and an element end face is formed by cleavage.
[0030]
As described above, in the optical semiconductor device in which the buried region of the mesa stripe structure 26 having the SiO ₂ film 35 directly above and the AWG region which is the run-up growth region without the SiO ₂ film 35 are mixed, during the selective buried MOVPE growth, the mesa Growth on the stripe structure 26 and abnormal growth of InP on the SiO ₂ film 35 are suppressed. As a result, an abnormal growth region that becomes a large absorption loss region in the case of an LD or the like does not occur, and different element structures can be monolithically integrated without impairing element characteristics.
[0031]
In the above embodiment, the manufacturing method on the InP substrate has been described as an example. However, if the crystal structure and the anisotropy of the growth process are the same, for example, the present invention may be manufactured on a GaAs substrate. Is possible.
[0032]
【The invention's effect】
An optical semiconductor device manufacturing method according to the present invention includes an optical semiconductor device having a planar region having a planar structure formed on a semiconductor substrate and a stripe region having a mesa stripe structure having a dielectric film connected to the planar region. The stripe region is in contact with the first linear region having a linear mesa stripe structure, the transition region having a mesa stripe structure in which the mesa width gradually changes in contact with the first linear region, and in contact with the planar region. And the second linear region having the straight mesa stripe structure, it is possible to suppress the crystal growth on the mesa stripe structure or on the dielectric film when the crystal is grown by metal organic vapor phase epitaxy. it can. As a result, a heterogeneous element structure can be monolithically integrated without impairing characteristics, and an optical semiconductor device manufacturing method capable of realizing a high-performance monolithic integrated element can be achieved.
[Brief description of the drawings]
FIG. 1 is a process explanatory diagram of an optical semiconductor device manufacturing method according to an embodiment of the present invention.
FIG. 2 is a process explanatory diagram of a method of manufacturing an optical semiconductor device according to an embodiment of the present invention.
FIG. 3 is a process explanatory diagram of an optical semiconductor device manufacturing method according to an embodiment of the present invention.
FIG. 4 is a process explanatory diagram of a method of manufacturing an optical semiconductor device according to an embodiment of the present invention.
FIG. 5 is a process explanatory diagram of a method of manufacturing an optical semiconductor device according to an embodiment of the present invention.
FIG. 6 is a process explanatory diagram of a method for manufacturing an optical semiconductor device according to an embodiment of the present invention.
FIG. 7 is an explanatory view of a conventional method for manufacturing an optical semiconductor device.
FIG. 8 is an explanatory diagram of a conventional method for manufacturing an optical semiconductor device.
FIG. 9 is an explanatory diagram of a conventional method for manufacturing an optical semiconductor device.
[Explanation of symbols]
21 first linear waveguide 22 transition region 23 second linear waveguide 26 mesa stripe structure 27 high mesa structure 28 AuZnNi electrode 29 AuGeNi electrode 31 (n-) InP substrate 32 multiple quantum well (MQW) layer 33 (p-) InP cladding Layer 34 p-InGaAs cap layer 35 SiO ₂ film 36 AWG waveguide layer 37 (i-) InP cladding layer 38 InGaAs cap layer 39 InP buried layer 41 first linear region 42 transition region 43 second linear region

Claims (2)

A method of manufacturing an optical semiconductor device having a planar region having a planar structure formed on a semiconductor substrate and a stripe region having a mesa stripe structure having a dielectric film connected to the planar region,
The stripe region includes a first straight region having a straight mesa stripe structure, a transition region having a mesa stripe structure in which the mesa width gradually changes in contact with the first straight region, and the planar region in contact with the transition region. And a second linear region having a linear mesa stripe structure in contact with
A method of manufacturing an optical semiconductor device, comprising a step of selectively growing a crystal by a metal organic vapor phase epitaxy method next to the stripe region and on the planar region. In claim 1,
The mesa width of the straight mesa stripe structure of the first straight region is 3 μm or less;
The mesa width of the straight mesa stripe structure of the second straight region is 1.5 to 5 times the mesa depth, and the length is 1 to 2 times the mesa depth;
The mesa width of the transition area gradually changes from a mesa width in contact with the first straight line area to a mesa width in contact with the second straight line area, and a spread angle is set from 10 degrees to 45 degrees. A method for manufacturing an optical semiconductor device.

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