JP3620065B2 - Manufacturing method of multilayer printed wiring board - Google Patents

Description

[0001]
[Industrial application fields]
The present invention relates to a method for producing a multilayer printed wiring board that can easily obtain a fine pattern.
[0002]
[Prior art]
The line width and line spacing of printed wiring boards are becoming increasingly finer as LSIs are highly integrated and components are mounted more densely. However, conventional printed wiring board manufacturing methods--for example, the subtract method of forming a circuit pattern by etching a copper-clad laminate tends to cause disconnection or short-circuit due to dents or scratches on the surface copper foil. Further, since the line width accuracy due to surface irregularities and undulations is lowered, a line width of 100 μm or less is the processing limit.
Therefore, an additive method for forming a circuit by plating on a necessary part or a semi-additive method for forming a circuit by quick etching after plating on a necessary part of a copper-clad laminate using a copper foil having a thickness of 5 to 9 μm. Is suitable for forming fine patterns. However, in the additive method, it is difficult to form a fine pattern of 80 μm or less due to the roughness of the substrate surface, the copper-free phenomenon of plating, and the semi-additive method due to defects and characteristics of the copper-clad laminate itself.
[0003]
Therefore, as a method of manufacturing a wiring board suitable for forming a fine pattern, as seen in Japanese Patent Publication No. 63-37515 and Japanese Patent Publication No. 1-58878, a plating resist is formed on a conductive holding body, A metal layer composed of a metal layer different from the method for removing the holding body and another metal layer is formed by plating, and after removing the plating resist, an insulating base material is adhered and laminated on the surface of the metal layer, and the metal layer is A method of manufacturing a wiring board that embeds a conductor circuit in which the holding body is removed until it is exposed is often used. With this manufacturing method, a circuit pattern having a line width and a line interval of about 40 μm can be stably formed with less occurrence of short circuit and short circuit, and there is also an advantage that the substrate surface becomes smooth without side etching of the circuit pattern. .
[0004]
On the other hand, not only is the line width and line spacing thinner as the density of component mounting is increased, but also the electrical connection used for electrical connection between one wiring layer and another wiring layer in which the number of conductive holes is increasing. The hole is conventionally formed by laminating a plurality of wiring layers, then making a hole penetrating the whole and plating the inner wall of the hole. However, in this method, holes are made to penetrate through the whole, and therefore wiring must be performed avoiding the through holes in the wiring layer unrelated to the connection, which becomes an obstacle to freedom of design and high density of wiring. Yes.
[0005]
In view of this, a method of forming a so-called via hole, in which only the adjacent wiring layer is wired instead of using only the hole penetrating the entire wiring board, has been developed. Currently, the following two methods are basically known.
[0006]
The first method is a method in which adjacent wiring layers are formed first, and connection holes are formed so as to be multilayered. As an example of this method, a hole is made in a double-sided copper-clad laminate, electroless plating is applied to the inner wall of the hole, or electroplating is performed if necessary to form a connecting conductor, and only one unnecessary portion of copper foil on one side is etched. Remove and leave copper foil on the other side, stack and integrate with other substrates, then drill holes through the whole and metallize the inner wall of the hole, or wiring layer on the surface of the insulating substrate Forming a layer with a photosensitive insulating material on the surface of the wiring layer, irradiating and developing light so as to remove only the portion that becomes the conduction hole, roughening the surface of this insulating material, There is a method of forming a conductor by electroless plating a circuit conductor on the inner wall of a hole. In any of these techniques, further necessary wiring layers are formed by the same technique to be multilayered.
[0007]
The second method is a method of laminating a substrate on which a wiring layer has been formed in advance, and connecting a surface layer and a layer that connects to the surface layer. The feature is that it can only be opened. As a specific example of this method, a plurality of wiring layers and insulating layers that support them are alternately stacked, copper foil is left on the surface, and the depth reaching the layer connected to the portion connected to the surface circuit is reached. Now, drill holes and metallize the inner wall of the hole, or use laser light to make holes, and prevent the laser light from being irradiated to the layers that do not require connection. There is a method of leaving the foil.
[0008]
[Problems to be solved by the invention]
However, the conventional methods for forming these via holes have the following problems.
When a double-sided copper-clad laminate is used in the first method, since the circuit is formed on one side, the dimensional change of the substrate is likely to occur, and when stacking a plurality of substrates, the positional accuracy between the wiring layers is sufficient. Care must be taken and the thickness of the other conductor is increased by the plating performed for connection of the inner wall of the conduction hole, and it is difficult to reduce the overall thickness when multilayered. In addition, when using a photosensitive material as an insulating layer between each wiring layer, there are few materials that can simultaneously satisfy the roughening treatment for increasing the adhesion of plating and the photosensitivity for providing a through hole. Adhesion is not sufficient.
[0009]
When the drill is used in the second method, there is a variation in the substrate thickness, and the position accuracy for stopping the progress of the drill at the connecting position cannot be increased. Moreover, when using a laser, an apparatus is expensive. In this method, wiring cannot be made on other layers between the surface layer and the connection layer at the location where the hole is made.
[0010]
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for producing a multilayer printed wiring board that is easy in interlayer connection and excellent in wiring density.
[0011]
[Means for Solving the Problems]
The manufacturing method of the multilayer printed wiring board of this invention is characterized by including the following processes. That is,
(A) A plating resist is formed in a desired shape on the surface of the holding body having conductivity, and a metal layer A different from the removal conditions of the holding body and a metal layer B different from the removal conditions of the metal layer A are plated forming a desired circuit pattern, wherein an adhesive layer provided on a surface on the basis of the circuit pattern on the surface of the removal of the plating resist step (b) the holder, and the substrate and the adhesive layer in a state of B-stage Step (c) Step of making a hole in the substrate (d) Step of overlaying the substrate with the hole on the adhesive layer side so that another substrate is in contact with the substrate, and pressurizing and heating to integrate the layers ( e) A step of forming a conductor circuit at a necessary portion of the laminated and integrated substrate and removing the holding body until the circuit pattern formed by the plating is exposed.
(F) A plating resist is formed in a desired shape on the surface of another holding body having conductivity, and the metal layer C is different from the removal conditions for the other holding body, and the metal layer D is different from the removal conditions for the metal layer C. Forming a desired circuit pattern by plating and removing the plating resist
(G) A step of providing an adhesive layer on the surface of the other holding body on which a circuit pattern is formed, and setting the adhesive layer in a B-stage to form a substrate
(H) A step of making a hole in the substrate obtained in the step (g).
(I) A step of stacking and integrating so that the substrate manufactured in the step (e) is in contact with the adhesive layer side of the substrate having the holes obtained in the step (h) and pressurizing and heating.
(J) Step of repeating the steps (f) to (i) as necessary to form a multilayer.
In addition, the following steps can also be used in order to make the circuit pattern formed on the holding body finer and realize stable circuit formation.
(A) In the step of forming a circuit pattern on the surface of the holding body, a plating resist is formed in a desired shape on the surface of the holding body, and a first metal layer E that can be removed together with the holding body is formed by plating, A step of forming a second metal layer comprising a metal layer F different from the removal condition of the holder and a metal layer G different from the removal condition of the metal layer F by plating, and removing the plating resist (b) the holder A step of providing an adhesive layer on the surface on which the circuit pattern is formed and setting the adhesive layer in a B-stage state as a substrate (c) a step of making a hole in the substrate (d) a substrate having the hole (E) forming a conductor circuit at a necessary portion of the laminated and integrated substrate, and stacking and integrating so that another substrate is in contact with the other adhesive layer side and pressurizing and heating; Time formed by plating Removing the retaining member until the pattern is exposed [0013]
(F) A plating resist is formed in a desired shape on the surface of another holding body having conductivity, and the metal layer C is different from the removal conditions for the other holding body, and the metal layer D is different from the removal conditions for the metal layer C. Step (g) of removing the plating resist by plating the surface of the other holding body, providing an adhesive layer on the surface on which the circuit pattern is formed, and applying the adhesive layer to the B stage to the adhesive layer side of the step (h) stroke (g) in the obtained substrate to drilling step (i) stroke (h) groups spaced resulting hole in plate to the substrate, the step ( (e) A step of superimposing the substrates produced in step e) so as to come into contact with each other, pressurizing and heating and stacking and integrating (j) a step of multilayering by repeating the steps (f) to (i) as necessary. ]
Or
(F) In the step of forming a circuit pattern on the surface of the holding body, a plating resist is formed in a desired shape on the surface of the holding body, and a first metal layer H that can be removed together with the holding body is formed by plating, A step (g) of removing the plating resist by forming a second metal layer composed of a metal layer I different from the removal condition of the holder and a metal layer J different from the removal condition of the metal layer I by plating. A process of providing an adhesive layer on the surface of the holding body on which the circuit pattern is formed, and forming a hole in the substrate obtained in the step (h) and the step (g) using the adhesive layer as a substrate in the B stage state (i) step the adhesive layer side of the base plate spaced resulting hole in (h), superposed as the substrate fabricated in the step (e) is in contact, integrally laminating pressurized and heated Step (j) If necessary, the steps (f) to (i) The repetition, the process of multi-layered [0015]
The holding body used in the present invention may be a copper foil plated so as to be peelable on a stainless steel plate or the like, and a copper foil that has already been torn or rolled may be used. In addition, the metal layer different from the removal condition of the holder and the other metal layer different from the removal condition of the metal layer may be gold, nickel, solder, gold and copper, nickel and copper, etc. In the case of two or more types, the removal condition of the metal facing the holding body needs to be different from that of the holding body.
The metal layer that can be removed together with the holding body is preferably a metal of the same quality as the holding body. The thickness of the metal layer is about 3 μm as long as the holding body can be slightly scratched, dented, or buried.
[0016]
As the adhesive, an epoxy resin-based adhesive, an acrylic-modified resin-based, or a polyimide resin-based adhesive can be used, and these can be applied by roll coating, dip coating, curtain coating, or the like. In addition, films made of these adhesives can also be used. Epoxy adhesive films such as G604 (manufactured by Hitachi Chemical Co., Ltd., trade name), acrylic modified resin films such as Piralux (trade name, manufactured by DuPont) Alternatively, a polyimide adhesive film such as AS-2210 (trade name, manufactured by Hitachi Chemical Co., Ltd.) can be used. These adhesive films are bonded to the circuit forming surface of the conductive holding body on which a circuit pattern is formed by plating. After bonding, it is necessary to be in a B stage state.
The B stage referred to in the present invention is a state of being bonded to the surface on which the circuit pattern of the holding body is formed, and does not have tackiness at 40 ° C. or less, and the adhesive strength is 0.8 kgf / cm by subsequent multilayer bonding. ^A semi-cured state that can give ^two or more. Such a B-stage state method is performed by heating at a temperature and time that do not completely cure, as in a normal resin. This degree is usually obtained experimentally.
Further, in the step of stacking and integrating by pressurization and heating, the flow amount of the adhesive layer of the B stage is preferably less than 200 μm with respect to the surface direction of the substrate. If this flow amount is large, when pressurized and heated, it spreads on the wiring conductors of other wiring boards, and the area connected by plating is reduced, thereby reducing connection reliability.
[0017]
[Action]
In the method according to the present invention, since the adhesive is used in the state of the B stage, drilling is easy, and it is possible to bond to other wiring boards by subsequent pressure heating. Furthermore, since a fine wiring pattern can be formed by a manufacturing method in which a conductor circuit to be a surface pattern is embedded in an insulating material, two-dimensional high density can be achieved and the wiring capacity can be greatly improved.
[0018]
【Example】
Example 1
As shown in FIG. 1A, after polishing the stainless steel surface, copper sulfate plating with a thickness of 20 μm was performed on the entire surface (shown in FIG. 1B).
Next, after polishing the copper surface with sandpaper, the photoresist is laminated with a roll laminator, applied with a positive mask, irradiated with ultraviolet light, developed with a developer, and as shown in FIG. A pattern was formed. Subsequently, copper plating is performed at a thickness of 3 μm, flaws attached by polishing are filled, gold plating is performed at a thickness of 1 μm, copper sulfate plating is further performed at 30 μm, and the resist is stripped with a resist stripping solution to form a circuit pattern. (Shown in FIG. 1 (d)).
Next, the stainless steel plate is subjected to black oxidation treatment, G604 (trade name, manufactured by Hitachi Chemical Co., Ltd.), which is an adhesive film, is pasted on the circuit pattern forming surface, and the pressure is 10 kgf / cm ^2. After heating to 150 ° C. for 7 minutes to form a B stage (shown in FIG. 1E), the copper foil on which the circuit pattern was formed was peeled off from the stainless steel plate (shown in FIG. 1F). .
Subsequently, as shown in FIG. 1 (g), holes are drilled in connection portions in accordance with the circuit pattern by a numerically controlled drill machine. At this time, the smallest hole diameter was 0.25 mm.
Subsequently, the other inner layer plate as shown in FIG. 1 (h) is brought into contact with the adhesive layer side of the substrate having the hole formed therein, and the pressure is 40 kgf / cm ^2. The laminate was integrated by pressurizing and heating at 170 ° C. for 45 minutes (shown in FIG. 1 (i)).
Subsequently, a hole penetrating the entire laminated plate was formed (shown in FIG. 1 (j)), and copper plating was performed on the entire surface (shown in FIG. 1 (k)).
Subsequently, an etching resist is formed at a necessary portion, and copper on the surface is removed by etching until the built-in gold plating is exposed, so that a desired wiring pattern as shown in FIG. A multilayer printed wiring board was manufactured.
[0019]
Example 2
As shown in FIG. 2A, after polishing the stainless steel surface, copper sulfate plating with a thickness of 20 μm was performed on the entire surface (shown in FIG. 2B).
Next, after polishing the copper surface with sandpaper, the photoresist is laminated with a roll laminator, applied with a positive mask and irradiated with ultraviolet light, and developed with a developer. As shown in FIG. A pattern was formed. Subsequently, gold plating was performed at a thickness of 1 μm, copper sulfate plating was further performed at 30 μm, and the resist was stripped with a resist stripping solution to form a circuit pattern (shown in FIG. 2D).
Next, the stainless steel plate is subjected to black oxidation treatment, and a G604 (made by Hitachi Chemical Co., Ltd., trade name) layer as an adhesive film is provided on the circuit pattern forming surface, and the pressure is 10 kgf / cm ² and 150 ° C. for 7 minutes. After heating to B stage (shown in FIG. 2 (e)), the copper foil on which the circuit pattern was formed was peeled off from the stainless steel plate (shown in FIG. 2 (f)).
Subsequently, as shown in FIG. 2 (g), holes are drilled in connection portions in accordance with the circuit pattern by a numerically controlled drill machine. At this time, the smallest hole diameter was 0.25 mm.
Subsequently, the substrate having the holes formed thereon is laminated so that another inner layer plate as shown in FIG. 2 (h) is in contact with the adhesive layer side of the substrate, and heated and pressurized to be integrated (FIG. 2 ( Shown in i)). The lamination conditions at this time were 45 minutes at a pressure of 40 kgf / cm ² and 170 ° C.
Subsequently, copper plating having a thickness of 15 μm was performed on the surface of the laminated plate (shown in FIG. 2 (j)).
Next, an etching resist was formed at a necessary location, and the copper on the surface was removed by etching until the built-in gold plating was exposed to form a circuit conductor (shown in FIG. 2 (k)). The wiring boards prepared in this way were stacked so as to be in contact with the adhesive layer side of the substrate separately manufactured in the same steps as FIGS. (It is shown in FIG. 2 (l)). The lamination conditions at this time were as follows: pressure 40 kgf / cm ² , At 170 ° C. for 45 minutes.
Such multilayering is repeated, and after the final lamination, an etching resist is formed, and copper on the surface is removed by etching until the built-in gold plating circuit pattern is exposed, as shown in FIG. A multilayer printed wiring board in which a desired wiring pattern was embedded in a substrate was manufactured.
[0020]
【The invention's effect】
As described above, according to the present invention, it is possible to provide a simple method for producing a multilayer printed wiring board with excellent wiring density, and the following advantages are achieved.
(1) Since it is laminated after forming a fine circuit pattern in advance, it can be inspected before lamination and the yield is improved, and via holes are drilled according to the circuit pattern before lamination, so the position between the surface layer circuit pattern and the hole Accuracy is improved.
(2) Since the via hole is drilled before the multilayer bonding, the circuit pattern of the inner layer substrate can be confirmed from the drilled hole, and the interlayer position accuracy is improved.
(3) When a multilayer printed wiring board for thin objects is manufactured, the surface circuit pattern is embedded in the substrate and protected by a metal layer that is corrosion resistant to the etching solution. Is expensive.
[Brief description of the drawings]
FIG. 1A to FIG. 1L are cross-sectional views in respective steps for explaining an embodiment of the present invention.
FIGS. 2A to 2M are cross-sectional views in each step for explaining another embodiment of the present invention. FIGS.
[Explanation of symbols]
1. Stainless steel plate 2. Copper sulfate plating Resist pattern 4. 4. plating circuit pattern Adhesive 6. 6. Holes that are non-through holes Inner layer board 8. Non-through hole 9. Through hole 10. Plated copper 11. Circuit conductor formed by etching resist 12. Built-in circuit pattern

Claims (3)

The manufacturing method of the multilayer printed wiring board characterized by including the following processes.
(A) A plating resist is formed in a desired shape on the surface of the holding body having conductivity, and a metal layer A different from the removal conditions of the holding body and a metal layer B different from the removal conditions of the metal layer A are plated forming a desired circuit pattern, wherein an adhesive layer provided on a surface on the basis of the circuit pattern on the surface of the removal of the plating resist step (b) the holder, and the substrate and the adhesive layer in a state of B-stage Step (c) Step of making a hole in the substrate (d) Step of overlaying the substrate with the hole on the adhesive layer side so that another substrate is in contact with the substrate, and pressurizing and heating to integrate the layers ( e) a step of forming a conductor circuit at a necessary portion of the laminated and integrated substrate and removing the holding body until the circuit pattern formed by the plating is exposed. (f) of another holding body having conductivity. Put the desired shape on the surface A step of forming a resist, plating a metal layer C different from the removal conditions of the other holding body, and a metal layer D different from the removal conditions of the metal layer C to form a desired circuit pattern, and removing the plating resist (G) An adhesive layer is provided on the surface of the other holding body on which a circuit pattern is formed, and the adhesive layer is obtained in the step (h) step (g) in which the adhesive layer is placed in a B-stage state . the adhesive layer side of the base plate with holes obtained in the board on the drilling step (i) stroke (h), superposed as the substrate fabricated in the step (e) is in contact, pressure heating Step (j) of stacking and integrating (Step) Repeating steps (f) to (i) as necessary to make a multilayer In the step of forming a circuit pattern on the surface of the holding body, a plating resist is formed in a desired shape on the surface of the holding body, and a first metal layer E that can be removed together with the holding body is formed by plating. a second metal layer made of the removal condition and the different metal layers F and the different metal layers G removal conditions of the metal layer F is formed by plating, according to claim 1, characterized in that the removal of the plating resist Manufacturing method for multilayer printed wiring boards In the step of laminating and integrating pressurized and heated, the flow amount of the adhesive layer of the B stage according to claim 1 or 2, characterized in that an adhesive is less than 200μm to the surface direction of the substrate A method for manufacturing multilayer printed wiring boards.

Images