JP3541864B2 - Printed board - Google Patents

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Publication number
JP3541864B2
JP3541864B2 JP31300596A JP31300596A JP3541864B2 JP 3541864 B2 JP3541864 B2 JP 3541864B2 JP 31300596 A JP31300596 A JP 31300596A JP 31300596 A JP31300596 A JP 31300596A JP 3541864 B2 JP3541864 B2 JP 3541864B2
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Japan
Prior art keywords
pins
distance
pin
pin insertion
insertion holes
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JP31300596A
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Japanese (ja)
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JPH10145022A (en
Inventor
勝人 三村
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Seiko Epson Corp
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Seiko Epson Corp
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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0286—Programmable, customizable or modifiable circuits
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/119—Details of rigid insulating substrates therefor, e.g. three-dimensional details
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/306—Lead-in-hole components, e.g. affixing or retention before soldering, spacing means

Description

【０００１】
【発明の属する技術分野】
本発明は、ＩＣを実装するプリント基板に関し、より詳細には、配列されたピンのピッチや間隔の異なる２つのＩＣを実装することが可能なプリント基板に関する。
【０００２】
【従来の技術】
ベーク板やエポキシ系の板に薄い銅箔を貼り付けたプリント基板に、回路図にしたがって不要な銅箔を取り去って配線パターンを形成し、基板上にピン挿通孔を穿設してＩＣを取付けるようにすることは、プリント基板の実装技術として良く知られている。
【０００３】
この種の基板に設けるピン挿通孔は、実装されるＩＣのピンのピッチや間隔などに対応して穿設されるが、同一機能を有するＩＣであっても部品メーカによってはピンのピッチやその間隔などが異なるため、別メーカのＩＣを実装するような場合には、それに適合したピン挿通孔をプリント基板に穿設し直さなくてはならないといった問題が生ずる。
【０００４】
このような問題に対しては、それぞれのＩＣのピンのピッチや間隔に適合するように、２種のピン挿通孔をキリによって穿設しておけばよいが、プリント基板を大量に成形すべくこれらの孔をプレス加工によって打抜き成形した場合には、各孔が繋がった長孔になってしまって、それぞれのＩＣのピンを摩擦力によって保持することができなくなるといった不都合が生じる。
【０００５】
【発明が解決しようとする課題】
本発明はこのような問題に鑑みてなされたもので、その目的とするところは、ピン配列のピッチや間隔の異なる２つのＩＣを共通のピン挿通孔に選択的に実装可能とする新たなプリント基板を提供することにある。
【０００６】
【課題を解決するための手段】
すなわち、本発明はこのような課題を達成するためのプリント基板として、配列されたピンのピッチもしくは間隔の少なくとも一方が異なる２つのＩＣを選択的に実装可能とすべく、基板に打抜き形成する共通のピン挿通孔として、該ピン挿通孔同士の互いに向かい合う側の孔縁の相互間の寸法を、前記ピンの弾性限界の範囲でピッチもしくは間隔が狭い方のピンの互いに向かい合う側の表面間の距離よりも広く、かつ上記ピン挿通孔同士の互いに離隔し合う側の孔縁の相互間の寸法を、ピッチもしくは間隔が広い方のピンの互いに離隔し合う側の表面間の距離よりも狭くし、前記ピンを弾性変形させて挿入するものである。
【０００７】
【発明の実施の形態】
そこで以下に本発明の実施例について説明する。
図１は本発明の一実施例を示すもので、間隔が同一で、ピッチの異なる２つのＩＣを実装可能にする実施例について示したものであって、図中符号１１、１２は、２つの異なるＩＣの各ピンａ、Ａを挿通可能に打抜き形成したピン挿通孔で、この実施例においては、両端のピン挿通孔１１と中央のピン挿通孔１２を平行に２列に配列したものとして構成されている。
【０００８】
ピッチ方向に配列されたこれらのピン挿通孔１１、１２は、図１（ａ）に示したように、ピッチが狭い方のピンａを摩擦保持することができるように、各ピン挿通孔１１、１２の互いに向かい合う側の孔縁１３、１３の相互間の寸法Ｐｎを、ピンａの互いに向かい合う側の表面１４、１４の間の距離Ｌｎよりもピンａの弾性変形の限界を超えない程度に広くし、また、図１（ｂ）に示したように、ピッチが広い方のピンＡを摩擦保持することができるように、各ピン挿通孔１１、１２の互いに離隔し合う側の孔縁１５、１５の相互間の寸法Ｐｗを、ピッチが広い方のピンＡの互いに離隔し合う側の表面１６、１６の間の距離ＬｗよりもピンＡの弾性変形の限界を超えない程度に狭くしたものである。
【０００９】
このように構成された実施例おいて、いま、ピッチの狭い方のＩＣを実装する場合には、図１（ａ）に示したように、各ピンａの互いに向かい合う側の表面１４、１４の間の距離Ｌｎは、ピン挿通孔１１、１２の互いに向かい合う側の孔縁１３、１３の相互間の寸法Ｐｎよりも小さいため、これらのピンａは、図中の２点鎖線で示したピン位置から実線で示したピン位置へ、互いにピッチ方向にＰｎ−Ｌｎの距離だけ拡開変形しながらピン挿通孔１１に圧入される。
【００１０】
このため、各ピンａの互いに向かい合う側の表面１４、１４は、ピン挿通孔１１、１２の互いに向かい合う側の孔縁１３、１３に強く圧接し、その圧接力に比例した摩擦力によって、外周面全体でピンを保持する従来の基板と同程度の保持力をもって保持される。
【００１１】
一方、ピッチが広い方のＩＣを実装する場合には、図１（ｂ）に示したように、ピンＡの互いに離隔し合う側の表面１６、１６の間の距離Ｌｗは、ピン挿通孔１１、１２の互いに離隔し合う側の孔縁１５、１５の相互間の寸法Ｐｗよりも大きいため、これらのピンＡは、図中の２点鎖線で示したピン位置から実線で示したピン位置へ、互いにピッチ方向にＬｗ−Ｐｗの距離だけ圧縮変形しながらピン挿通孔１１に圧入される。
【００１２】
したがって、各ピンＡのピッチ方向の互いに離隔し合う側の表面１６、１６は、ピン挿通孔１１、１２の互いに離隔し合う側の孔縁１５、１５に強く圧接し、その圧接力に比例した摩擦力によって基板上に保持されることになる。
【００１３】
図２は、ピッチが等しく、間隔が異なる２つのＩＣを実装可能にする実施例について示したもので、ピン挿通孔２１は、間隔の狭い方のピンａと間隔の広い方のピンＡに対応できるように、その孔２１の長手方向を間隔方向に向けて配列されている。
【００１４】
これらのピン挿通孔２１は、図２（ａ）に示したように、間隔が狭い方のピンａを保持することができるように、間隔方向に配列されたピン挿通孔２１、２１の互いに向かい合う側の孔縁２３、２３の相互間の寸法Ｔｎを、ピンａの互いに向かい合う側の表面２４、２４の間の距離Ｍｎよりも広くし、また、間隔が広い方のピンＡを保持することができるように、図２（ｂ）に示したように、間隔方向に配列されたピン挿通孔２１、２１の互いに離隔し合う側の孔縁２５、２５の相互間の寸法Ｔｗを、間隔が広い方のピンＡの互いに離隔し合う側の表面２６、２６の間の距離Ｍｗよりも狭くなるように打抜き形成されている。
【００１５】
このように構成された実施例おいて、いま、間隔Ｔが狭い方のＩＣを実装する場合には、図２（ａ）に示したように、各ピンａの互いに向かい合う側の表面２４、２４が、ピン挿通孔２１、２１の互いに向かい合う側の孔縁２３、２３に強く圧接され、これらのピンａは、その圧接力に比例した摩擦力によって基板上に保持される。
【００１６】
また、間隔Ｔが広い方のＩＣを実装する場合には、図２（ｂ）に示したように、各ピンＡの互いに離隔し合う側の表面２６、２６が、ピン挿通孔２１、２１の互いに離隔し合う側の孔縁２５、２５に強く圧接されるため、これらのピンＡは、その圧接力に比例した摩擦力によって基板上に保持される。
【００１７】
図３は、一方が他方に対してピッチが広くかつ間隔が狭い関係にある２つのＩＣを実装可能にする実施例について示したもので、これらのピンａを保持することができるように、ピン挿通孔３１、３２のピッチ方向外側に位置する孔縁３３、３３間の寸法Ｐｗを、ピンａのピッチ方向の相対向する表面間の距離Ｌｗよりも狭くするとともに、ピン挿通孔３１、３１の間隔方向内側の孔縁３３、３３間の寸法Ｔｎを、ピンａの間隔方向の相対向する表面間の距離Ｍｎよりも広くして、各ピンａを、内側の孔縁３３、３３によって、ピッチ方向にはＬｗ−Ｐｗに縮小変形、間隔方向にはＴｎ−Ｍｎに拡開変形させることによって生じる強い摩擦力により基板上に保持するように構成されている。
【００１８】
図４は、一方が他方に対してピッチ及び間隔がともに狭い関係にある２つのＩＣを実装可能にする実施例について示したもので、これらのピンａを保持することができるように、ピン挿通孔４１、４２のピッチ方向及び間隔方向の内側に位置する孔縁４３、４３間の各寸法Ｐｎ、Ｔｎを、それぞれのピンａのピッチ方向及び間隔方向の各対向面間の各距離Ｌｎ、Ｍｎよりも広くして、各ピンａをピッチ方向及び間隔方向それぞれＰｎ−Ｌｎ、Ｔｎ−Ｍｎに相当する量に拡開変形させつつピン挿通孔４１、４２に圧入し、その際の強い摩擦力により基板上に保持するように構成したものである。
【００１９】
なお、上述した実施例では、ピッチ方向に３本のピンを配列したＩＣを基板に実装する場合についてのものであるが、これ以外のピン数を有するＩＣについても本発明を適用することができる。
【００２０】
【発明の効果】
以上述べたように本発明によれば、打抜きにより形成したピン挿通孔が例え楕円形を呈した場合でも、ＩＣの各ピンを挿通孔の縁によって規制しつつ拡開もしくは圧縮変形させ、その際に生じる圧接力に比例した大きな摩擦力によって、従来のものと同様に、ＩＣを基板上に強固に保持することができる。
【図面の簡単な説明】
【図１】本発明の一実施例をなすピン挿通孔の配列構成を示す図で、（ａ）はピッチの狭い方、（ｂ）はピッチの広い方を各々示した図である。
【図２】同上基板の第２の実施例を示すもので、（ａ）は間隔の狭い方、（ｂ）は間隔の広い方を各々示した図である。
【図３】同上基板の第３の実施例を示した図である。
【図４】同上基板の第４の実施例を示した図である。
【符号の説明】
１１、１２、２１ ピン挿通孔
１３、２３ ピン挿通孔の互いに向かい合う側の孔縁
１４、２４ ピンの互いに向かい合う側の表面
１５、２５ ピン挿通孔の互いに離隔し合う側の孔縁
１６、２６ ピンの互いに離隔し合う側の表面
ａ 拡開変形しながらピン挿通孔に挿入されるピン
Ａ 圧縮変形しながらピン挿通孔に挿入されるピン
Ｐｎ、Ｐｗ ピッチ方向の孔縁間の寸法
Ｌｎ、Ｌｗ ピッチ方向のピン表面間の距離
Ｔｎ、Ｔｗ 間隔方向の孔縁間の寸法
Ｍｎ、Ｍｗ 間隔方向のピン表面間の距離[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a printed circuit board on which ICs are mounted, and more particularly, to a printed circuit board on which two ICs having different pitches and intervals of arranged pins can be mounted.
[0002]
[Prior art]
Unnecessary copper foil is removed according to the circuit diagram to form a wiring pattern on a printed circuit board on which a thin copper foil is pasted on a bake board or epoxy-based board, and a pin insertion hole is formed on the board to mount an IC. This is well known as a printed circuit board mounting technique.
[0003]
The pin insertion holes provided in this type of substrate are formed in accordance with the pitch and interval of the pins of the IC to be mounted. However, even for ICs having the same function, the pin pitch and the Since the intervals and the like are different, when an IC of another manufacturer is mounted, there arises a problem that a pin insertion hole suitable for that must be re-drilled in the printed circuit board.
[0004]
To solve such a problem, two kinds of pin insertion holes may be formed by drilling so as to be adapted to the pitch and interval of the pins of each IC. If these holes are stamped and formed by press working, there is a disadvantage that each hole becomes a continuous long hole and the pins of each IC cannot be held by the frictional force.
[0005]
[Problems to be solved by the invention]
The present invention has been made in view of such a problem, and an object of the present invention is to provide a new print that enables two ICs having different pin arrangement pitches and intervals to be selectively mounted in a common pin insertion hole. It is to provide a substrate.
[0006]
[Means for Solving the Problems]
That is, according to the present invention, as a printed circuit board for achieving such a problem, a common board formed by stamping and forming two ICs having at least one of different pitches or intervals between the arranged pins can be selectively mounted. as the pin insertion hole, the dimensions of mutual hole edge on the side facing each other of the pin insertion holes each other, the distance between the mutually facing side surfaces of the pins towards the pitch or spacing is narrow range of an elastic limit of said pin Wider, and the distance between the hole edges on the side of the pin insertion holes that are spaced apart from each other is smaller than the distance between the surfaces of the pins that are spaced apart from each other on the pitch or the wider pin , The pin is elastically deformed and inserted .
[0007]
BEST MODE FOR CARRYING OUT THE INVENTION
Therefore, embodiments of the present invention will be described below.
FIG. 1 shows an embodiment of the present invention, which shows an embodiment in which two ICs having the same interval and different pitches can be mounted, and reference numerals 11 and 12 in the figure denote two ICs. Pin insertion holes formed by punching pins a and A of different ICs so that they can be inserted. In this embodiment, the pin insertion holes 11 at both ends and the pin insertion hole 12 at the center are arranged in two rows in parallel. Have been.
[0008]
As shown in FIG. 1A, the pin insertion holes 11 and 12 arranged in the pitch direction are provided so that the pin a having a smaller pitch can be frictionally held. The dimension Pn between the opposing side edges 13 and 13 of the pin 12 is wider than the distance Ln between the opposing surfaces 14 and 14 of the pin a so as not to exceed the limit of the elastic deformation of the pin a. Also, as shown in FIG. 1 (b), in order to be able to frictionally hold the pin A having the larger pitch, the hole edges 15 of the pin insertion holes 11, 12 on the side separated from each other, 15 is smaller than the distance Lw between the surfaces 16, 16 on the side of the pin A having the larger pitch which are separated from each other so as not to exceed the limit of the elastic deformation of the pin A. is there.
[0009]
In the embodiment configured as described above, when an IC having a narrower pitch is to be mounted, as shown in FIG. Since the distance Ln between them is smaller than the dimension Pn between the hole edges 13, 13 on the side facing each other of the pin insertion holes 11, 12, these pins a are located at the pin positions indicated by two-dot chain lines in the figure. Are press-fitted into the pin insertion holes 11 while being expanded and deformed by a distance of Pn-Ln in the pitch direction from each other to a pin position indicated by a solid line.
[0010]
For this reason, the surfaces 14, 14 on the side facing each other of each pin a strongly press against the hole edges 13, 13 on the side facing each other of the pin insertion holes 11, 12. It is held with the same holding force as a conventional substrate that holds pins as a whole.
[0011]
On the other hand, when an IC having a wider pitch is mounted, as shown in FIG. 1B, the distance Lw between the surfaces 16 of the pins A on the side separated from each other is equal to the pin insertion hole 11. , 12 are larger than the distance Pw between the hole edges 15, 15 on the side separated from each other, these pins A are moved from the pin position indicated by the two-dot chain line in the drawing to the pin position indicated by the solid line. Are pressed into the pin insertion holes 11 while being compressed and deformed by a distance of Lw-Pw in the pitch direction.
[0012]
Therefore, the surfaces 16, 16 of the pins A, which are separated from each other in the pitch direction, are strongly pressed against the hole edges 15, 15 of the pin insertion holes 11, 12 which are separated from each other, and are proportional to the pressing force. It will be held on the substrate by the frictional force.
[0013]
FIG. 2 shows an embodiment in which two ICs having the same pitch and different intervals can be mounted, and the pin insertion holes 21 correspond to the pin a having a smaller interval and the pin A having a wider interval. The holes 21 are arranged such that the longitudinal direction of the holes 21 is oriented in the interval direction so that the holes 21 can be formed.
[0014]
As shown in FIG. 2A, these pin insertion holes 21 face each other of the pin insertion holes 21 arranged in the interval direction so as to be able to hold the pin a having a smaller interval. The dimension Tn between the side hole edges 23, 23 is made larger than the distance Mn between the opposing surfaces 24, 24 of the pin a, and the pin A with the larger space can be held. As shown in FIG. 2 (b), the dimension Tw between the hole edges 25, 25 on the side of the pin insertion holes 21, 21 arranged in the space direction, which are spaced apart from each other, is set to be large as shown in FIG. The pin A is formed by punching so as to be smaller than the distance Mw between the surfaces 26, 26 on the side separated from each other.
[0015]
In the embodiment configured as described above, when mounting an IC having a smaller interval T, as shown in FIG. 2A, the surfaces 24, 24 of the pins a facing each other, as shown in FIG. Are strongly pressed against the hole edges 23, 23 of the pin insertion holes 21, 21 facing each other, and these pins a are held on the substrate by a frictional force proportional to the pressing force.
[0016]
In the case where an IC having a larger interval T is mounted, as shown in FIG. 2B, the surfaces 26, 26 of the pins A on the side separated from each other are formed in the pin insertion holes 21, 21, respectively. Since the pins A are strongly pressed against the hole edges 25, 25 on the side separated from each other, these pins A are held on the substrate by a frictional force proportional to the pressing force.
[0017]
FIG. 3 shows an embodiment in which two ICs, one of which has a wide pitch and a narrow interval with respect to the other, can be mounted. The dimension Pw between the hole edges 33, 33 located on the outer side in the pitch direction of the insertion holes 31, 32 is made smaller than the distance Lw between the opposing surfaces of the pins a in the pitch direction, and the pin insertion holes 31, 31 are made smaller. The dimension Tn between the inner hole edges 33, 33 in the interval direction is made larger than the distance Mn between the opposing surfaces in the interval direction of the pin a, and each pin a is pitched by the inner hole edges 33, 33. It is configured to be held on the substrate by a strong frictional force generated by reducing and deforming Lw-Pw in the direction and Tn-Mn in the spacing direction.
[0018]
FIG. 4 shows an embodiment in which one of the two ICs having a narrow relationship between the pitch and the interval with respect to the other can be mounted, and the pins are inserted so that these pins a can be held. The dimensions Pn, Tn between the hole edges 43, 43 located inside the pitch direction and the interval direction of the holes 41, 42 are determined by the distances Ln, Mn between the opposing surfaces of the respective pins a in the pitch direction and the interval direction. Each pin a is pressed into the pin insertion holes 41 and 42 while expanding and deforming each pin a to an amount corresponding to Pn-Ln and Tn-Mn in the pitch direction and the interval direction, respectively. It is configured to be held on a substrate.
[0019]
In the above-described embodiment, an IC in which three pins are arranged in a pitch direction is mounted on a substrate. However, the present invention can be applied to an IC having other numbers of pins. .
[0020]
【The invention's effect】
Or according to the mentioned way the present invention, even if the pin insertion hole formed by punching vent is exhibited oval example, is expanded or compressed and deformed while regulating the respective pins of the IC by an edge of the insertion hole, the The large frictional force proportional to the pressing force generated at this time enables the IC to be firmly held on the substrate as in the conventional case.
[Brief description of the drawings]
FIGS. 1A and 1B are diagrams illustrating an arrangement of pin insertion holes according to an embodiment of the present invention, wherein FIG. 1A illustrates a narrower pitch and FIG. 1B illustrates a wider pitch.
FIGS. 2A and 2B show a second embodiment of the same substrate, in which FIG. 2A is a diagram showing a narrower space and FIG. 2B is a diagram showing a wider space.
FIG. 3 is a view showing a third embodiment of the substrate.
FIG. 4 is a view showing a fourth embodiment of the substrate.
[Explanation of symbols]
11, 12, 21 Pin insertion holes 13, 23 Opposing edges 14, 24 of pin insertion holes Opposing surfaces 15, 25 Pins of insertion holes 16, 26 Pins on opposing sides 16, 26 pins Pins A which are inserted into the pin insertion holes while being expanded and deformed Pins Pn and Pw which are inserted into the pin insertion holes while being compressed and deformed Dimensions Ln and Lw between hole edges in the pitch direction Tn, Tw The distance between the pin edges in the spacing direction Mn, Mw The distance between the pin surfaces in the spacing direction

Claims (3)

配列されたピンのピッチもしくは間隔の少なくとも一方が異なる２つのＩＣを選択的に実装可能とすべく、基板に打抜き形成する共通のピン挿通孔として、該ピン挿通孔同士の互いに向かい合う側の孔縁の相互間の寸法を、前記ピンの弾性限界の範囲でピッチもしくは間隔が狭い方のピンの互いに向かい合う側の表面間の距離よりも広く、かつ上記ピン挿通孔同士の互いに離隔し合う側の孔縁の相互間の寸法を、ピッチもしくは間隔が広い方のピンの互いに離隔し合う側の表面間の距離よりも狭くし、前記ピンを弾性変形させて挿入することを特徴とするプリント基板。In order to selectively mount two ICs having at least one of different pitches or intervals between the arranged pins, a common pin insertion hole punched and formed in a substrate is provided as a hole edge on the side of the pin insertion holes facing each other. Are larger than the distance between the opposing surfaces of the pins having the smaller pitch or interval in the range of the elastic limit of the pin, and the holes on the side of the pin insertion holes that are separated from each other. A printed circuit board , wherein the distance between the edges is smaller than the distance between the surfaces of the pins having a larger pitch or space, which are separated from each other , and the pins are elastically deformed and inserted . 配列されたピンのピッチが異なる２つのＩＣを選択的に実装可能とすべく、基板に打抜き形成する共通のピン挿通孔として、ピッチ方向に配列された上記ピン挿通孔同士の互いに向かい合う側の孔縁の相互間の寸法を、前記ピンの弾性限界の範囲でピッチが狭い方のピンのピッチ方向の互いに向かい合う側の表面間の距離よりも広く、かつピッチ方向に配列された上記ピン挿通孔同士の互いに離隔し合う側の孔縁の相互間の寸法を、ピッチが広い方のピンのピッチ方向の互いに離隔し合う側の表面間の距離よりも狭くし、前記ピンを弾性変形させて挿入することを特徴とするプリント基板。In order to selectively mount two ICs having different pitches of the arranged pins, as common pin insertion holes punched and formed in the substrate, holes facing each other of the pin insertion holes arranged in the pitch direction are opposed to each other. The distance between the edges is larger than the distance between the opposing surfaces in the pitch direction of the pin having the smaller pitch within the range of the elastic limit of the pin, and the pin insertion holes are arranged in the pitch direction. The distance between the hole edges on the side separated from each other is made smaller than the distance between the surfaces on the side separated from each other in the pitch direction of the pin having the larger pitch , and the pin is elastically deformed and inserted. A printed circuit board, characterized in that: 配列されたピンの間隔が異なる２つのＩＣを選択的に実装可能とすべく、基板に打抜き形成する共通のピン挿通孔として、間隔を隔てて配列された上記ピン挿通孔同士の互いに向かい合う側の孔縁の相互間の寸法を、前記ピンの弾性限界の範囲で間隔が狭い方のピンの間隔を隔てて互いに向かい合う側の表面間の距離よりも広く、かつ間隔を隔てて配列された上記ピン挿通孔同士の互いに離隔し合う側の孔縁の相互間の寸法を、間隔が広い方のピンの間隔を隔てて互いに離隔し合う側の表面間の距離よりも狭くし、前記ピンを弾性変形させて挿入することを特徴とするプリント基板。In order to selectively mount two ICs having different intervals between the arranged pins, a common pin insertion hole punched and formed in the substrate is provided on the side of the pin insertion holes which are arranged at an interval and facing each other. The pins arranged so that the distance between the hole edges is larger than the distance between the surfaces of the pins facing each other with the distance between the pins closer to each other within the range of the elastic limit of the pins, and spaced apart from each other. The distance between the hole edges of the insertion holes that are spaced apart from each other is made smaller than the distance between the surfaces of the holes that are spaced apart from each other with an interval between the pins having a larger interval, and the pins are elastically deformed. A printed circuit board characterized by being inserted by being inserted .
JP31300596A 1996-11-08 1996-11-08 Printed board Expired - Lifetime JP3541864B2 (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102883529A (en) * 2012-10-12 2013-01-16 广东易事特电源股份有限公司 Packaging structure two-pin element

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPWO2005074338A1 (en) * 2004-01-29 2007-07-26 日本電気株式会社 Circuit board
JP2012146903A (en) * 2011-01-14 2012-08-02 Mitsubishi Electric Corp Printed circuit board
CN107592751B (en) * 2017-09-18 2019-05-28 Oppo广东移动通信有限公司 A kind of circuit board assemblies and preparation method thereof, contact pin component, mobile terminal

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102883529A (en) * 2012-10-12 2013-01-16 广东易事特电源股份有限公司 Packaging structure two-pin element

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