JP3537217B2 - Electronic circuit design simulation / test equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic circuit design simulation / test apparatus used in the design of an electronic circuit, and more particularly, to a signal name in an electronic circuit in the electronic circuit design simulation / test. The present invention relates to an electronic circuit design simulation / test apparatus that enables replacement / management of terminal names and reduces the burden on designers.

[0002]

2. Description of the Related Art FIG. 7 is a diagram showing a configuration of a simulation system used for designing an electronic circuit, 11 is an operator console, 12 to 17 are circuit diagrams, simulation models, test data, simulation results, terminal information, respectively. , A file that stores the netlist.

In FIG. 1, a simulation test in electronic circuit design is performed as follows. Hereinafter, a description will be given of an example of an LSI simulation test. (1) The circuit diagram of the designed electronic circuit (LSI) is stored in the circuit diagram file 12 (“circuit entry phase” in the figure). (2) Create terminal information (terminal number, terminal name, net type / attribute information) for the terminal derived outside the LSI, and store it in the terminal information file 16 (“terminal information creation phase” in the figure) The terminal information stored in the terminal information file 16 is compared with the terminal information stored in the circuit diagram file 13. Also, a netlist is created from the circuit diagram and the terminal information. (3) A simulation model for verifying the operation of the above-mentioned LSI is created from the circuit diagram stored in the circuit diagram file 12 and stored in the simulation model file 13 (see “Simulation Model Creation” in FIG. Phase "). (4) Create test data for verifying the operation of the LSI. At this time, the created test data is collated with the terminal name of the simulation model and stored in the test data file 14 (“test data creation phase” in the figure).

FIG. 8 is a diagram showing an example of the test data described above. As shown in FIG.
And the pattern signal (solid line in the figure) input to each pin
It is formed from the expected value (thick line in the figure) output from the LSI pin when the SI operates normally. A plurality of macros that perform different operations are provided internally, and a mode switching signal (including a test mode) provided from the outside is provided.
In the case of a simulation test of an LSI whose operation can be switched, test data in each mode (modes 1 and 2 in FIG. 7) is created.

FIG. 9 shows the above-mentioned mode-switchable LS.
FIG. 3 is a diagram showing an example of I, in which macros of functions 1 to 3 are provided in an LSI, and functions 1 to 3 are selected by a mode switching signal provided from the outside. When the mode is switched, the buffer is controlled by the bus control signal (mode switching signal), and the terminal PIN2 is used as an input terminal or an output terminal.

Returning to FIG. 7, the test data shown in FIG.
2, PIN3 is an input terminal, and terminals PIN1, PIN
2. If a test pattern is given from PIN3 and the circuit is operating normally, a pattern signal (expected value) shown in FIG. Similarly, in the mode 2, the terminals PIN1 and PIN2 are input terminals, and the pattern signals shown in the figure are given. If the circuit is operating normally, the pattern signals shown in the figure are sent from the terminals PIN3 and PIN4. (Expected value) is output. (5) The test data stored in the test data file 14 is given to the simulation model stored in the simulation model file 13 to perform a simulation test, and the result is stored in the simulation result file 15 (see FIG. "Simulation phase" in the figure). In addition, a list of parts where the expected value does not match the simulation result is output as a list. (6) The simulation result stored in the simulation result file 15 is displayed on the operator console 11 together with the terminal name ("Simulation result display phase" in FIG. 3).

FIG. 10 is a diagram showing the results of the above simulation. The solid line in FIG. 10 shows an input test pattern.
Dotted lines indicate simulation results. As a simulation result, as shown in the figure, the terminals PIN1 to PIN3 (mode 1) of the LSI and the terminals PIN1
テ ス ト PIN2 (mode 2) and simulation results output from the terminal PIN4 (mode 1) and the terminals PIN3, 4 (mode 2) are displayed. Then, the simulation result shown by the dotted line is compared with the expected value shown in FIG. 8 to verify the circuit operation of the LSI.

[0008]

In the above-described conventional simulation test, the terminal of the circuit diagram is compared with the terminal information when the terminal information is created, and the terminal of the simulation model and the test data is created when the test data is created. In order to perform matching with the information, the terminal names in all phases must be the terminal names in the circuit diagram (for example, PIN1, PI
N2,...).

Therefore, in an LSI simulation test in which a plurality of macros are provided inside as shown in FIG. 9 and macros are switched by a mode switching signal supplied from the outside, generic terminal names assigned to the external terminals are used. (For example, pin numbers sequentially assigned to terminals actually derived from the LSI, such as the above-described PIN1, PIN2,...), And terminal names (for example, XCS1, CLK1,
… Etc.).

For this reason, in the conventional simulation test, when generating test data and verifying the simulation result, generic terminal names such as PIN1, PIN2,... And macro functions such as XCS1, CLK1,. It is necessary to collate the terminal name with the desk name, which is a heavy burden on the designer. SUMMARY OF THE INVENTION The present invention has been made in consideration of the above-described problems of the related art, and an object of the present invention is to provide a simulation test of an electronic circuit that selects and operates a macro by using a mode switching signal, in which a combination of terminal names is used. Is to be displayed for each mode, so that terminal names can be displayed with names corresponding to macro functions, thereby facilitating creation of test data / verification of simulation results and reducing the burden on designers. .

[0011]

FIG. 1 is a diagram showing the principle of the present invention. In the figure, reference numeral 1a denotes an example of an LSI in which a macro is switched by a mode switching signal given from outside, which is a simulation target, and 1 is physically attached to a terminal derived from the electronic circuit as described above. CLK1, XCS1,... Given corresponding to the first terminal names such as PIN1, PIN2,.
Is terminal name information for associating the second terminal name with the second terminal name for each mode.

Reference numeral 2 is test data, 3 is a simulation result, 4 is means for storing terminal information, and 5 is means for storing the alias terminal information. In order to solve the above-mentioned problem, the invention of claim 1 of the present invention, as shown in FIG.
An electronic circuit in which a plurality of macros having different functions are prepared and one of the macros is selected and operated by a mode switching signal, and is physically attached to a terminal led out from the electronic circuit. A first terminal name, and a second terminal name meaningd corresponding to the function of each macro in the simulation model of the electronic circuit. The first terminal name and the second terminal name In a circuit design simulation / test apparatus for an electronic circuit associated with each mode, at least terminal information creating means for creating terminal information of an electronic circuit to be tested and storing the same in a terminal information storage means; Simulation model creation means for creating a simulation model from a circuit diagram of an electronic circuit, and physical terminals connected to terminals actually derived from the electronic circuit. Storage means for storing alias terminal information for associating a first terminal name assigned to a macro terminal with a second terminal name assigned to the macro function, for each mode corresponding to the macro function. And the parameter of the test data by referring to the alias terminal information stored in the storage means.
Mode signal corresponding to macro function given as data
In response to the above, the second terminal name assigned corresponding to the function of the macro is assigned to a terminal derived from the electronic circuit to the outside.
A simulation means for performing a simulation test for each mode by giving the test data to the simulation model and replacing the alias terminal information stored in the storage means with the first terminal name, For reference, a simulation result display means is provided for displaying the simulation result using a second terminal name assigned according to the function of the macro .

According to a second aspect of the present invention, alias terminal information is stored in the terminal information storage means. According to a third aspect of the present invention, there is provided an electronic circuit in which a plurality of macros having different functions are prepared, and one of the macros is selected and operated by a mode switching signal,
A first terminal name physically assigned to a terminal derived from the electronic circuit to the outside, and a second terminal name corresponding to a function of each macro in the simulation model of the electronic circuit. The first terminal name and the second terminal name are associated with each other in a circuit design simulation / test apparatus for an electronic circuit, and at least terminal information of an electronic circuit to be tested is created. Terminal information creating means to be stored in the storage means, simulation model creating means for creating a simulation model from a circuit diagram of an electronic circuit to be tested, and test data for verifying the function of the electronic circuit Test data generating means, a first terminal name physically assigned to a terminal actually derived from the electronic circuit, and a function corresponding to the function of the macro. The second terminal name, which has been given a meaning, is referred to as alias terminal information which is associated with each mode corresponding to the function of the macro, and the first terminal name of the simulation model is referred to.
Is given as a parameter of the test data
According to the mode signal corresponding to the macro function
Adding a second terminal name given meanings corresponding to the function of filtration, or, the first terminal name is replaced with the second terminal name, to the simulation model, giving the test data Supports simulation means for performing simulation tests for each mode and the functions of the above macros
And a simulation result display means for displaying the simulation result using the second terminal name given as the meaning .

[0014]

[0015]

[0016]

[0017]

[0018]

According to the present invention, the following (1) and (2) in FIG.
Or simulate an electronic circuit as in (3).
Perform a test. (1) Terminal information is created from a circuit diagram of an electronic circuit to be simulated and stored in the terminal information storage unit 4.
Also, alias terminal information 1 for associating a first terminal name physically assigned to a terminal derived from an electronic circuit with a second terminal name assigned according to the function of the macro for each mode is created. .

Next, a simulation is performed based on the above circuit diagram.
A model is created, and test data 2 for verifying the operation of the electronic circuit is created. As a terminal name of the test data 2, a second terminal name meaningd according to a macro function such as CLK and XCSI is used. On the other hand, when the terminal information is created or when test data is input, the alias terminal information 1 is input and stored in the terminal information storing means 4 or the alias terminal information storing means 5.

Then, referring to the storage means 4 or storage means 5, the second terminal name of the test data is replaced with the first terminal name, or the terminal name of the simulation model is replaced with the second terminal name. And test data is given to the simulation model to perform a simulation test. Next, the first terminal name is replaced with the second terminal name by referring to the storage unit 4 or the storage unit 5, and the simulation result 3 is displayed by the second terminal name. (2) As in the above (1), terminal information is created and stored in the terminal information storage means 4. In addition, alias terminal information 1 that associates the first terminal name with the second terminal name for each mode is created. Further, a simulation model is created, and test data 2 is created. The terminal name of test data 2 is
A second terminal name given in correspondence with a macro function such as LK and XCSI is used.

On the other hand, at the time of entry of the circuit diagram, etc., the alias terminal information 1 is input to the simulation model,
The alias terminal information for associating the first terminal name with the second terminal name is added. Then, based on the alias terminal information added to the simulation model, the second test data
Is replaced with the first terminal name or the second terminal name is used as the terminal name of the simulation model, and the test data is given to the simulation model for each mode to perform a simulation test. Next, the simulation result 3 is displayed by the second terminal name. (3) Similar to the above (1) and (2), terminal information is created and stored in the terminal information storage means 4, and alias terminal information 1 for associating the first terminal name and the second terminal name for each mode is created. I do. Further, a simulation model is created, and test data 2 is created. As the terminal name of the test data 2, the second terminal name meaningd corresponding to the macro function such as CLK and XCSI described above is used.

On the other hand, when inputting test data, alias terminal information 1 for associating the first terminal name with the second terminal name is added to the test data. Then, based on the alias terminal information added to the test data, the second terminal name of the test data is replaced with the first terminal name in the same manner as in (2) above.
Alternatively, a simulation test is performed by using the second terminal name as the terminal name of the simulation model and giving the test data to the simulation model for each mode. Next, the simulation result 3 is displayed by the second terminal name.

In the first to third aspects of the present invention,
As described in (1), (2) and (3) above, alias terminal information that associates the first terminal name with the second terminal name for each mode is created, and test data using the second terminal name is generated. And performs a simulation test by associating the second terminal name with the first terminal name based on the alias terminal information,
Since the simulation result is displayed using the second terminal name, the terminal name can be displayed with a name corresponding to the function of the macro, thereby facilitating the creation of test data / verification of the simulation result and the designer Burden can be reduced.

In the invention of claim 2 of the present invention, the first
Terminal information for associating the terminal name of the first terminal with the second terminal name for each mode is stored in the storage means, and is centrally managed.
Therefore, the data capacity can be reduced and
Can reduce the burden on designers for setting and changing
Wear.

In the invention according to claim 3 of the present invention,
(2) As described in (3), alias terminal information that associates the first terminal name with the second terminal name for each mode is created, and the first terminal of the simulation model is created based on the alias terminal information.
The second terminal name is added to the terminal name or the first terminal name is replaced with the second terminal name, and the test created using the second terminal name by using the simulation model. Since the simulation test is performed using the data and the simulation result is displayed using the second terminal name, the test data creation / simulation result generation is performed in the same manner as described above without using a file for storing the alias terminal information. Verification can be facilitated and the burden on the designer can be reduced.

[0026]

Next, an embodiment of the present invention will be described. 1. Embodiment 1 FIG. 2 is a diagram showing a configuration of a simulation system according to the present embodiment.
Reference numerals 12 to 16 denote files for storing a circuit diagram, a simulation model, test data, a simulation result, and terminal information, respectively, and reference numeral 17 denotes a file for storing an alias terminal table.

FIG. 3 is a diagram showing an example of an alias terminal table. FIG. 3A shows a case where an alias terminal table is added to terminal information, and FIG. 3B shows an alias terminal table separately from the terminal information. Is provided. "Terminal information" includes "pin number", "LSI pin name", "net type",
It is composed of “pin attribute”, but when adding an alias terminal table consisting of alias terminal names to the terminal information,
As shown in FIG. 3A, pin names corresponding to the functions of the LSI macro in each mode (for example, aliases 1 and 2 in FIG. 3) are associated with generic pin names such as PIN1 and PIN2.
CLK1, XCS1,...: 24C indicated by aliases 2,.
LK, XCS1,...).

When the alias terminal table is provided separately from the terminal information, as shown in FIG. 3B, the pin corresponding to the LSI macro function in each mode is associated with a generic pin name. Write your name. When an alias terminal table is added to the terminal information, the alias terminal table file 17 shown in FIG. 2 is unnecessary.

Next, an embodiment of the present invention will be described with reference to FIGS. In this embodiment, the alias terminal information is centrally managed, and the alias terminal table is added to the terminal information and stored in the terminal information file 16 as shown in FIG. Or FIG. 3 (b)
In this embodiment, an alias terminal table is prepared separately from the terminal information, and stored in the alias terminal information file 17 for centralized management.

Hereinafter, a first embodiment of the present invention will be described. (A) Method of Adding Alias Terminal Table to Terminal Information File and Centrally Managing Alias Terminal Information (1) Store Circuit Diagram C of Designed Electronic Circuit (LSI) in Circuit Diagram File 12 (FIG. 2) "Circuit entry
Phase "). (2) The terminal information is created for the terminal derived outside the LSI, stored in the terminal information file 16 (“terminal information creation phase” in the figure), and compared with the terminal information in the circuit diagram. In addition, alias terminal information T1 is input, and FIG.
An alias terminal table is added to the terminal information as shown in FIG. (3) From the circuit diagram stored in the file 12, a simulation model for verifying the operation of the LSI is created, and a simulation model file 13 is created.
(“Simulation model creation phase” in the figure). (4) Create test data TD for verifying the operation of the LSI and store it in the test data file 14. The test data is created for each mode of the LSI, and the pin names in the test data are created using the pin names corresponding to the LSI macro functions such as CLK1, XCS1,. Creation phase ").

Next, referring to the terminal information file 16, the pin names corresponding to the macro functions of the LSI such as CLK1 and XCS1 are changed to the pin names such as PIN1 and PIN2 in correspondence with the mode signal given together with the test data. Replace with generic pin names. Then, the test data in which the pin names have been replaced is compared with the terminal names of the simulation model.

FIG. 4 is a diagram showing an example of the test data described above. As shown in the figure, the test data includes a pattern signal input to each pin of the LSI as described above,
It is formed from an expected value output from a pin of the LSI when the SI operates normally. As the pin name, a pin name corresponding to the above-described LSI macro function such as CLK1 or XCS1 is used. (5) The test data stored in the file 14 is given to the simulation model stored in the simulation model file 13 to perform a simulation test, and the result is stored in the simulation result file 15.
(“Simulation phase” in the figure). In this case, since the pin names are replaced with generic pin names such as PIN1 and PIN2, the simulation is performed using the generic pin names. (6) The terminal name of the simulation result stored in the simulation result file 15 is replaced with the aliased terminal name for each mode with reference to the terminal information file 16 to which the aliased terminal information is added, and displayed on the operator console 11 ( "Simulation result display phase" in the figure).

FIG. 5 is a diagram showing the results of the above simulation. The solid line in FIG. 5 shows the input test pattern, the dotted line shows the simulation results, and the simulation results include CLK1, XCS1, etc. as shown in FIG. Is displayed with the pin name corresponding to the macro function of the LSI.
In the above embodiment, in the terminal information creation phase, the alias terminal table is input and the terminal information file 16 is stored.
In the circuit entry phase, input a generic terminal name and another terminal name, and in the terminal information creation phase, create an alias terminal table from the terminal name described in the circuit diagram and another terminal name Then, the information can be added to the terminal information and stored in the terminal information file 16.

In the above embodiment, the simulation test is performed by referring to the alias terminal table and replacing the terminal name of the test data with the first terminal name.
The simulation test may be performed by referring to the alias terminal table and replacing the first terminal name of the simulation model with the second terminal name. As described above, in this embodiment, an alias terminal table is added to the terminal information, and when the test data is created, the pin names corresponding to the macro functions such as CLK1 and XCS1 in the test data are referred to by referring to the table. , PIN1, PIN2, etc. are replaced with generic pin names.
CLK1, XCS1
Replaced with pin names corresponding to macro functions such as, so that designers can create test data and verify simulation results using pin names corresponding to macro functions, thereby improving work efficiency. . In addition, since an alias terminal table is added to the terminal information, an increase in data capacity can be minimized, and the burden on the designer for setting and changing terminal names can be reduced. (B) Method of storing alias terminal information table in alias terminal information file 17 and centrally managing alias terminal information (1) Store circuit diagram C of designed electronic circuit (LSI) in circuit diagram file 12 ( "Circuit entry
Phase "). (2) The terminal information is created for the terminal derived outside the LSI, stored in the terminal information file 16 (“terminal information creation phase” in the figure), and compared with the terminal information in the circuit diagram. (3) A simulation model for verifying the operation of the LSI is created and stored in the simulation model file 13 (“simulation model creation phase” in the figure). (4) Create test data TD for verifying the operation of the LSI and store it in a test data file. Further, the alias terminal table T2 shown in FIG. 3B is created and stored in the alias terminal table file 17 shown in FIG. The pin names in the test data are the same as those of the first embodiment (a).
(The "test data creation phase" in the figure).

The alias terminal information is added to the parameters of the test data describing the test type, version number, etc.
The alias terminal table obtained from the alias terminal information can be stored in the alias terminal table file 17. Next, referring to the alias terminal table file 17, corresponding to the mode signal given together with the test data,
In the test data, the pin names corresponding to the macro functions of the LSI such as CLK1 and XCS1 are replaced with generic pin names such as PIN1 and PIN2. (5) The test data stored in the file 14 is given to the simulation model stored in the simulation model file 13 to perform a simulation test, and the result is stored in the simulation result file 15.
(“Simulation phase” in the figure). (6) Referring to the alias terminal table file 17, the terminal name of the simulation result stored in the simulation result file 15 is replaced with the alias terminal name for each mode and displayed on the operator console 11 (see FIG. "Simulation result display phase").

In the above-described embodiment, the alias terminal information table is input to the alias terminal information file 17 in the test data generation phase. Can be done in phase. Further, in the above-described embodiment, the simulation test is performed by replacing the terminal name of the test data with the first terminal name with reference to the alias terminal table. The simulation test may be performed by replacing the first terminal name of the simulation model with the second terminal name.

As described above, in this embodiment, a file for storing the alias terminal table is provided, and the pin names corresponding to the macro functions are generically referred to when the test data is created with reference to the alias terminal table of the file. In the simulation result display, the generic pin names are replaced with the pin names corresponding to the macro functions. Therefore, as in the first embodiment, the designer can use the pins corresponding to the macro functions. Test data can be created and simulation results can be verified by name, and work efficiency can be improved. In addition, an increase in data capacity can be minimized, and the burden on the designer for setting and changing the terminal name can be reduced.

In (a) and (b) of the first embodiment, whether or not the alias terminal information is used and the designation of the alias terminal table to be used are determined when the simulation system is set up. In addition, information on the alias terminal table can be added to a parameter that describes the type and version number of the test in the test data creation phase, or to specify the alias terminal table to be used. 2. Embodiment 2 FIG. 6 is a diagram showing a configuration of a simulation system according to this embodiment. FIG. 6 is a diagram obtained by removing the alias terminal table file 17 from FIG. 2, and the other points are the same as those in FIG. The same is true.

In this embodiment, alias terminal information is added to terminal information in a circuit diagram, terminal information of test data, etc. without using a file storing alias terminal information as in the first embodiment. Simulation model created from
Alternatively, a simulation test is performed using the above test data. Hereinafter, the present embodiment will be described with reference to FIG. (A) A method of adding another terminal name to the terminal information of the circuit diagram (1) The circuit diagram C of the designed electronic circuit (LSI) is stored in the circuit diagram file 12 (“Circuit entry
Phase "). At this time, another terminal name T11 (CLK) is associated with a generic pin name such as PIN1, PIN2,.
1, 24 CLK,...). (2) Create terminal information for the generic terminal name of the LSI, store it in the terminal information file 16 (“terminal information creation phase” in the figure), and collate with the terminal information of the circuit diagram. (3) A simulation model for verifying the operation of the LSI is created and stored in the simulation model file 13 (“simulation model creation phase” in the figure). The pin name of the simulation model is a generic pin name, another name of CLK1, XCS1, etc. input in the circuit diagram entry phase.
2, 3, ... are added. (4) Create test data for verifying the operation of the LSI and store it in the test data file 14. The test data is created for each mode of the LSI, and the pin name in the test data is, as shown in FIG.
1, XCS1,..., Etc., are created using the pin names corresponding to the functions of the LSI macros (“test data creation phase” in the figure). (5) The test data stored in the file 14 is given to the simulation model stored in the simulation model file 13 to perform a simulation test, and the result is stored in the simulation result file 15.
(“Simulation phase” in the figure). The simulation is performed for each mode by a mode signal given as a parameter when test data is input, and a simulation result is stored in the simulation result file 15 for each mode. (6) The simulation result stored in the simulation result file 15 is displayed on the operator console 11 (“simulation result display phase” in the figure). The simulation result is displayed by the pin name corresponding to the function of the macro as shown in FIG.

As a pin name used in the simulation, either a generic pin name or a pin name corresponding to the function of the macro may be used as shown below. The pin name corresponding to the macro function of the test data is assigned to the generic pin based on the correspondence between the mode signal, the aliases 1, 2, 3,... Added to the simulation model and the generic pin name. When a simulation test is performed using generic pin names and a simulation result is displayed, the pin names are replaced with pin names corresponding to macro functions based on the above correspondence. Based on the correspondence between the mode signal added as a parameter of the test data, the aliases 1, 2, 3,... Added to the simulation model and the generic pin names, the terminal names of the simulation model are Performs a simulation test by substituting the pin name corresponding to the function, and displays the simulation result with the pin name corresponding to the macro function.

As described above, in this embodiment, another terminal name is added to the terminal information of the circuit diagram, and a simulation model in which the different terminal name is added from the circuit diagram is created. The test data can be created using a different terminal name without using a file for storing the simulation result, and the simulation result can be displayed by the different terminal name, so that the burden on the designer can be reduced. .

In the above embodiment, another terminal name is added to the terminal name of the simulation model. However, a simulation test can be performed by replacing the terminal name of the simulation model with another terminal name. . (B) Method of Adding Another Terminal Name to Test Data (1) The circuit diagram C of the designed electronic circuit (LSI) is stored in the circuit diagram file 12 (see “Circuit entry
Phase "). (2) Create terminal information for the generic terminal name of the LSI, store it in the terminal information file 16 (“terminal information creation phase” in the figure), and collate with the terminal information of the circuit diagram. (3) A simulation model for verifying the operation of the LSI is created and stored in the simulation model file 13 (“simulation model creation phase” in the figure). (4) Create test data for verifying the operation of the LSI and store it in the test data file 14. The test data is created for each mode of the LSI, and the pin name in the test data is, as shown in FIG.
1, XCS1,..., Etc., are created using pin names (alias) corresponding to the functions of LSI macros (“test data creation phase” in FIG. 3).

At this time, another terminal name T12 for associating the above-mentioned alias with a generic pin name such as PIN1, PIN2,... Is added to the parameters of the test data. (5) The test data stored in the file 14 is given to the simulation model stored in the simulation model file 13 to perform a simulation test, and the result is stored in the simulation result file 15.
(“Simulation phase” in the figure).

The simulation is performed for each mode by using a generic terminal name and a mode signal given as a parameter when test data is input. The simulation result file 15 stores the simulation result for each mode. (6) The simulation result stored in the simulation result file 15 is displayed on the operator console 11 (“simulation result display phase” in the figure). The pin name of the simulation result is displayed by the pin name corresponding to the macro as shown in FIG.

In the above embodiment, the simulation is performed by replacing the pin names of the test data with generic pin names. However, as described in the second embodiment,
Replace the pin name of the simulation model with the pin name corresponding to the macro function by using the alias terminal information described above.
Alternatively, a pin name corresponding to the macro function may be added to the generic pin name of the simulation model, and the simulation test may be performed using the pin name corresponding to the macro function.

As described above, in the present embodiment, the separate terminal information is added to the test data.
As in (a), test data can be created using a different terminal name without using a file for storing alias terminal information, and a simulation result can be displayed using a different terminal name. The burden on the person can be reduced.

In the first and second embodiments, when displaying the simulation result, CLK1, X
Although the pin names corresponding to the macro functions of the LSI, such as CS1,..., Are used, both the generic pin names and the pin names corresponding to the macro functions may be displayed.

[0048]

As described above, in the present invention, in the design of an electronic circuit for selecting and operating some macros by mode switching (including the test mode), the test is performed by the terminal name for each mode. Data can be created, simulation results can be displayed by the terminal name for each mode, and the results can be verified, improving the operability in the electronic circuit design simulation test and reducing the burden on the designer. Can be reduced. Also, by storing the alias terminal information in a file and centrally managing it, the data capacity can be reduced, and the burden on the designer for setting and changing the terminal name can be reduced.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating the principle of the present invention.

FIG. 2 is a diagram illustrating a configuration of a simulation system according to a first embodiment.

FIG. 3 is a diagram illustrating an example of an alias terminal table.

FIG. 4 is a diagram showing an example of input test data and its expected value in the present invention.

FIG. 5 is a diagram showing an example of a display of a simulation result according to the present invention.

FIG. 6 is a diagram illustrating a configuration of a simulation system according to a second embodiment.

FIG. 7 is a diagram showing a configuration of a conventional simulation system.

FIG. 8 is a diagram showing an example of an expected value of input test data in the related art.

FIG. 9 is a diagram illustrating an example of an LSI capable of multi-mode switching.

FIG. 10 is a diagram showing an example of a conventional display of a simulation result.

[Explanation of symbols]

1 alias terminal information 2 Test data 3 Simulation results 4. Means for storing terminal information 5 Means for storing alias information 10 Simulation system 11 Operator console 12 Schematic file 13 Simulation model file 14 Test data file 15 Simulation result file 16 Terminal information file 17 Alias terminal table file

────────────────────────────────────────────────── ─── Continuation of front page (56) References JP-A-6-103333 (JP, A) JP-A-8-55143 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) G06F 17/50

Claims (3)

(57) [Claims] An electronic circuit in which a plurality of macros having different functions are prepared, and one of the macros is selected and operated by a mode switching signal. A first terminal name physically attached to the first terminal name, and a second terminal name meaningd corresponding to a function of each macro in the simulation model of the electronic circuit; In a circuit design simulation / test apparatus for an electronic circuit, the second terminal name is associated with each mode, and at least terminal information creating means for creating terminal information of an electronic circuit to be tested and storing the terminal information in a terminal information storage means. A simulation model creating means for creating a simulation model from a circuit diagram of an electronic circuit to be tested, and verifying functions of the electronic circuit. Test data generating means for generating test data using a second terminal name, a first terminal name physically assigned to a terminal actually derived from the electronic circuit, and a function of the macro. Storage means for storing alias terminal information for associating a second terminal name correspondingly associated with each macro mode with a function corresponding to a macro function; and alias terminal information stored in the storage means for storing alias terminal information. Macro function given as a parameter of test data by reference
Supports the macro function according to the mode signal corresponding to
A second terminal name given meaning and, from outside the electronic circuit
A simulation means for performing a simulation test for each mode by giving the test data to the simulation model and replacing it with a first terminal name physically assigned to a terminal derived to by referring to the alias terminal information which has been, Ma
A simulation result display means for displaying the simulation result using the second terminal name given in correspondence with the black function . 2. The simulation test apparatus according to claim 1, wherein alias terminal information is stored in said terminal information storage means. 3. An electronic circuit in which a plurality of macros having different functions are prepared, and one of the macros is selected and operated by a mode switching signal. A first terminal name physically attached to the first terminal name, and a second terminal name meaningd corresponding to a function of each macro in the simulation model of the electronic circuit; In a circuit design simulation / test apparatus for an electronic circuit, the second terminal name is associated with each mode, and at least terminal information creating means for creating terminal information of an electronic circuit to be tested and storing the terminal information in a terminal information storage means. A simulation model creating means for creating a simulation model from a circuit diagram of an electronic circuit to be tested, and verifying functions of the electronic circuit. And a first terminal name physically assigned to a terminal actually derived from the electronic circuit, and a second terminal name corresponding to the function of the macro. The terminal name of the simulation model is referred to as alias terminal information for each mode corresponding to the macro function, and the first terminal name of the simulation model is used as the test data.
Supports macro functions given as data parameters
Corresponding to the macro function according to the mode signal
Adding a second terminal names that are flavored, or the first
Substituted pin names to the second terminal name, to the simulation model, giving the test data, and simulation means for performing simulation test for each mode, attached means in correspondence with the function of the macro simulation test apparatus characterized by comprising a simulation result display means for displaying the simulation results by using the second terminal name.