JP3530994B2 - Focus detection device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a focus detection device for performing focus detection by a phase difference detection method using a plurality of line sensors.

[0002]

2. Description of the Related Art Conventionally, in a focus detection apparatus, a phase difference detection method, that is, a subject light which has passed through two regions on both sides of the optical axis on the lens, is used to separately capture the subject image on the planned focal plane. When the lens is formed, 2 on the lens
Since the respective images are displaced due to the parallax with respect to the subject in one area, there is a method in which focus detection is performed by a method of detecting the displacement amount and calculating the focal displacement amount of the lens. In such a focus detection device, two line sensor pairs forming a standard portion and a reference portion are arranged in a horizontal direction and a vertical direction so that each line sensor pair is orthogonal to each other in a central portion. It has been known. This cross-shaped line sensor is a kind of image sensor, and is a monitor photodiode (which is arranged along the PDs of the reference part and the reference part) to determine the photocurrent integration time of the pixel photodiode (referred to as PD). The output value of MPD) is used.

[0003]

However, in the cross type line sensor, of the two line sensor pairs in the horizontal direction and the vertical direction, the MPD line of either one of the line sensor pairs (the MPD of the standard portion and the MPD of the reference portion is different from each other). Line connecting)
However, it is divided by the MPD line and the PD line of the other line sensor pair (the line connecting the PDs of the respective parts). To connect this divided MPD line,
It is necessary to make the MPD line at the intersecting portion into a multi-layered structure or to make a detour around the line sensor to connect the MPD line, but any connection method complicates the configuration of the cross-shaped line sensor and It was a factor that hindered the miniaturization of the line sensor. Although there is a cross-shaped line sensor in which an MPD is provided only in the reference portion (see, for example, Japanese Patent Laid-Open No. 62-212611), if the difference in the amount of light received between the reference portion and the reference portion is large, an accurate monitor is performed. Photometry becomes difficult.

The present invention has been made in order to solve the above-mentioned problems, and it is possible to accurately perform monitor photometry without complicating the structure of the sensor and to reduce the size of the sensor. It is an object of the present invention to provide a focus detection device that can be designed.

[0005]

In order to achieve the above object, the invention according to claim 1 is provided with a plurality of line sensor pairs having a monitor section used for determining the photocurrent integration time. In a focus detection device for performing focus detection by a phase difference detection method, the plurality of line sensor pairs include a first line sensor pair having a monitor unit in only one of a standard unit and a reference unit, and a standard unit. And a reference unit, each of which includes a second line sensor pair having a monitor unit, and the monitor unit of the first line sensor pair has the first line sensor pair.
Each of the two line sensor pairs provided in the standard part and the reference part.
The amplification factor of the output amplifier provided in the monitor unit of the first line sensor pair is the same as that of the monitor unit, and the amplification factor of the output amplifier provided in the monitor unit of the second line sensor pair is It is almost doubled.

[0006]

[0007]

[0008]

[0009]

In the above structure, the amount of charge accumulated in the first line sensor pair having the monitor section in only one of the standard section and the reference section is the second charge having the monitor sections in both the standard section and the reference section. Although it becomes half of the charge amount of the line sensor pair, the amplification factor of the monitor unit output amplifier of the first line sensor pair is approximately twice the amplification factor of the monitor unit output amplifier of the second line sensor pair. The magnitude of the monitor unit output of the first line sensor pair is substantially the same as the magnitude of the monitor unit output of the second line sensor pair.

The invention according to claim 2 is provided with a plurality of line sensor pairs having a monitor section used for determining the photocurrent integration time, and the focus detection is performed by a phase difference detection method using the line sensor pairs. In the focus detection device to perform, the plurality of line sensor pairs includes a first line sensor pair having a monitor unit in only one of a standard unit and a reference unit,
It is composed of a second line sensor pair having a monitor part in both the standard part and the reference part, and is a module of the first line sensor pair.
The niter part is a reference part and a reference of the second line sensor pair.
The same as each monitor unit provided in the first line sensor pair, and the capacitor capacity of the charge-voltage converter of the monitor unit of the first line sensor pair is converted to the charge-voltage converter of the monitor unit of the second line sensor pair. The capacitance of the capacitor is approximately one half.

In the above structure, the charge amount accumulated in the first line sensor pair having the monitor section in only one of the standard section and the reference section is the second charge having the monitor sections in both the standard section and the reference section. Although the charge amount of the line sensor pair is half, the capacitor capacity of the monitor charge-voltage converter of the first line sensor pair is approximately two minutes of the capacitor capacity of the monitor charge-voltage converter of the second line sensor pair. Therefore, from the relational expression of V (voltage) = Q (charge amount) / C (capacitor capacity), the magnitude of the monitor unit output of the first line sensor pair is equal to that of the second line sensor pair. It is almost the same size as the partial output.

[0013]

BEST MODE FOR CARRYING OUT THE INVENTION A focus detection device according to an embodiment of the present invention will be described below with reference to the drawings. Figure 1
FIG. 3 is a perspective view of an optical system that constitutes the focus detection device according to the present embodiment. The optical system of the focus detection device 1 includes a photographing lens 2 of a camera, a field mask 3 having a cross-shaped opening in the center and vertically long openings on the left and right sides, a condenser lens 4, and a diaphragm mask 5 having a shape corresponding to the field mask 3. Separator lens 6
Also, the image sensor 10 includes a line sensor having the same shape as the opening of the visual field mask 3. The light flux reflected from the subject passes through the taking lens 2 and then forms an image on the visual field mask 3. Only the image formed on the opening of the field mask 3 is re-imaged on the line sensor of the image sensor 10 by the condenser lens 4, the diaphragm mask 5 and the separator lens 6.

FIG. 2 is a block diagram of a control system of the focus detection device 1. The focus detection device 1 performs focus detection by a phase difference detection method. The focus detection apparatus 1 is provided with a microcomputer 20 that controls the image sensor 10, performs calculations related to focus detection, lens drive control, and the like. The microcomputer 20 includes an image sensor 10 including a CCD, a lens data output unit 30 for outputting lens-related data such as a lens extension amount according to the type of lens, a display circuit 40 for displaying a focus detection state, and a lens. A lens driving unit 60 that is driven by the motor 50 and an encoder 70 that monitors the amount of rotation of the motor 50 are connected. When the microcomputer 20 detects the start signal of the distance measurement operation, the sensor control unit 27 transfers the mode selection signal 1 (MD1), the mode selection signal 2 (MD2), the mode selection signal 3 (MD3), to the CCD operation control unit 13. Gate control signal (IC
G), each signal of the shift gate control signal (SHM) is output to drive the image sensor 10 to perform photocurrent integration. At this time, the integration time control unit 11 sets the MPD provided along the PD of each island (in this case, the line sensor pair) on the image sensor 10.
The integration time is controlled based on the output voltage and the like. When the integration is completed, the microcomputer 20 determines that the analog signal processing unit 12
The image information output from each line sensor pair of the image sensor 10 is sequentially taken into the A / D converter 21 via the, and the image information is converted into digital data and output to the RAM 22.

Next, the microcomputer 20 outputs the image information stored in the RAM 22 to the focus detection section 23, calculates the defocus amount (focus shift amount) based on this image information, and then the correction calculation section 24. Then, the defocus amount is corrected and calculated, and based on the result, the display circuit 40 displays the in-focus state and the like. The lens drive control unit 25 of the microcomputer 20 converts the defocus amount into a lens extension amount based on the lens data output from the lens data output unit 30, and a motor via the lens drive unit 60 according to the lens extension amount. Drive 50. At this time, the lens drive controller 2
5 is a motor 5 based on the output value from the encoder 70.
The lens is driven while checking the drive amount of 0. In addition, the sensor control unit 27 operates from the analog signal processing unit 12 to the A / D
When outputting the image information to the conversion unit 21, the timer circuit 26
By sending a clock pulse (CP) signal to the CCD clock generator 14 using
A sync signal for timing data output is sent to 2. At this time, the CCD operation control unit 13 sends to the A / D conversion unit 21 a synchronization signal for timing data reception.

FIG. 3 is a layout view of islands in the image sensor 10. Each of the first to third islands has a monitor photodiode (MPD) 8
1a, 81b, pixel photodiode arrays (PD arrays) 82a, 82b, charge storage portions (ST) 83a, 8
3b and shift register (SR) 84. In the first to third islands, SR84
Are not separated by the standard portion and the reference portion, and MPDs 81a and 81b are provided respectively in the standard portion and the reference portion. These MPDs 81a and 81b are connected by MPD lines, and It forms the monitor section. On the other hand, regarding the fourth island, the SR 94a and 94b of the reference portion and the reference portion are separated by the SR 84 of the second island and the MPD line, and the MPD 91a of the monitor portion is provided only in the reference portion.

The reason why the MPD 91a of the monitor section is only the reference section is that the MPD lines at the intersections are also arranged when the fourth island has MPDs in both the reference section and the reference section and is connected by MPD lines. It is necessary to have a multi-layered structure or connect the MPD lines by detouring around the island. However, whichever method is adopted, the structure becomes complicated, and there are restrictions on downsizing the image sensor 10. Because it becomes. Instead, the MPD 91a of the reference portion of the fourth island has an area (width) twice as large as that of the other MPDs 81a, 81b, and the amount of accumulated charges is twice as large as that of the other MPDs 81a, 81b. In focus detection by the phase difference detection method, the light amount received by the reference portion and the reference portion are substantially equal on the principle that the subject image in the same region is divided into two and received by the reference portion and the reference portion. For this reason, the charge accumulation amount of the monitor portion of the fourth island is provided with the MPD 91a only in the reference portion, and the amount of accumulated charge is set to be twice that of the other MPDs 81a and 81b. The total value of the charge accumulation amount of the monitor section in the case of the above configuration is approximately the same. As a result, the output voltage of the monitor unit 91a of the fourth island becomes substantially the same as the output voltage when the monitor unit of the fourth island has a monitor unit in the reference unit as in the case of other islands. 91a has substantially the same sensitivity as the monitor units of other islands.

The sensor control means 13A shown in FIG.
The sensor control unit 27 and the CCD operation control unit 1 shown in FIG.
SH, SH2, IC on each island
The entire image sensor 10 is controlled by sending G, BG, and CP signals. Further, the selection means 13B is C
The sensor control means 13 is a part of the CD operation control unit 13.
According to the instruction from A, it is selected from which island analog data is to be sent to the microcomputer 20.

According to the cross type line sensor having the above-mentioned structure, the MPD 9 is formed only on the reference portion of the fourth island in the vertical direction.
Since it has a structure with 1a, MPD lines at the intersections have a multi-layer structure or MPs are detoured around the island.
There is no need to connect the D line. In addition, since the horizontal second island, which requires accurate monitor photometry, has MPDs 81a and 81b in both the standard portion and the reference portion,
Using this, it becomes possible to perform accurate monitor photometry. For this reason, it is possible to accurately perform monitor photometry in the horizontal direction and the vertical direction without complicating the configuration of the image sensor 10, and it is possible to reduce the size of the image sensor 10.

FIG. 4 is a sensor configuration diagram of one of the first to third islands. The MPD 81a, the PD array 82a, the integration control gate 85, and the SR 84 are provided in the standard portion, and the MPD 81 is provided in the reference portion.
b, PD array 82b, integration control gate 85,
SR84 is arranged in parallel. The MPDs 81a and 81b provided in the standard part and the reference part are connected to each other by an MPD line, and the SR 84 is also integrated in the reference part and the standard part. further,
The respective gates of the integration control gate 85 are also connected by the respective lines connecting the standard portion and the reference portion. PD
In the array, a photodiode and a capacitor for integrating the output photocurrent are elements for one pixel, and such elements are arranged in an array. The PD arrays 82a and 82b for the standard portion and the reference portion respectively have
Light-shielding pixel (OPD: black dot portion) 82 made of aluminum for generating dark charges used for dark output compensation
c and 82d are provided.

The MPD provided in the standard part and the reference part
81a and 81b are the charge-voltage converter 81c and the buffer 8
The monitor unit 81 is formed together with 1d. MPD81a, 8
The charge accumulated in 1b is converted into a voltage by the charge-voltage converter 81c, and then accumulated in the buffer 81d.
It is output from the GCOS terminal. The output from the AGCOS terminal is output to the integration time control unit 11 (see FIG. 2) and used to properly control the integration level of the PD arrays 82a and 82b.

The integration control gate 85 is composed of a barrier gate 85a, ST83a and ST83b, a clear gate 85b and a shift gate 85c. S
R84 is connected to a charge-voltage conversion unit 86 that converts the charge output from SR84 into a voltage and obtains a photoelectric conversion output. Further, a voltage conversion unit 88 for removing the fluctuation of the power supply voltage from the photoelectric conversion output of the charge-voltage conversion unit 86 is provided, and the voltage conversion unit 88 is provided with an aluminum light-shielded drift signal compensation photodiode (MD). And has this M
The reference voltage, which is the dark output obtained by the output of D, is output from the DOS terminal via the buffer 89.

Next, the photocurrent integration process for the first to third islands will be described with reference to FIGS. By applying an integration clear pulse from the ICG terminal to the clear gate 85b shown in FIG. 4, the integration circuit is initialized and then the photocurrent integration is started. Then, the charges photoelectrically converted by the PD arrays 82a and 82b are accumulated in the STs 83a and 83b via the barrier gate 85a. Further, the output from the AGCOS terminal increases with the start of integration, and when the output reaches a predetermined level, the integration time control unit 11 causes the PD arrays 82a and 82b.
Ends the integration of. When the integration is completed, the sensor control unit 2
In response to the SHM signal for starting reading from 7, the shift pulse is applied from the SH terminal to the shift gate 85c, and the charges accumulated in ST83a and ST83b are transferred in parallel to SR84. The charges of the SR 84 are voltage-converted by the charge-voltage converter 86, and then are converted from the OS terminal via the buffer 87 as a photoelectric conversion output from the analog signal processing unit 1.
2 is output. This output is the CCD clock generator 1
It is performed in accordance with the clock pulse generated from No. 4.

FIG. 5 is a sensor configuration diagram of the fourth island. In the sensor on the fourth island, the MPD 91a is arranged only in the reference portion, and the SRs 94a and 94b are separated in the reference portion and the reference portion. Further, in each of the integration control gates 95a and 95b, the lines are separated in the standard part and the reference part. The reason why the sensor of the fourth island has such a configuration is that the standard portion and the reference portion of the fourth island are separated by each line connecting the standard portion and the reference portion of the second island and SR84. is there. Regarding the MPD 91a of the reference portion of the fourth island, the area (width) of the MPDs 81a, 81
The area that is twice as large as that of b
By doubling a and 81b, the sensitivity is almost the same as that of the monitor part of another island having MPD in both the standard part and the reference part.

The electric charge accumulated in ST93a of the reference portion of the fourth island is the same as the electric charge accumulated in ST83a and 83b of the reference portion and reference portion of the other islands. By applying a shift pulse to the shift gate 95e corresponding to the signal, ST
After being transferred from 93a to SR94a in parallel and converted into a voltage by the charge-voltage converter 96, the photoelectric conversion output is output from the OS4 terminal via the buffer 97 to the analog signal processor 1.
2 is output. On the other hand, the charge accumulated in ST93b of the reference portion of the fourth island is ST93b by the application of the shift pulse from the SH2 terminal to the shift gate 95f in synchronization with the end signal of the reading of the charge of the reference portion.
From the analog signal processing unit 12 via the buffer 97 via the buffer 97 after being transferred in parallel to the SR 94b from the reference unit and converted into a voltage by the charge-voltage converting unit 96 following the output of the reference unit.
Is output to.

The photoelectric conversion outputs from the first to fourth islands shown in FIGS. 4 and 5 are received by the analog signal processing section 12 and then subjected to dark output compensation inside the analog signal processing section 12. It This dark-time output compensation is performed through a clamp using the dark-time output as a reference voltage (matching the upper or lower end of the waveform of the output voltage with the dark output voltage). The clamp with this dark output as the reference voltage is
With respect to the output from the third island, the whole island is clamped by using the output value of the light-shielded pixel OPD82c detected by the reference unit as a reference voltage. However, regarding the output from the fourth island, the reference unit and the reference unit are used. The output values of the light-shielded pixels OPDs 92c and 92d detected in each of the above are set as reference voltages, and the standard portion and the reference portion are separately clamped.
This is because, as described above, in the fourth island, the standard part and the reference part are circuit-separated, so the dark output noises of the standard part and the reference part are different due to differences in sensor manufacturing, etc.
Since the dark output levels of the standard part and the reference part may differ, if the entire island including the reference part is clamped based on the output value of the light-shielded pixel detected by the standard part, accurate dark-time output compensation is performed. This is because there are things that cannot be done.

FIG. 6 is a timing chart of control signals between the image sensor 10 and the microcomputer 20 from the start of integration to the reading operation of photoelectric conversion outputs of the four islands. After outputting the SHM signal for starting reading of each island, the sensor control unit 27 sets the reference voltage to the dark output of the light-shielded pixel by setting the ICG signal to Hi while outputting the light-shielded pixel. Performs clamping operation. This clamping operation is performed for the first to third islands before the output of the effective pixel of the reference part of each island.
The light-shielded pixel OPD82c of the reference portion is output as a reference voltage, and the fourth island of the light-shielded pixel OPD92d of the reference portion is output not only before the output of the effective pixel of the reference portion but also before the output of the effective pixel of the reference portion. The output is used as the reference voltage.

The flow of control signals between the image sensor 10 and the microcomputer 20 from the start of integration to the reading operation of the photoelectric conversion outputs of the four islands and the operation of the image sensor 10 and the microcomputer 20 will be described below.
As shown in FIG. 6, the sensor control unit 27 of the microcomputer 20 repeats the rise and fall of the SHM signal twice during the Hi of the ICG signal at the start of the integration, thereby the CC
A clear pulse is applied from the D operation control unit 13 to the SH and SH2 terminals of each island to initialize the integrating circuit. Also, at the timing of starting and stopping this SHM,
The integration mode is set by a combination of Hi and Lo of the MD2 signal and the MD3 signal. In this integration mode, P
There are a mode in which charges are stored only by the D array and a mode in which charges are stored by the PD array and ST (storage section).
During integration, the CCD operation control unit 13 of the image sensor 10 notifies the microcomputer 20 that integration is in progress by setting the ADT signal notified to the A / D conversion unit 21 of the microcomputer 20 to Hi, and the monitor unit 81 Alternatively, when the output voltage from 91 reaches a predetermined value or when the integration time reaches a predetermined time, the ADT signal is set to Lo to notify the microcomputer 20 that the integration is completed.

Next, the microcomputer 20 sends the MD2 signal, MD
In synchronization with the output of the three signals, digital data such as the integration end order of each island is transferred from the CCD operation control unit 13 to the ADT.
Read by signal. For the types of digital data read from the ADT signal, refer to H of MD2 signal and MD3 signal.
It is performed by a combination of i and Lo.

The microcomputer 20 switches from the integration mode to the data dump mode by setting the MD1 signal to Hi. Then, the microcomputer 20 raises the SHM signal,
When the SHM signal rises, the reading of the output of each island is started by the fall, and the read island is designated by the combination of Hi and Lo of the MD2 signal and the MD3 signal when the SHM signal is rising. In the case of this embodiment, Lo and Lo are the first islands, Lo and Hi are the second islands, and Hi and Lo are the third islands, Hi and Lo,
The fourth island is read with Hi. After starting to read the output of each island, image sensor 1
The analog signal processing unit 12 of the image sensor 10 is synchronized with the ADT signal sent from 0 to the microcomputer 20.
Analog data (photoelectric conversion output from each island) to the A / D converter 21 of the microcomputer 20 is output from the Vout output terminal. At this time, the data from each light-shielding pixel (OPD) is output before the output of the effective pixel of each island. At this time, the ICG signal is raised and lowered so that the inside of the analog signal processing unit 12 is The circuit performs an operation of clamping with the output (dark output) from each light-shielded pixel (OPD) as a reference voltage. This clamping operation is performed for the first to third islands before the output of the reference effective pixel of each island, and the light-shielded pixel OPD of the reference
The output of 82c is used as the reference voltage, but for the fourth island, before the output of the reference effective pixel, the output of the light-shielded pixel OPD92c of the reference is performed as the reference voltage, and before the output of the reference effective pixel. Also, the light-shielded pixel O of the reference portion
The output of the PD 92d is used as a reference voltage.

After this clamping operation, the effective pixel data of each island is output. In FIG. 6, the output of one pixel of the PD array is Vout during one rise and fall of the ADT signal in the data dump mode.
It is output from the output terminal. In each island, the top three pixels are light-shielding pixels OPD, and the effective pixels start from the fourth pixel. Therefore, for example, in the case of the first island, CC
The output of effective pixels is started from the time when the D operation control unit 13 sends the No. 4 ADT signal shown in FIG. The idle feed pixels are output by the rise and fall of some ADT signals between the effective pixels of the reference part and the effective pixels of the reference part of each island. Further, the MD2 signal is set to Hi at the time of outputting the effective pixel, but this changes the analog output signal from the actual Vout output terminal between the pixel output and other information, and the microcomputer 20 transfers the image signal to the image sensor 10 by the MD2 signal. This is because it is necessary to instruct output of effective pixels. Other information includes temperature output and monitor unit 8.
There are output voltages from 1 and 91, and these pieces of information can be taken out at timings other than the time of outputting effective pixels.

FIG. 7 and FIG. 8 are circuit diagrams of the analog signal processing section 12. 7 and 8 for the details of the analog signal processing unit 12 which outputs the analog output to the A / D conversion unit 21 of the microcomputer 20 after performing processing such as dark output compensation on the photoelectric conversion output of each island. Explain. First, in FIG. 7, the photoelectric conversion output OS of each island
1, OS2, OS3, OS4 are respectively connected to terminals 101,
It is stored in the buffer circuit 200 through 102, 103 and 201, and is selectively applied to the positive input terminal of the differential amplifier 75 by the analog switches SW1, SW2, SW3 and SW4 which are sequentially turned on.

Here, the buffer circuit 200 is connected to the terminal 10
1, 102, 103, 201 and capacitors C17, C18, C19, C20 connected between the ground point and terminals 104, 105, 106, 202 to which a power supply voltage is applied.
The switching transistors 107, 108, 109 and 203, respectively, and the buffer 110,
It is composed of 111, 112, and 204. Buffers Analog switches SW1, SW2, SW3 connected to the output side of buffers 110, 111, 112, 204
SW4 and the switching transistors 107 and 1
Although not particularly limited to 08, 109 and 203, they are formed of MOS transistors.

The analog switches SW1, SW2, S
Photoelectric conversion outputs OS1 and OS that are sequentially output from W3 and SW4 and given to the differential amplifier 75.
The differential amplifier 75 removes the fluctuation of the power supply voltage Vcc from the signals 2, OS3 and OS4. The differential amplifier 75 is provided mainly for drift signal compensation for removing the fluctuation of the power supply voltage. In the differential amplifier 75, the difference between the photoelectric conversion output given to the positive input terminal and the drift signal compensating reference voltage DOS from the DOS terminal given to the negative input terminal is taken. The fluctuation of the power supply voltage can be removed from the output.

In this way, the differential amplifier 75 supplies the power supply voltage Vc.
The photoelectric conversion output from which the fluctuation of c is removed is clamped (dark output compensation) by the differential amplifier 76 in the next stage using the output of the light-shielded pixel OPD as a reference voltage. This dark output compensation is performed by the light-shielded pixel OPD82c (see FIG. 4) or OPD.
The output of 92c (see FIG. 5) is sampled by the transistor Q18 at the timing of the input signal from the φOB terminal, the dark output voltage is held in the capacitor C15, and the held dark output voltage of the differential amplifier 76 is held. It is realized by adding the photoelectric conversion output output from the differential amplifier 75 to the negative input terminal side in addition to the input terminal. As described above, in the dark-time output compensation, for the first to third islands, the light-shielding pixel OPD82c of the reference portion is output before the output of the reference-portion effective pixel of each island.
For the fourth island, the output of the light-shielding pixel OPD92c of the reference section is used as the reference voltage before the output of the reference section effective pixel.
Even before the output of the effective pixels of the reference portion, the light-shielded pixel OPD of the reference portion
The output of 92d is used as a reference voltage.

In this way, the photoelectric conversion output which has been subjected to the dark output compensation is output from the terminal 116 to the terminal 11 shown in FIG.
6 and is sample-held by the sample-hold circuit 117. The sample hold circuit 117 includes a transistor Q17, a capacitor C14, and a buffer 118.

The output of the sample hold circuit 117 is used for the contrast control processing in the next contrast control circuit 120. For example, when the contrast is low, the contrast control circuit 120 increases the contrast by amplifying the photoelectric conversion output with the average level of the photoelectric conversion output as a reference, and when the contrast is high. In addition, it is possible to perform amplification based on a predetermined dark reference voltage Vref corresponding to the dark output.

Therefore, the negative input terminal of the differential amplifier 77 is supplied with a reference voltage as a reference level for amplification. The reference voltage supply circuit 130 that supplies this reference voltage includes an average value holding circuit 121 and a dark output reference voltage holding circuit 122. The average value holding circuit 121 has a first
Through inputting the output value of the fourth island from the output value of the differential amplifier 77 via the buffer 132.
Thru | or the average value of the output value of the 4th island is calculated, and this is hold | maintained. This average value holding circuit 121 has the first, second,
The first provided corresponding to the third and fourth islands,
Second, third and fourth average value holding circuits 123, 124, 1
It consists of 25,220. The first average value holding circuit 123 includes a switch transistor Q11, a buffer 126, a capacitor C11, and a switch transistor Q12. The second average value holding circuit 124 includes a switch transistor Q13, a buffer 127, a capacitor C12, and a switch transistor Q14. The third average value holding circuit 125 includes a switch transistor Q15, a buffer 128, a capacitor C13, and a switch transistor Q16. Further, the fourth average value holding circuit 220 includes a switch transistor Q221 and a buffer 2
22, a capacitor C224, and a switch transistor Q223. On the other hand, the dark output reference voltage holding circuit 122 includes a terminal 129 to which a dark output reference voltage Vref, which is a voltage equivalent to the dark output voltage, is applied, and a switch transistor Q10.

Switch transistors Q10, Q12, Q
Only one of 14, Q16 and Q223 is turned on and outputs the voltage on the input side of the switch transistor. The output voltage of the switch transistor is applied to the negative side input terminal of the differential amplifier 77 via the buffer 131. Also, to the positive side input terminal of this differential amplifier 77,
The photoelectric conversion output of each island is the sample and hold circuit 1
It is provided via 17 buffers 118.

The contrast control circuit 120 has an average value holding circuit 121 and a dark output reference voltage holding circuit 122, so that, for example, when the contrast is low, the average value of the photoelectric conversion output of each island is set to the reference voltage. To increase the contrast by amplifying the photoelectric conversion output, and when the contrast is high, the photoelectric conversion output is amplified by using a predetermined dark reference voltage Vref corresponding to the dark output as a reference voltage. It is possible to reduce the contrast. Then, the amplified photoelectric conversion output of each island is output to the Vout output terminal 135 via the buffer 134.

FIG. 9 is a sensor configuration diagram of the fourth island according to the second embodiment. In this embodiment, the MPD
91a has the same size as the MPDs 81a and 81b (FIG. 4) of the other islands. Instead, the monitor unit 91 uses the charge-voltage conversion unit 9 corresponding to the output amplifier.
1c and the gain of the buffer 91d (GAIN) is set to approximately double the gain of the charge-voltage converter 81c and the buffer 81d corresponding to the output amplifier of the monitor 81 (FIG. 4) of the other island, thereby setting the reference. The sensitivity is substantially the same as that of the monitor section 81 of another island having MPDs in both the reference section and the reference section. That is, if the same amount of light as that of the other islands is incident on the fourth island, MP is applied only to the reference portion.
The amount of charge accumulated in the monitor unit 91 of the fourth island having D91a is equal to that of the MPD81 in both the standard unit and the reference unit.
Although the amount of electric charge accumulated in the monitor section 81 of the other island having a and 81b is half, the amplification factor of the output amplifier of the monitor section 91 of the fourth island is amplified by the output amplifier of the monitor section 81 of the other island. Since it is about twice the rate,
The output voltage from the island monitor unit 91 becomes substantially the same as the output voltage from the other islands.

FIG. 10 is a sensor configuration diagram of the fourth island according to the third embodiment. In this embodiment, MP
D91a has the same size as the MPDs 81a and 81b (FIG. 4) of the other islands. Instead, the monitor unit 91 sets the capacitor capacity of the charge-voltage converter 91c to about half the capacitor capacity C ′ of the charge-voltage converter 81c of the monitor 81 (FIG. 4) of another island ( 1
/ 2) C ', so that the sensitivity is substantially the same as that of the monitor section 81 of another island having MPDs 81a and 81b in both the reference section and the reference section. That is, if the same amount of light is incident on the fourth island as on other islands,
The amount of charge accumulated in the monitor section 91 of the fourth island having the MPD 91a only in the reference section is half the amount of charge accumulated in the monitor section 81 of another island having the MPDs 81a and 81b in both the reference section and the reference section. However, since the capacitor capacity of the charge-voltage converter 91c of the monitor section 91 of the fourth island is approximately one half of the capacitor capacity of the monitor section 81 of the other island, V (voltage) = Q (charge From the relational expression of (amount) / C (capacitor capacity), the output voltage from the monitor section 91 of the fourth island becomes approximately the same as the output voltage from the other islands.

The present invention is not limited to the above embodiment, but various modifications can be made. For example, in the above-described embodiment, since the contrast in the horizontal direction is higher than the contrast in the vertical direction in a general subject, MPDs are provided in both the reference portion and the reference portion for the islands in the horizontal direction. For the islands in the horizontal direction, the MPD is provided only in the reference portion. However, in order to perform focus detection for a subject having a higher vertical contrast, the MPD is provided only in the reference portion for the horizontal island, and the vertical direction is used. With respect to the island, the MPD may be provided in both the standard portion and the reference portion.

[0044]

As described above, according to the focus detecting device of the first or second aspect of the present invention, one of the pair of line sensors of the plurality of line sensor pairs is either the reference portion or the reference portion. Since the monitor unit is provided only on one side and the output thereof is approximately twice as large as that of the monitor units of the other line sensor pairs, the sensitivity of this monitor unit may be different from that of the monitor units of the other line sensor pairs. Even when a plurality of line sensor pairs cross each other, there is no need to adopt a structure in which the monitor portion has a multi-layered structure or detours around the line sensor at the crossing portion. Therefore, it is possible to accurately perform monitor photometry in the horizontal direction and the vertical direction without complicating the configuration of the sensor, and it is possible to reduce the size of the sensor.

Further, according to the focus detecting device of the present invention, the area of the monitor photodiode of the second line sensor pair can be reduced, so that the monitor can be further downsized.

[Brief description of drawings]

FIG. 1 is a perspective view of an optical system constituting a focus detection device according to an embodiment of the present invention.

FIG. 2 is a block diagram of a control system of the focus detection device.

FIG. 3 is a layout view of islands in the image sensor of the focus detection device.

FIG. 4 is a sensor configuration diagram of first to third islands of the image sensor.

FIG. 5 is a sensor configuration diagram of a fourth island of the image sensor.

FIG. 6 is a timing chart of control signals between the image sensor and the microcomputer.

FIG. 7 is a circuit diagram of an analog signal processing unit in the image sensor.

FIG. 8 is a circuit diagram of an analog signal processing unit in the image sensor.

FIG. 9 is a sensor configuration diagram of a fourth island according to the second embodiment.

FIG. 10 is a sensor configuration diagram of a fourth island according to the third embodiment.

[Explanation of symbols]

1 Focus Detection Device 81 Monitor Unit (Monitor Unit of Second Line Sensor Pair) 81a Reference Unit Monitor Unit Photodiode (MPD) 81b Reference Unit Monitor Unit Photodiode (MPD) 81c Charge-Voltage Converter 81d Buffer (Monitor Unit) Output amplifier 82a Photodiode array (reference line sensor) 82b Photodiode array (reference line sensor) 91 Monitor (first line sensor pair monitor) 91a Reference monitor photodiode (MPD) 91c Charge-voltage conversion section 91d Buffer (monitor section output amplifier) 92a Photodiode array (reference section line sensor) 92b Photodiode array (reference section line sensor)

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-6-201987 (JP, A) JP-A-63-283370 (JP, A) JP-A-1-288178 (JP, A) JP-A-4- 194612 (JP, A) JP 62-212611 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G02B ^7/ 28-7/40 G03B 13/32-13/36

Claims (2)

(57) [Claims] 1. A focus detection device comprising a plurality of line sensor pairs having a monitor unit used for determining a photocurrent integration time, wherein focus detection is performed by a phase difference detection method using the line sensor pairs. The line sensor pair is composed of a first line sensor pair having a monitor section in only one of the standard section and the reference section and a second line sensor pair having monitor sections in both the standard section and the reference section. , The monitor section of the first line sensor pair is
Each monitor provided in the standard part and the reference part of the in-sensor pair
And the amplification factor of the output amplifier provided in the monitor unit of the first line sensor pair is approximately the same as the amplification factor of the output amplifier provided in the monitor unit of the second line sensor pair. A focus detection device characterized by being doubled. 2. A focus detection apparatus comprising a plurality of line sensor pairs having a monitor unit used for determining a photocurrent integration time, wherein focus detection is performed by a phase difference detection method using the line sensor pairs. The line sensor pair is composed of a first line sensor pair having a monitor section in only one of the standard section and the reference section and a second line sensor pair having monitor sections in both the standard section and the reference section. , The monitor section of the first line sensor pair is
Each monitor provided in the standard part and the reference part of the in-sensor pair
And the capacitor capacity of the charge-voltage converter of the monitor section of the first line sensor pair is approximately two minutes of the capacitor capacity of the charge-voltage converter section of the monitor section of the second line sensor pair. 1. A focus detection device characterized in that