JP3511422B2 - Semiconductor fabrication method - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to the production of a crystalline silicon film including a laser annealing step, and an insulating gate type semiconductor element such as a thin film transistor (TFT) formed using the film, and other semiconductor devices. The present invention relates to a method for obtaining a crystalline silicon film having high homogeneity in a process related to manufacturing. The present invention is useful for manufacturing a semiconductor device formed on a glass substrate.

[0002]

2. Description of the Related Art Recently, an insulating gate type field effect transistor having a thin film active layer (also referred to as an active region) on an insulating substrate, that is, a so-called thin film transistor (TFT) has been earnestly studied. These are distinguished as amorphous silicon TFTs or crystalline silicon TFTs depending on the material and crystal state of the semiconductor used. Even if it says crystalline, it is a non-single crystal that is not a single crystal. Therefore, these are collectively referred to as non-single crystal silicon TFTs.

In general, a semiconductor in an amorphous state has a small electric field mobility, and therefore a high speed operation is required.
Not available for FT. Further, in amorphous silicon, the P-type electric field mobility is extremely small, so that a P-channel type TFT (PMOS TFT) cannot be manufactured. Therefore, a P-channel type TFT and an N-channel type TFT (NMOS type) cannot be formed. It is impossible to form a complementary MOS circuit (CMOS) in combination with a TFT). On the other hand, a crystalline semiconductor has a larger electric field mobility than an amorphous semiconductor, and therefore can operate at high speed. In crystalline silicon, PM as well as NMOS TFT
Since the TFT of the OS can be obtained similarly, it is possible to form a CMOS circuit.

The non-single-crystal crystalline silicon film is obtained by subjecting an amorphous silicon film obtained by a vapor phase growth method to thermal annealing at an appropriate temperature (usually 600 ° C. or higher) for a long time, or by applying strong light such as laser light. It is obtained by irradiation (optical annealing). However, when an inexpensive and highly workable glass substrate is used as the insulating substrate, the amorphous silicon film formed on one surface of the glass substrate has a sufficiently high electric field mobility only by thermal annealing (a CMOS circuit should be formed. It was extremely difficult to obtain a crystalline silicon film. This is because the glass substrate as described above generally has a low strain point temperature (about 600 ° C.), and when the substrate temperature is raised to a temperature necessary to obtain a crystalline silicon film having sufficiently high mobility, Is distorted.

On the other hand, in the crystallization of a silicon film based on a glass substrate, when optical annealing is used, it is possible to give high energy only to the silicon film without raising the temperature of the substrate so much. Therefore, the optical annealing technique is very effective in crystallizing a silicon film based on a glass substrate. At present, a high-power pulsed laser such as an excimer laser is regarded as the most suitable light source for optical annealing. The maximum energy of this laser is much larger than that of a continuous wave laser such as an argon ion laser. Therefore, it was possible to improve the mass productivity by using a large spot of several cm ² or more. With a square or rectangular beam that is usually used, it is necessary to move the beam up, down, left, and right to process one large-area substrate, which is problematic in terms of mass productivity. Then, the beam width is made longer than the substrate to be processed, and the beam is scanned relative to the substrate, whereby the mass productivity can be greatly improved. (The term "scanning" here means irradiating linear lasers while slightly shifting and overlapping them.) Details are described in JP-A-5-112355.

Further, by performing thermal annealing before the optical annealing, a silicon film having higher crystallinity can be manufactured.
Regarding the crystallization method by thermal annealing, Japanese Patent Laid-Open No. 6-2
As described in Japanese Patent No. 44104, nickel, iron,
The crystallization of the amorphous silicon film is promoted by containing a small amount of an element such as cobalt, platinum, or palladium (hereinafter referred to as a crystallization catalyst element or simply a catalyst element) in the amorphous silicon film. Shows the effect, lower temperature than usual
A crystalline silicon film can be obtained by thermal annealing for a short time.

[0007]

However, in a TFT manufactured using crystalline silicon crystallized by a linear laser after thermal annealing of an amorphous silicon film,
It was observed that the threshold voltage has a specific distribution in the plane of the substrate. Below the strain point temperature of the glass substrate, for example,
In Corning 7059 glass, the substrate was flattened at 550 ° C., and then an amorphous silicon film was formed, and 550
The silicon film is crystallized by performing thermal annealing by heating at 4 ° C. for 4 hours. Further, laser annealing is performed by the method described above.

The crystalline silicon film thus formed was used to form TFTs arranged in a matrix, and the distribution of the threshold voltages of the TFTs in the substrate surface was investigated. Figure 2
The distribution of the threshold value of the TFT using the crystalline silicon film formed by the conventional method in the plane of the substrate is shown in FIG. This distribution is a U-shaped distribution as shown in FIG.
FIG. 4 shows the arrangement of TFTs on the glass substrate. As shown in FIG. 4, the data of FIG.
Are arranged in a matrix of 400 × 300, and 400 Ts in a row from the end to the end in the central portion of the substrate.
The horizontal axis corresponds to each location of the FT (the portion surrounded by the dotted line in FIG. 4). For example, if the pixel matrix TFT forming the pixel portion of the liquid crystal display has a threshold voltage distribution as shown in FIG. 2, it causes an image defect.

As a result of the applicant's investigation into the cause of the threshold voltage exhibiting such a U-shaped distribution in the plane of the substrate, the tendency of the U-shaped distribution corresponds to the warped state of the substrate immediately before laser irradiation. I found out what I was doing. Further, it was revealed that the warp of this substrate was not found in the glass substrate after the formation of the amorphous silicon film, and was caused by the subsequent thermal annealing process. This warpage occurs in a concave shape when viewed from the substrate film formation surface. FIG. 3 shows a state in which laser annealing is performed on the silicon film on the glass substrate in which warpage has occurred.
As shown in FIG. 3, when laser annealing is performed in such a warped state, the focal point of the laser shifts differently in different places of the substrate. It is considered that this shift causes the degree of crystallinity of the silicon film to be different in the substrate surface, and as a result, the threshold voltage exhibits a specific distribution in the substrate surface. In the substrate for which the data shown in FIG. 2 was obtained, the warp immediately before laser irradiation had a difference of about 50 μm between the bottom portion and the end portion of the U-shape.

An object of the present invention is to obtain a crystalline silicon film which is uniform in the plane of the substrate and has high crystallinity. Another object is to manufacture a crystalline silicon TFT having a uniform threshold voltage in the plane of the substrate. Particularly, in the silicon film crystallization process including the thermal annealing and the subsequent laser annealing process, uniform crystallinity is provided in the substrate surface, and further, the threshold voltage is uniform in the substrate surface by using the film. The purpose is to produce a crystalline silicon TFT.

[0011]

In order to solve the above problems, the present invention comprises a step of forming an amorphous silicon film on a glass substrate or a silicon oxide film formed on the glass substrate. A semiconductor manufacturing method comprising: a step of flattening the glass substrate at a temperature not lower than a strain point and not higher than a softening point of the glass substrate; and a step of subjecting the silicon film to a laser annealing treatment. is there.

Further, according to the present invention, a step of forming an amorphous silicon film on a glass substrate or a silicon oxide film formed on the glass substrate, and a temperature above the strain point and below the softening point of the glass substrate. 2. A method of flattening the glass substrate, crystallizing the amorphous silicon film, and performing a laser annealing process on the silicon film crystallized in the above step. It is a method for manufacturing a semiconductor.

Further, the present invention is a method of manufacturing a semiconductor device, which comprises the step of forming a plurality of thin film transistors using the silicon film manufactured by the above semiconductor manufacturing method as an active layer.

As described above, in the manufacturing process of the thin film transistor formed on the glass substrate, the glass substrate is warped after the step of thermally annealing the amorphous silicon film on the glass substrate. When a laser beam is irradiated onto such a deformed substrate, the effect of laser irradiation varies from place to place on the substrate. Therefore, in the present invention, after the substrate is processed into an extremely flat state before the laser irradiation step,
Laser irradiation is performed. That is, in the present invention, laser irradiation is performed after the substrate before the laser irradiation step is made extremely flat by appropriate heat treatment.

Specifically, thermal annealing for about 4 hours at a temperature above the strain point (593 ° C.) and below the softening point (844 ° C.) of the material of the glass substrate (eg Corning 7059), for example, at 640 ° C. A glass substrate on which a crystalline silicon film has been formed is applied. When the substrate is preheated in this way, it was an effective method from the experience of the applicant that the temperature of the glass to be used is kept above the strain point and below the softening point for several hours and then gradually cooled ( Below the strain point, the substrate was too hard to be processed flat, and above the softening point, it became softer as the thickness of the substrate changed.)

In the above temperature range, the annealing point (63
A temperature around 9 ° C. was most preferred for planarizing the substrate. At this time, the glass substrate is placed on a table having a highly flattened surface (preferably surface roughness and undulation of 5 μm or less). The glass substrate that has been thermally annealed under the above conditions has a much lower viscosity than that at room temperature, and due to its own weight, the glass substrate is in close contact with the above-mentioned highly flattened table. If the glass substrate is gradually cooled from this closely attached state, the glass substrate is solidified while maintaining that state. That is, this glass substrate is highly accurately flattened. Further, in the above glass substrate flattening step, at the same time, thermal annealing is performed on the amorphous silicon film formed on the glass substrate, and the film undergoes solid phase growth. Therefore, the silicon film can be crystallized simultaneously with the flattening of the glass substrate.

The Applicant investigated the influence of all steps for forming a thin film transistor on the substrate on the shape of the substrate. As a result, the deformation of the substrate after the thermal annealing step (including slow cooling) of the amorphous silicon film was confirmed. Most prominent, no noticeable deformation was observed in the subsequent steps. Therefore, if the substrate is processed into an extremely flat state immediately before laser irradiation,
The substrate after the completion of all steps can also be kept flat.

According to the present invention, there is no specific distribution of the threshold voltage of each crystalline silicon TFT formed on the substrate, and a crystalline silicon TFT having a substantially uniform threshold voltage is provided within the surface of the substrate. be able to. This effect becomes larger as the area of the substrate becomes larger. Further, when the substrate constitutes a liquid crystal display, there is an advantage that cell assembly can be easily and surely performed because the substrate is flat. In general, it is said that a substrate constituting a liquid crystal display will hinder the cell assembly unless the surface roughness and waviness are within 5 μm. Therefore, of the highly flattened table used in the present invention,
It is extremely effective to set the surface roughness and waviness and the surface roughness and waviness of the formed substrate to 5 μm or less.

[0019]

EXAMPLE FIG. 1 shows a manufacturing process of an example. First, a glass substrate (100 mm square Corning 705 in this embodiment) is used.
A base silicon oxide film 102 having a thickness of 2000Å and an amorphous silicon film 103 having a thickness of 500Å are continuously formed on the substrate 101 by the plasma CVD method. Next, in order to add nickel as a catalyst element for promoting crystallization, a 10 ppm nickel acetate aqueous solution is applied to the silicon surface, and a nickel acetate layer is formed by spin coating. It is better to add a surfactant to the nickel acetate aqueous solution. Since the nickel acetate layer is extremely thin, it is not always in the form of a film, but there is no problem in the subsequent steps. (Fig. 1 (A))

Then, the glass substrate is placed on a table having a highly accurately flattened surface (surface roughness, waviness of 5 μm or less), and heat-annealed at 640 ° C. for 4 hours to remove the glass substrate. Planarization and crystallization of the amorphous silicon film are performed. At this time, nickel plays a role of a crystal nucleus and promotes crystallization of the amorphous silicon film. The strain point temperature of the Corning 7059 substrate is 593 ° C., the softening point temperature is 844 ° C., and the annealing temperature of 640 ° C. falls between them.
The annealing point temperature of Corning 7059 is 639 ° C.

It is due to the function of nickel that thermal crystallization can be performed at a low temperature of 640 ° C. for 4 hours and in a short time.
Details are described in JP-A-6-244104. In the above publication, the temperature at the time of thermal annealing does not exceed the strain point temperature of the glass substrate, for example, 550 ° C.
Although it is specified that the thermal annealing is performed for 4 hours (below the strain point temperature), this temperature is set so that the glass substrate is not deformed as much as possible during thermal crystallization. In the present invention, on the contrary, the substrate temperature is raised to a temperature at which the glass substrate is easily deformed, and the substrate is planarized simultaneously with crystallization.

The concentration of the catalytic element is 1 × 10 ¹⁵ to 1 × 10 5.
¹⁹ atoms / cm ³ was preferred. At a high concentration of 1 × 10 ¹⁹ atoms / cm ³ or more, metallic properties appeared in silicon and the semiconductor properties disappeared. The concentration of the catalytic element in the silicon film described in this example was 1 × 10 ^{17 to} 5 × 10 ¹⁸ atoms / cm 3 as the minimum value in the film. In addition,
These values are minimum values of the concentration of the catalytic element in the silicon film analyzed and measured by the secondary ion mass spectrometry (SIMS). In this way, the silicon film is crystallized and the substrate is flattened, and after completion of the step, at a rate of 2 ° C./min.
Slowly cooled to room temperature. In addition, when the catalytic element that promotes crystallization is not added to the silicon film, if the heating temperature is low,
In the above process, only the flattening of the substrate may be performed and the crystallization may not be performed. However, the fact that uniform crystallization can be performed in the next laser annealing step is the same as in the case where the catalyst element is added.

Next, in order to further enhance the crystallinity of the crystalline silicon film thus obtained, the film is irradiated with excimer laser light which is a high-power pulse laser.
In this embodiment, a KrF excimer laser (wavelength 248n
m, pulse width 30 nsec) is used after being linearly processed. The beam size was 1 × 125 mm ² . Laser energy density is 100 mJ / cm ^{2 to} 500 mJ /
Irradiation is carried out in the range of cm ² , for example, 370 mJ / cm ² . If the irradiation is performed with an energy of about 220 mJ / cm ² before this irradiation, the crystallinity further increases. The laser irradiation method is as follows. That is, the irradiation is performed while shifting the linear laser beam relative to the non-irradiated object. The direction in which the linear laser was shifted was approximately perpendicular to the linear direction. At this time, focusing on one point on the surface to be irradiated, the laser light of 2 to 20 shots was irradiated. The substrate temperature during laser irradiation was 200 ° C. (Fig. 1 (B))

A TFT is manufactured on the basis of the crystalline silicon film thus formed. The TFTs are arranged in a matrix on the substrate. Specifically, 400 × 300 TFTs were produced in a production area of 40 × 50 mm ² . This step will be described below.

First, the silicon film is etched to form the island-shaped silicon region 105. Next, plasma CV
By the D method, a 1200 Å thick silicon oxide film 106 is deposited as a gate insulating film. TEOS and oxygen are used as source gases for plasma CVD. The substrate temperature during film formation was 250 to 380 ° C., for example, 300 ° C. (Fig. 1 (C))

Subsequently, a thickness of 3 is obtained by the sputtering method.
000-8000Å, eg 6000Å, aluminum film (containing 0.1-2% silicon) is deposited. Then, the aluminum film is etched to form the gate electrode 1
07 is formed. (Fig. 1 (C))

Next, impurities (boron) are formed in the silicon region by ion doping using the gate electrode as a mask.
Is injected. Hydrogen as a doping gas is 1 to 10
Diborane (B2H6) diluted to%, for example 5% is used. The acceleration voltage is 60 to 90 kV, for example 65 k
V, the dose amount is 2 × 10 ^{15 to} 5 × 10 ¹⁵ atoms / cm ² ,
For example, it is set to 3 × 10 ¹⁵ atoms / cm ² . The substrate temperature during ion doping is room temperature. As a result, P-type impurity regions 108 (source) and 109 (drain) are formed. (FIG. 1D) Then, in order to activate the doped boron, photoannealing was performed again using a KrF excimer laser. The energy density of the laser is 100 to 350 mJ / cm ² , for example, 250 mJ /
cm ² Irradiation with energy of about 170 mJ / cm ² before this irradiation further increases the crystallinity.

The method of laser irradiation is as follows.
That is, irradiation is performed while shifting the linear laser beam relative to the non-irradiated object. The direction in which the linear laser was shifted was approximately perpendicular to the linear direction. At this time, focusing on one point of the object to be irradiated, laser light of 2 to 20 shots is irradiated. The substrate temperature during laser irradiation is 200 ° C. Then, thermal annealing was performed at 450 ° C. for 2 hours in a nitrogen atmosphere. (Fig. 1 (E))

Subsequently, a silicon oxide film 11 having a thickness of 6000Å
0 is formed as an interlayer insulator by a plasma CVD method, and a contact hole is formed in this. Then, the source / drain electrodes and wirings 111 and 11 of the TFT are made of a metal material, for example, a multilayer film of titanium and aluminum.
2 is formed. Finally, 200 at 1 atmosphere of hydrogen atmosphere
Thermal annealing at ~ 350 ° C is performed. (Fig. 1 (F))

FIG. 5 shows the distribution of the threshold value of the TFT using the crystalline silicon film formed in the example in the plane of the substrate. In FIG. 5, the horizontal axis of FIG. 5 corresponds to the location of the TFT shown in FIG. 4 (the portion surrounded by the dotted line in FIG. 4), as in the case of FIG. As shown in FIG. 5, the TFT manufactured in this example has a uniform threshold value in the substrate surface, and clearly compared with FIG. 2 which is a conventional example, the TFT in FIG. It can be seen that the inside has a uniform threshold voltage.

[0031]

EFFECTS OF THE INVENTION According to the present invention, the uniformity in the plane of the substrate
Moreover, a crystalline silicon film having high crystallinity was obtained, and a crystalline silicon TFT having a uniform threshold voltage in the substrate plane could be manufactured using this crystalline silicon film.
In particular, in the TFT manufacturing process including the thermal annealing and the laser annealing process thereafter, it becomes possible to manufacture a crystalline silicon TFT having a uniform threshold voltage in the substrate surface. In particular, the present invention is effective when a large number of TFTs are formed on a glass substrate having a large area. Also,
When the substrate constitutes a liquid crystal display,
Since the substrate is flat, there is also an advantage that cell assembly can be performed easily and surely. As described above, the present invention is considered to be industrially useful.

[Brief description of drawings]

FIG. 1 is a diagram showing a manufacturing process of an example.

FIG. 2 is a diagram showing a distribution of a threshold value of a TFT using a crystalline silicon film formed by a conventional method in a substrate surface.

FIG. 3 is a diagram showing a state where laser annealing is performed on a silicon film on a glass substrate in which warpage has occurred.

FIG. 4 is a diagram showing an arrangement of TFTs on a glass substrate.

FIG. 5 is a diagram showing a distribution of a threshold value of a TFT using a crystalline silicon film formed in the example in a substrate surface.

Claims (7)

(57) [Claims] 1. A glass substrate is placed on a table having a surface roughness and waviness of 5 μm or less, and amorphous silicon is formed on the glass substrate or on a silicon oxide film formed on the glass substrate. After forming a film, and then performing thermal annealing at a temperature not lower than the strain point and not higher than the softening point of the glass substrate , the glass substrate adheres to the table.
With planarizing the glass substrate by slow cooling at a cooling rate such that solidified while maintaining the state, before
A method for manufacturing a semiconductor , comprising crystallizing an amorphous silicon film, and laser annealing the crystallized silicon film. 2. A glass substrate is placed on a table having a surface roughness and waviness of 5 μm or less, and amorphous silicon is formed on the glass substrate or a silicon oxide film formed on the glass substrate. A film is formed, a catalyst element that promotes crystallization is added to the amorphous silicon film, and then the glass substrate is annealed at a temperature not lower than the strain point and not higher than the softening point of the glass substrate. Close contact
Flattening the glass substrate by gradually cooling at a slow cooling rate that solidifies while maintaining the above state, crystallizing the amorphous silicon film, and laser annealing the crystallized silicon film. A method for manufacturing a semiconductor, comprising: 3. A process according to claim 1 or Oite to claim 2, wherein prior to laser annealing, the semiconductor manufacturing method characterized by laser annealing in low irradiation energy than the irradiation energy of the laser annealing. 4. A any one of claims 1 to 3, 2
A method for manufacturing a semiconductor, characterized by slow cooling at a rate of ° C / min. 5. A any one of claims 2 to 4, catalyst element that promotes the crystallization, and features nickel, iron, cobalt, platinum, among palladium, that it contains at least one element A method for manufacturing a semiconductor. 6. In any one of claims 2 to 5, the concentration of the catalytic element for promoting the crystallization, 1 × 10 ¹⁵ to 1
× 10 ¹⁹ atoms / cm ^{3 A} method for manufacturing a semiconductor, which is characterized in that 7. A any one of claims 2 to 6, the catalytic element for promoting the crystallization, the semiconductor manufacturing method characterized in that it is added by spin coating.