JP3509362B2 - Semiconductor device and manufacturing method thereof - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, particularly G
The present invention relates to a semiconductor device of a monolithic microwave integrated circuit using an aAs substrate and a manufacturing method thereof.

[0002]

2. Description of the Related Art As a conventional example, a metal insulator
Metal capacitor (hereinafter referred to as MIM capacitor)
A structure in which a spiral inductor is laminated on top is disclosed in Japanese Patent Laid-Open No.
No. 1669064. FIG. 7 shows the semiconductor device described in the publication. Conventional semiconductor devices consist of a semi-insulating GaAs substrate surface with a lower electrode, a capacitor insulating film,
An MIM capacitor composed of an upper layer electrode is formed, an insulating film is laminated thereon, and a spiral inductor is formed on the insulating film. The via hole shown in the figure plays a role of connecting the MIM capacitor on the front surface of the substrate to the back surface metal. Also, semiconductor resistors and metal resistors are used for matching circuits and FETs.
It is used as an inter-coupling circuit.

[0003]

In the conventional semiconductor device, the thickness of the insulating film between the MIM capacitor and the spiral inductor is usually about 1 μm, and the distance between the upper electrode of the MIM capacitor and the spiral inductor is narrow,
It is difficult for a spiral inductor to obtain sufficient inductance. If the insulating film is thickened to obtain a sufficient inductance, problems such as easy peeling of the insulating film and easy cracking of the insulating film occur, which are not practical.

Furthermore, the insulating film existing at the bottom between the spiral inductor wires serves as a capacitance component, the electromagnetic coupling between the spiral inductor wires is strengthened, and it is difficult to obtain a sufficient inductance.

If the inductance is not sufficiently obtained, there is a problem that the resonance frequency becomes low and it becomes difficult to use in the microwave frequency range.

Further, not only when the element of the upper layer is a spiral inductor, but when the element of the upper layer and the element of the lower layer are close to each other, there is a problem that the action of crosstalk works and the characteristics of the element are deteriorated.

An object of the present invention is to provide a semiconductor device and a method of manufacturing the same which solve the above problems.

[0008]

A semiconductor device according to the present invention is provided with an active element and a passive element, and a plurality of arbitrary active elements and passive elements are combined and laminated in a microwave integrated circuit. in the semiconductor device has a lower layer an active element is formed, an upper layer passive elements are formed, has a support member made of the polyimide resin to support the upper layer on the lower layer, and having a hollow between the passive elements of the upper layer and the active element of the lower layer.

The semiconductor device according to the present invention comprises:
A supporting member for supporting another upper layer further above,
It is characterized by a multilayer structure having the another upper layer on which passive elements are formed and having a hollow region between the another upper layer and the upper layer.

A semiconductor device according to the present invention includes an active element and
A passive element is provided, and any of the active element and the passive element is selected.
Micro that stacks these by combining multiple items
In the semiconductor device of the wave collector product circuit, active elements are formed
Upper layer having an MIM capacitor formed thereon
A first supporting member for supporting the upper layer,
A second support member on the upper layer.
The spiral inductor on the second support member.
A spiral inductor having the lower layer, the upper layer, and
It is characterized by having a hollow region between them.

[0011] The method according to claim 1 to 3 according to the present invention, on the lower layer an active element is formed, and forming a support member by a polyimide resin, up to the height of the support member A step of burying with a resin, a step of forming an upper layer in which a passive element is formed on the support member and the resin, and a step of removing the resin and leaving the support member. To do.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION (Embodiment 1) As Embodiment 1 of the present invention, a MESFET (Metal Semiconductor) formed on the surface of a semi-insulating GaAs substrate.
onductor Field EffectTran
FIG. 1 shows an example in which a spiral inductor is laminated on a (sistor).

First, the MESFET 2 is formed on the semi-insulating GaAs substrate 1 by a normal GaAs MESFET process. Here, 3 is a source, drain and channel impurity layer, 4a is a source electrode, 4b is a drain electrode,
Reference numeral 5 is a gate electrode, and 6 is an insulating film for surface protection. Polyimide resin 7 is uniformly laminated on the surface of this structure as an insulating film by a spin coating method to a thickness of about 5 μm. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

Next, a photoresist pattern 8 is formed on the polyimide resin 7 by a normal photolithography method.
To form. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

Next, using the photoresist pattern 8 as a mask, the polyimide resin 7 is anisotropically etched by a reactive ion etching method (hereinafter referred to as RIE method) to form a plurality of polyimide resin columns 7a as supporting members. To do. Here, the distance between the pillars 7a of polyimide resin is 5
It was set to 0 μm. A cross-sectional view of the semiconductor device after the above steps are shown in FIG. Other electron cyclotron etching methods or the like may be used as long as they are anisotropic etching methods.

Photoresist 9 is uniformly applied to the entire surface of the structure shown in FIG. 1C by a spin coating method to completely fill the polyimide resin pillars 7a and planarize them. FIG. 1 is a sectional view of the semiconductor device after the above steps are completed.
It shows in (d).

Next, the photoresist 9 used for the buried flattening is etched back by the RIE method and etched until the surface of the pillar 7a of the polyimide resin is exposed. FIG. 1 is a sectional view of the semiconductor device after the above steps are completed.
It shows in (e).

Next, a photoresist pattern 10 for wiring the spiral inductor is formed. A cross-sectional view of the semiconductor device after the above steps are shown in FIG. Although not shown, the method of connecting the MESFET and the spiral inductor is performed by making contact holes in the photoresist 9 and the protective film 6 in this step.

Next, a metal film 11 for wiring the spiral inductor is formed on the entire surface by vapor deposition to a thickness of about 2 μm. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

Finally, the photoresist 9 used for the buried flattening and the photoresist pattern 10 for wiring are dissolved with an organic solvent to leave the pillars 7a of polyimide resin.
By lifting off the metal film on the photoresist pattern 10, the metal wiring 11a of the spiral inductor is formed on the pillar of the polyimide resin pillar 7a. A sectional view of the semiconductor device after the above steps are shown in FIG. A perspective view of this semiconductor device is shown in FIG.

In the structure of the semiconductor device of the present invention, the MESF
Since there is a hollow between the ET and the spiral inductor, a high heat dissipation effect can be obtained.

Further, since the lower part of the spiral inductor is hollow and the dielectric constant is low, a sufficient inductance can be obtained. In addition, the distance between the upper layer element and the lower layer element can be lengthened only by changing the height of the polyimide resin column, and the spiral inductor can obtain a sufficient inductance.

(Embodiment 2) As Embodiment 2 of the present invention, FIG. 2 shows an example in which two layers of spiral inductors are laminated on a MESFET formed on the surface of a semi-insulating GaAs substrate.

First, the steps up to the step of FIG. 1H were prepared in the same manner as in Example 1, and the photoresist 9 was uniformly applied to the entire surface of this structure by the spin coating method, and the semiconductor described in Embodiment 1 was used. Fully embed the device and planarize. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

Next, the photoresist 9 used for the buried flattening is etched back by RIE until the surface of the metal wiring 11a of the first spiral inductor is exposed. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

After this, FIG. 1A to FIG.
The second spiral inductor is manufactured on the pillar of the insulator by the same manufacturing method as in (h). 2C to 2H are sectional views of the semiconductor device in these steps.

Through the above steps, a semiconductor device can be manufactured in which two layers of spiral inductors are laminated on the MESFET formed on the surface of the semi-insulating GaAs substrate. A perspective view of this semiconductor device is shown in FIG.

As in the present embodiment, it is possible to laminate in multiple layers by the manufacturing method of the present invention.

Further, the second spiral inductor is M-shaped by forming a contact hole as in the first embodiment.
Connect with ESFET and the first spiral inductor.

(Embodiment 3) As Embodiment 3 of the present invention, FIG. 3 shows an example in which an MIM capacitor is laminated on a MESFET formed on the surface of a semi-insulating GaAs substrate.

First, FIG. 1A to FIG. 1 of the first embodiment.
It is produced in the same manner as the step (h). However, instead of the photoresist pattern 10 for wiring shown in FIG. 1F, a photoresist pattern for forming the lower layer electrode of the MIM capacitor is used, and the metal film 1 as the spiral inductor is used.
Metal film 1 for lower electrode of MIM capacitor instead of 1
Set to 2. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

Next, a SIN film 13 is formed as a dielectric film of the MIM capacitor by plasma CVD on the entire surface of this structure. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

Next, a photoresist 9 is uniformly applied to the entire surface on the side where this structure is formed by a spin coating method, and the semiconductor device manufactured up to this step is completely embedded and planarized. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

Next, the photoresist 9 used for the buried flattening is etched back by RIE and is etched until the surface of the SIN film 13 is exposed as an insulating film of the MIM capacitor. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

Next, a photoresist pattern 14 for forming the upper electrode of the MIM capacitor is formed. A cross-sectional view of the semiconductor device after completion of the above steps is shown in FIG.

Next, a metal film 15 for the upper electrode of the MIM capacitor is formed on the entire surface by vapor deposition. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

Finally, the photoresist 9 used for the buried flattening and the photoresist pattern 14 for the upper electrode of the MIM capacitor are dissolved with an organic solvent to leave the pillar 7a of the polyimide resin, and the upper electrode for the MIM capacitor is left. By lifting off the metal film 15 on the photoresist pattern 14, the metal film 15a of the upper electrode of the MIM capacitor can be formed. Through the above steps, a semiconductor device in which MIM capacitors are stacked using the polyimide resin pillars 7a as pillars is manufactured. A cross-sectional view of the semiconductor device manufactured in Embodiment Mode 3 is shown in FIG. A perspective view of this semiconductor device is shown in FIG.

Although not shown, MIM capacitor and MESF
The ET is connected by opening a contact hole as in the first embodiment.

(Embodiment 4) As Embodiment 4 of the present invention, two MIM capacitors are provided on a MESFET formed on the surface of a semi-insulating GaAs substrate.
An example of stacking layers is shown in FIGS.

First, the fabrication is carried out in the same manner as the steps up to FIG. A cross-sectional view of the semiconductor device after the above steps are shown in FIG.

Next, FIGS. 2A to 2H of the second embodiment.
It is manufactured by the same method as. However, instead of the spiral inductor in the second embodiment, the MIM capacitor is manufactured by the manufacturing method described in the third embodiment. Cross-sectional views in those steps are shown in FIGS.
It shows in (m).

After the above steps are completed, a semiconductor device in which two layers of MIM capacitors are laminated on the MESFET formed on the surface of the semi-insulating GaAs substrate can be manufactured. A perspective view of this semiconductor device is shown in FIG.

(Embodiment 5) As Embodiment 5 of the present invention, an example in which an MIM capacitor is laminated on a MESFET formed on the surface of a semi-insulating GaAs substrate and a spiral inductor is further laminated thereon is shown in FIG. Shown in.

The manufacturing method of the fifth embodiment is the same as the manufacturing method of the third embodiment up to the step of FIG. 3H, and after stacking the MIM capacitor, the same as the steps of FIGS. Forming a spiral inductor on the MIM capacitor by various methods. 6A to 6J are cross-sectional views of the manufacturing process of the semiconductor device according to the fifth embodiment, and FIG. 6K is a perspective view of the semiconductor device.

In this embodiment, the polyimide resin is used as the pillar of the insulator, but it is possible to form a film at a relatively low temperature, and the photoresist 9 used for filling and flattening, the photoresist 10 for wiring, and the dissolution of these. If a film having dissolution resistance is selected for the organic solvent to be used, for example, SiN film, SiO2 film, SiON film, PSG film, BPS
A G film or the like may be used. Furthermore, in order to obtain the inductance required for the matching circuit, it is desirable that the dielectric pillar has a low dielectric constant.

In this embodiment, the ME is used as the active element.
Although SFET was used, other HEMT (High Ele
ctron Mobility Transisito
r) and HBT (Hetero Bipolar Tra)
The method of the present invention can also be applied to the above. In this embodiment, the passive element is formed in the upper layer and the MESFET is formed in the lowermost layer, but the lower layer and the upper layer may be layers in which the passive element is formed.

In the laminated structure of this embodiment, the MES
Although up to two layers are stacked on the layer on which the FET is formed, it is possible to stack three or four layers by repeating the method of the present invention. Therefore, since the microwave integrated circuit can be configured three-dimensionally, the degree of freedom in circuit configuration is increased.

[0048]

According to the present invention, since the space between the upper layer and the lower layer on which the element is formed is hollow, the influence of crosstalk is small, and it is possible to stack three-dimensionally with good element characteristics. . Therefore, it contributes to downsizing of the semiconductor device.

In particular, when stacking spiral inductors, a sufficient inductance can be obtained.

Further, having a hollow between the upper layer and the lower layer on which the element is formed has an advantage that the heat radiation effect can be enhanced.

[Brief description of drawings]

FIG. 1 is a diagram showing a manufacturing process of a semiconductor device in which a spiral inductor is stacked on a MESFET according to the present invention.

FIG. 2 is a diagram showing a manufacturing process of a semiconductor device in which two layers of spiral inductors are laminated on a MESFET according to the present invention.

FIG. 3 is a diagram showing a manufacturing process of a semiconductor device in which an MIM capacitor is stacked on a MESFET according to the present invention.

FIG. 4 is a diagram showing a manufacturing process of a semiconductor device in which two layers of MIM capacitors are laminated on a MESFET according to the present invention.

FIG. 5 is a diagram showing a manufacturing process subsequent to the process shown in FIG. 4 of the semiconductor device in which two layers of MIM capacitors are laminated on the MESFET according to the present invention.

FIG. 6 is a diagram showing a manufacturing process of a semiconductor device in which an MIM capacitor is laminated on a MESFET according to the present invention, and a spiral inductor is laminated thereon.

FIG. 7 is a diagram showing a conventional semiconductor device.

[Explanation of symbols]

1 Semi-insulating GaAs substrate 2 MESFET 3 Source / drain and channel impurity diffusion layers 4a source electrode 4b drain electrode 5 Gate electrode 6 Insulating film for surface protection 7 Polyimide resin 7a Polyimide resin pillar 8,10,14 photoresist pattern 9 Photoresist 11, 12, 15 Metal film 11a Spiral inductor metal wiring 13 SiN film 15a MIM capacitor top electrode

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 27/00-27/04 H01L 21/768 H01F 17/00

Claims (5)

(57) [Claims] [Claim 1 further comprising an active element and a passive element, by combining a plurality of any of the said active and passive components, in the semiconductor device of the microwave integrated circuit for stacking these, lower the active element is formed a layer, an upper layer passive elements are formed, a supporting member made of the polyimide resin to support the upper layer has on the lower layer, the upper layer and the active element of the lower layer A semiconductor device having a hollow region with a passive element. 2. An upper layer having a passive element formed on the upper layer, further supporting member for supporting the upper layer, and the upper layer. The semiconductor device according to claim 1, further comprising a hollow region between the upper layer and the upper layer. 3. The passive element is a metal wiring forming a spiral inductor.
The semiconductor device according to. 4. A semiconductor device of a microwave integrated circuit, comprising: an active element and a passive element, combining any of the active element and the passive element, and laminating the active element and the passive element, and a lower layer on which the active element is formed. And an upper layer on which the MIM capacitor is formed, a first supporting member for supporting the upper layer on the lower layer, and a second supporting member on the upper layer. A semiconductor device having a spiral inductor on the second support member, and having a hollow region between the lower layer, the upper layer, and the spiral inductor. 5. A on the lower layer the active element is formed, and forming a support member by a polyimide resin, a step of embedding a resin to the height of the support member, on the supporting member and the resin 4. The method of manufacturing a semiconductor device according to claim 1, further comprising: a step of forming an upper layer having a passive element formed therein, and a step of removing the resin and leaving the supporting member.