JP3505763B2 - Chip-shaped solid electrolytic capacitor - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip solid electrolytic capacitor.

[0002]

2. Description of the Related Art A conventional chip-shaped solid electrolytic capacitor is
As shown in FIGS. 3 and 4, a semiconductor is formed on the surface of a flat plate-shaped anode substrate 1 made of a valve metal such as aluminum, tantalum, and niobium, which has a dielectric oxide film layer 2 on the surface except for a part of the anode portion. Solid electrolytic capacitor element in which layer 3 and conductor layer 4 are sequentially stacked (hereinafter referred to as capacitor element)
5, the capacitor element 5 is then connected to the lead frame 6, but the two projecting portions 6a and 6b of the lead frame 6 are opposed to each other with a space therebetween.
The anode part 7 and the conductor layer forming part 8 of the capacitor element 5 are placed on a and 6b.

The former is welding 9 and the like is the latter, and the latter is a conductive material 10 such as silver paste.
After being electrically and mechanically connected to b, the chip solid electrolytic capacitor is formed by sealing with the exterior resin 11. And this sealed solid electrolytic capacitor is required to satisfy electric performance such as capacity, but this capacity is
It is determined by the area of the conductor layer forming portion 8. That is, the capacity increases as the area of the conductor layer forming portion increases, but the maximum value is up to the size of the exterior resin, which is the limit.

[0004]

However, the solid electrolytic capacitor produced by attempting to make the capacitance of the capacitor element as large as possible by keeping the size of the exterior resin constant and making the size of the conductor layer forming portion as large as possible. However, there was a drawback that the yield of the product decreased.

[0005]

The present invention has been made to solve the above-mentioned problems, and its gist is to provide a plate-shaped solid electrolytic capacitor element having an anode part and a conductor layer forming part. The respective surfaces of the anode part and the conductor layer forming part are
A chip-shaped solid electrolytic capacitor, which is mounted and bonded to each of the protrusions of a lead frame having a pair of opposingly disposed protrusions, and is further sealed with a resin, wherein the width of the conductor layer forming portion is And the width of the convex portion of the lead frame are substantially the same size.

The present invention will be described in detail below. As the anode substrate having a valve action which is used as the anode of the solid electrolytic capacitor in the present invention, any metal having a valve action such as aluminum, tantalum and an alloy having these as a substrate can be used. The shape of the anode substrate may be a flat aluminum foil or plate. The dielectric oxide film layer provided on the surface of the anode substrate may be an oxide layer of the valve action metal itself provided on the surface portion of the valve action metal, or may be provided on the surface portion of the valve action metal. It may be an oxide layer of the valve action metal itself, or a layer of another dielectric oxide provided on the surface of the valve action metal foil, but especially the oxidation of the valve action metal itself. It is desirable that the layer is made of a material.

In the present invention, the anode part is provided in one section of the end portion of the flat plate-shaped anode substrate having the dielectric oxide film layer formed on the surface thereof, and the remaining dielectric oxide film other than the anode part is provided. Although the semiconductor layer is formed on the layer, the kind of the semiconductor layer is not particularly limited, and a conventionally known semiconductor layer can be used. Among them, among others, a semiconductor layer made of lead dioxide and lead sulfate by the applicant of the present application (Japanese Patent Laid-Open No. 62-256423).
JP-A-63-51621) is preferable because the high frequency performance of the produced solid electrolytic capacitor is good. Also, a method of forming a complex of tetrathiotetracene and chloranil as a semiconductor layer (Japanese Patent Laid-Open No. 62-2912).
3) and a semiconductor layer made of a conductive polymer compound obtained by doping a hetero five-membered ring polymer compound with a dopant (JP-A-60-37114). And
On such a semiconductor layer, a conventionally known conductive paste such as carbon paste and / or silver paste, or a molten metal such as solder is laminated to form a conductor layer to form a conductor layer forming portion. There is.

Further, in the present invention, when the resin layer portion is formed in advance in a spiral shape with an insulating resin at the interface between the above-mentioned anode portion and the conductor layer forming portion, the semiconductor layer is formed when the semiconductor layer is formed. It is possible to obtain a capacitor having a constant layer formation area and a small variation. Next, a method of connecting the capacitor element thus formed up to the conductor layer to the pair of lead frames arranged so as to face each other will be described. Figure 1
FIG. 4 is a plan view showing a state in which the solid electrolytic capacitor element 5 is connected to the lead frame 6. In FIG. 1, a dielectric oxide film layer 2 is formed on the surface of an anode substrate 1, a semiconductor layer 3 is formed on the dielectric oxide film layer 2, and a conductor layer 4 is formed thereon. The conductor layer forming portion 8 and the conductor layer forming portion 8 are respectively mounted and joined to the protrusions 6a and 6b of the lead frame 6, and the width of the conductor layer forming portion 8 and the width of the protrusion portion 6b of the lead frame are substantially the same. It is important to design the same size. FIG. 2 is a sectional view of FIG.

In the capacitor element thus mounted on the lead frame, the anode portion is connected by welding, conductive paste, solder or the like, while the conductor layer forming portion is connected by conductive paste, solder or the like, and then the lead is formed. Sealing molding is performed by a transfer molding machine or the like with an exterior resin 11 such as an epoxy resin, leaving a part of the frame, to obtain a solid electrolytic capacitor. In the present invention, the molten resin hits the conductor layer forming portion at the time of encapsulating the exterior resin, and the width of the conductor layer forming portion 8 and the leads are prevented so that bending stress does not work with the lateral side portion of the lead frame 6 as a fulcrum. The width of the convex portion 6b of the frame is designed to have substantially the same size.

[0010]

Since the width of the conductor layer forming portion of the capacitor element and the width of the convex portion of the lead frame are substantially the same,
The deterioration at the time of sealing the resin is alleviated.

[0011]

EXAMPLES The present invention will be described in more detail with reference to Examples and Comparative Examples. Examples 1 to 3 and Comparative Examples 1 and 45 45 μF / cm ² aluminum etching foil (hereinafter referred to as chemical conversion foil) having chemical conversion treatment in phosphoric acid and ammonium phosphate aqueous solution to form a dielectric oxide film layer on the surface. ) Is taken out as shown in Table 1, and the remaining portion except for the anode portion shown in Table 1 is mixed with a 2.4 mol / l aqueous solution of lead acetate trihydrate and a 4.0 mol / l aqueous solution of ammonium persulfate. It was immersed in the liquid and left at 60 ° C. for 20 minutes to form a semiconductor layer composed of lead dioxide and lead sulfate. After performing such an operation three times, a carbon paste and a silver paste were sequentially laminated on the semiconductor layer to form a conductor layer, and a capacitor element was manufactured. Table 1 also shows the width of the conductor layer forming portion of the capacitor element. On the other hand, each of the anode part of the capacitor element and the conductor layer forming part is formed on both of the convex parts of the lead frame (material 42 alloy, solder plating, thickness 0.1 mm) having the convex parts of the width shown in Table 1 separately prepared. The respective surfaces were placed, and the former was connected by welding and the latter was connected by silver paste. After that, transfer molding is performed using epoxy resin, and external dimensions are 7 mm x
A 4.3 mm x 2.8 mm chip solid electrolytic capacitor was produced.

Examples 4 to 6 and Comparative Examples 3 and 4 In Examples 1 to 3 and Comparative Examples 1 and 2, the semiconductor layer was immersed in a 2.0 mol / l aqueous solution of lead acetate trihydrate to immerse the chemical conversion foil. Chip-shaped solid electrolytic capacitors were produced in the same manner as in Examples 1 to 3 and Comparative Examples 1 and 2, except that lead dioxide that was electrochemically formed between a separately prepared platinum cathode was used. Table 2 shows the yield and electrical performance of the solid electrolytic capacitors manufactured as described above. Each of the examples or comparative examples is an average value of all numerical values n = 30 points, and the yield is 0.2 for the leakage current value.
It is the ratio of the number of μA (10 V) or less. Although the content of the present invention has been specifically described so far by taking a single-layer solid electrolytic capacitor as an example, it goes without saying that the present invention can also be applied to a laminated solid electrolytic capacitor.

[0013]

[Table 1]

[0014]

[Table 2]

[0015]

The chip-type solid electrolytic capacitor of the present invention is designed so that the width of the conductive layer forming portion of the capacitor element and the width of the convex portion of the lead frame are designed to be substantially the same, and therefore the yield is improved. It is good.

[Brief description of drawings]

FIG. 1 is a plan view showing a state in which a solid electrolytic capacitor element is connected to a lead frame.

FIG. 2 is a cross-sectional view showing a state in which a solid electrolytic capacitor element is connected to a lead frame.

FIG. 3 is a plan view showing a state where a conventional chip-shaped solid electrolytic capacitor is mounted on a lead frame.

FIG. 4 is a cross-sectional view showing a state where a conventional chip solid electrolytic capacitor is mounted on a lead frame.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Anode substrate 2 Dielectric oxide film layer 3 Semiconductor layer 4 Conductor layer 5 Solid electrolytic capacitor element 6a Convex part of lead frame (side on which anode part is mounted) 6b Convex part of lead frame (conducting conductor layer forming part) Mounted side) 7 Anode part 8 Conductor layer forming part 9 Welding 10 Conductive material 11 Exterior resin

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Claims (3)

(57) [Claims] 1. A plate-shaped solid electrolytic capacitor element having an anode portion and a conductor layer forming portion, each surface of the anode portion and the conductor layer forming portion having a pair of convex portions arranged to face each other. A chip-shaped solid electrolytic capacitor placed and bonded to each of the protrusions of the lead frame and further sealed with a resin, wherein the width of the conductor layer forming portion and the width of the protrusion of the lead frame are substantially equal to each other. Chip-shaped solid electrolytic capacitor having the same dimensions. 2. An anode in which a conductor layer forming portion has a valve action.
Dielectric oxide film layer, semiconductor layer, conductor layer on the surface of the substrate
The device according to claim 1, wherein the layers are sequentially laminated.
Chip solid electrolytic capacitor. 3. A semiconductor layer comprising a hetero five-membered ring polymer compound
Half made of conductive polymer compound doped with dopant
The chip-shaped solid electrolytic capacitor according to claim 2, which is a conductor layer.
Nsa.