JP3505497B2 - Dielectric element - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dielectric element, and more particularly to a dielectric element such as a capacitor element using an oxide-based dielectric film.

[0002]

2. Description of the Related Art Ferroelectric memories have been vigorously studied in recent years as high speed and low power consumption non-volatile memories. FIG. 7 is a sectional view showing an example of a capacitor element of a conventional 1-transistor 1-capacitor type ferroelectric memory.

The capacitor element shown in FIG. 7 is generally called a stack type capacitor element. In the conventional capacitor element shown in FIG. 7, field insulating film 111 is formed on the surface of Si substrate 110. In the element formation region surrounded by the field insulating film 111, a source region 112 and a drain region 113 are formed with a predetermined interval so as to sandwich the channel region. A gate electrode 114 is formed on the channel region. Source area 1
12, the drain region 113, and the gate electrode 114 form a MOS transistor 130.

An interlayer insulating film 115 made of a SiO ₂ film is formed so as to cover the entire surface. Source area 1
A bit line 117 is connected to 12 via a source electrode 116. An interlayer insulating film 1 is formed on the bit line 117.
18 is formed. The drain region 113 has a plug 1 made of polysilicon or tungsten.
A ferroelectric capacitor 124 is connected via 19.

The ferroelectric capacitor 124 has a lower electrode composed of a laminated film of an IrO ₂ film 120 and an Ir film 121,
The ferroelectric film 122 is made of PZT (PbZr _x Ti _1-x O ₃ ) or SBT (SrBi ₂ Ta ₂ O ₉ ) which is a ferroelectric material, and the upper electrode made of the Ir film 123. Further, an interlayer insulating film 125 is formed so as to cover the interlayer insulating film 118 and the ferroelectric capacitor 124. The plate line 126 is connected to the Ir film 123 forming the upper electrode through the contact hole 125a provided in the interlayer insulating film 125. In addition,
In the conventional capacitor element shown in FIG. 7, annealing is performed in an oxygen atmosphere for sintering the ferroelectric film 122 made of an SBT film or the like, but Pt and Ir exhibiting good conductivity even after this annealing. Etc. are used as the electrode material.

In the write operation of the conventional ferroelectric memory shown in FIG. 7, the MOS transistor 130 is turned on and the magnitude relationship between the voltage of the bit line 117 and the voltage of the plate line 126 is controlled. The direction of polarization inversion of the ferroelectric film 122 is made different depending on whether the data is "0" or "1". After that, the MOS transistor 130 is turned off. As a result, it is possible to write the data “0” or “1” in the capacitor 124 and maintain the state in which the data “0” or “1” is stored in the capacitor 124. Further, at the time of reading, by turning on the MOS transistor 130 and applying a voltage to the plate line 126 to detect the voltage applied to the bit line 117, the data stored in the capacitor 124 becomes “0”. It is determined whether there is or is "1".

On the other hand, also in the dynamic random access memory (DRAM), the size of the capacitor has been reduced in recent years with the miniaturization of cells. Therefore, a capacitor element using an oxide-based dielectric film having a high dielectric constant such as a BST (Ba _x Sr _1-x TiO ₃ ) film has been developed. The capacitor element of the DRAM has the same structure as the capacitor element shown in FIG.

Next, the manufacturing process of the conventional capacitor element shown in FIG. 7 will be described with reference to FIGS.

First, as shown in FIG. 8, a Si substrate 110 is used.
After forming the field insulating film 111 thereon, the MOS transistor 130 including the source region 112, the drain region 113, and the gate electrode 114 is formed. And
After forming the interlayer insulating film 115 so as to cover the entire surface, a contact hole is formed. A source electrode 116 is formed so as to fill the contact hole. After forming the bit line 117 so as to connect to the source electrode 116, an interlayer insulating film 118 made of a silicon oxide film (SiO ₂ film) is formed. After that, the interlayer insulating film 118 is subjected to CMP.
(Chemical Mechanical Poli
The surface is flattened by using the (shing) method.

Next, as shown in FIG. 9, the interlayer insulating film 11 is formed.
After forming contact holes in 5 and 118, a doped polysilicon film is deposited by the low pressure CVD method so as to fill the contact holes. The doped polysilicon film is planarized by the CMP method to form the plug 119 made of the doped polysilicon film.

Next, as shown in FIG.
An IrO ₂ film 120 and an Ir film 121 that form a lower electrode are formed so as to extend along the surface of the interlayer insulating film 118 while being connected to. Then, the patterned IrO ₂ film 120 and Ir as shown in FIG. 10 are patterned by using the photolithography technique and the etching technique by milling.
The film 121 is formed.

Next, as shown in FIG. 11, a ferroelectric film 122 made of an SBT film is formed to a thickness of about 20 by using the sol-gel method.
It is formed with a thickness of 0 nm. At this time, the SBT film is applied several times using a spinner. In this case, after each application, annealing for evaporation of moisture is performed. Then RTA
(Rapid Thermal Annealing)
Anneal at about 750 ° C. for about 30 seconds in an oxygen atmosphere.

Then, as shown in FIG. 12, an Ir film 12 is formed.
3 is formed, the photolithography technique and the etching technique by milling are used to form the Ir film 123 and the SB film.
The ferroelectric film 122 made of a T film is patterned. As a result, the ferroelectric capacitor 124 as shown in FIG. 12 is obtained. Then, in order to sinter the ferroelectric film 122 made of the SBT film, about 8
Annealing is performed at 00 ° C. for about 40 minutes.

Thereafter, as shown in FIG. 13, after forming an interlayer insulating film 125 so as to cover the entire surface, the interlayer insulating film 12 is formed.
A contact hole 125a is formed at 5.

Finally, as shown in FIG. 7, the Ir film 12 as an upper electrode is formed through the contact hole 125a.
The plate line 126 is formed so as to be electrically connected to 3.

In this way, the conventional capacitor element is formed.

[0017]

However, in the conventional capacitor element shown in FIG. 7, the upper electrode is formed when the ferroelectric film 122 made of the SBT film is annealed in an oxygen atmosphere for sintering. There is a disadvantage that the Ir film 123 is oxidized. 14 and 15
FIG. 6 is a schematic cross-sectional view for explaining a conventional problem.

As described above, when the annealing is performed in the oxygen atmosphere for sintering the SBT film, the upper electrode I is formed.
When the r film 123 is oxidized, as shown in FIGS. 14 and 15, there is a disadvantage that a huge hillock (protrusion) 123a is easily generated on the surface of the Ir film 123. When the hillock 123a is generated in this manner, the plate line 126a is broken as shown in FIG. Also, as shown in FIG.
Upper layer wiring 1 formed on layer b via an interlayer insulating film 127
28 and the plate line 126b are also short-circuited.

Further, when the Ir film 123 constituting the upper electrode is oxidized, the Ir film 123 causes a composition change, and as a result, a stress change occurs in the Ir film 123. Therefore, there is a problem that the ferroelectric characteristics are likely to change.

The present invention has been made to solve the above problems, and one object of the present invention is to prevent hillocks (protrusions) on the surface of the upper electrode by suppressing the oxidation of the upper electrode. An object of the present invention is to provide a dielectric element capable of suppressing the generation.

Another object of the present invention is to suppress the stress change caused by the composition change of the upper electrode material.

[0022]

A dielectric element according to claim 1 comprises an insulating film including an oxide-based dielectric film, and an upper electrode including a first conductive film serving as an uppermost layer . The first conductive film
Contains at least Ir, silicon, and nitrogen.

According to the first aspect of the present invention, as described above, the upper electrode is made of at least Ir and silica excellent in the oxygen diffusion barrier property.
By including the first conductive film containing carbon and nitrogen, it is possible to effectively prevent the upper electrode from being oxidized. Thereby, it is possible to suppress the generation of hillocks (projections) on the surface of the upper electrode due to the oxidation of the upper electrode. As a result, disconnection of wiring, short circuit between wirings, and the like can be suppressed. Further, it is possible to suppress the composition change of the upper electrode material due to the oxidation of the upper electrode. Thereby, the stress change of the upper electrode material can be suppressed, and as a result, the change of the device characteristics can be suppressed.

[0024]

[0025]

[0026]

The dielectric device according to claim 1, the uppermost layer of the upper electrode is composed of the first conductive film. According to claim 1, in this way, by forming the uppermost layer of the upper electrode by a first conductive film, it is possible to suppress the oxidation of the outermost surface of the upper electrode.

In the dielectric element according to a second aspect , the upper electrode has a laminated structure of a first conductive film which is an uppermost layer containing Ir, silicon and nitrogen, and a second conductive film containing Ir. According to a second aspect of the present invention , with this structure, the first conductive film containing Ir, silicon, and nitrogen effectively suppresses the oxidation of the upper electrode, while the second conductive film containing Ir prevents the upper electrode from being oxidized. It is possible to reduce the resistance.

[0029]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view showing a ferroelectric capacitor element according to an embodiment of the present invention. 2 is shown in FIG.
6 is a cross-sectional view showing a ferroelectric capacitor element according to a comparative example formed for comparison with the ferroelectric capacitor element of the first embodiment shown in FIG.

Referring to FIG. 1, the capacitor element according to one embodiment of the present invention is formed by the following procedure. First,
A tungsten silicide (WSi) film 2 is formed on a Si substrate 1. After forming the interlayer insulating film 3 on the WSi film 2, a contact hole 3a is formed in the interlayer insulating film 3. Then, a polysilicon plug 4 made of doped polysilicon is formed in the contact hole 3a.

To connect to the polysilicon plug 4,
After forming the IrO ₂ film 5, the Ir film 6 is formed thereon. The IrO ₂ film 5 and the Ir film 6 form a capacitor lower electrode. Further, the SBT film 7 as a ferroelectric film is formed on the Ir film 6. An IrSiN film 8 as a capacitor upper electrode is formed on the SBT film 7.
Then, the IrO ₂ film 5, Ir film 6, SBT film 7 and I
The capacitor 9 is formed by etching and patterning the rSiN film 8. After that, the SBT film 7
Annealing is performed to crystallize. The SBT film 7
Corresponds to the “insulating film” of the present invention, and the IrSiN film 8 is
It corresponds to the "first conductive film" and the "upper electrode" of the present invention.

That is, in the present embodiment shown in FIG. 1, the IrSiN film 8 is used as the upper electrode of the ferroelectric capacitor 9.
Is used.

On the other hand, in the ferroelectric capacitor element according to the comparative example shown in FIG. 2, IrSiN forming the upper electrode in the capacitor element of the embodiment shown in FIG. 1 is used.
An Ir film 208 is used instead of the film 8. That is, in the comparative example shown in FIG. 2, the Ir film 208 is used as the upper electrode of the ferroelectric capacitor 209. The other structure of the comparative example shown in FIG. 2 is the same as the structure of the embodiment shown in FIG.

In both of the structures shown in FIGS. 1 and 2, annealing of 800 ° C. for 40 minutes is performed in an oxygen atmosphere when the SBT film 7 as the ferroelectric film is crystallized.

FIG. 3 shows the surface of the upper electrode after oxygen annealing in the structure of the embodiment shown in FIG. 1 by SEM (Sca).
Ning Electron Microscop
FIG. 4 is a photomicrograph of SEM observation of the surface of the upper electrode after oxygen annealing in the structure of the comparative example shown in FIG. As shown in FIG. 3, the IrSiN film 8 according to the present embodiment is used as the upper electrode.
It can be seen that the hillocks (protrusions) are not generated at all when using. On the other hand, as shown in FIG. 4, when the Ir film 208 according to the comparative example is used as the upper electrode,
It can be seen that hillocks (projections) having a maximum height of about 1 μm are growing. Therefore, even if the interlayer insulating film is formed with a thickness of, for example, about 500 nm in the subsequent steps, it is difficult to cover such hillocks. In such a case, inconveniences such as the disconnection of the wiring and the short circuit between the wirings as described with reference to FIGS. 14 and 15 occur.

FIG. 5 shows an Ir formed on the polysilicon film under the same conditions as the upper electrode according to the present embodiment shown in FIG.
When the SiN (200 nm) / polysilicon (600 nm) film is annealed in an oxygen atmosphere at 800 ° C. for 40 minutes, the elemental composition ratio is RBS (Ruthe).
rford Backscattering Spec
FIG. 7 is a characteristic diagram showing the results of an examination using the trometry method. Further, FIG. 6 shows an Ir formed on the polysilicon film under the same conditions as the upper electrode according to the comparative example shown in FIG.
FIG. 7 is a characteristic diagram showing the results of examining the elemental composition ratios using the RBS method when annealing (800 nm) for 40 minutes in an oxygen atmosphere on a (100 nm) / polysilicon (600 nm) film.

As shown in FIG. 5, Ir according to the present embodiment.
In the case of the SiN film 8, it is found that oxygen is hardly diffused into the IrSiN film 8 and the IrSiN film 8 is not oxidized. On the other hand, as shown in FIG. 6, in the case of the Ir film 208 according to the comparative example, oxygen is contained throughout the Ir film 208, and the Ir film 208 is oxidized. From this, it is considered that the hillocks (protrusions) according to the comparative example shown in FIG. 4 are Ir oxides.

Therefore, by forming the IrSiN film 8 which is a conductive layer which is not easily oxidized as the upper electrode as in the present embodiment, it is possible to effectively suppress the formation of hillocks (protrusions). As a result, it is possible to solve problems such as wire disconnection and short circuit between wires due to hillocks.

Next, the Ir used in the embodiment shown in FIG.
SiN film 8 and Ir film 20 used in the comparative example shown in FIG.
When the film stress before and after oxygen annealing with No. 8 was measured, it was as shown in Table 1 below.

[0041]

[Table 1] In Table 1 above, the oxygen annealing is performed under the conditions of 800 ° C. and 40 minutes. The values shown in Table 1 all indicate compressive stress. It can be seen from Table 1 that the IrSiN film 8 according to the present embodiment does not change much stress before and after oxygen annealing. On the other hand, in the Ir film 208 according to the comparative example, it is found that a large stress change occurs before and after the oxygen annealing. It is considered that this is because the composition of Ir changed due to the oxidation of Ir, and the generation of hillocks caused the stress to change greatly.

By the way, it is known that the characteristics of the ferroelectric film change due to the change in stress. This is the case, for example, in Y. Report by Kumagai et al. (Extended)
Abstracts of the 1999 In
international Conference on
Solid State Device and Ma
terials, pp. 388-389). According to this document, it is reported that the residual polarization value Pr and the saturation polarization value Ps of PZT change due to stress. Therefore, by forming the conductive layer (IrSiN film 8) which is not easily oxidized on the surface of the upper electrode as in the present invention, it is possible to suppress the composition change and the accompanying stress change due to the oxidation of the upper electrode. This allows
Stable ferroelectric characteristics can be obtained, and as a result, the uniformity of the characteristics of the capacitor element can be improved.

It should be understood that the embodiments disclosed this time are exemplifications in all respects and not restrictive. The scope of the present invention is shown not by the above description of the embodiments but by the scope of claims for patent, and further includes meanings equivalent to the scope of claims for patent and all modifications within the scope.

[0044]

Further, although the IrSiN film is used as the upper electrode in the above embodiment, the present invention is not limited to this, and a laminated film of IrSiN / Ir or the like may be used as the upper electrode. In this case, since the uppermost layer is the IrSiN film, it is possible to prevent oxygen diffusion. As a result, the Ir film is not oxidized. Further, the Ir film can reduce the resistance of the upper electrode. In this case, IrS
The iN film corresponds to the “first conductive film” of the present invention, and the Ir film corresponds to the “second conductive film” of the present invention.

In the above embodiment, the SBT film 7 which is a ferroelectric film is used as the oxide-based dielectric film, but the present invention is not limited to this, and other oxide-based ferroelectric films such as PZT films are used. A dielectric film may be used.

In the above embodiment, the ferroelectric capacitor element is used for explanation, but the present invention is not limited to this.
A capacitor element using an oxide-based paraelectric material having a high dielectric constant may be used. That is, SB which is a ferroelectric film
Instead of the T film 7, an oxide paraelectric film having a high dielectric constant such as a BST film may be used.

The present invention can be applied not only to capacitor elements but also to all elements using a dielectric.

[0049]

As described above, according to the present invention, it is possible to effectively suppress the oxidation of the upper electrode of the dielectric element. This can prevent hillocks (protrusions) from being generated on the surface of the upper electrode due to the oxidation of the upper electrode, and as a result, prevent disconnection of wiring or short circuit between wirings. Further, it is possible to suppress the composition change of the upper electrode material due to the oxidation of the upper electrode. Thereby, the stress change of the upper electrode material can be suppressed,
As a result, changes in device characteristics can be suppressed.

[Brief description of drawings]

FIG. 1 is a sectional view showing a ferroelectric capacitor element according to an embodiment of the present invention.

2 is a cross-sectional view showing a ferroelectric capacitor element according to a comparative example for comparison with the ferroelectric capacitor element according to the embodiment shown in FIG.

FIG. 3 is a micrograph of the ferroelectric capacitor element according to the embodiment shown in FIG. 1, when the surface of the upper electrode after oxygen annealing is observed by SEM.

FIG. 4 is a diagram showing a ferroelectric capacitor element according to a comparative example shown in FIG.
It is a microscope picture at the time of observing with M.

5 is a diagram for explaining characteristics of the upper electrode according to the embodiment shown in FIG. 1. FIG.

FIG. 6 is a diagram for explaining the characteristics of the upper electrode according to the comparative example shown in FIG.

FIG. 7 is a cross-sectional view showing a conventional ferroelectric capacitor element.

8 is a cross-sectional view for explaining a manufacturing process of the conventional ferroelectric capacitor element shown in FIG.

9 is a cross-sectional view for explaining a manufacturing process of the conventional ferroelectric capacitor element shown in FIG.

FIG. 10 is a cross-sectional view for explaining the manufacturing process of the conventional ferroelectric capacitor element shown in FIG.

11 is a cross-sectional view for explaining the manufacturing process of the conventional ferroelectric capacitor element shown in FIG.

12 is a cross-sectional view for explaining a manufacturing process of the conventional ferroelectric capacitor element shown in FIG.

FIG. 13 is a cross-sectional view for explaining the manufacturing process of the conventional ferroelectric capacitor element shown in FIG.

FIG. 14 is a cross-sectional view illustrating a problem of a conventional ferroelectric capacitor element.

FIG. 15 is a cross-sectional view for explaining a problem of a conventional ferroelectric capacitor element.

[Explanation of symbols]

1 Si substrate 2 Tungsten silicide film 4 Polysilicon plug 5 IrO ₂ film 6 Ir film 7 SBT film 8 IrSiN film

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-10-56144 (JP, A) JP-A-11-307736 (JP, A) JP-A-8-191137 (JP, A) JP-A-10- 56145 (JP, A) (58) Fields investigated (Int. Cl. ⁷ , DB name) H01L 27/105 H01L 21/8242 H01L 27/108 H01L 27/04 H01L 21/3205 H01L 21/3213 H01L 21/768

Claims (2)

(57) [Claims] And 1. A insulating film containing an oxide-based dielectric film, and an upper electrode including a first conductive film serving as the uppermost layer, the
The first conductive film is a dielectric element containing at least Ir, silicon, and nitrogen . 2. The upper electrode comprises: the first conductive film;
A laminated structure with a second conductive film containing r.
1. The dielectric element according to 1.