JPH10173149A - Semiconductor device and its manufacture - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a Pt film which has such a high oxygen barrier property that does not allow oxygen to reach a barrier layer through the Pt film by making the lengths of Pt crystal grains in the Pt film in the thickness direction of the film shorter than the thickness of the film and the length of intercrystalline boundaries longer than the thickness of the film. SOLUTION: After a TiN film 2 is formed on an Si substrate 1 as a barrier layer by sputtering, a Pt film 3 is formed on the film 2 by sputtering and the sputtering is temporarily stopped by lowering the power. Thereafter, the formation of the film 3 is restarted under the same condition. When the film 3 is formed in two stages in such a way, the lengths of Pt crystal grains in the thickness direction of the film 3 becomes shorter than the thickness of the film 3 and intercrystalline boundaries which are the permeating paths of oxygen can be made longer. Consequently, the oxygen barrier property of the film 3 can be improved and the thickness of the film 3 which is formed as the lower electrode of a capacitor can be reduced to 100nm. Therefore, the capacitance element of a DRAM can be made smaller in size and increased in degree of integration when capacitance and storage elements are formed by using this film 3.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a semiconductor device,
In particular, the present invention relates to a method for forming a capacitive storage element.

[0002]

2. Description of the Related Art Dynamic random access memory (DRAM) has been highly integrated four times in about three years. In order to secure a necessary amount of accumulated charge even when the cell area is reduced, the capacitor insulating film is made thinner, and the capacitor area is increased by a three-dimensional structure electrode. The capacitor insulating film of DRAM mass-produced to date has a relative dielectric constant of 3.
A silicon oxide film (SiO2) of 82 and a silicon nitride film (Si3N4) having a relative dielectric constant of 7 to 8 have been used. However, considering a DRAM of 256 megabits or more, it is necessary to reduce the thickness of the capacitor insulating film to an effective film thickness of 1 nm or less, and the leakage current that increases with the thinning exceeds the allowable limit. Relative permittivity is 22 ~
The use of 25 tantalum oxide films (Ta2O5) is being considered, but the effective film thickness is still 1.5 nm. 256-megabit and gigabit-scale DRAM using this Ta2O5
In order to realize the above, strontium titanate, ie, SrTiO3, and strontium barium titanate, ie, (Ba, Sr) TiO, which are high dielectric materials having a relative dielectric constant exceeding 100
3. It is necessary to use a perovskite-based insulating film typified by lead titanate, that is, PbTiO3, and lead zirconate titanate, that is, Pb (Ti, Zr) O3. In addition, when used as a ferroelectric insulating film for a ferroelectric nonvolatile memory using spontaneous polarization of a ferroelectric as well as a DRAM, PbTiO3, Pb (Ti, Zr) O3 having ferroelectricity, A Bi-based layered ferroelectric is used. When a perovskite-based insulating film is employed, a Pt film formed by a sputtering method is used for the lower electrode. Due to the structure of the memory, the lower electrode must be in contact with the plug (Si) pulled up from the diffusion layer of the transistor. When the Pt film is in direct contact with Si, a silicidation reaction is caused by a thermal process. Then, Si diffuses into the insulating film and causes deterioration of the film quality.
A barrier layer for preventing reaction of a film or the like is required. In order to obtain a perovskite-based insulating film having good characteristics (for example, having a large relative dielectric constant and a large remanent polarization), a post-anneal is usually required at a film forming temperature of 600 ° C. or higher or in an oxidizing atmosphere. However, since the lower electrode Pt film is a material that easily allows oxygen to permeate, if the Pt film thickness is small, oxygen passes through the Pt crystal grain boundary to reach the TiN film of the barrier layer, and the TiN film is oxidized and becomes electrically conductive. There is a problem that the electrical conductivity is lost. In order to prevent this, conventionally, the Pt film thickness is increased and the oxygen transmission path (crystal grain boundary) is lengthened to cope with the problem.

[0003]

As described in the above prior art, in order to prevent oxidation of the barrier layer, it is necessary to increase the thickness of Pt, but Pt is a stable halogen compound having a high vapor pressure. The dry etching is difficult due to the absence of Pt, and the fine processing becomes difficult when the Pt film thickness is large. Therefore, in order to realize a highly integrated memory, a Pt film that has high oxygen barrier properties and does not transmit oxygen to the barrier layer even when thinned is required.

[0004]

SUMMARY OF THE INVENTION Oxygen permeation through a Pt film is caused by Pt grain boundaries. That is, in order to obtain a Pt film having high oxygen barrier properties, a Pt film having a long crystal grain boundary may be obtained. By doing so, even if the film thickness of Pt becomes thin, the oxygen transmission path becomes long, so that diffusion of oxygen to the barrier layer can be prevented. According to the prior art, the Pt film grows in a columnar shape, and the crystal grains are continuously connected in the film thickness direction. for that reason,
The grain boundary of Pt becomes linear in the film thickness direction, and the oxygen transmission path becomes shorter. In order to lengthen the oxygen transmission path, it is necessary that the length of the crystal grains in the thickness direction of Pt be smaller than the film thickness, and that the length of the crystal grain boundary be longer than at least the Pt film thickness. is there. Specifically, Pt formation may be stopped halfway, and the remaining film thickness may be formed thereafter. In addition, Pt formation may be further continued after performing processing such as temporarily exposing to the atmosphere, sputter etching the surface, or heating at the time of stop. Also, by changing the film formation conditions during the Pt film formation, the film can be formed so that the grain growth is not continuous.

[0005]

DESCRIPTION OF THE PREFERRED EMBODIMENTS First, a TiN film was formed on a Si substrate as a barrier layer by a sputtering method. Substrate temperature 300 ℃, N
2 flow rate 28sccm, Ar flow rate 4sccm, pressure 0.6mTorr, DC power-12
Performed in kW. Sputtering time is 60 seconds, TiN film is 50nm
Formed. Next, a Pt film was formed on the TiN film by a sputtering method. First, substrate temperature 300 ° C, Ar flow rate 100scccm, pressure 3mTor
r, Pt was formed at 50 nm with DC power of 12 kW, and the power was temporarily dropped to stop the sputtering. Then, Pt was further increased under the same conditions by 50
nm formed. FIG. 1 shows a cross-sectional structure of Pt formed to a total of 100 nm. By forming the Pt film in two stages, the length of the crystal grain in the thickness direction became smaller than the film thickness, and the crystal grain boundary, which is an oxygen transmission path, could be lengthened.

For comparison, FIG. 3 shows a cross-sectional structure in the case where Pt is continuously formed to 100 nm. Forming condition is substrate temperature 30
The temperature was 0 ° C, the flow rate of Ar was 100 sccm, the pressure was 3 mTorr, and the DC power was 12 kW. In this case, the length of the crystal grain in the thickness direction is the same as the film thickness, and it can be seen that the crystal grain boundary serving as the oxygen transmission path is short.

Next, oxygen barrier properties were compared. Pt of 50 nm to 200 nm was formed on the TiN film by a sputtering method.
Two types were prepared: a conventional one which was continuously formed, and a one in which sputtering was stopped by temporarily lowering the power when a half of the Pt film thickness was formed according to the present invention. PZT was formed on the Pt by a sol-gel method to a thickness of 100 nm, and a sample was formed by crystallization at 650 ° C. for 2 minutes in an oxygen atmosphere. Those samples
Elemental analysis in the depth direction was performed by SIMS, and the dependency of the TiN oxide film thickness on the Pt film thickness of the lower electrode was obtained. FIG. 4 shows the results.
In the case of the continuously formed Pt according to the prior art, when the thickness is reduced to 150 nm or less, the amount of transmitted oxygen increases, and the TiN film is oxidized.
On the other hand, in the case of the two-step formed Pt film according to the present invention, it is understood that the Pt film is not oxidized even if the Pt film thickness is 100 nm or less.

[0008] A capacitance storage element was formed using a Pt film formed according to the present invention. FIG. 5 is a cross-sectional view of a main part. Film thickness
100 nm Pt was used. In the conventional method, the TiN film was oxidized in the continuously formed Pt film, and the memory characteristics could not be obtained. However, when the present invention is used, it can operate as a capacitive storage element whether applied to a DRAM or a ferroelectric nonvolatile memory. Was confirmed.

As a method of reducing the length of the Pt crystal grains in the thickness direction to be smaller than the film thickness, there is a method of temporarily exposing the Pt surface whose formation has been stopped halfway to the atmosphere. Specifically, a substrate temperature of 300 ° C., an Ar flow rate of 100 sccm, a pressure of 3 mTorr, and a DC power of −12 kW were formed on the TiN film formed under the conditions described in Embodiment 1 of the present invention.
To form a 50 nm Pt, and opened to the atmosphere for one hour. Thereafter, 50 nm of Pt was further formed under the same conditions. Figure 1 shows the cross-sectional structure of Pt
The results were the same as those shown in FIG.

Next, the barrier properties of oxygen were compared. Pt of 50 nm to 200 nm was formed on the TiN film by a sputtering method.
Two types were prepared: a conventional one formed continuously, and one that was opened to the atmosphere when a half of the Pt film thickness was formed according to the present invention. Form PZT on those Pt by sol-gel method to 100nm,
A sample was prepared by crystallization at 650 ° C. for 2 minutes in an oxygen atmosphere. These samples were subjected to elemental analysis in the depth direction by SIMS to determine the dependency of the TiN oxide film thickness on the lower electrode Pt film thickness. In the case of the Pt film open to the atmosphere according to the present invention, it was found that it was not oxidized even when the Pt film thickness was 100 nm or less, as in the case of the first embodiment of the present invention.

A capacitance storage element was formed using a Pt film formed according to the present invention. The cross-sectional view of the main part is the same as FIG. 5 shown in the first embodiment of the present invention. Pt with a thickness of 100 nm was used. In the conventional method, the TiN film was oxidized in the continuously formed Pt film, and the memory characteristics could not be obtained. However, when the present invention is used, it can operate as a capacitive storage element whether applied to a DRAM or a ferroelectric nonvolatile memory. Was confirmed.

As a method of making the length of the Pt crystal grain in the thickness direction smaller than the film thickness, there is a method of sputter etching the Pt surface which has been stopped halfway. Specifically, a substrate temperature of 300 ° C., an Ar flow rate of 100 sccm, a pressure of 3 mTorr, and a DC power of 12 k were formed on the TiN film formed under the conditions described in the first embodiment of the invention.
Pt is formed to 50 nm by W, Ar flow rate is 100 sccm at room temperature, pressure is 3 mTor.
r, Sputter etching was performed at DC power of 200 W for 1 minute.
Thereafter, 50 nm of Pt was further formed under the same conditions. The cross-sectional structure of Pt was the same as that shown in FIG.

Next, the oxygen barrier properties were compared. Pt of 50 nm to 200 nm was formed on the TiN film by a sputtering method.
There were prepared a prior art continuously formed one and a Pt surface sputter-etched when a half of the Pt film thickness was formed according to the present invention. PZT was formed on the Pt by a sol-gel method to a thickness of 100 nm, and a sample was formed by crystallization at 650 ° C. for 2 minutes in an oxygen atmosphere. SIMS these samples
In the depth direction, elemental analysis was performed to determine the dependency of the TiN oxide film thickness on the lower electrode Pt film thickness. It was found that the sputter-etched Pt film according to the present invention was not oxidized even if the Pt film thickness was 100 nm or less, as in the case of the first embodiment of the present invention.

Using the Pt film formed according to the present invention, a capacitance storage element was formed. The cross-sectional view of the main part is the same as FIG. 5 shown in the first embodiment of the present invention. Pt with a thickness of 100 nm was used. In the conventional method, the TiN film was oxidized in the continuously formed Pt film, and the memory characteristics could not be obtained. However, when the present invention is used, it can operate as a capacitive storage element whether applied to a DRAM or a ferroelectric nonvolatile memory. Was confirmed.

As a method of making the length of the Pt crystal grain in the thickness direction smaller than the film thickness, there is a method of heat-treating Pt whose formation has been stopped halfway. Specifically, a substrate temperature of 300 ° C. was formed on a TiN film formed under the conditions described in Embodiment 1 of the present invention.
Ar flow rate 100scccm, pressure 3mTorr, DC power 12kW, Pt 50nm
After the formation, the plasma was stopped, the substrate temperature was raised to 600 ° C., and a heat treatment was performed for 10 minutes. Thereafter, 50 nm of Pt was further formed under the same conditions. The cross-sectional structure of Pt was the same as that shown in FIG.

Next, the barrier properties of oxygen were compared. Pt of 50 nm to 200 nm was formed on the TiN film by a sputtering method.
There were prepared those continuously formed according to the prior art and those subjected to a heat treatment at the time when half of the Pt film thickness according to the present invention was formed. Form PZT on those Pt by sol-gel method to 100nm,
A sample was prepared by crystallization at 650 ° C. for 2 minutes in an oxygen atmosphere. These samples were subjected to elemental analysis in the depth direction by SIMS to determine the dependency of the TiN oxide film thickness on the lower electrode Pt film thickness. It was found that the heat-treated Pt film according to the present invention was not oxidized even when the Pt film thickness was 100 nm or less, as in the case of the first embodiment of the present invention.

Using the Pt film formed according to the present invention, a capacitance storage element was prepared. The cross-sectional view of the main part is the same as FIG. 5 shown in the first embodiment of the present invention. Pt with a thickness of 100 nm was used. In the conventional method, the TiN film was oxidized in the continuously formed Pt film, and the memory characteristics could not be obtained. However, when the present invention is used, it can operate as a capacitive storage element whether applied to a DRAM or a ferroelectric nonvolatile memory. Was confirmed.

As a method of making the length of the Pt crystal grain in the thickness direction smaller than the film thickness, there is a method of changing Pt sputtering conditions on the way. Specifically, a substrate temperature of 300 ° C. and an Ar flow rate of 10 ° C. were formed on a TiN film formed under the conditions described in the first embodiment of the present invention.
After forming Pt with a thickness of 50 nm at 0 scccm, a pressure of 3 mTorr, and a DC power of 12 kW, the substrate temperature was lowered to 200 ° C., and the Ar flow rate was 100 sc.
Ct, pressure 3mTorr, DC power-12kW, Pt further
50 nm was formed. FIG. 2 shows a cross-sectional structure of Pt formed in a total of 100 nm. By lowering the substrate temperature during Pt formation,
A two-layer structure having different crystal grain sizes can be obtained, and the crystal grain boundaries, which are oxygen transmission paths, can be lengthened. Conversely, by increasing the substrate temperature during the formation, a two-layer structure having different crystal grain sizes can be obtained. The substrate temperature is not limited to the conditions shown here, and it is sufficient that the substrate temperature conditions of the two layers differ by at least 50 ° C. or more.

Next, oxygen barrier properties were compared. Pt of 50 nm to 200 nm was formed on the TiN film by a sputtering method.
There were prepared a conventional technology in which the substrate was continuously formed at the same substrate temperature and a technology in which the substrate temperature was changed by half the Pt film thickness according to the present invention. PZT was formed on the Pt by a sol-gel method to a thickness of 100 nm, and a sample was formed by crystallization at 650 ° C. for 2 minutes in an oxygen atmosphere. These samples were subjected to elemental analysis in the depth direction by SIMS to determine the dependency of the TiN oxide film thickness on the lower electrode Pt film thickness. In the case of the Pt film with the substrate temperature changed according to the present invention, as in the case of the first embodiment of the present invention, the Pt film thickness is 100 nm.
It was found that it was not oxidized even below m.

Using the Pt film formed according to the present invention, a capacitance storage element was formed. The cross-sectional view of the main part is the same as FIG. 5 shown in the first embodiment of the present invention. Pt with a thickness of 100 nm was used. Under the same conditions of the conventional method, the TiN film was oxidized in the Pt film under the same conditions, and the memory characteristics could not be obtained. However, when the present invention is used, the operation as a capacitance storage element can be applied to both a DRAM and a ferroelectric nonvolatile memory. Was confirmed.

As a method for making the length of the Pt crystal grain in the thickness direction smaller than the film thickness, there is a method of changing the sputtering conditions of Pt on the way. Specifically, a substrate temperature of 300 ° C. and an Ar flow rate of 10 ° C. were formed on a TiN film formed under the conditions described in the first embodiment of the present invention.
After forming Pt with a thickness of 50 nm at 0 scccm, a pressure of 3 mTorr, and a DC power of 12 kW, the pressure was increased to 5 mTorr, and Pt was further formed with a substrate temperature of 300 ° C., an Ar flow rate of 100 scccm, and a DC power of 12 kW.
The cross-sectional structure of Pt was similar to that shown in FIG. Conversely, a two-layer structure with different crystal grain sizes can be obtained by lowering the pressure during the formation. The pressure is not limited to the conditions shown here, and it is sufficient that the pressure conditions of the two layers differ by at least 1 mTorr or more.

Next, the barrier properties of oxygen were compared. Pt of 50 nm to 200 nm was formed on the TiN film by a sputtering method.
There were prepared a prior art that was continuously formed under the same pressure and a Pt according to the present invention in which the pressure was changed at half the Pt film thickness. PZT was formed 100 nm on those Pt by sol-gel method,
A sample was prepared by annealing at 0 ° C. for 2 minutes in an oxygen atmosphere. These samples were subjected to elemental analysis in the depth direction by SIMS to determine the dependency of the TiN oxide film thickness on the lower electrode Pt film thickness. In the case of the Pt film with the changed pressure according to the present invention, it was found that the Pt film was not oxidized even when the Pt film thickness was 100 nm or less, as in the case of the first embodiment of the present invention.

Using the Pt film formed according to the present invention, a capacitance storage element was formed. The cross-sectional view of the main part is the same as FIG. 5 shown in the first embodiment of the present invention. Pt with a thickness of 100 nm was used. Under the same conditions of the conventional method, the TiN film was oxidized in the Pt film under the same conditions, and the memory characteristics could not be obtained. However, when the present invention is used, the operation as a capacitance storage element can be applied to both a DRAM and a ferroelectric nonvolatile memory. Was confirmed.

As a method of making the length of the Pt crystal grain in the thickness direction smaller than the film thickness, there is a method of changing Pt sputtering conditions on the way. Specifically, a substrate temperature of 300 ° C. and an Ar flow rate of 10 ° C. were formed on a TiN film formed under the conditions described in the first embodiment of the present invention.
0 scccm, pressure 3 mTorr, DC power-12 kW, growth rate of 20 nm / sec, Pt was formed at 50 nm, and then DC power was reduced to 8 kW.
At a substrate temperature of 300 ° C., an Ar flow rate of 100 sccm, and a pressure of 3 mTorr, the growth rate was reduced to 15 nm / sec, and Pt was further formed to a thickness of 50 nm. The cross-sectional structure of Pt was similar to that shown in FIG. Conversely, a two-layer structure having different crystal grain sizes can be obtained by increasing the growth rate during the formation. The growth rate is not limited to the conditions shown here, and it is sufficient that the growth rates of the two layers differ by at least 1 nm / sec or more.

Next, the barrier properties of oxygen were compared. Pt of 50 nm to 200 nm was formed on the TiN film by a sputtering method.
There were prepared a conventional technique in which the film was continuously formed at the same growth rate, and a technique in which the growth rate was changed by half the Pt film thickness according to the present invention. PZT was formed on the Pt by a sol-gel method to a thickness of 100 nm, and a sample was formed by crystallization at 650 ° C. for 2 minutes in an oxygen atmosphere. The sample was subjected to elemental analysis in the depth direction by SIMS to determine the dependency of the TiN oxide film thickness on the lower electrode Pt film thickness. In the case of the Pt film with the growth rate changed according to the present invention, it was found that the Pt film was not oxidized even when the Pt film thickness was 100 nm or less as in the case of the first embodiment of the present invention.

Using the Pt film formed according to the present invention, a capacitance storage element was prepared. The cross-sectional view of the main part is the same as FIG. 5 shown in the first embodiment of the present invention. Pt with a thickness of 100 nm was used. Under the same conditions of the conventional method, the TiN film was oxidized in the Pt film under the same conditions, and the memory characteristics could not be obtained. However, when the present invention is used, the operation as a capacitance storage element can be applied to both a DRAM and a ferroelectric nonvolatile memory. Was confirmed.

[0027]

According to the present invention, since a Pt film having a high oxygen barrier property can be obtained, the Pt film thickness of the lower electrode of the capacitor can be reduced to 100 nm. Therefore, DRA
Capacitive storage elements such as M and ferroelectric nonvolatile memories can be miniaturized and highly integrated.

[Brief description of the drawings]

FIG. 1 is a diagram showing a cross-sectional structure of a two-stage formed Pt film according to the present invention.

FIG. 2 is a diagram showing a cross-sectional structure of a Pt film having a two-layer structure with different crystal grain sizes according to the present invention.

FIG. 3 is a diagram showing a cross-sectional structure of a continuously formed Pt film according to a conventional technique.

FIG. 4 shows the dependency of the oxide film thickness of the barrier layer TiN film on the Pt film thickness.

FIG. 5 is a sectional view of a main part of a capacitance storage element using a Pt film according to the present invention.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Si board | substrate 2 ... TiN film 3 ... Pt film 4 ... SiO2 film 5 ... n + Si (source / drain region) 6 ... W polycide (word line) 7: W polycide (lower bit line) 8: polycrystalline Si plug 9: barrier layer TiN film 10: lower electrode (Pt) 11: PZT film 12: upper electrode ( Pt) 13 ... Upper bit line (W) 14 ... BPSG.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁶ Identification symbol FI H01L 21/8247 29/788 29/792 (72) Inventor Masahiko Hiratani 1-280 Higashi-Koigakubo, Kokubunji-shi, Tokyo Central Research Laboratory, Hitachi, Ltd. In-house (72) Inventor Yoshihisa Fujisaki 1-280 Higashi Koigakubo, Kokubunji-shi, Tokyo Inside Central Research Laboratory, Hitachi, Ltd.

Claims (18)

[Claims] 1. A semiconductor device having a capacitor laminated in the order of a first lower electrode, a second lower electrode, an insulating film, and an upper electrode, in a thickness direction of crystal grains of the second lower electrode of the capacitor. The size of the second lower electrode is smaller than the thickness of the second lower electrode. 2. A semiconductor device comprising a capacitor laminated in the order of a first lower electrode, a second lower electrode, an insulating film and an upper electrode, wherein a length of a crystal grain boundary of the second lower electrode of the capacitor is set. Wherein the thickness of the semiconductor device is longer than at least the thickness of the second lower electrode. 3. A semiconductor device having a capacitor laminated in the order of a first lower electrode, a second lower electrode, an insulating film, and an upper electrode, wherein the second lower electrode of the capacitor is a film of crystal grains. A semiconductor device having a stacked structure including at least two layers whose thickness in the thickness direction is smaller than the thickness of the second lower electrode. 4. In a semiconductor device having a capacitor laminated in the order of a first lower electrode, a second lower electrode, an insulating film and an upper electrode, the second lower electrode of the capacitor has an average crystal grain size. A semiconductor device having a laminated structure having at least two layers different from each other. 5. The second lower electrode according to any one of claims 1 to 4, wherein an upper layer is formed after forming an arbitrary film thickness equal to or less than a desired film thickness, temporarily stopping film formation. Forming a semiconductor device by repeating the above at least once. 6. The second lower electrode according to any one of claims 1 to 4, wherein an upper layer is formed after forming an arbitrary film thickness equal to or less than a desired film thickness and temporarily exposing it to the atmosphere. Forming a semiconductor device by repeating the above at least once. 7. The second lower electrode according to any one of claims 1 to 4, wherein after forming an arbitrary thickness equal to or less than a desired thickness, the upper layer is formed after performing sputter etching on the film surface. A method for manufacturing a semiconductor device, characterized by forming by repeating forming at least once. 8. The second lower electrode according to any one of claims 1 to 4, wherein after forming an arbitrary film thickness equal to or less than a desired film thickness, the second lower electrode is subjected to a heat treatment at least at a film formation temperature or higher. Forming a layer by repeating at least once at least one layer. 9. The second lower electrode according to claim 1, wherein an upper layer is formed by changing a film forming condition after forming an arbitrary film thickness less than or equal to a desired film thickness. At least one
A method for manufacturing a semiconductor device, wherein the method is repeated at least twice. 10. The method of manufacturing a semiconductor device according to claim 9, wherein the film forming condition to be changed is a substrate temperature, and the upper layer is formed at a lower substrate temperature than a lower layer. 11. A method of manufacturing a semiconductor device according to claim 9, wherein the film forming condition to be changed is a film forming pressure, and the upper layer is formed at a higher film forming pressure than the lower layer. Method. 12. The method of manufacturing a semiconductor device according to claim 9, wherein the film forming condition to be changed is a film forming rate, and the upper layer is formed at a lower film forming rate than the lower layer. Method. 13. The method of manufacturing a semiconductor device according to claim 9, wherein the film forming condition to be changed is a substrate temperature, and the upper layer is formed at a higher substrate temperature than a lower layer. 14. A method of manufacturing a semiconductor device according to claim 9, wherein the film forming condition to be changed is a film forming pressure, and the upper layer is formed at a lower film forming pressure than the lower layer. Method. 15. The manufacturing method of a semiconductor device according to claim 9, wherein the film forming conditions to be changed are a film forming rate, and the upper layer is formed at a higher film forming rate than the lower layer. Method. 16. The semiconductor device according to claim 1, wherein the second lower electrode is made of platinum. 17. The semiconductor device according to claim 16, wherein the second lower electrode platinum is formed by a sputtering method. 18. A semiconductor device using the second lower electrode according to claim 1.