JP3493531B2 - Method for manufacturing semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, for example, a method for manufacturing a semiconductor device having a protruding electrode made of copper and solder.

[0002]

2. Description of the Related Art For example, in the case of manufacturing a semiconductor device such as an IC chip having a protruding electrode made of copper and solder, as an example, as shown in FIGS. And the like, the connection pad 4 formed on the semiconductor substrate 1 is exposed through the opening 3 formed in the insulating film 2 formed on the semiconductor substrate 1, and the underlying metal layer forming layer 5 is formed on the entire upper surface thereof. Is prepared, and the plating resist layer 6 is formed on the underlying metal layer forming layer 5 except the portion corresponding to the connection pad 4 (that is, the protruding electrode forming region 5a). In this case, since a part of the upper surface outer peripheral portion 5b of the base metal layer forming layer 5 is used as a plating electrode in the plating process for forming the protruding electrode, a part of the upper surface outer peripheral portion 5b is covered with the plating resist layer 6. Although it may be exposed without any need, in this conventional example, the entire upper surface outer peripheral portion 5b is exposed. The reason will be described later.
In addition, in FIG. 10A, the alternate long and short dash line indicated by reference numeral 7 indicates a dicing street.

Further, a copper plating apparatus as shown in FIG. 11 is prepared. In this copper plating apparatus, a cup 12 is provided in the plating tank 11. Plating tank 11 and cup 12
And are communicated with each other by a liquid path 13. In the liquid path 13,
A jet pump 15 for jetting the copper plating solution 14 contained in the plating tank 11 into the cup 12 is interposed. A net-shaped anode electrode 1 is provided on the bottom of the cup 12.
6 is provided. The anode electrode 16 is a lead wire 17
Is connected to the anode of a power supply device not shown.
Cathode electrodes 18 are provided at a plurality of predetermined locations on the upper surface of the cup 12 that are spaced at equal intervals. The cathode electrode 18 is connected to the cathode of the power supply device via a lead wire 19.

Then, the semiconductor substrate 1 shown in FIGS. 10 (A) and 10 (B) is placed on the plurality of cathode electrodes 18 with the plating resist layer 6 side facing down, and the plating bath 11 is covered with the upper lid 1.
Attach 9. Then, the semiconductor substrate 1 is pressed by the leaf spring 20 provided on the lower surface of the upper lid 19, so that the upper peripheral portion 5b of the base metal layer forming layer 5 which is not covered by the plating resist layer 6 is spaced at equal intervals. Cathode electrode 1 corresponding to a plurality of predetermined locations
8 is pressed. When the jet pump 15 is driven in this state, the copper plating solution 14 contained in the plating tank 11 is
Is jetted into the cup 12 through the anode electrode 16 and is jetted to the lower surface side of the semiconductor substrate 1. At this time, when a plating current is passed between the anode electrode 16 and the cathode electrode 18, as shown in FIG. 12, the protruding electrode formation region 5a of the underlying metal layer formation layer 5 which is not covered with the plating resist layer 6 is formed. The copper plating layer 21 is formed. Further, the copper plating layer 22 is also formed on the entire upper surface outer peripheral portion 5b of the base metal layer forming layer 5 which is not covered with the plating resist layer 6. In this case, the height of the copper plating layers 21 and 22 is about 5 to 25 μm. The copper plating solution 14 sprayed on the lower surface side of the semiconductor substrate 1 overflows from the upper end of the cup 12 to the outside,
It is collected in the plating tank 11.

Next, although not shown, when a predetermined solder plating process is performed using a solder plating apparatus having a structure similar to that of the copper plating apparatus shown in FIG. 11, as shown in FIG. , 22 are formed with solder plating layers 23, 24. In this case, since the plating resist layer 6 is relatively thin, solder plating is isotropically deposited on the plating resist layer 6. Therefore, in particular, the solder plating layer 23 for forming the protruding electrode has a mushroom shape. At this stage, the shape of the solder plating layer 23 is made mushroom-shaped so that the height thereof is relatively high, about 100 to 200 μm, and the height of the final protruding electrode described later is sufficiently high. Is.

Next, when the plating resist layer 6 is peeled and removed, the state shown in FIG. 14 is obtained. Next, the portion of the underlayer metal layer forming layer 5 exposed by the removal of the plating resist layer 6, that is, the underlayer metal layer forming layer 5 other than under the copper plating layer 21 is removed by etching, whereby FIG.
As shown in FIG. 5, a base metal layer 5A is formed under the copper plating layer 21. In this case, the metal layer 5B for the plating electrode, which is the base metal layer forming layer 5, remains under the copper plating layer 22.
Next, as shown in FIG. 16, when heat treatment is performed, in particular, the mushroom-shaped solder plating layer 23 is melted and then rounded to a substantially spherical shape due to surface tension, and solidified in this state, so that the copper plating layer 21 is solidified. A substantially spherical solder layer 23 is formed on the surface. In this case, the copper plating layer 21 has a function of maintaining a high barrier property during the high temperature heat treatment and a function of a nucleus for forming the substantially spherical solder layer 23. As a result, a protruding electrode composed of the copper plating layer 21 and the substantially spherical solder layer 23 is formed on the connection pad 4 with the underlying metal layer 5A interposed therebetween. Next, when the semiconductor substrate 1 is diced by a dicing blade (not shown) along the dicing streets 7 shown by the dashed line in FIG. 10 (A), a plurality of chips are obtained.

Here, the entire area of the upper peripheral portion 5b of the underlying metal layer forming layer 5 is exposed without being covered with the plating resist layer 6, and the copper plating layer 22 and the solder plating layer 24 are formed over the entire exposed area. The reason for doing so will be explained. For example, as shown in FIG. 17, the electric lines of force 25 around the periphery of the semiconductor substrate 1 during the plating process,
The density of the lines of electric force 25 is higher in the outer peripheral portion of the semiconductor substrate 1 than in the central portion. As a result, the amount of plating deposition in the outer peripheral portion of the semiconductor substrate 1 having a high density of the electric flux lines 25 is larger than that in the central portion, and if no measures are taken, copper plating formed on the outer peripheral portion of the semiconductor substrate 1 is performed. The heights of the layer 21 and the solder plating layer 23 are higher than those formed in the central portion, and the heights of the protruding electrodes in the final shape vary. Therefore, the entire area of the upper surface outer peripheral portion 5b of the underlying metal layer forming layer 5 is exposed without being covered with the plating resist layer 6, and the plating due to the increase in the density of the electric force lines 25 is deposited on the entire exposed portion to copper plating. By forming the layer 22 and the solder plating layer 24, the heights of the protruding electrodes in the final shape are made uniform throughout.

[0008]

However, according to the conventional method of manufacturing a semiconductor device, the copper plating layer 22 and the solder plating layer 24 are formed over the entire outer peripheral portion of the semiconductor substrate 1, and these plating layers are formed. Since 22 and 24 are strongly adhered to the metal layer 5B for the plating electrode remaining thereunder, there is no influence on the copper plating layer 21 and the solder plating layer 23 for forming the protruding electrodes, and the outer peripheral portion It is extremely difficult to remove only the plating layers 22 and 24. On the other hand, the plated layers 22 and 24 inevitably overlap with the dicing street 7 shown in FIG. As a result, when the semiconductor substrate 1 is diced, the plating layers 22 and 24 are also diced. However, copper and solder, which are the materials for the plated layers 22 and 24, are relatively soft. Therefore, there is a problem that the dicing blade for dicing the semiconductor substrate 1 is likely to be entangled with copper or solder, which eventually deteriorates the cutting performance early and shortens the life of the dicing blade. It is an object of the present invention to prevent the plating layer formed on the outer peripheral surface of the upper surface of the underlying metal layer from overlapping the dicing streets or to be formed on the outer peripheral surface of the upper surface of the underlying metal layer forming layer. It is an object of the present invention to provide a method for manufacturing a semiconductor device, which can easily remove the plating layer.

[0009]

The invention according to claim 1 is
A base metal layer forming layer is formed on the insulating film and the connection pad exposed on the opening formed in the insulating film formed on the semiconductor substrate and covered on the semiconductor substrate. A plating resist layer is formed on a portion of the central portion of the upper surface of the metal layer forming layer excluding a portion corresponding to the connection pad and a portion of the upper surface outer peripheral portion of the underlying metal layer forming layer excluding a plating electrode forming region, The first metal plating layer is formed on the base metal layer forming layer in a portion corresponding to the connection pad by performing the metal plating treatment of No. 1, and the outer peripheral portion of the plating resist layer is removed to remove the base layer. By exposing the outer peripheral portion of the upper surface of the metal layer forming layer and performing the second metal plating treatment, the second metal plating is performed on the first metal plating layer and the outer peripheral portion of the upper surface of the base metal layer forming layer. Forming layers and before The plating resist layer and the underlying metal layer forming layer below the plating resist layer are removed, and heat treatment is performed to form the protruding electrode by the second metal plating layer, and the outer periphery of the upper surface of the underlying metal layer forming layer. A metal of the underlying metal layer forming layer under the second metal plating layer is diffused into the second metal plating layer formed in the portion to form the second metal plating layer and the underlying metal layer. The adhesion between the working layers is reduced, and the second metal plating layer formed on the outer peripheral portion of the upper surface of the underlying metal layer forming layer is removed. The invention described in claim 2 is claim 1
In the invention described above, the first metal plating layer is a copper plating layer, and the second metal plating layer is a solder plating layer. According to a third aspect of the invention, in the first aspect of the invention, the plating electrode formation region is a portion that does not correspond to a dicing street. Claim 4
According to the invention described in claim 1, in the invention according to claim 1, the second metal plating layer formed on the outer peripheral portion of the upper surface of the underlying metal layer forming layer is removed by washing with water.

[0010]

According to the first aspect of the present invention, a portion except a portion corresponding to the connection pad in the central portion of the upper surface of the underlying metal layer forming layer and a plating electrode forming region of the upper peripheral portion of the underlying metal layer forming layer are formed. Since the plating resist layer is formed on the removed portion, the first metal plating layer (the copper plating layer in the case of the invention of claim 2) is formed on the peripheral portion of the upper surface of the base metal layer forming layer. However, it will be formed only in the plating electrode formation region. Therefore, when the plating electrode forming region does not correspond to the dicing street as in the third aspect of the invention, the first metal plating layer (copper plating layer) formed on the outer peripheral portion of the upper surface of the base metal layer forming layer is formed. ) Does not overlap with Dicing Street. Also, according to the invention of claim 1, after performing the first metal plating treatment, the outer peripheral portion of the plating resist layer is removed to expose the upper peripheral portion of the upper surface of the underlying metal layer forming layer. Since the second metal plating process is performed on the second metal plating layer, the second metal plating layer is formed on the entire outer peripheral portion of the upper surface of the base metal layer forming layer, and thus the second metal plating layer for forming the protruding electrode is formed. The height of the layer (solder plating layer in the case of the invention according to claim 2) can be made uniform throughout. In this case, only the second metal plating layer (solder plating layer) is formed on most of the outer peripheral portion of the upper surface of the base metal layer forming layer. As a result, only the solder plating layer needs to be removed from the outer peripheral portion of the base metal layer forming layer. However, when heat treatment is performed to make the shape of the solder plating layer almost spherical,
Second gold formed on the outer peripheral portion of the upper surface of the base metal layer forming layer
Gold for the base metal layer forming layer on the metal plating layer (solder plating layer)
The metal diffuses and the second metal plating layer (solder plating layer) and the bottom
The adhesiveness with the base metal layer forming layer is reduced, and the solder plating layer formed on the outer peripheral portion of the upper surface of the base metal layer forming layer can be removed by washing with water. Therefore, the base metal layer forming layer The solder plating layer formed on the outer peripheral portion of the upper surface of can be easily removed.

[0011]

1 to 9 show respective manufacturing steps of a semiconductor device according to an embodiment of the present invention. Therefore, a method of manufacturing the semiconductor device of this embodiment will be described with reference to these drawings in order.

First, as shown in FIGS. 1 (A) and 1 (B),
The connection pad 34 formed on the semiconductor substrate 31 is exposed through the opening 33 formed in the insulating film 32 made of silicon oxide or the like formed on the semiconductor substrate 31 made of a silicon wafer or the like, and the entire upper surface thereof is exposed. A base metal layer forming layer 35 is formed on the substrate. In this case, the connection pad 34 is made of Al or an aluminum alloy such as Al-Si and Al-Cu-Si. The underlying metal layer forming layer 35 has a two-layer structure of an adhesive layer made of Ti, Pd, a Ti—W alloy or the like and a barrier layer made of Cu or the like, but is made of an alloy of the adhesive metal and the barrier metal. It may have a single layer structure. Note that reference numeral 36 in FIG.
The alternate long and short dash line indicated by indicates the dicing street.

Next, as shown in FIGS. 2 (A) and 2 (B),
Connection pad 34 at the center of the upper surface of the underlying metal layer forming layer 35
And a portion other than the portion corresponding to (i.e., the protruding electrode forming region 35a) and three predetermined plating electrode forming regions 35a which are arranged at equal intervals in the outer peripheral portion of the upper surface of the base metal layer forming layer 35. A plating resist layer 37 is formed on the removed portion. In this case, the plating electrode forming area 35a
Is a portion that does not correspond to the dicing street 36.
Next, a predetermined copper (first metal) plating process is performed using a copper plating apparatus as shown in FIG. Then, as shown in FIG. 3, the copper plating layer 38 is formed on the protruding electrode forming portion 35 a of the base metal layer forming layer 35 which is not covered with the plating resist layer 37. Also, the plating resist layer 3
A copper plating layer (not shown) is also formed in the plating electrode forming region 35a of the underlying metal layer forming layer 35 which is not covered by 7. In this case, the height of the copper plating layer 38 is 5 to 2
It should be about 5 μm.

Next, as shown in FIG. 4, the outer peripheral portion of the plating resist layer 37 is entirely peeled and removed to expose the upper peripheral portion 35c of the underlying metal layer forming layer 35.
In this case, although not shown in the drawing, the semiconductor substrate 31 is placed on the upper surface of the rotary plate with the vacuum suction mechanism with the plating resist layer 37 side being the upper side to attract the semiconductor substrate 31, and the semiconductor substrate 31 is rotated at high speed together with the rotary plate to perform plating. The stripper may be ejected from a nozzle arranged above the outer peripheral portion of the resist layer 37, and the outer peripheral portion of the plating resist layer 37 may be concentrically etched and removed.

Next, using a solder plating apparatus having a structure similar to that of the copper plating apparatus as shown in FIG.
Metal) plating treatment. Then, as shown in FIG. 5, a solder plating layer 39 is formed on the copper plating layer 38,
In addition, the solder plating layer 40 is formed on the upper peripheral portion 35c of the base metal layer forming layer 35. Also in this case, since the thickness of the plating resist layer 37 is relatively thin, the plating resist layer 3
Solder plating is isotropically deposited on 7. Therefore, in particular, the solder plating layer 3 for forming the protruding electrode
9 mushroom shape, the height is 100 ~ 200μm
Try to be around.

Here, when performing the solder plating process, since the upper surface outer peripheral portion 35a of the underlying metal layer forming layer 35 is exposed, solder plating is deposited on this exposed portion by increasing the density of the lines of electric force, and the solder is deposited. The plating layers 39 and 40 can be formed. As a result, in particular, the height of the solder plating layer 39 for forming the protruding electrode can be made uniform over the entire surface. On the other hand, when performing the copper plating treatment, most of the upper surface outer peripheral portion 35a of the base metal layer forming layer 35 is not exposed, and therefore copper plating is deposited on this non-exposed portion by increasing the density of electric flux lines. It is not possible. Therefore, the height of the copper plating layer 38 cannot be made uniform throughout. However, while the height of the copper plating layer 38 is about 5 to 25 μm, the solder plating layer 3
The height of the copper plating layer 38 is substantially high, about 100 to 200 μm, and as described later, the solder plating layer 39 is heat-treated to have a substantially spherical shape. It doesn't matter. Therefore, it is possible to make the height of the projection electrode of the final shape composed of the copper plating layer 38 and the substantially spherical solder layer uniform throughout.

Next, when the plating resist layer 37 is peeled and removed, the state shown in FIG. 6 is obtained. Next, the portion of the underlayer metal layer forming layer 35 exposed by the removal of the plating resist layer 37, that is, the underlayer metal layer forming layer 35 except under the copper plating layer 38 is etched and removed. As shown in FIG.
Form A. In this case, below the solder plating layer 40, the metal layer 3 including the plating electrode composed of the base metal layer forming layer 35 is formed.
5B remains. Next, as shown in FIG. 8, when heat treatment is performed, in particular, the mushroom-shaped solder plating layer 39 is melted and then rolled into a substantially spherical shape due to the surface tension, and solidified in this state, so that the copper plating layer 38 is solidified. A substantially spherical solder layer 39 is formed on the surface. As a result, a protruding electrode composed of the copper plating layer 38 and the substantially spherical solder layer 39 is formed on the connection pad 34 with the underlying metal layer 35A interposed therebetween.

By the way, since the heat treatment is performed at a high temperature,
At this time, the Sn—Pb alloy of the solder (plating) layer 40 and Cu of the upper barrier layer of the metal layer 35B thereunder cause mutual diffusion, and Cu of the thin barrier layer diffuses to the solder layer 40 side. Will end up. As a result, the solder layer 40 comes into direct contact with the lower adhesive layer of the metal layer 35B. Then, the adhesion between the solder layer 40 and a metal such as Ti, Pd, or a Ti—W alloy, which is a material of the lower adhesive layer of the metal layer 35B, becomes low. As a result, the solder layer 40 can be removed by washing with water, and therefore the solder layer 40 can be easily removed. This state is shown in FIG.
Next, the semiconductor substrate 31 is diced by a dicing blade (not shown) along the dicing streets 36 indicated by the one-dot chain line in FIG. 2 (A) to obtain a plurality of chips.

As described above, since the semiconductor substrate 31 is diced by the dicing blade with the solder layer 40 removed, even if the solder layer 40 is a relatively soft metal, it can be used as a dicing blade for dicing the semiconductor substrate 31. The solder is not entangled with each other, and the cutting performance is not deteriorated at an early stage, so that the life of the dicing blade can be extended. Even if the copper plating layer is formed in the plating electrode forming region 35a of the base metal layer forming layer 35, the plating electrode forming region 35a is formed in the plating electrode forming region 35a because it does not correspond to the dicing street 36. It is possible to prevent the copper plating layer that is formed on the dicing street 36 from overlapping. Therefore, also in this case, it is possible to prevent the copper from being entangled with the dicing blade for dicing the semiconductor substrate 31. In addition, the plating electrode formation region 3
The copper plating layer formed on 5a is the dicing street 3
Even if it overlaps with 6, the amount of overlap can be extremely reduced. Therefore, in this case, the entanglement of copper with the dicing blade for dicing the semiconductor substrate 31 can be considerably reduced.

[0020]

As described above, according to the first aspect of the present invention, the portion except the portion corresponding to the connection pad in the central portion of the upper surface of the underlying metal layer forming layer and the upper surface of the underlying metal layer forming layer. Since the plating resist layer is formed on a portion of the outer peripheral portion excluding the plating electrode forming region, the first metal plating layer (in the case of the invention according to claim 2, Even if a copper plating layer is formed,
It will be formed only in the plating electrode formation region. Therefore, when the plating electrode formation region is a portion that does not correspond to the dicing streets as in the third aspect of the present invention, the first electrode formed on the outer peripheral portion of the upper surface of the base metal layer forming layer
The metal plating layer (copper plating layer) can be prevented from overlapping the dicing street. As a result,
Even if the first metal plating layer (copper plating layer) is relatively soft, the relatively soft first metal (copper) does not become entangled with the dicing blade for dicing the semiconductor substrate, and cutting performance is deteriorated early. And the life of the dicing blade can be extended. Also, according to the invention of claim 1, after performing the first metal plating treatment, the outer peripheral portion of the plating resist layer is removed to expose the upper peripheral portion of the upper surface of the underlying metal layer forming layer. Since the second metal plating process is performed on the second metal plating layer, the second metal plating layer is formed on the entire outer peripheral portion of the upper surface of the base metal layer forming layer, and thus the second metal plating layer for forming the protruding electrode is formed. The height of the layer (solder plating layer in the case of the invention according to claim 2) can be made uniform throughout. In this case, only the second metal plating layer (solder plating layer) is formed on most of the outer peripheral portion of the upper surface of the base metal layer forming layer. As a result, only the solder plating layer needs to be removed from the outer peripheral portion of the base metal layer forming layer. However, if heat treatment is performed to make the shape of the solder plating layer almost spherical, the underlying metal layer
Second metal plating layer formed on the outer peripheral portion of the upper surface of the formation layer
Metal of base metal layer forming layer diffuses into ( solder plating layer )
Second metal plating layer ( solder plating layer ) and underlying metal layer
The adhesion to the forming layer is reduced, and the solder plating layer formed on the outer peripheral portion of the upper surface of the underlying metal layer forming layer can be removed by washing with water. The solder plating layer formed on the portion can be easily removed. As a result, even if the solder plating layer is relatively soft, the solder does not become entangled with the dicing blade for dicing the semiconductor substrate, and thus the cutting performance does not deteriorate early and the life of the dicing blade can be extended. .

[Brief description of drawings]

FIG. 1A is a plan view showing a state in which a connection pad, an insulating film, and a layer for forming a base metal layer are formed on a semiconductor device in manufacturing the semiconductor device according to one embodiment of the present invention;
Is a sectional view taken along the line BB.

FIG. 2A is a plan view showing a state where a plating resist layer is formed in the same manufacturing process, and FIG. 2B is a sectional view taken along the line BB.

FIG. 3 is a cross-sectional view showing a state where a copper plating process is performed in the same manufacturing process.

FIG. 4 is a cross-sectional view showing a state where the outer peripheral portion of the plating resist layer is removed during the manufacturing.

FIG. 5 is a cross-sectional view showing a state where a solder plating process is performed in the same manufacturing.

FIG. 6 is a cross-sectional view showing a state in which a plating resist layer has been removed during the manufacturing process.

FIG. 7 is a cross-sectional view showing a state in which an unnecessary portion of the underlying metal layer forming layer is removed during the manufacturing.

FIG. 8 is a cross-sectional view showing a state in which a solder layer for forming protruding electrodes is formed into a substantially spherical shape by heat treatment during the manufacturing process.

FIG. 9 is a cross-sectional view showing a state in which an unnecessary portion of the solder layer is removed during the manufacturing.

FIG. 10A is a plan view showing a state in which a connection pad, an insulating film, a base metal layer forming layer, and a plating resist layer are formed on a semiconductor device in manufacturing a conventional semiconductor device;
Is a sectional view taken along the line BB.

FIG. 11 is a schematic configuration diagram of a copper plating apparatus used in the manufacturing.

FIG. 12 is a cross-sectional view showing a state in which a copper plating process is performed in the same manufacturing process.

FIG. 13 is a cross-sectional view showing a state where a solder plating process is performed in the same manufacturing process.

FIG. 14 is a cross-sectional view showing a state in which a plating resist layer is removed during the same manufacturing process.

FIG. 15 is a cross-sectional view showing a state in which an unnecessary portion of the underlying metal layer forming layer is removed during the same manufacturing process.

FIG. 16 is a cross-sectional view showing a state in which a solder layer for forming protruding electrodes is formed into a substantially spherical shape by heat treatment during the manufacturing process.

FIG. 17 is a diagram for explaining the reason why the heights of the protruding electrodes are not uniform.

[Explanation of symbols]

31 Semiconductor substrate 32 insulating film 33 opening 34 Connection pad 35 Layer for forming underlying metal layer 36 Dicing Street 37 Plating resist layer 38 Copper plating layer 39, 40 Solder plating layer

Claims (5)

(57) [Claims] 1. A layer for forming a base metal layer is formed on a connection pad and on the insulating film, which are formed on a semiconductor substrate and exposed through an opening formed in an insulating film covered on the semiconductor substrate. And forming a plating resist layer on a portion of the central portion of the upper surface of the underlying metal layer forming layer excluding a portion corresponding to the connection pad and a portion of the upper surface outer peripheral portion of the underlying metal layer forming layer excluding a plating electrode forming region. Is formed and a first metal plating process is performed to form a first metal plating layer on the underlying metal layer forming layer in a portion corresponding to the connection pad, and an outer peripheral portion of the plating resist layer is formed. By removing to expose the outer peripheral portion of the upper surface of the base metal layer forming layer, and performing the second metal plating treatment, the upper peripheral portion of the upper surface of the first metal plated layer and the upper metal layer forming layer is formed. Second metal Forming a layer, removing the plating resist layer and the underlying metal layer forming layer below the plating resist layer, and performing heat treatment to form a protruding electrode by the second metal plating layer, and the underlying metal layer The second metal plating layer formed on the outer peripheral portion of the upper surface of the formation layer is provided with the second metal plating layer.
By diffusing the metal of the underlying metal layer forming layer under the metal plating layer to reduce the adhesion between the second metal plating layer and the underlying metal layer forming layer, A method of manufacturing a semiconductor device, characterized in that the second metal plating layer formed on the outer peripheral portion of the upper surface is removed. 2. The invention according to claim 1, wherein the first
2. The method of manufacturing a semiconductor device, wherein the metal plating layer is a copper plating layer, and the second metal plating layer is a solder plating layer. 3. The invention according to claim 1 or 2,
The method of manufacturing a semiconductor device, wherein the plated electrode formation region is a portion that does not correspond to a dicing street. 4. The manufacturing of a semiconductor device according to claim 1, wherein the second metal plating layer formed on the outer peripheral portion of the upper surface of the base metal layer forming layer is removed by washing with water. Method. 5. The invention according to claim 1, wherein the second metal plating layer formed on the outer peripheral portion of the upper surface of the base metal layer forming layer is removed, and then the semiconductor substrate is diced along a dicing street. By doing so, a plurality of chips of a predetermined size are obtained, and a method of manufacturing a semiconductor device.