JP3451003B2 - Semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device used in an information processing device such as a computer, and more particularly to a semiconductor device formed by molding a semiconductor element with resin.

[0002]

2. Description of the Related Art Conventionally, a mold type semiconductor device used in an information processing device such as a computer is made of an electrically insulating material using ceramics such as an aluminum oxide sintered body or a mullite sintered body, and has an upper surface. An insulating base having a mounting portion on which a semiconductor element is mounted in the central portion and a large number of wiring layers leading out in high density in a fan shape from the periphery of the mounting portion to the outer peripheral portion; A lead frame formed by integrally connecting a large number of external lead terminals arranged at substantially the same intervals as each other with a frame-like connecting band at the outer end is prepared, and external leads are provided on the wiring layer of the insulating substrate. Use silver solder, solder, or gold-
Bonding is performed through a brazing material such as tin solder, and then the semiconductor element is mounted and fixed on the mounting portion of the insulating base, and each electrode of this semiconductor element is electrically connected to the wiring layer through a bonding pad, Finally, the insulating substrate, the semiconductor element and a part of the external lead terminal are manufactured by coating with a molding resin.

Then, the external lead terminals are cut and separated from the frame-shaped connecting band, the respective external lead terminals are electrically independent, and the respective external lead terminals are connected to an external electric circuit. Will be electrically connected to an external electric circuit.

In such a semiconductor device, an electric signal in a high frequency region has come to be used for information processing as the speed and integration of the information processing device have been rapidly advanced in recent years.

[0005]

However, since ceramics are used for the insulating substrate in the conventional semiconductor device described above, when the insulating substrate is made of an aluminum oxide sintered body, its relative permittivity is about the same. As high as 10,
Therefore, there is a problem in that a signal in a high frequency region propagating through a wiring layer formed on the insulating substrate is delayed, which hinders high-speed processing.

Further, when ceramics is used for the insulating substrate, it is necessary to use refractory metals such as tungsten and molybdenum for the wiring layers. However, since wiring layers made of these refractory metals have high wiring resistance values, This also causes a problem that the signal in the high frequency region is delayed or the signal is greatly attenuated, which impedes high-speed processing.

Further, a semiconductor element which is driven at a high speed is extremely susceptible to noise, and when noise enters the wiring layer from an external electric circuit, it enters the semiconductor element as it is through the wiring layer and causes a malfunction in the semiconductor element. There were also problems.

The present invention has been devised in view of the above circumstances, and an object thereof is to provide a high-speed processing capable of processing information at high speed without causing signal delay or attenuation even for a signal in a high frequency region. It is to provide a semiconductor device having a function and high reliability.

Another object of the present invention is to properly absorb the noise that has entered the wiring layer from the external electric circuit, effectively prevent the noise from entering the semiconductor element, and operate the semiconductor element normally. An object of the present invention is to provide a semiconductor device that can be manufactured.

[0010]

The semiconductor device of the present invention comprises:
An insulating base having a mounting portion on which a semiconductor element is mounted in the central portion of the upper surface and a wiring layer led out from the periphery of the mounting portion to the outer periphery, and mounted on the mounting portion of the insulating base, and electrodes are connected to the wiring layer. A semiconductor element, an external lead terminal attached to the wiring layer for connecting the semiconductor element to an external electric circuit, and a mold resin covering the insulating substrate, the semiconductor element and a part of the external lead terminal. In the device, the insulating substrate contains lithium silicate glass containing 5 to 30% by weight of Li ₂ O and a yield point of 400 to 800 ° C. of 20 to 80% by volume, and quartz, cristobalite, tridymite, enstatite, and form. 20-80 filler components consisting of at least one of stellite
A sintered body having a relative permittivity of 6 or less, containing at least one crystal phase of quartz, cristobalite, tridymite, and enstatite, which is obtained by sintering a molded body containing at a volume ratio of A part of the wiring layer is covered with an auxiliary film containing ferrite powder, and the auxiliary film contains 5 to 30% by weight of Li ₂ O and has a yield point of 400.
20 ~ 80% by volume of lithium silicate glass at ~ 800 ° C
And 10 to 50 parts by weight of glass ceramics containing 20 to 80% by volume of a filler component consisting of at least one of quartz, cristobalite, tridymite, enstatite and forsterite, and ferrite powder 50
.About.90 parts by weight.

Further, the semiconductor device of the present invention is characterized in that the wiring layer is made of a metal containing copper and silver as main components.

[0012]

According to the semiconductor device of the present invention, Li ₂ O of 5 to 5 is used as the insulating substrate in the mold type semiconductor device.
20% to 80% by volume of lithium silicate glass having a deformation point of 400 to 800 ° C. and containing 30% by weight, and 20 to 20% by volume of a filler component composed of at least one of quartz, cristobalite, tridymite, enstatite and forsterite.
Obtained by sintering a molded body containing at a ratio of ˜80% by volume,
Since a sintered body containing at least one crystal phase selected from quartz, cristobalite, tridymite, and enstatite and having a relative dielectric constant of 6 or less was used, the relative dielectric constant was extremely high with respect to electric insulating materials such as ceramics. As a result, a semiconductor device capable of sufficiently responding to high-speed processing of information without causing a problematic delay in a signal in a high frequency region propagating in a wiring layer formed on an insulating substrate. Becomes

As described above, as the insulating substrate, 20 to 80% by volume of lithium silicate glass containing 5 to 30% by weight of Li ₂ O and having a yield point of 400 to 800 ° C., quartz, cristobalite, tridymite, enstatite, By sintering a molded body containing a filler component consisting of at least one type of forsterite in a proportion of 20 to 80% by volume, a relative dielectric constant having a crystal layer of at least one type of quartz, cristobalite, tridymite and enstatite is obtained. A sintered body having a rate of 6 or less can be easily manufactured with good reproducibility.

By using lithium silicate glass containing Li ₂ O as an essential component in an amount of 5 to 30% by weight as the above glass, lithium silicate (for example, Li ₂ Si) is contained in the sintered body after sintering. ₂ 0 ₅₎ can precipitate, moreover, the yield point is 400 ° C. to 800 ° C. and comparatively low, since even with a small amount of glass that can be low-temperature firing, a metal mainly composed of copper It can be fired at the same time as the formed wiring layer.

Quartz, cristobalite, tridymite, enstatite and forsterite are mixed as a filler component, and the ratio thereof is appropriately controlled so that the relative permittivity of the glass-ceramic sintered body is arbitrarily set within the range of 6 or less. Can be controlled.

Furthermore, the yield point of lithium silicate glass is set to 4
By setting the temperature to 00 ° C. to 800 ° C., the glass content can be reduced, the filler component content can be increased, and the firing shrinkage start temperature can be increased. As a result, it is possible to efficiently remove the molding binder such as the organic resin added at the time of molding, and to match the firing conditions with the wiring layer that is fired at the same time as the insulating substrate.

By producing a crystal phase of quartz, cristobalite, tridymite, and enstatite in the sintered body, the relative permittivity εr of these is as low as 3 to 4, so that the electrical characteristics are low εr. Is achieved. The relative permittivity of the sintered body is 1nε _composite − V _filler 1nε _filler + (1 −V)
Since it is determined by the logarithmic law of _filler 1nε _matrix , it is easy to use ε _filler and ε
_It suffices if the _matrix is 6 or less.

Further, according to the semiconductor device of the present invention, the wiring layer led out from the periphery of the mounting portion where the semiconductor element is mounted in the central portion of the upper surface of the insulating substrate to the outer peripheral portion is formed of a metal containing copper or silver as a main component. Since the wiring resistance value of the wiring layer is low, the signal in the high frequency region is not delayed or the signal is not attenuated so much that high-speed information processing is not hindered.

Examples of the metal containing copper and silver as the main component used in the wiring layer include copper, Cu ₂ O, CuO, silver, silver-platinum, silver-palladium, copper-nickel, copper-zinc, or a combination thereof. There are alloys and the like, and when copper or Cu ₂ O is used, a wiring layer having no migration and a low cost can be obtained.

Therefore, according to the present invention, there is provided a highly functional and highly reliable semiconductor device which does not cause signal delay or attenuation even for a signal in a high frequency region and can cope with high speed processing of information. be able to.

Further, according to the semiconductor device of the present invention, since a part of the periphery of the wiring layer formed on the insulating substrate is covered with the auxiliary film containing ferrite powder, noise from the external electric circuit is generated in the wiring layer. When entering, the noise is converted into heat energy by the ferrite powder and absorbed, and the noise does not enter the semiconductor element through the wiring layer as it is, and the semiconductor element can be operated normally.

The ferrite powder contained in the auxiliary layer is Ni-Zn ferrite (Ni-Cu-Zn-Fe-).
O), Ferroxplaner type ferrite (Ba-Sr-
Co-Zn-Fe-O) or the like is used, and if the frequency of the electric signal is in the range of 30 to 300 MHz, Ni-Zn ferrite is used to selectively and favorably absorb noise propagating in the wiring layer. Electric signal frequency is 300M
When the frequency is equal to or higher than Hz, the noise propagating through the wiring layer can be selectively and favorably absorbed by using the ferroplaner type ferrite.

The auxiliary layer contains 20 to 80% by volume of lithium silicate glass containing 5 to 30% by weight of Li ₂ O and having a yield point of 400 to 800 ° C., quartz, cristobalite,
20-80% by volume of a filler component consisting of at least one of tridymite, enstatite and forsterite
10 to 50 parts by weight of glass ceramics contained at a ratio of
Since the ferrite powder is formed by 50 to 90 parts by weight, the linear thermal expansion coefficient of the auxiliary film is close to the linear thermal expansion coefficient of the insulating substrate, and the auxiliary film is firmly around a part of the wiring layer provided on the insulating substrate. Can be joined to.

[0025]

DETAILED DESCRIPTION OF THE INVENTION The present invention will be described below in detail with reference to the accompanying drawings. (Structure of Semiconductor Device) FIG. 1 is a sectional view showing an example of an embodiment of a semiconductor device of the present invention, in which 1 is an insulating substrate, 2 is an external lead terminal, and 3 is a semiconductor element.

The insulating substrate 1 has a mounting portion 1a on which the semiconductor element 3 is mounted in the central portion of the upper surface thereof, and the semiconductor element 3 is mounted on the mounting portion 1a by being adhesively fixed via an adhesive such as resin. To be done.

The insulating substrate 1 has wiring layers 4 extending from the periphery of the mounting portion 1a to the outer peripheral portion thereof, and these are formed as a plurality of wiring layers 4 spreading in a fan shape, for example. . The electrodes of the semiconductor element 3 are electrically connected to the peripheral portion of the mounting portion 1a of the wiring layer 4 through the bonding wires 5, while the outer peripheral portion of the insulating base 1 is connected to an external electric circuit. Terminal 2 is attached. The semiconductor element 3 and the wiring layer 4 may be connected via a bonding ribbon or may be connected via so-called solder bumps by so-called flip chip mounting.

The wiring layer 4 is made of tungsten, molybdenum,
Materials made of various metal materials such as manganese, aluminum, copper, and silver can be used. Among them, the metal materials containing copper or silver as a main component as described above can be used to lower the wiring resistance value. Signal attenuation and delay can be suppressed, which is suitable for signal processing in a high frequency region, and peeling from the insulating substrate 1 or disconnection is eliminated, which is preferable for the semiconductor device of the present invention. Become.

When the wiring layer 4 is formed by using such a metal material containing copper or silver as a main component, a metal paste obtained by adding and mixing an appropriate binder or solvent to the powder of these metal materials. Is preliminarily printed and applied in a predetermined pattern on a green body or sheet before firing which becomes the insulating substrate 1 by a well-known thick film method such as a screen printing method to cover the insulating substrate 1 from the periphery of the mounting portion 1a to the outer peripheral portion thereof. Is formed. Alternatively, as in the case of aluminum or the like, a metal film having a predetermined thickness is deposited on the upper surface of the insulating substrate 1 by a vapor deposition method, a sputtering method, or the like, and then this metal film is patterned by a well-known photolithography technique. Alternatively, the insulating substrate 1 may be adhered to and formed on the insulating substrate 1 from the periphery of the mounting portion 1a to the outer peripheral portion.

A part of the periphery of the wiring layer 4 is covered with an auxiliary film 4a containing ferrite powder.
The auxiliary film 4a selectively converts noise that has entered the wiring layer 4 from an external electric circuit into heat energy and absorbs it, whereby the noise that has entered the wiring layer 4 directly enters the semiconductor element 3 via the wiring layer 4. Therefore, the semiconductor element 3 can be operated normally. As the auxiliary film 4a, Ni-Zn ferrite (Ni-Cu-Zn-Fe) is used.
-O), Ferroxplaner type ferrite (Ba-Sr
-Co-Zn-Fe-O) or the like is used, and if the frequency of the electric signal is in the range of 30 to 300 MHz, Ni-Zn ferrite is used to selectively and well absorb the noise propagating in the wiring layer. , The frequency of the electrical signal is 300
If the frequency is higher than MHz, the use of the ferroplaner type ferrite can selectively and favorably absorb the noise propagating through the wiring layer.

The auxiliary layer 4a is made of 20 to 80% by volume of lithium silicate glass containing 5 to 30% by weight of Li ₂ O and having a yield point of 400 to 800 ° C., made of quartz, cristobalite, tridymite, enstatite and forsterite. Since it is formed of 10 to 50 parts by weight of glass ceramics containing 20 to 80% by volume of at least one filler component and 50 to 90 parts by weight of ferrite powder, the coefficient of linear thermal expansion of the auxiliary film 4a is The linear thermal expansion coefficient of the insulating base 1 is approximated, and the auxiliary film 4a can be firmly bonded to a part of the periphery of the wiring layer 4 formed on the insulating base 1.

To cover the wiring layer 4 with the auxiliary film 4a, a ferrite paste is prepared by adding and mixing an appropriate organic resin binder, a plasticizer and a solvent to a raw material powder composed of lithium silicate glass, a filler and a ferrite powder. It is formed on a part of the periphery of the wiring layer 4 by co-firing with the insulating substrate 1 by printing and applying in advance to the region where the wiring layer 4 of the green sheet to be the insulating substrate 1 is formed by screen printing or the like.

Further, the external lead terminals 2 attached to the wiring layer 4 have a function of connecting the semiconductor element 3 housed inside the semiconductor device to an external electric circuit, and the external lead terminals 2 are connected to the external electric circuit board. By connecting to the wiring conductor, the semiconductor element 3 is electrically connected to the external electric circuit via the wiring layer 4 and the external lead terminal 2.

When the wiring layer 4 to which the external lead terminals 2 are attached spreads in a fan shape from the periphery of the mounting portion 1a of the insulating base 1 to the outer peripheral portion, the external lead terminals 2 are wired in the outer peripheral portion of the insulating base 1. Since the line width of the layer 4 and the space between the adjacent wiring layers 4 are wide, the line width and the space between adjacent wiring layers can be wide, and as a result, an external force is applied to the external lead terminals 2. Even if the external lead terminals 2 are damaged, the external lead terminals 2 are not significantly deformed. Therefore, the external lead terminals 2 can be accurately and surely connected to a predetermined external electric circuit while maintaining the electrical insulation between the adjacent external lead terminals 2. It becomes possible to make an electrical connection.

The external lead terminals 2 are made of a metal such as a copper-based alloy containing copper as a main component or an iron-based alloy containing iron as a main component. For example, an ingot (lump) of a copper-based alloy containing copper as a main component. Is manufactured into a plate shape having a predetermined thickness by using a conventionally known rolling method, and is subjected to etching processing or punching processing to have a predetermined shape.

The external lead terminals 2 are attached to the wiring layer 4 by brazing the external lead terminals 2 on the wiring layer 4 with a brazing material made of gold-tin-lead-silver alloy or gold-tin-lead-palladium alloy. By brazing or by ultrasonic bonding of the external lead terminal 2 to the wiring layer 4, specifically, the external lead terminal 2 is placed on the upper surface of the wiring layer 4, and then the external lead terminal 2 is attached to the external lead terminal 2. 0.5 ~ 5.0kg ultrasonic transducer (horn)
The pressure is f / mm ^{2 and} the vibration frequency is 20 to 60.
Ultrasonic vibration with a frequency of 1.0 kHz and an amplitude of 1.0 to 10.0 μm was set to 0.
It is performed by applying for 3 to 1.0 seconds.

Here, 6 is an insulating coat formed on a part of the surface of the wiring layer 4 for the purpose of improving the bonding strength between the wiring layer 4 and the molding resin 7 and reinforcing the wiring layer 4.
The insulating substrate 1 is formed with a thickness of several μm to several 100 μm by printing a paste using the same material as the insulating substrate 1. The insulating coat 6 is not always necessary.

The insulating substrate 1 on which the semiconductor element 3 is mounted and the external lead terminals 2 are attached is the external lead terminals 2
Mold resin 7 made of epoxy resin etc.
And the semiconductor element 3 is completely shielded from the outside air to form a semiconductor device as a final product.

The mold resin 7 is coated by setting the insulating substrate 1 on which the semiconductor element 3 is mounted and the external lead terminals 2 attached on the upper surface in a predetermined jig and, for example, epoxy or the like in the jig. Liquid resin is dropped and injected, and then the injected resin is heated to a temperature of about 180 ° C and 100 kg.
It is carried out by applying a pressure of f / mm ² and thermosetting.

Thus, the semiconductor device of the present invention is used in an information processing device such as a computer by connecting the external lead terminal 2 to an external electric circuit and electrically connecting the internal semiconductor element 3 to the external electric circuit. The Rukoto.

Next, FIG. 2 is a sectional view showing another example of the embodiment of the semiconductor device of the present invention.

In the figure, the same members as those in FIG. 1 are designated by the same reference numerals. In the semiconductor device shown in FIG.
Is an insulating substrate composed of a multilayer wiring board in which a plurality of layers are laminated and wiring layers are arranged inside, 2 is an external lead terminal, 3
Is a semiconductor element, 5 is a bonding wire, and 7 is a molding resin.

The insulating substrate 8 has a mounting portion 8a on the center of the upper surface thereof, on which the semiconductor element 3 is mounted. The semiconductor element 3 is mounted on the mounting portion 8a by adhesive bonding via an adhesive such as resin. To be done.

The insulating base 8 has a wiring layer 9 extending from the periphery of the mounting portion 8a to the outer periphery thereof. In this example, the wiring layer 9 is formed on the surface of a predetermined layer forming the insulating base 8. Due to the formed wiring patterns and through conductors such as through holes and via holes that connect the wiring patterns by penetrating a predetermined layer, a plurality of, for example, fan-shaped spreads from the mounting portion 8a of the insulating base 8 to the outer peripheral portion are formed. It is configured as the wiring layer 9. Mounting portion 8 of this wiring layer 9
a. Each electrode of the semiconductor element 3 is electrically connected to the peripheral portion via a bonding wire 5, while the external lead terminal 2 connected to an external electric circuit is attached to the outer peripheral portion of the insulating base 8. There is. The semiconductor element 3 and the wiring layer 9 may be connected to each other via a bonding ribbon or may be connected to each other by so-called flip chip mounting via solder bumps.

The wiring layer 9 is formed by using the same material as that of the wiring layer 4 in the same manner as in the conventional well-known multilayer wiring board.

In the case where the wiring layer 9 is configured as a multi-layer wiring board in this way, a ground layer can be provided in the board when power supply reinforcement is required, or a plurality of semiconductor elements 3 are mounted. Even when the so-called multi-chip module is used, it is possible to deal with the case where the wiring cannot be routed only by the surface of the substrate.

When the wiring layer 9 is formed, its material may be basically the same as that of the wiring layer 4, but the addition amount of the filler component such as glass or alumina that interacts with the material of the insulating substrate 8. It is good to use a system with less.

A part of the periphery of the wiring layer 9 is covered with an auxiliary film 9a containing ferrite powder.
The auxiliary film 9a selectively converts the noise that has entered the wiring layer 9 from the external electric circuit into heat energy and absorbs it, whereby the noise that has entered the wiring layer 9 enters the semiconductor element 3 through the wiring layer 9 as it is. Therefore, the semiconductor element 3 can be operated normally. Auxiliary film 9a
Is formed on a part of the periphery of the wiring layer 9 by using the same material as the auxiliary film 4a formed on a part of the periphery of the wiring layer 4 and by the same method as the auxiliary film 4a.

(Basic Material) According to the present invention, as an insulating substrate of a semiconductor device, the insulating substrate contains Li ₂ O in an amount of 5 to 30.
20% to 80% by volume of lithium silicate glass having a yield point of 400 ° C. to 800 ° C. and a filler component composed of at least one of quartz, cristobalite, tridymite, enstatite and forsterite in an amount of 20% by weight.
By sintering the compact containing 80% by volume,
A glass-ceramic sintered body having a crystal phase of at least one of quartz, cristobalite, tridymite, and enstatite, having a relative dielectric constant of 6 (room temperature 1 MH
It is important that z) or less, preferably, consist of 3 to 6 sintered bodies. This is important in that a signal in a high frequency region propagating through a wiring layer arranged on the insulating base does not cause a delay, and the propagation speed of an electric signal in the wiring layer is high to enable high-speed signal processing. And the relative permittivity is 6
If it is larger than (room temperature 1 MHz), signal delay in a high frequency region cannot be effectively suppressed, and high-speed processing tends to be insufficient. It is preferable that the relative permittivity is 3 or more, while the tendency that it is necessary to introduce fine pores into the sintered body in order to reduce the relative permittivity to 4 or less is shown.
This is because when the relative dielectric constant is less than 3, the sintered body tends to have too many pores and the strength as an insulating substrate tends to be insufficient.

When the semiconductor element is bonded and fixed to the insulating substrate, it is preferable to appropriately select a flexible material such as a resin, an organic adhesive or glass in order to relieve thermal stress. Epoxy-based or polyimide-based organic adhesives and adhesives to which metal powder such as silver is added are preferably used.

In the present invention, an insulating substrate made of a low-dielectric-constant glass-ceramic sintered body containing a crystal phase having a relative dielectric constant of 3 to 4 such as quartz, cristobalite, tridymite, enstatite, etc. 20 to 80% by volume of glass, that is, 20 to 80% by volume of crystalline glass containing 5 to 30% by weight of Li ₂ O, and 20 to 80% by volume of a filler component consisting of at least one of quartz, cristobalite, tridymite, enstatite and forsterite. Obtained by firing a molded product containing, quartz, cristobalite, tridymite, which is a filler component, to produce the crystalline phase of enstatite as it is, or the silica of lithium silicate glass and forsterite are reacted to form crystals of enstatite. It is composed of a sintered body in which a phase is generated. The amount of the crystalline glass and the filler component is limited to the above range, because the amount of the crystalline glass is less than 20% by volume, in other words, if the amount of the filler component is more than 80% by volume, liquid phase sintering cannot be performed. This is because it is necessary to bake at a high temperature, and in that case, if the wiring layers are simultaneously fired, the metal layer will be melted. Further, when the amount of crystalline glass is more than 80% by volume, in other words, the amount of filler component is less than 20% by volume, the properties of the sintered body largely depend on the properties of crystalline glass, which makes it difficult to control the material properties. In addition, since the sintering starting temperature becomes low, it tends to be difficult to perform simultaneous firing with the wiring layer, and the cost of raw materials also becomes high.

The crystalline glass used in the present invention is L
It is important to use a lithium silicate glass containing i ₂ O in an amount of 5 to 30% by weight, preferably 5 to 20% by weight. By using such a lithium silicate glass, lithium silicic acid is deposited. You can In addition, Li
_When the content of ₂ O is less than 5% by weight, the amount of lithium silicic acid crystals formed is small at the time of firing, so that high strength cannot be achieved, and when it is more than 30% by weight, the dielectric loss tangent is 100 × 10 ^−4.
Therefore, the characteristics as an insulating substrate for a semiconductor device deteriorate.

Further, it is desirable that the crystalline glass contains substantially no Pb. This is because Pb is toxic, and if Pb is contained, special equipment and management are required to prevent poisoning during the manufacturing process, and thus the sintered body cannot be manufactured inexpensively. is there. Considering the case where Pb is unavoidably mixed as an impurity, the amount of Pb is preferably 0.05% by weight or less.

Further, the yield point of crystalline glass is 400 ° C.
~ 800 ° C, especially 400 ° C to 650 ° C also means that a molding binder such as an organic resin added when molding a mixture composed of crystalline glass and a filler component is efficiently removed, and at the same time as an insulating substrate. It is necessary to match the firing conditions with the wiring layer to be fired.
If the yield point is lower than 400 ° C., the crystalline glass starts to be sintered at a low temperature, and therefore, co-firing with a wiring layer using a metal such as silver or copper having a sintering start temperature of 600 ° C. to 800 ° C. This is because the densification of the molded body starts at a low temperature and the binder cannot decompose and volatilize and remains in the sintered body, which does not adversely affect the characteristics of the sintered body. On the other hand, if the yield point is higher than 800 ° C., it becomes difficult to sinter unless the crystalline glass is increased, and the cost of the sintered body is increased because a large amount of expensive crystalline glass is required. This is because

Examples of crystalline glass (lithium silicate glass) satisfying the above characteristics are SiO ₂ —Li ₂ O—A1 ₂ O ₃ , SiO ₂ —Li ₂ O—A1 ₂ O ₃ —MgO—TiO ₂ , SiO ₂ . _{2 -Li 2 O-A1 2 O} 3 -MgO-Na 2 O-F, SiO 2 -Li 2 O-A1 2 O 3 -K 2 O-Na 2 O-Zn
_{O, SiO 2 -Li 2 O-} A1 2 O 3 -K 2 O-P 2 O 5, SiO 2 -Li 2 O-A1 2 O 3 -K 2 O-P 2 O 5 -ZnO
_{-Na 2 O, SiO 2 -Li 2} O-MgO, compositions such as SiO ₂ -Li ₂ O-ZnO and the like, these, SiO ₂ is an essential component for forming a lithium silicate glass It is desirable that the total amount of SiO ₂ and Li ₂ O be 65 to 95% by weight based on the total amount of glass in order to precipitate lithium silicate crystals.

On the other hand, as the filler component, quartz,
20 to 80% by volume of at least one of cristobalite, tridymite, enstatite and forsterite,
In particular, it is desirable to mix it in a proportion of 30 to 70% by volume. The combination of such filler components can accelerate the sintering of the sintered body. Above all, if the quartz / forsterite ratio is 0.427 or more, the relative dielectric constant of the forsterite is high during sintering. Can be changed to low enstatite.

It is desirable that the amounts of the above-mentioned crystalline glass and filler component are appropriately adjusted according to the sag point of the crystalline glass. That is, when the yield point of the crystalline glass is as low as 400 ° C. to 600 ° C., the sinterability at low temperature is enhanced, so that the content of the filler component can be relatively large at 50 to 80% by volume. On the other hand, when the crystalline glass has a high yield point of 650 ° C. to 800 ° C., the sinterability is lowered, so that the content of the filler component is preferably 20 to 50% by volume, which is relatively small. It is desirable to control the sag point of this crystalline glass according to the firing conditions of the wiring layer.

Further, the lithium silicate glass has a shrinkage initiation temperature of 700 ° C. or lower at 850 ° C. without addition of a filler component.
As a result, the wiring layers 4 and 9 are melted and the insulating substrate 1 and
8 cannot be formed by co-firing. However, if the filler component is mixed in a proportion of 20 to 80% by volume, the firing temperature can be increased and a liquid phase for crystal precipitation and liquid phase sintering of the filler component can be formed. By adjusting the content of the filler component, the simultaneous firing conditions for the insulating substrates 1 and 8 and the wiring layers 4 and 9 can be matched. Further, the content of expensive lithium silicate glass can be reduced in order to reduce the raw material cost.

For example, when the wiring layer is made of a metal material containing copper or silver as a main component, the firing of these metal layers is performed at 600 to 1100 ° C. Therefore, in order to perform the co-firing, the crystalline glass of The yield point is 400 ℃ -650 ℃
Therefore, the content of the filler component is preferably 50 to 80% by volume. Further, the cost of the sintered body can be reduced by reducing the compounding amount of such expensive crystalline glass.

The mixture of the crystalline glass and the filler component was added with an appropriate molding organic resin binder,
Desired forming means, such as doctor blade method, rolling method,
After being formed into a desired shape such as a sheet-like shape by a die pressing method or the like, it is fired.

In firing, first, the binder component added for molding is removed. The binder is usually removed in an air atmosphere at about 700 ° C., but when copper is used for the wiring layer, 100 to 7 containing water vapor is used.
It is carried out in a nitrogen atmosphere at 00 ° C. At this time, it is desirable that the shrinkage start temperature of the molded body is about 700 to 850 ° C., and if the shrinkage start temperature is lower than this, it becomes difficult to remove the binder. It is necessary to control the yield point as described above.

Firing is carried out in an oxidizing atmosphere at 850 ° C. to 1300 ° C., or in a non-oxidizing atmosphere when co-firing with the wiring layer, and thereby densified to a relative density of 90% or more. If the firing temperature at this time is lower than 850 ° C., densification cannot be achieved. On the other hand, if the firing temperature is higher than 1300 ° C., the wiring layer is melted by simultaneous firing with the wiring layer.
When copper is used for the wiring layer, 850 to 10
It is carried out in a non-oxidizing atmosphere at 50 ° C.

In order to manufacture a semiconductor device in which the above-mentioned glass ceramic sinter sintered body is used as an insulating substrate and a wiring layer made of a metal material containing copper and silver as a main component is provided, the above-described steps for forming the insulating substrate are performed. Suitable organic binder or plasticizer for raw material powder consisting of crystalline glass and filler component as described above,
A raw sheet is prepared by adding and mixing a solvent to prepare a sludge and applying the doctor blade method or the calendar roll method to the sludge. Then, a metal paste obtained by adding and mixing an organic binder, a plasticizer, and a solvent to an appropriate metal powder as a wiring layer is printed and applied to a green sheet in a predetermined pattern by a conventionally known screen printing method. Also,
In some cases, the blank sheet is punched appropriately to form through holes, and the holes are also filled with the metal paste. Then, a plurality of these green sheets are laminated, and the laminated green sheets and the metal paste are co-fired to obtain an insulating substrate having a multilayer structure.

The present invention is not limited to the above-mentioned embodiments, and various modifications can be made without departing from the scope of the present invention.

[0065]

According to the semiconductor device of the present invention, Li ₂ O is used as an insulating substrate in a mold type semiconductor device.
20 to 80% by volume of lithium silicate glass having a yield point of 400 to 800 ° C. and containing 30% by weight to 2% of a filler component composed of at least one of quartz, cristobalite, tridymite, enstatite and forsterite.
A sintered body having a relative dielectric constant of 6 or less, containing at least one crystal phase of quartz, cristobalite, tridymite, and enstatite, obtained by sintering a molded body containing 0 to 80% by volume. As a result, the relative permittivity becomes very small with respect to an electrically insulating material such as ceramics, and as a result, there will be a problem with signals in the high frequency region propagating in the wiring layer deposited on the insulating substrate. The semiconductor device can sufficiently cope with high-speed processing of information without causing any delay.

According to the semiconductor device of the present invention, as the insulating substrate, 20 to 80% by volume of lithium silicate glass containing 5 to 30% by weight of Li ₂ O and having a yield point of 400 to 800 ° C., quartz and cristobalite are used. , Tridymite,
By sintering a compact containing a filler component consisting of at least one of enstatite and forsterite in a proportion of 20 to 80% by volume, at least one crystal layer of quartz, cristobalite, tridymite, and enstatite is formed. A sintered body having a relative permittivity of 6 or less can be easily manufactured with good reproducibility.

Further, according to the semiconductor device of the present invention, the wiring layer led out from the periphery of the mounting portion where the semiconductor element is mounted at the central portion of the upper surface of the insulating substrate to the outer peripheral portion is made of a metal containing copper or silver as a main component. Since the wiring resistance of the wiring layer is low, the signal in the high frequency region is not delayed or the signal is not attenuated so much that high-speed information processing is not hindered.

Furthermore, according to the semiconductor device of the present invention, since the wiring layer formed on the insulating substrate is partially covered with the auxiliary film containing the ferrite powder, noise from the external electric circuit is generated in the wiring layer. When entering, the noise is converted into heat energy by ferrite powder and absorbed,
Noise does not directly enter the semiconductor element via the wiring layer, and the semiconductor element can be operated normally.

[Brief description of drawings]

FIG. 1 is a sectional view showing an example of an embodiment of a semiconductor device of the present invention.

FIG. 2 is a cross-sectional view showing another example of the embodiment of the semiconductor device of the present invention.

[Explanation of symbols] 1, 8 ... Insulating substrate 1a, 8a ... Mounting part 2 ... External lead terminal 3 ・ ・ Semiconductor element 4, 9 ... Wiring layer 4a, 9a ... Auxiliary layer 7: Mold resin

Claims (2)

(57) [Claims] 1. An insulating base having a mounting portion on which a semiconductor element is mounted in a central portion of an upper surface and a wiring layer led out from the periphery of the mounting portion to an outer peripheral portion, and an electrode mounted on the mounting portion of the insulating base and having electrodes as described above. A semiconductor element connected to the wiring layer, an external lead terminal attached to the wiring layer for connecting the semiconductor element to an external electric circuit, and a mold for covering a part of the insulating substrate, the semiconductor element and the external lead terminal. A semiconductor device comprising a resin, wherein the insulating substrate is Li
Strain point containing 5 to 30% by weight of ₂ O is 400 to 800
C. to obtain a sintered body containing 20 to 80% by volume of lithium silicate glass and 20 to 80% by volume of a filler component composed of at least one of quartz, cristobalite, tridymite, enstatite and forsterite. Of a quartz crystal, cristobalite, tridymite, or enstatite having a relative dielectric constant of 6 or less and a part of the wiring layer containing ferrite powder. The auxiliary film is coated with a film , and the auxiliary film contains 5 to 30% by weight of Li ₂ O.
Lithium silicate glass with a yield point of 400-800 ° C
20-80% by volume, quartz, cristobalite,
Low amounts of rhythmite, enstatite, and forsterite
20 to 80% by volume of at least one filler component
10 to 50 parts by weight of glass ceramics, which is contained in a proportion,
A semiconductor device comprising 50 to 90 parts by weight of ellite powder . 2. The semiconductor device according to claim 1, wherein the wiring layer is made of a metal containing copper and silver as main components.