JP3423598B2 - GaN-based insulated gate transistor and method of forming the same - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a GaN-based insulated gate transistor, and more particularly to a GaN-based insulated gate transistor that operates stably at high temperatures.

[0002]

2. Description of the Related Art Insulated gate type transistor composed of metal gate-gate insulating film-semiconductor layer, that is, MISFET
In the past, many developed using silicon materials,
It has been put to practical use. Silicon MOSFET is MIS
A type of FET, for example, a Si substrate on the semiconductor layer,
A SiO ₂ film is used for the insulating layer and a polysilicon electrode is used for the metal electrode. When the silicon-based MOSFET 40 is formed, for example, as shown in FIG. 5, a p-type Si semiconductor is used as the substrate 42, and n-type impurities are diffused into the semiconductor substrate layer in the source / drain electrode formation region to form n ⁺ inversion. Form layer 44. Then, the entire surface of the semiconductor substrate is oxidized to form a SiO ₂ film 46 on the surface of the semiconductor substrate. next,
Using photolithography and etching technology, Si
The O ₂ film is patterned to leave the SiO ₂ film only in the gate electrode formation region, and remove the SiO ₂ film in the source and drain electrode formation regions. After performing such patterning, the source electrode 48 is formed on the SiO ₂ film 46 and the inversion layer 4 is formed.
A drain electrode 50 and a gate electrode 52 are formed on each of the electrodes 4.

[0003]

[Problems to be Solved by the Invention] MIS of compound semiconductor
Although a field effect transistor having a (metal-insulating layer-semiconductor) structure has recently been actively developed, G
The development of a As MISFET has become the mainstream, and Ga
Wide-gap semiconductor-based GaN-based MISFETs such as GaN and AlGaN, which can operate at a higher temperature than As and have excellent radiation resistance, have only just begun to be developed, and their formation process has been established. Not not. Further, conventionally, there has been a problem of what kind of material is preferable for the gate insulating film.

Therefore, an object of the present invention is to provide a GaN-based MISFET that operates stably at high temperatures.

[0005]

DISCLOSURE OF THE INVENTION Diamond has a large band gap energy of 5.5 eV, and diamond to which impurities are not added becomes a high resistance body which can be evaluated as an insulator. Further, AIN has a large band gap energy of 6.2 eV, and Al-rich AlGaN also has a high resistance. The laminated film in which AlGaN and diamond are laminated can prevent threading dislocation in each layer and can be formed as an insulating layer having a high insulating property with no leakage current. Therefore, the present inventor has conceived a GaN-based MISFET having a laminated insulating film, in which high-resistance diamond and AlGaN are laminated, as a gate insulating film, and repeated experiments to complete the present invention.

Therefore, in order to achieve the above object, a GaN-based insulated gate transistor according to the present invention is a GaN composed of a metal gate, a gate insulating film, and a GaN-based semiconductor layer.
In a system-insulated gate transistor, the gate insulating film includes a high-resistance diamond layer and Al-rich AlGaN
That it is formed by a stacked structure of a layer Ru have <br/> as characterized.

A preferred embodiment of the present invention is a safa
A substrate made of an ear substrate or a semi-insulating substrate, a first conductivity type GaN-based semiconductor layer formed on the substrate , and a first G
a source / drain region formed of a GaN-based semiconductor layer of the second conductivity type embedded in the upper part of the aN-based semiconductor layer;
At least a GaN-based adhesion layer with a diamond layer is formed on the gate region, and a gate insulating film is formed on the adhesion layer. The GaN-based semiconductor layer used in the present invention includes AlGaN layer, InGaN layer, GaN layer, I
There is an nGaAlN layer or the like.

A method for forming a GaN-based insulated gate transistor according to the present invention is a sapphire substrate or a semi-insulating substrate.
Forming a first conductive type GaN-based semiconductor layer on a substrate made of, and etching the first conductive type GaN-based semiconductor layer to form a source / drain region forming portion in a recessed shape thereover. And a step of selectively burying and growing a second conductivity type GaN-based semiconductor layer in the recessed source / drain region forming portion, and a high concentration as a contact layer with the diamond layer at least in the gate electrode forming region. And a step of selectively growing a thin GaN-based semiconductor layer carbon-doped with a diamond layer on the adhesion layer.
And a step of selectively forming a gate insulating film having a laminated structure with an Al-rich AlGaN layer .

For example, as a semiconductor layer to be an active layer as a device, a p-type GaN-based epitaxial layer is formed on the entire surface of the substrate in advance, and then n-type GaN is selectively grown on the portions to be source / drain regions. After selective growth, a diamond layer and an Al-rich AlGaN layer are alternately grown as a gate insulating film in the gate electrode region by using the selective growth method.

[0010]

DETAILED DESCRIPTION OF THE INVENTION GaN, InGaN, AlGaN
When a nitride-based semiconductor such as a film is used as a wide band gap semiconductor and Si is used as a dopant, it can be easily converted into an n-type semiconductor layer and used as an active layer of an electronic device. It can be used as a source / drain region of a transistor. Further, a stack of a diamond layer and an Al-rich AlGaN layer is used as a gate insulating film. When locally forming the n-type semiconductor region in the p-type semiconductor region, Si
The ion implantation method is generally used for semiconductors, but it is very difficult to activate as a carrier even if the ion implantation method is used for GaN-based semiconductors. I can't find the report.
Therefore, in the present invention, by forming the n-type semiconductor layer in the recess formed in the p-type semiconductor layer by the selective growth method,
The active region can be easily formed. Hereinafter, embodiments of the present invention will be described specifically and in detail with reference to the accompanying drawings with reference to the accompanying drawings.

Embodiment Example This embodiment example is an example of an embodiment of an insulated gate semiconductor device according to the present invention, and FIG. 1A shows a layer structure of the insulated gate semiconductor device of this embodiment example. Board cross-sectional view,
FIG. 1B is a cross-sectional view showing the gate insulating film of the laminated structure of the insulated gate semiconductor device of this embodiment. As shown in FIG. 1A, a insulated gate semiconductor device 10 of the present embodiment (hereinafter, simply referred to as a semiconductor device 10) includes a semi- insulating substrate 12 such as sapphire, and a substrate 12 on which a semiconductor substrate 12 is sequentially formed. ,
P-type Ga formed by molecular beam epitaxial growth method
The N buffer layer 14 and the p-type AlGaN layer 16 are provided. In addition, the semiconductor device 10 includes the p-type AlGaN layer 16
Other than the source / drain regions 18 and 20 in order to improve the crystal connection between the source / drain regions 18 and 20 formed of the n-type AlGaN layer embedded in the upper part of the and the upper diamond layer and the p-type AlGaN layer 16. And an AlGaN layer 22 with a film thickness of about 50 Å that is carbon-doped at a high concentration of 1 × 10 ¹⁹ cm ⁻³ or more. Further, the semiconductor device 10 has a film thickness of 5 as a gate insulating film grown selectively on the AlGaN layer 22.
A laminated insulating film 28 having a film thickness of 500 Å is provided by periodically repeating a laminated structure of a 0 Å diamond layer 24 and a highly insulating Al-rich AlGaN layer 26 having a film thickness of 30 Å. N-type AlGaN in source / drain regions 18, 20
On the layer and on the gate insulating film 28 in the gate electrode region, T
i / Al electrodes 30, 32, and 34 are provided, respectively.

A method for forming the semiconductor device 10 of this embodiment will be described below with reference to FIGS. Figure 2
(A) to (c), FIG. 3 (d) to (f), and FIG.
(G) and (h) are substrate cross-sectional views in each step. Using an epitaxial growth system capable of maintaining an ultrahigh vacuum, a reaction temperature of 640 ° C at a growth temperature of 640 ° C by a molecular beam epitaxial growth method using dimethylhydrazine with a partial pressure of 3 × 10 ^-6 Torr and Ga with a partial pressure of 5 × 10 ^-7 Torr First, Fig. 2
As shown in (a), a film thickness of 50 is formed on the substrate 12 in the growth chamber.
nm epitaxially grows the GaN buffer layer 14. Further, as reaction gas, trimethylgallium (TMG) with a partial pressure of 1 × 10 ⁻⁶ Torr, trimethylaluminum (TMA) with a partial pressure of 5 × 10 ⁻⁷ Torr, and partial pressure of 5 × 10 ^−5.
The growth temperature is 850 ° C., using ammonia of Torr, and Mg of partial pressure 5 × 10 ⁻⁸ Torr as a dopant.
Then, the p-type A having a thickness of 300 nm is formed on the GaN buffer layer 14.
The lGaN layer 16 is formed.

Next, the GaN buffer layer 14 and the p-type AlG
Taking out the substrate 12 having aN16 from the growth chamber,
As shown in FIG. 2B, an oxide film 17 such as SiO ₂ is formed on the substrate surface, and the oxide film is patterned by photolithography and etching so that the source / drain regions 18 and 20 are exposed. Form 17. Then, using the mask 17, as shown in FIG. 2C, the source / drain regions 1 are formed by plasma etching.
The p-type AlGaN layer 16 of 8 and 20 is selectively etched to form the source / drain region forming portions 19 and 21 to a depth of 2
It is formed in a concave shape of 000Å. As an etching gas, a mixed gas of methane, argon and hydrogen which is made into plasma is used.

Then, as shown in FIG. 3D, p-type A
n-type AlGaN is selectively embedded and grown in the recesses 19 and 21 formed by selectively etching the lGaN layer 16. That is, as a reaction gas, G with a partial pressure of 1 × 10 ⁻⁶ Torr
a, partial pressure 5 × 10 ^-7 Torr Al, partial pressure 5 × 10 ^-5 Torr
Ammonia is used, and the partial pressure is 5 × 1 as a dopant.
Using 0 ^-8 Torr of Si, selectively using the mask 17 at a growth temperature of 850 ° C. and a thickness of 2000 Å n-type AlG
The aN layers 18 and 20 are embedded and grown.

Next, the mask 17 is removed, and as shown in FIG. 3E, a SiO ₂ film is formed on the substrate and then patterned by photolithography and etching to form the source / drain regions 18, Mask 23 covering 20
To form. Then, as shown in FIG. 3F, in order to improve the crystal connection between the upper diamond layer and the lower p-type AlGaN layer 16, carbon doping was performed at a high concentration of 1 × 10 ¹⁹ cm ⁻³ or more. , 50 Å ultra-thin Al
The GaN layer 22 is selectively grown on regions other than the source / drain regions 18 and 20 masked by the mask 23 using dimethylhydrazine, Ga and dimethylaluminum hydride.

Subsequently, as shown in FIG. 4G, with the mask 23 still mounted, 50 Å is formed as an insulating layer in the regions other than the source / drain regions 18 and 20 masked by the mask 23.
The diamond layer 24 having a film thickness of approximately the same is selectively grown. When forming the diamond layer 24, the substrate temperature was maintained at 850 ° C., a mixed gas of 97 vol% hydrogen and 3% vol methane at a pressure of 30 Torr was flowed at a flow rate of 20 sccm, and the gas was heated to a filament heated to 2300 ° C. Contact. The mixed gas in contact with the heating filament is decomposed, and the radicalized carbon-based gas is deposited on the substrate to form the diamond layer 24.

Then, as shown in FIG. 1 (b), dimethylhydrazine, Ga and dimethylaluminum hydride are used to selectively improve the crystallinity of the insulating layer, and the insulating Al-rich AlGaN having a film thickness of 30 Å is selectively formed. Layer 26 is grown on diamond layer 24. Furthermore, FIG.
As shown in (b), a diamond layer 24 having a film thickness of 50Å is grown on the Al-rich AlGaN layer 26. Film thickness 5
0 Å diamond layer 24 and 30 Å film thickness Al-rich A
The insulating film 28 having a laminated structure of about 500 Å is selectively formed by periodically and repeatedly growing the laminated structure including the lGaN layer 26. Since the polycrystalline diamond is laminated also on the mask 23, the insulating film 28 having the laminated structure is formed.
4H, the SiO ₂ mask 23 is removed using HF, and the polycrystalline diamond deposited on the mask 23 is lifted off and removed.

After forming the insulating layer 28 having a laminated structure in this manner, a Ti / Al electrode is vapor-deposited on the surface of the substrate and further patterned to form electrodes 30, 32 and 34 in the source / drain regions and the gate region. Form. In this way, the semiconductor device 10 of the insulated gate transistor as shown in FIG. 1A was formed. A semiconductor device was prototyped in the same manner as in the present embodiment, and an evaluation test was conducted.
Even when heated at 0 ° C., the transistor characteristics did not deteriorate, and stable operation at high temperature could be confirmed.

Although AlGaN is used in the present embodiment, InGaN, GaN, InGaAlN may be used.

[0020]

According to the present invention, a high-performance GaN-based insulated gate that operates stably at high temperature is formed by forming a gate insulating film with a laminated structure of a high resistance diamond layer and an Al-rich AlGaN layer. Type transistors can be formed.

[Brief description of drawings]

1A and 1B are respectively a substrate cross-sectional view showing a layer structure of an insulated gate semiconductor device of the present embodiment example and a laminated structure of the insulated gate semiconductor device of the present embodiment example, respectively. It is sectional drawing which shows an insulating film.

FIG. 2A to FIG. 2C are cross-sectional views of a substrate for each step of the semiconductor device of the present embodiment example.

3 (d) to 3 (f) are respectively shown in FIG.
FIG. 7C is a sectional view of the substrate in each step of the semiconductor device of the present embodiment example, following FIG.

4 (g) and 4 (h) are respectively FIG. 3 (f).
FIG. 11 is a substrate cross-sectional view of each step of the semiconductor device of the present embodiment, which is continued from FIG.

FIG. 5 is a substrate cross-sectional view showing the configuration of a silicon-based MOSFET.

[Explanation of symbols]

10 Insulated Gate Semiconductor Device of Example Embodiment 12 Semi- Insulating Substrate 14 p-type GaN Buffer Layer 16 p-type AlGaN Layer 18, 20 Source / Drain Region 22 Highly Carbon-Doped AlGaN Layer 24 Diamond Layer 26 Al-rich AlGaN Layer 28 laminated insulating films 30, 32, 34 Ti / Al electrode 40 silicon-based MOSFET 42 p-type Si semiconductor substrate 44 n ⁺ inversion layer 46 SiO ₂ film 48 source electrode 50 drain electrode 52 gate electrode

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H01L 29/78 H01L 21/336 H01L 29/80

Claims (3)

(57) [Claims] 1. A GaN-based insulated gate transistor comprising a metal gate, a gate insulating film, and a GaN-based semiconductor layer, wherein the gate insulating film comprises a high-resistance diamond layer and an Al nitride layer.
A GaN-based insulated gate transistor, which is formed by a laminated structure with an AlGaN layer . 2. A sapphire substrate or a semi-insulating substrate
Source / drain including a substrate , a first conductivity type GaN-based semiconductor layer formed on the substrate, and a second conductivity type GaN-based semiconductor layer embedded and formed on the first GaN semiconductor layer. The GaN-based adhesive layer according to claim 1, further comprising: a region, and a GaN-based adhesion layer formed on at least the gate region and with the diamond layer, wherein the gate insulating film is formed on the adhesion layer. Insulated gate type transistor. 3. A sapphire substrate or a semi-insulating substrate
Forming a first conductivity type GaN-based semiconductor layer on a substrate that, the first conductivity type GaN-based semiconductor layer is etched to form the source / drain regions formed portion recessed thereon A step of selectively burying and growing a second conductivity type GaN-based semiconductor layer in the recessed source / drain region forming part, and a high concentration as an adhesion layer with a diamond layer at least in the gate electrode forming region. Step of selectively growing a carbon-doped thin GaN-based semiconductor layer, and selectively forming a gate insulating film having a laminated structure of a diamond layer and an Al-rich AlGaN layer on the adhesion layer And a step of forming a GaN-based insulated gate transistor.