JP3412835B2 - Display control device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a color facsimile,
The present invention relates to a display control device which is used in an image database, a color printer, etc. and controls display on a display device.

[0002]

2. Description of the Related Art Generally, as color data, multi-color data for the purpose of displaying color for identifying texts and graphics, and full color data for the purpose of displaying natural images. In the case of multi-color data, an information amount of 4 to 8 bits per pixel is sufficient, but in the case of full color data, it is 2 per pixel.
A 4-bit information amount is often used. in this way,
In the case of performing display control processing for color data, particularly in the case of full color data, the amount of information is large, and in the past, a large amount of memory was required.

[0003]

Therefore, in the display control processing of color data, saving the video memory is one of the problems for those skilled in the art. Also, in the past,
It is difficult to control the display by mixing the multi-color image and the full-color image.

According to the present invention, it is possible to save the video memory in the display control processing of color data, and it is possible to control the display by mixing the multicolor image and the full color image. The purpose is to provide a device.

[0005]

In order to achieve the above object, in the invention according to claim 1, the storage means has
Luminance / color difference color data is stored and bit selection
The level is the luminance component and color difference in the color data for one pixel.
It is possible to change the bit structure of the component, and
When the number of bits is expanded, only the number of expanded bits
The number of bits of the color difference component is reduced.

[0006]

[0007]

[0008]

[0009]

[0010]

According to the second aspect of the invention, attribute information is assigned to the color data stored in the storage means corresponding to the color data, and the conversion matrix corresponding to the attribute information is stored in the coefficient storage means. Is stored, and when the color data for one pixel is read out, a conversion matrix corresponding to the attribute information of the color data is output from the coefficient storage means and joins the calculation means.
This conversion matrix is applied to color data to convert the color space.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. 1 is a block diagram of a first embodiment of a display control device according to the present invention. This display control device is a color display.
A video memory (VRAM) 1 for storing data,
A data selector 2 for performing bit selection processing on the color data for one pixel read from the video memory 1.
And a switching unit 3 for performing mode switching with respect to the data selector 2, and first, second and third D / A for performing D / A conversion on the data respectively output from the data selector 2. It has A converters 4, 5, and 6.

In this example, the video memory 1 has a total of 16 bits of data D0 as one pixel of color data.
D15, more specifically, 8-bit luminance data (Y component), 4-bit color difference data (BY component), 4-bit color difference data (RY component) are stored. Or
It is assumed that 12-bit luminance data (Y component), 2-bit color difference data (BY component), and 2-bit color difference data (RY component) are stored. This color
The luminance data (Y component) and the color difference data (B-
Y component), color difference data (RY component) 8,
In the case of 4-, 4-bit data, D8 to D15 are luminance data (Y component), and D4 to D7 are color difference data (BY).
Components), D0 to D3 are assigned as color difference data (RY components). On the other hand, when the luminance data (Y component), the color difference data (BY component), and the color difference data (RY component) are respectively set to 12, 2 and 2 bits, D4 is used.
To D15 are luminance data (Y component), D2 to D3 are color difference data (BY component), and D0 to D1 are color difference data (RY).
It is designed to be assigned as a component).

The data selector 2 is for one pixel (that is, 16 bits) read from the video memory 1.
Under the control of the switching unit 3,
The luminance data (Y component), chrominance data (BY component), and chrominance data (RY component) of 8 bits, respectively, are outputted, or 12 bits each are outputted. It is configured to select whether to output in a 2-bit or 2-bit configuration.

FIG. 2 is a diagram showing a configuration example of the data selector 2. In this example, the data selector 2 is composed of three multiplexers 11, 12, and 13. The multiplexer 11 is provided to expand the luminance data (Y component) from 8 bits to 12 bits by 4 bits, and the data D8 of the 16-bit color data D0 to D15 is applied to all four ports on one side. 4 bit data D4 to D7 are input to the other four ports. Further, the multiplexer 12 is designed so that 4-bit data D4 to D7 are input to four ports on one side and data D2 to D3 are input to four ports on the other side (D3 is input to the upper 1 port). , D2 is input to the lower 3 ports). Further, the multiplexer 13 inputs the data D0 to D3 into one of the four ports,
The data D0 to D1 are input to the other four ports (D1 is input to the upper 1 port and D0 is input to the lower 3 ports). Also, each multiplexer 1
A switching signal SEL from the switching unit 3 is added to 1, 12, and 13, so that the input of four ports on one side is selected and output, or the input of the other four ports is selected and output. Whether to do it is controlled.

The first, second, and third D / A converters 4, 5, and 6 have D / A of 12, 4, and 4 bits, respectively.
An A converter is used. The switching unit 3 is composed of, for example, a flip-flop or a manual switch.

Next, the operation of the display control device of the first embodiment having such a configuration will be described. When displaying color data on a display device (not shown), the display control device sequentially reads the color data of each pixel stored in the video memory 1 pixel by pixel. At this time, as shown in FIG. 3A, each color data in the video memory 1 includes 8-bit luminance data (Y component), 4-bit color difference data (BY component), 4-bit color difference data (RY
Component), the switching unit 3,
For example, the states of the flip-flop and the manual switch are set in advance to those corresponding to this bit configuration. In this case, when the color data for one pixel read from the video memory 1 is applied to the data selector 2, the data selector 2 inputs the inputs of the four ports of each of the multiplexers 11, 12, and 13 from the switching unit 3. It is selected by the switching signal SEL and given to the first, second, and third D / A converters 4, 5, and 6, respectively. That is, the D / A converter 4,
Luminance data (Y component) of 8 bits, color difference data of 4 bits (BY component), and color difference data of 4 bits (RY component) are added to 5 and 6, and these are added. Each is converted into an analog signal and sent to a display device (not shown). As a result, 8-bit luminance gradation and 4-bit color difference gradation can be displayed on the screen of the display device.

On the other hand, as shown in FIG. 3 (b), the color data in the video memory 1 includes 12-bit luminance data (Y component) and 2-bit chrominance data (BY component). , 2
When the bit color difference data (R-Y component) has a bit configuration, the state of the switching unit 3, for example, a flip-flop or a manual switch is set to one corresponding to this bit configuration (that is, Set in the opposite condition) in advance. In this case, when the color data for one pixel read from the video memory 1 is added to the data selector 2,
In the data selector 2, each multiplexer 11, 12, 1
Inputs of the other four ports of 3 are selected by the switching signal SEL from the switching unit 3 and added to the first, second, and third D / A conversion units 4, 5, and 6, respectively. That is, D /
The A converters 4, 5 and 6 have 8-bit luminance data (Y component), 4-bit color difference data (BY component), and 4-bit color difference data (RY component). Are added, and these are converted into analog signals and sent to a display device (not shown). As a result, 12-bit luminance gradation and 2-bit color difference gradation can be displayed on the screen of the display device.

As described above, in the first embodiment, even when a plurality of types of display data corresponding to a plurality of types of display data are displayed, a plurality of video memories are provided for each of the plurality of types of display data. It is not necessary to provide it, and only one video memory is required. Further, a predetermined bit length (16 bits) for one pixel of the video memory 1 can be shared by a plurality of types of display data. As a result, the amount of memory can be significantly reduced compared to the conventional case.

Further, in the first embodiment, the luminance data is
This can be easily extended from 8 bits to 12 bits for the data (Y component). That is, in this case, as the plurality of types of display data, it is possible to set two types of the luminance data (Y component) of 8 bits and the luminance data (Y component) of 12 bits. it can. However,
When the luminance data (Y component) is expanded to 12 bits, the color difference data (BY component) and (RY component) are reduced to 2 bits, respectively, and the amount of information is reduced. . However, in general, the human eye is sensitive to brightness but insensitive to color. Therefore, even if the amount of color information is reduced, the viewer of the display screen is not affected by color deterioration and the like, while the amount of luminance information is increased, so that the quality of the color image can be increased.

In Japanese Patent Laid-Open No. 62-28794, the bit length for dividing a color signal to be displayed into a red luminance control signal R, a green control signal G, and a blue control signal B is variable. Therefore, although an apparatus capable of increasing the allocated bit length for the color component to be used is disclosed, as described above, the influence on the human eye even if the information amount of the color component is expanded. Is not much. In addition, some data have conventionally had luminance data of 8 bits or more, such as X-ray photographs and photographs from artificial satellites, but these required rounding processing. On the other hand, in the first embodiment, it is possible to easily realize a display having a large luminance range without requiring any complicated processing such as rounding processing.

By the way, in the example of FIG. 1, the switching unit 3 is composed of a flip-flop or a manual switch.
Such a configuration is preferable when the switching frequency of the data selector 2 is not so high. That is, for example, it is suitable when the types of color data stored in the entire video memory 1 are the same and the types of color data are switched in screen units. However, when different types of color data are mixed in one screen, that is, when different types of color data are mixed and stored in the video memory 1, the switching timing may be difficult. . Therefore, in this case, as shown in FIG. 4, instead of a flip-flop or a manual switch,
A flag FLG for switching control of the data selector 2 is provided as attribute information in the data for one pixel of the video memory 1, and the data selector 2 is switched according to the value "1" or "0" of this flag FLG. May be. That is, the luminance data (Y component) of the color data for one pixel read from the video memory 1 and the color difference data (B-
Y component), color difference data (RY component) is 8,
In the case of 4 and 4 bits, the flag FL is associated with this.
G is set to "0", and in the case of 12, 2, and 2 bits, the flag FLG is set to "1" correspondingly. As a result, even when different types of data are mixedly stored in the video memory 1, the data selector 2 is automatically switched according to the type of data.
It is possible to mix, for example, a portion that emphasizes luminance and a portion that emphasizes color difference information on one screen.

FIG. 5 is a block diagram of the second embodiment of the display control device according to the present invention. In FIG. 4, the same parts as those in FIG. 1 are designated by the same reference numerals. This display control device includes a video memory (VRAM) 1 in which color data for display is stored, and luminance data (Y component) of color data for one pixel read from the video memory 1.
Of the color difference data (BY component) and (RY) of the color data for one pixel.
The first and second selector / latch units 22 and 23 for performing bit selection and latch processing on the
And a switching unit 24 that performs mode switching for the second selector / latch units 22 and 23, the latch unit 21, and the first
And the first, second, and third D / A conversion units 25, 26, and 27 that perform D / A conversion on the data output from the selector / latch unit 22 and the second selector / latch unit 23, respectively. have.

In this example, the video memory 1 has a total of 16-bit data D0 as color data for one pixel.
D15, more specifically, 8-bit luminance data (Y component), 4-bit color difference data (BY component), 4-bit color difference data (RY component) are stored. Or
8-bit luminance data (Y component), 8-bit color difference data
Data (B-Y component or R-Y component) is stored. In the case where the luminance data (Y component), the color difference data (BY component), and the color difference data (RY component) of this color data are respectively set to 8, 4 and 4 bits. , D8 to D15 are luminance data (Y component), D
4 to D7 are assigned as color difference data (BY component), and D0 to D3 are assigned as color difference data (BY component). on the other hand,
When the luminance data (Y component) and the color difference data (BY component or RY component) are respectively 8 and 8 bits, D8 to D15 are luminance data (Y component), D0 to D7
Are assigned as color difference data (BY component or RY component).

The latch section 21 is composed of, for example, an 8-bit latch corresponding to 8-bit luminance data (Y component). The first and second selector / latch sections 22 and 23 are each composed of a 4-bit selector / 8-bit latch. FIG. 6 is a diagram showing a configuration example of the first selector / latch unit 22. As the first selector / latch section, 4-bit data D4 to D7 are used.
Latch circuit 31 for latching the
Input to all one port, 4-bit data D0 to D3
Input to the other four ports and select each of these inputs by the switching signal SEL from the switching unit 24 to output, a latch circuit 33 that latches the output from the multiplexer 32, and the switching unit 24. the switching signal SEL from either a clock for the latch circuits 31 and 33 to the clock CLK ₀ of the fundamental frequency f _0, a frequency f _0/2 1/2 of the fundamental frequency f ₀ clock CLK ₁
It has a multiplexer 34 for selecting whether to set.

FIG. 7 shows the second selector / latch section 2
It is a figure which shows the structural example of 3. The second selector / latch unit 23 has a latch circuit 41 for latching 4-bit data D0 to D3 and data D3 input to all four ports, and data D4 to D7 to the other four ports. A multiplexer 42 which inputs, selects each of these inputs by a switching signal SEL from the switching unit 24, and outputs the selected signals.
And a latch circuit 43 for latching the output from the multiplexer 42, and a clock for the latch circuits 41 and 43 based on the switching signal SEL from the switching unit 24 to the basic frequency f _0.
If to the clock CLK _0, and a multiplexer 34 for selecting either the clock CLK ₂ 1/2 frequency f _0/2 of the fundamental frequency f _0.

The clock CLK ₁ used in the _first selector / latch section 23 and the clock CLK ₂ used in the second selector / latch section 23 are as shown in FIG.
As shown in (b), the phase is shifted by a half cycle,
Therefore, the first and second selector / latch sections 22 and 23
, When operating at frequency f _0/2 of the clock CLK _1, CLK _2, and is configured to output data alternately.

Next, the operation of the display control device of the second embodiment having such a configuration will be described. When displaying color data on the display device, the display control device sequentially reads the color data of each pixel stored in the video memory 1 pixel by pixel, as in the first embodiment. FIG. 9A shows addresses # 1 and # of the video memory 1.
It is a figure which shows the 1st example of the color data for 1 pixel each memorize | stored in 2, ..., #n. As in the first example, color data at addresses # 1 to #n are all of the same format, and 8-bit luminance data (Y component),
In the case of a bit configuration of 4-bit color difference data (BY component) and 4-bit color difference data (RY component), the first and second selector / latch units 22 output the clock CLK ₀ . The state of the switching unit 24, for example, the flip-flop is set so that 4-bit color difference data (BY component) and 4-bit color difference data (RY component) are output in synchronization with each other. At this time, in the first selector / latch section 22, one of the four ports of the multiplexer 32 is selected and added to the latch circuit 33. As a result, in synchronization with the clock CLK ₀ , the first selector /
Inputs D4 to D7 from the latch circuit 31 of the latch unit 22.
The data D4 'to D7' corresponding to are output, and
The latch circuit 33 outputs data D0 'to D3' corresponding to the input (all D4). On the other hand, in the second selector / latch section 23, the input of one of the four ports of the multiplexer 42 is selected and added to the latch circuit 43. As a result, the second clock is synchronized with the clock CLK ₀ .
The latch circuit 43 of the selector / latch unit 23 outputs the data D4 "to D7" corresponding to the inputs (all D3), and the latch circuit 41 outputs the data D0 "to D3" corresponding to the inputs D0 to D3. Is output. Also,
Data corresponding to the inputs D8 to D15 is output from the latch unit 21. In this way, the latch unit 21, the first selector / latch unit 22, and the second selector / latch unit 2
Each data output from the 3rd is the first, second and third D /
The signals are added to the A converters 25, 26 and 27, converted into analog signals and sent to the display device. That is, in the display device, 8-bit luminance data (Y component) D8 to D15 from the first D / A conversion unit 25 and 8-bit data D0 ′ to D7 from the second D / A conversion unit 26. 'And 8-bit data D0 "to D7" from the third D / A converter 27 are sent. However, in this case, of the 8-bit data D0 'to D7' from the second D / A converter 26, only 4-bit D4 'to D7' correspond to 4-bit color difference data (BY component). The remaining 4 bits D0 ′ to D3 ′ are ignored as dummy bits in, for example, a display device. Similarly, the third D /
8-bit data D0 "to D7" from the A converter 27
Among them, only 4-bit data D0 ″ to D3 ″ corresponds to 4-bit color difference data (RY component), and the remaining 4-bit D4 ″ to D7 ″ are dummy bits in the display device. It will be ignored. As a result, from the display control device, as shown in FIG.
In synchronization with the clock CLK ₀ , data from addresses # 1 to #n of the video memory 1, that is, 8-bit luminance data (Y component) and 4-bit color difference data (BY).
Component) and 4-bit color difference data (RY component) are sequentially sent to the display device, and 8-bit luminance gradation and 4-bit color (BY, RY) are displayed on the display screen. Color display with gradation is possible.

On the other hand, FIG. 10A is a diagram showing a second example of color data for one pixel stored at addresses # 1, # 2, ..., #n of the video memory 1. is there.
In the second example, the color data of addresses # 1 to #n are of different formats alternately, and consist of 8-bit luminance data (Y component) and 8-bit color difference data (BY component). The first type data and the second type data composed of 8-bit luminance data (Y component) and 8-bit color difference data (RY component) are alternately stored. In this case, the clock C from the first selector / latch unit 22
4-bit color difference data (BY component) is output in synchronization with LK ₁ , and the second selector / latch unit 23
The state of the switching unit 24, for example, the flip-flop is set so that 8-bit color difference data (RY component) is output in synchronization with the clock CLK ₂ . At this time, in the first selector / latch unit 22, the multiplexer 32
Input of the other four ports of the latch circuit 3 is selected.
Join 3. As a result, the data D4 ′ to D4 corresponding to the inputs D4 to D7 from the latch circuit 31 of the first selector / latch unit 22 are synchronized with the clock CLK _1.
7'is output, and is input from the latch circuit 33 to D
Data D0 ′ to D3 ′ corresponding to 0 to D3 are output. On the other hand, in synchronization with the clock CLK ₂ , in the second selector / latch section 23, the other 4
The input of one port is selected and added to the latch circuit 43. As a result, in synchronism with the clock CLK _0, the data D4 "through D7" corresponding to the input D4-D7 in the synchronous clock CLK ₀ from latch circuit 43 of the second selector / latch unit 23 is output, also, From the latch circuit 41, data D0 ″ to D0 corresponding to inputs D0 to D3
3 "is output. Also, the input D8 is input from the latch section 21.
Data corresponding to D15 to D15 are output. In this way, the respective data output from the latch unit 21, the first selector / latch unit 22, and the second selector / latch unit 23 are the first, second, and third D / A conversion units 25, 26. , 27
To the display device after being converted into an analog signal. That is, in the display device, 8-bit luminance data (Y component) D8 to D15 from the first D / A conversion unit 25 and 8-bit data D0 ′ to D7 from the second D / A conversion unit 26. 'And 8-bit data D0 "to D7" from the third D / A converter 27 are sent. As a result, from the display control device, the addresses # 1, # 3, ... Of the video memory 1 are synchronized with the clock CLK _1.
.., ie, 8-bit luminance data (Y component) and 8-bit chrominance data (BY component) are sent to the display device, and are synchronized with the clock CLK ₂ and the video memory 1 From the addresses # 1, # 4, ..., That is, 8-bit luminance data (Y component) and 8-bit color difference data (RY component) are sent to the display device. At this time, since the clock CLK ₁ and the clock CLK ₂ are out of phase with each other by a half cycle (synchronization amount of the clock CLK ₀ ), as shown in FIG. 10B, 8-bit color difference data (BY component ) And 8-bit color difference data (RY components) are alternately sent to the display device, and 8-bit luminance gradation and 8-bit color (BY, RY) gradation are displayed on the display screen. Color display with is possible.

As described above, in the second embodiment, the gradation of the color difference data can be easily expanded and converted from 4 bits to 8 bits. Thus, for example, when it is desired to display a multi-color image such as text or graphics (when color difference gradation is not required so much), it is displayed in the video memory 1 in the form as shown in FIG. 9A. If it is sufficient to store data, and if it is desired to display a full-color image close to a natural image such as a moving image (when color difference gradation is required), the video memory 1 is stored in the video memory 1 shown in FIG. The display data may be stored in such a model. However, when the gradation is doubled from 4 bits to 8 bits, 1
Since the display frequency for one color is halved, the resolution for color difference data is halved. However, in a full-color image such as a natural image, the frequency of the color difference component is lower than that in a multi-color image such as text or graphics, so that, for example, like a color CCD actually used in a color television camera, A sufficiently clear image can be obtained even with a resolution of half the luminance.

By the way, as described in the first embodiment, as one use of the video memory 1, when it is desired to display only multi-color images such as text and graphics on the entire display screen, the video memory 1 is used. When it is desired to store only the data of the type shown in FIG. 9A as a whole and to display a full-color image such as a moving image on the entire display screen, the data of the type shown in FIG. 9B is stored. It is possible to remember only. In this case, a flip-flop or a manual switch may be used as the switching unit 24, and the type of image may be switched in screen units by operating the switch or the like according to the type of data stored in the video memory 1. it can.

On the other hand, when it is desired to display a multi-color image such as text or graphics on a part of one display screen and a full-color image such as a moving image on another part (that is, one display screen). When you want to mix multi-color images and full-color images in),
Data of the kind shown in FIG. 9A is stored in a part of the video memory 1, and data of the kind shown in FIG. 9B is stored in the other part. Can be considered. In this case, instead of a flip-flop or a manual switch, as shown in FIG. 11, a switching control flag FLG is provided in the data of one pixel of the video memory 1 as attribute information, and this flag FLG is set. The switching control may be performed depending on the value "1" or "0". For example, as shown in FIG. 12, when the data of an address in the video memory 1 is as shown in FIG. 9A, the flag FLG is set to "0" correspondingly. If the data of another address is as shown in FIG. 10A, the flag is set to "1" in correspondence with this. In this way, by setting the attribute information according to the type of display data and storing it in the video memory 1 together with the display data, the resolution in the video memory 1 can be improved. Even when multi-colored data that emphasizes and full-color data that emphasizes gradation are stored together, automatic switching control is performed according to the type of data, and multi-color images are displayed on one screen. Full color images can be mixed.

In the example of FIG. 12, the attribute information, that is, the flag FLG is set for each pixel, but the attribute information may be set in accordance with the coarseness of the resolution of the color difference data. . That is, when the kind of pixel data is, for example, as shown in FIG. 10A, one attribute information is set in units of two pixels as shown in FIG. 13 (effectively for adjacent pixels). It can also be set. In this case, 1
The amount of memory required to store the attribute information can be reduced as compared with the case where the attribute information is set for each one pixel.

FIG. 14 shows a third example of the display control device according to the present invention.
It is a block diagram of the Example of. The display control apparatus according to the third embodiment has a video memory 61 in which display color data and attribute information are stored, and a coefficient table 62 in which a conversion matrix for color space conversion is stored. And a matrix multiplication unit 63 for performing a color space conversion on the display data read from the video memory 61 by applying a predetermined conversion matrix to the display data.
When one display data is read from the video memory 61, the attribute information corresponding to this display data is also read at the same time, and the predetermined conversion matrix is a coefficient based on this attribute information. It is adapted to be given from the table 62 to the matrix multiplication unit 63.

In the third display control device having such a configuration, the data for one pixel stored in the video memory 61 is stored.
24-bit display data and 4-bit attribute information D
It is assumed to be composed of 0 to D3. The following table shows an example of attribute information.

[0036]

[Table 1]

Further, a predetermined conversion matrix is stored in the coefficient table 62 in association with this attribute information. Now, the 24-bit display data stored in the video memory 61 includes 8-bit Y component (luminance component), 8-bit (RY) component (color difference component), and 8-bit (B component). -Y) component (color difference component), the attribute information (D
(0,0,0,1) is assigned as 3, D2, D1, D0). In this case, when this display data is read from the video memory 61, its attribute information (0, 0, 0, 1) is also read, and the coefficient table 62 performs corresponding conversion. The matrix is output. As a result, the matrix multiplication unit 63 causes the conversion matrix from the coefficient table 62 to act on the display data read from the video memory 61, for example, as shown in the following equation, and Y of 8 bits is used. , (RY), (BY) component display data can be converted into 8-bit R, G, B component display data.

[0038]

[Equation 1]

The 24-bit display data stored in the video memory 61 includes 8-bit Y component (luminance component), 8-bit I component (color difference component), 8-bit Q component ( (0, 0, 1, 0) is assigned to this display data as attribute information (D3, D2, D1, D0) when it is composed of color difference components. In this case, when this display data is read out from the video memory 61, its attribute information (0, 0, 1, 0) is also read out, and the coefficient table 62 converts it accordingly. The matrix is output. As a result, in the matrix multiplication unit 63, the coefficient table 6 is added to the display data read from the video memory 61, for example, as shown in the following equation.
By applying the conversion matrix from 2, the display data of each 8-bit Y, I, Q component is converted into 8-bit R, G,
It can be converted into B component display data.

[0040]

[Equation 2]

As described above, in the third embodiment, the color data is
By assigning attribute information to the data, it is possible to convert the luminance / color difference system into the RGB system. Therefore, for example, in the video memory 61, data of different color spaces (for example, luminance / color difference system data and RGB data) can be mixed, and even if they are stored in the mixed state in the video memory 61, they are all stored in the color space (for example, RGB system) of the display device immediately before output to the display device. Data can be converted.

In each of the above embodiments, the case where the display control device is used for screen control of a CRT or the like has been described, but this can be applied to an output device such as a color printer in exactly the same manner. Therefore, it is understood that the display control device of the present invention is applied to a display device (including a printer and the like) in a broad sense, and "display" includes output to a printer and the like. Should be. In addition, it should be understood that the "screen" includes the meaning of the unit of output to a printer or the like.

[0043]

As described above, according to the first aspect of the invention, the storage means stores the color data of the luminance / color difference system.
Data is stored, and the bit selection means uses the color data for one pixel.
The bit configuration of the luminance component and chrominance component in the data can be changed
When the number of bits of the luminance component is expanded,
Reduces the number of bits of the color difference component by the number of extension bits
The size of the
It is possible to realize a display having various brightness gradations.

[0044]

[0045]

[0046]

[0047]

[0048]

According to the second aspect of the invention, the color data stored in the storage means is assigned the attribute information corresponding to the color data, and the coefficient storage means is associated with the attribute information. When the conversion matrix is stored and the color data for one pixel is read out, the conversion matrix corresponding to the attribute information of the color data is output from the coefficient storage means and added to the operation means. Is applied to the color data to convert the color space, so even when data having different color spaces are mixed in the storage means, just before outputting them to the output device, The attribute information can be used to convert the data into a color space suitable for the color space of the output device.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a first embodiment of a display control device according to the present invention.

FIG. 2 is a diagram showing a configuration example of a data selector of FIG.

3 (a) and 3 (b) are diagrams showing examples of color data types, respectively.

FIG. 4 is a diagram showing a modification of the display control device of FIG.

FIG. 5 is a configuration diagram of a second embodiment of the display control device according to the present invention.

FIG. 6 is a diagram showing a configuration example of a first selector / latch unit.

FIG. 7 is a diagram showing a configuration example of a second selector / latch unit.

8A and 8B are a clock CLK and a clock C.
Is a diagram showing the relationship between the phase of the LK _2.

9A and 9B are diagrams for explaining the operation of the display control device of FIG.

10A and 10B are diagrams for explaining the operation of the display control device of FIG.

11 is a diagram showing a modification of the display control device of FIG.

12 is a diagram showing an example of flag setting in the display control device of FIG.

13 is a diagram showing an example of flag setting in the display control device of FIG.

FIG. 14 is a configuration diagram of a third embodiment of the display control device according to the present invention.

[Explanation of symbols]

1 video memory 2 Data selector 3 switching unit 4, 5, 6 D / A converter 11, 12, 13 multiplexer 21 Latch 22, 23 Selector / latch section 24 Switching unit 25, 26, 27 D / A converter 31,33 Latch circuit 32, 34 multiplexer 41,43 Latch circuit 42,44 multiplexer 61 Video memory 62 coefficient table 63 Matrix multiplication section

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP 62-28794 (JP, A) JP 3-204086 (JP, A) JP 62-174794 (JP, A) JP 4- 70176 (JP, A) JP 5-207508 (JP, A) JP 62-251882 (JP, A) JP 4-255193 (JP, A) JP 5-134640 (JP, A) JP-A-57-190995 (JP, A) JP-A-60-202477 (JP, A) JP-A-60-203091 (JP, A) JP-A-62-160490 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) G09G 5/00-5/40

Claims (2)

(57) [Claims] 1. Storage means for storing color data,
Color data for one pixel read from the storage means
Bit selection means for performing bit selection processing
Mode switching of bit selection in the gate selection means
Switching means , the storage means stores color data of luminance / color difference system, and the bit selection means,
The bit configuration of the luminance component and the color difference component in the color data for one pixel can be changed by the control of the switching means. When the number of bits of the luminance component is expanded, the number of bits of the color difference component is increased by the expanded bit number. A display control device, characterized in that 2. Storage means for storing color data,
The storage means comprises a coefficient storage means for storing a color space conversion matrix, and an arithmetic means for applying a predetermined conversion matrix to the color data read from the storage means to convert the color space. Attribute information is assigned to the color data stored in the memory, and the conversion matrix is stored in the coefficient storage means in association with the attribute information, and the color data for one pixel is read out. In some cases, the coefficient storage means outputs a conversion matrix corresponding to the attribute information of the color data to be added to the calculation means.