JP3400161B2 - Sealing method and jig, and semiconductor manufacturing apparatus using the same - Google Patents

Abstract

PURPOSE: To control the inclination of electric parts, and further, facilitate the maintenance. CONSTITUTION: This device comprises a ring-shaped guide member 6, which surrounds and guides the periphery of a semiconductor integrated circuit 5 where a perform 4 is put between a substrate 2 where a semiconductor element 1 is mounted and a cap 2 joined with the substrate 2 and besides has a height a little lower than the height of the semiconductor integrated circuit 5, and two sheets of plates 7 supports the three semiconductor integrated circuit devices 5 with approximately the same height as themselves guided by the ring-shaped guide members 6, catching them with each inner face 7a. Solder perform 4 fuses by heating the three semiconductor integrated circuit devices 5, the plates 7 and all, and each cap 3 and the substrate 2 are joined with each other.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for encapsulating a semiconductor element mounted on an electronic component such as a semiconductor integrated circuit device, and more particularly, a method for encapsulating a semiconductor element with solder, a jig, and semiconductor manufacturing using the same. It relates to the device.

[0002]

2. Description of the Related Art The techniques described below are for studying the present invention,
The present invention was studied by the present inventors upon completion, and its outline is as follows.

In encapsulating a semiconductor integrated circuit device which is an example of an electronic component, in particular, a MCC (Micro Carrier for LSI Chip) type semiconductor integrated circuit device, the inside is hollowed out, and a drop type formed of ceramic or the like is used. A sealing jig is often used.

Here, the sealing method using the drop-in type sealing jig includes a cap which is a sealing member also serving as heat dissipation,
A substrate on which a semiconductor element is mounted and a solder preform are housed in the sealing jig with their respective positions aligned, and the cap is joined to the substrate by reflowing together with the sealing jig. To do.

Regarding the hermetic sealing of the semiconductor integrated circuit device by solder, for example, November 20, 1992.
It is described on page 295 of "Illustrated Encyclopedia of Soldering Terms" published by Japan Industrial Research Institute Co., Ltd.

[0006]

However, in the above-mentioned technique, when a drop-in type sealing jig is used,
There is a problem that the tilt of the semiconductor integrated circuit device (the tilt that occurs between the ceiling surface and the bottom surface of the semiconductor integrated circuit device) cannot be controlled.

Further, since the sealing jig has a concave shape, there is a problem that foreign matter is likely to be accumulated in a corner portion inside the sealing jig and it is difficult to remove the foreign matter from its shape.

In addition, there is a problem that it is difficult to process the sealing jig with high precision due to its structure.

Therefore, an object of the present invention is to provide a sealing method and a jig which can control the inclination of an electronic component and facilitate maintenance, and a semiconductor manufacturing apparatus using the same.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0011]

Among the inventions disclosed in the present application, a brief description will be given to the outline of typical ones.
It is as follows.

That is, in the sealing method according to the present invention, three electronic components each having a solder preform disposed between a substrate on which a semiconductor element is mounted and a sealing member joined to the substrate are provided. While sandwiching and supporting between two flat plates while being guided by a guide member that surrounds the outer periphery, the three electronic components are heated together with the flat plates to melt the solder preforms and join the respective sealing members. Is.

Furthermore, in the sealing method according to the present invention, three electronic components each having a solder preform disposed between a substrate on which a semiconductor element is mounted and a sealing member bonded to the substrate are provided. A guide member that surrounds the outer periphery guides one flat plate of the two flat plates, and in a state of being aligned with the one flat plate, the other flat plate is placed on the three electronic components, By applying a load from the outer surface of one of the flat plates, the three electronic components are sandwiched and supported between the two flat plates, and by heating the three electronic components together with the flat plate, the solder preform is melted. The respective sealing members are joined together.

In the sealing method according to the present invention, one electronic component in which a solder preform is arranged between a substrate on which a semiconductor element is mounted and a sealing member bonded to the substrate is provided.
A guide member that surrounds the outer peripheral portion of the electronic component guides the plate to one of the two flat plates, and two sandwiched members that have substantially the same height as the electronic component and have high heat resistance are provided on the one side. The other flat plate on the one electronic component and the two held members in a state of being aligned with the one flat plate, and at least one of the flat plates By applying a load from the side,
One electronic component and two sandwiched members are supported by being sandwiched between two flat plates, and the electronic components are heated together with the flat plates to melt the solder preform and join the sealing member. Is.

Further, the sealing jig according to the present invention surrounds and guides the outer peripheral portion of the electronic component in which the solder preform is arranged between the substrate on which the semiconductor element is mounted and the sealing member joined to the substrate. And a guide member having a height slightly lower than the height of the electronic component, and two flat plates sandwiching and supporting the three electronic components guided by the guide member, and three electronic components together with the flat plate. By heating, the solder preform is melted and the respective sealing members are joined.

Further, the sealing jig according to the present invention is the outer peripheral portion of one or two electronic components in which a solder preform is arranged between a substrate on which a semiconductor element is mounted and a sealing member bonded to the substrate. A guide member that surrounds and guides and has a height slightly lower than the height of the electronic component, and one or two sandwiched members that have substantially the same height as the height of the electronic component and have high heat resistance. There are a total of three electronic components from the one or two electronic components and the sandwiched member, and two flat plates that sandwich and support the sandwiched member, and one or two electronic components are provided for each flat plate. By heating, the solder preforms are melted and the respective sealing members are joined.

In the sealing jig according to the present invention, the sandwiched member has a spherical shape.

Further, in the sealing jig according to the present invention, the flat plate is T-shaped.

A semiconductor manufacturing apparatus according to the present invention uses the sealing jig, and is provided with a reflow furnace for heating the electronic component to melt the solder preform.

[0020]

In other words, according to the above-mentioned means, the three electronic components in which the solder preform is arranged between the substrate on which the semiconductor element is mounted and the sealing member joined to the substrate are sandwiched between two flat plates. Since the solder preform is melted and the sealing member is joined by heating the three electronic components together with the flat plate, the electronic component is supported at three positions between the two flat plates. be able to.

With this, the arrangement distance of the three electronic components can be freely set within the flat plate, and as a result, the inclination of the electronic components can be controlled with high accuracy.

The flat plate which is a constituent member of the sealing jig is
Its simple shape makes it easy to process.

Since the sealing jig has the guide member that surrounds the outer peripheral portion of the electronic component and the two flat plates, the number of corners where foreign matters are accumulated is small.

Furthermore, since the sealing jig is a combination of the guide member and the two flat plates, the guide member and the two flat plates can be divided. Thereby, the maintenance of the sealing jig can be easily performed.

The contact area with the flat plate can be reduced by making the sandwiched member, which is a constituent member of the sealing jig, spherical.

Here, the area of the flat plate can be reduced by forming the flat plate, which is a constituent member of the sealing jig, into a T shape.

As a result, it is possible to reduce the heat capacity required to heat the two flat plates together during sealing.

In the semiconductor manufacturing apparatus using the sealing jig, the reflow furnace for heating the electronic parts to melt the solder preform is installed, so that the entire sealing jig is passed through the reflow furnace. The electronic components can be sealed simply by putting them in a reflow furnace or by placing them in a reflow furnace.

[0029]

Embodiments of the present invention will now be described in detail with reference to the drawings.

(Embodiment 1) FIG. 1 is a plan view showing an embodiment of the structure of a sealing jig according to the present invention, FIG. 2 is a side view thereof, FIG. 3 is a partially enlarged sectional view thereof, and FIG. FIG. 5 is an enlarged perspective view showing an example of the structure of the ring-shaped guide member of the sealing jig according to FIG. 5, FIG. 5 is a structural conceptual diagram showing an example of the structure of the semiconductor manufacturing apparatus using the sealing jig according to the present invention, FIG. 8 is a partial cross-sectional view showing an embodiment of the structure of an MCC type semiconductor integrated circuit device which is sealed using a sealing jig according to the present invention, with a part thereof broken away.

The structure of the sealing jig according to the present invention will be described with reference to FIGS. 1, 2, 3 and 4 by using the substrate 2 on which the semiconductor element 1 is mounted and the sealing member bonded to the substrate 2. MCC type semiconductor integrated circuit device 5 (electronic component) in which a solder preform 4 is arranged between a certain cap 3
A ring-shaped guide member 6 that is a guide member that surrounds and guides the outer peripheral portion of the semiconductor integrated circuit device 5 and that has a height slightly lower than the height of the semiconductor integrated circuit device 5, and 3 of substantially the same height guided by the ring-shaped guide member 6. The two semiconductor integrated circuit devices 5 are sandwiched between the inner side surfaces 7a and supported by the two flat plates 7. By heating the three semiconductor integrated circuit devices 5 together with the flat plates 7, the solder preform 4 melts. Each cap 3 is joined to the substrate 2.

The ring-shaped guide member 6 has a ring portion 6a surrounding the outer peripheral portion of the semiconductor integrated circuit device 5. That is, since the outer peripheral portion of the semiconductor integrated circuit device 5 is surrounded by the ring portion 6a, the cap 3 and the substrate 2 are sealed at the time of sealing.
Can be positioned with.

Since the ring-shaped guide member 6 is heated at the time of sealing, it is necessary to have heat resistance. Further, since the cap 3 and the substrate 2 are positioned by the ring portion 6a, processing for obtaining dimensional accuracy is performed. Sex is also necessary.

Therefore, the ring-shaped guide member 6 is made of a machinable ceramic material such as aluminum nitride.

Further, the flat plate 7 is required to have heat resistance, abrasion resistance, strength and flatness, and further, to transfer heat to the semiconductor integrated circuit device 5 at the time of sealing, it is required to have high thermal conductivity. . Therefore, like the ring-shaped guide member 6, it is made of aluminum nitride or the like.

The structure of a semiconductor manufacturing apparatus using the sealing jig according to the present invention will be described with reference to FIG. 5. A flat plate positioning member 8 for positioning the two flat plates 7 at the time of sealing.
And a reflow furnace 9 for heating the semiconductor integrated circuit device 5 to melt the solder preform 4 (see FIG. 3).

That is, the semiconductor integrated circuit device 5 is put together with the sealing jig in the reflow furnace 9 and heated to melt the solder preform 4 for sealing.

The structure of an MCC type semiconductor integrated circuit device which is sealed using the sealing jig according to the present invention will be described with reference to FIG. 8. The electrodes on the main surface of the substrate 2 made of a ceramic material such as mullite will be described. Solder bump 1 on 12
The semiconductor device 1 face-down bonded via the package 3 is hermetically sealed by the cap 3.

Further, the solder bumps 13 are, for example, 1 to
It is composed of a Pb / Sn alloy containing about 5 wt% Sn. The cap 3 is made of high thermal conductive ceramic such as aluminum nitride (AlN), and the legs of the cap 2 are covered with the sealing solder 14 (the solder preform 4 shown in FIG. 3 is melted and solidified). Soldered to the peripheral edge of the main surface.

A metallization layer 15 for improving the wettability of the solder 14 for sealing is provided on each of the peripheral portion of the main surface of the substrate 2 and the lower surface of the leg portion of the cap 3. These metallized layers 15 are made of, for example, Ti, N
It is composed of a composite alloy film formed by sputtering a thin film of i and Au.

An internal wiring 16 made of, for example, W is formed on the inner layer of the substrate 2, and the electrode 12 on the main surface side and the electrode 12 on the lower surface side of the substrate 2 are electrically connected via the internal wiring 16. Connected to each other.

Next, the sealing method of the first embodiment will be described.

First, three semiconductor integrated circuit devices 5 having substantially the same height in which a solder preform 4 is arranged between a substrate 2 on which the semiconductor element 1 is mounted and a cap 3 to be joined to the substrate 2 are provided for each semiconductor. A ring-shaped guide member 6 that is a guide member that surrounds the outer peripheral portion of the integrated circuit device 5 guides the flat plate 7 on one of the two flat plates 7.

That is, with the solder preform 4 placed on the joint portion of the cap 3 with the substrate 2 on each of the ring portions 6a of the three ring-shaped guide members 6, the substrate 2, the cap 3, and the solder preform 4 are placed. The semiconductor integrated circuit device 5 made of is inserted and placed on one of the two flat plates 7.

Here, the height of the semiconductor integrated circuit device 5 is set to A
If ± ΔA ₁ and the distance between the two semiconductor integrated circuit devices 5 is X, the maximum value θmax of the inclination between the semiconductor integrated circuit devices 5 is θmax = tan ⁻¹ (2A ₁ / X).

Therefore, the two semiconductor integrated circuit devices 5
The inclination between the two semiconductor integrated circuit devices 5 can be controlled by adjusting the distance X between them.

Thereafter, the other flat plate 7 is placed on the three semiconductor integrated circuit devices 5 in a state of being aligned with the one flat plate 7.

At this time, the positioning of the two flat plates 7 is performed by the flat plate positioning member 8. Further, since the ring-shaped guide member 6 is formed slightly lower than the semiconductor integrated circuit device 5, it is not sandwiched between the two flat plates 7.

Further, at least one of the flat plates 7
A load is applied from the outer side surface 7b of the (for example, a weight 11 having an appropriate weight near the center of the outer side surface 7b to be loaded).
To place. Note that the sealing load can be adjusted by adjusting the number and weight of the weights 11). As a result, the three semiconductor integrated circuit devices 5 are sandwiched and supported by the two flat plates 7.

Subsequently, the three semiconductor integrated circuit devices 5 are inserted into the reflow furnace 9 together with the two flat plates 7 (each sealing jig), and the semiconductor integrated circuit devices 5 are heated to form the solder preform 4. Melt each cap 3 onto the substrate 2
To join.

This completes the sealing.

Next, according to the sealing method, the jig and the semiconductor manufacturing apparatus using the same of the first embodiment, the following effects can be obtained.

That is, the three semiconductor integrated circuit devices 5 each having the solder preform 4 arranged between the substrate 2 on which the semiconductor element 1 is mounted and the cap 3 joined to the substrate 2 are sandwiched between two flat plates 7. By supporting and heating the three semiconductor integrated circuit devices 5 together with the two flat plates 7, the solder preform 4 is melted and the cap 3 is joined, so that the semiconductor integrated circuit device 5 is placed between the two flat plates 7. It can be supported by three places.

As a result, the arrangement distances of the three semiconductor integrated circuit devices 5 can be freely set within the flat plate 7, and as a result, the inclination of the semiconductor integrated circuit device 5 can be controlled with high accuracy.

The flat plate 7, which is a constituent member of the sealing jig of the first embodiment, has a simple shape and is easy to process. As a result, it is possible to form the flat plate 7 with high accuracy, and the inclination of the semiconductor integrated circuit device 5 can be made even more accurate.

Since the sealing jig has the ring-shaped guide member 6 and the two flat plates 7, the number of corners where foreign matters are accumulated is small. As a result, the amount of foreign matter accumulated can be reduced.

Furthermore, since the sealing jig is a combination of the ring-shaped guide member 6 and the two flat plates 7,
The ring-shaped guide member 6 and the two flat plates 7 can be divided. Thereby, the maintenance of the sealing jig can be easily performed.

Therefore, it is possible to reduce the adverse effect of foreign matter on the semiconductor integrated circuit device 5, and as a result, the yield of the semiconductor integrated circuit device 5 can be improved.

In the semiconductor manufacturing apparatus using the sealing jig, the reflow furnace 9 that heats the semiconductor integrated circuit device 5 to melt the solder preform 4 is installed. The semiconductor integrated circuit device 5 can be sealed only by passing it through the reflow furnace 9 or by storing it in the reflow furnace 9.

(Embodiment 2) FIG. 6 is a plan view showing an example of the structure of a sealing jig which is another embodiment of the present invention, and FIG. 7 is a side view thereof.

The configuration of the sealing jig of the second embodiment will be described with reference to FIGS. 3, 4, 5, 6 and 7.
The solder preform 4 is provided between the substrate 2 on which the semiconductor element 1 is mounted and the cap 3 which is a sealing member bonded to the substrate 2.
A ring-shaped guide member 6 that is a guide member that surrounds and guides the outer peripheral portion of the MCC type semiconductor integrated circuit device 5 (electronic component) in which is arranged, and that has a height slightly lower than the height of the semiconductor integrated circuit device 5. Two sandwiched members 10 that are approximately the same height as the semiconductor integrated circuit device 5 and have high heat resistance, and two sheets that sandwich and support the one semiconductor integrated circuit device 5 and the two sandwiched members 10. Of the flat plate 7, and by heating one semiconductor integrated circuit device 5 together with the flat plate 7, the solder preform 4 melts and the cap 3
Are to be joined.

In the second embodiment, a case where one semiconductor integrated circuit device 5 and two sandwiched members 10 are sandwiched between two flat plates 7 to support the semiconductor integrated circuit device 5 will be described. The device 5 and one sandwiched member 10 may be sandwiched and supported, and if a total of three members including at least one semiconductor integrated circuit device 5 are sandwiched between two flat plates 7 and supported. Good.

Further, in the second embodiment, the case where the held member 10 is spherical (ball) will be described, but the held member 10 may be a prismatic member such as a block gauge or a spacer.

The spherical sandwiched member 10 has a diameter substantially the same as the height of the semiconductor integrated circuit device 5. The spherical sandwiched member 10 is held by the sandwiched member guide 10a so as not to roll when it is placed on the flat plate 7.

The spherical sandwiched member 10 is formed of a ceramic material or the like because it requires high heat resistance and must avoid thermal deformation.
Note that the spherical sandwiched member 10 can be processed with high precision by applying a technique such as a bearing.

Further, the flat plate 7 in the second embodiment is 2
All the sheets are T-shaped, and the material thereof is aluminum nitride or the like, like the flat plate 7 described in the first embodiment.

Here, since the ring-shaped guide member 6 has the same shape and material as those described in the first embodiment, duplicate description thereof will be omitted.

The semiconductor manufacturing apparatus using the sealing jig of the second embodiment is also the same as the semiconductor manufacturing apparatus described in the first embodiment, and the duplicated description will be omitted.

The structure of the MCC type semiconductor integrated circuit device for sealing using the sealing jig according to the second embodiment is the same as that of the semiconductor integrated circuit device shown in FIG. 8 described in the first embodiment. Therefore, the duplicate description will be omitted.

Next, the sealing method of the second embodiment will be described.

First, one semiconductor integrated circuit device 5 in which the solder preform 4 is arranged between the substrate 2 on which the semiconductor element 1 is mounted and the cap 3 joined to the substrate 2 is attached to the outer peripheral portion of the semiconductor integrated circuit device 5. A ring-shaped guide member 6, which is a guide member that surrounds, guides on one of the two T-shaped flat plates 7.

That is, with the solder preform 4 placed on the ring portion 6a of one ring-shaped guide member 6 at the joint portion of the cap 3 with the substrate 2, the substrate 2, the cap 3 and the solder preform 4 are separated from each other. Semiconductor integrated circuit device 5
Then, the two T-shaped flat plates 7 are placed on one flat plate 7.

Subsequently, the two spherical sandwiched members 10 having substantially the same height as the semiconductor integrated circuit device 5 and having high heat resistance are guided onto the one flat plate 7.

Here, the height of the semiconductor integrated circuit device 5 is set to A
± ΔA ₁ , the height (diameter) of the spherical sandwiched member 10 is B ± ΔB ₁ , the distance between the semiconductor integrated circuit device 5 and the spherical sandwiched member 10 is X, and two spherical sandwiched members. Assuming that the distance between 10 is Y, A and B are almost equal to each other. Therefore, the maximum value θmax of the inclination in the directions of the semiconductor integrated circuit device 5 and the spherical sandwiched member 10 is θmax = tan ⁻¹ ((
A ₁ + B ₁ ) / X), and two spherical clamped members 10
The maximum value of the inclination in the direction θ _b max is θ _b max = tan
^-1 (2B ₁ / Y).

Therefore, the inclination in both directions can be controlled by adjusting the distance X between the semiconductor integrated circuit device 5 and the spherical sandwiched member 10 or the distance Y between the two spherical sandwiched members 10. it can.

Here, since the spherical sandwiched member 10 can be processed with high precision by using a technique such as a bearing,
The distance Y between the two spherical sandwiched members 10 can be made shorter than the distance X between the semiconductor integrated circuit device 5 and the spherical sandwiched member 10.

Thereafter, the other flat plate 7 is placed on the one semiconductor integrated circuit device 5 and the two spherical sandwiched members 10 in a state of being aligned with the one flat plate 7.

At this time, the positioning of the two flat plates 7 is performed by the flat plate positioning member 8. Further, since the ring-shaped guide member 6 is formed slightly lower than the semiconductor integrated circuit device 5, it is not sandwiched between the two flat plates 7.

Further, at least one of the flat plates 7
A load is applied from the outer side surface 7b of the (for example, a weight 11 having an appropriate weight near the center of the outer side surface 7b to which the load is applied).
To place. Note that the sealing load can be adjusted by adjusting the number and weight of the weights 11). As a result, one semiconductor integrated circuit device 5 and two spherical sandwiched members 10 are sandwiched and supported by the two flat plates 7.

Subsequently, one semiconductor integrated circuit device 5 and two spherical sandwiched members 10 for each of the two flat plates 7 (for each sealing jig) are inserted into the reflow furnace 9, and the semiconductor integrated circuit device 5 is mounted. By heating, the solder preform 4 is melted and each cap 3 is joined to the substrate 2.

This completes the sealing.

In the second embodiment, the case where two flat plates 7 sandwich one semiconductor integrated circuit device 5 and two spherical sandwiched members 10 for sealing has been described. If the total number of members to be supported is three, only three semiconductor integrated circuit devices 5 may be sandwiched between the two members.
One semiconductor integrated circuit device 5 and one spherical held member 1
Sealing may be performed by sandwiching 0.

Next, according to the sealing method, the jig, and the semiconductor manufacturing apparatus using the same of the second embodiment, the following effects can be obtained.

That is, by making the sandwiched member 10 which is a constituent member of the sealing jig according to the second embodiment spherical,
The contact area between the flat plate 7 and the held member 10 can be reduced.

As a result, the inclination of the semiconductor integrated circuit device 5 can be controlled with higher accuracy.

Further, by making the two flat plates 7 which are the constituent members of the sealing jig T-shaped, the area of the flat plate 7 can be reduced.

As a result, it is possible to reduce the heat capacity required to heat the two flat plates 7 together during sealing, and as a result, it is possible to save energy in the semiconductor manufacturing apparatus using the sealing jig. Can be planned.

Since the sealing method and the jig of the second embodiment and other effects obtained from the semiconductor manufacturing apparatus using the same are the same as those described in the first embodiment, duplicate description thereof will be omitted. Omit it.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the embodiments and various modifications can be made without departing from the scope of the invention. Needless to say.

For example, in the first embodiment, the case where three semiconductor integrated circuit devices are sandwiched between two flat plates for sealing has been described, but at least one of the three in total may be a semiconductor integrated circuit device. For example, the other one or two members may be the held member as described in the second embodiment, and the held member used in that case may be a spherical member or a block gauge such as a prism. Or may be a spacer or the like.

Further, the reflow furnace installed in the semiconductor manufacturing apparatus described in Embodiments 1 and 2 may be an infrared reflow furnace or a hot air type reflow furnace using hot air as a heat source. It may be a reflow furnace.

The sealing method and jig according to the present invention, and the semiconductor manufacturing apparatus using the same can also be used when a radiation fin or the like is attached to a semiconductor integrated circuit device which is an example of an electronic component. That is, the radiation fins can be attached to the main body of the semiconductor integrated circuit device with high precision, and conversely, the radiation fins can be attached with a predetermined inclination.

In the first and second embodiments, the MCC type semiconductor integrated circuit device is taken up as an example of the electronic component, but the electronic component may be a semiconductor integrated circuit device in which a semiconductor element is sealed with solder. For example, it may be of another type and may be an electronic component such as a resistor or a capacitor, not limited to the semiconductor integrated circuit device.

[0094]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows.
It is as follows.

(1). Three electronic components having a solder preform disposed between a substrate on which a semiconductor element is mounted and a sealing member bonded to the substrate are sandwiched between two flat plates and supported, and the three electronic components are mounted together with the flat plates. By heating, the solder preform is melted and the sealing member is joined, so that the electronic component is placed between two flat plates, and
It can be supported by location.

Thus, the arrangement distance of the three electronic components can be freely set within the flat plate, and as a result, the inclination of the electronic components can be controlled with high accuracy.

(2). The flat plate, which is a constituent member of the sealing jig, has a simple shape and thus is easy to process. As a result, it is possible to form a highly accurate flat plate, and the inclination of the electronic component can be made even more highly accurate.

(3). Since the sealing jig has the guide member that surrounds the outer peripheral portion of the electronic component and the two flat plates, the number of corners in which foreign matter accumulates is small. As a result, the amount of foreign matter accumulated can be reduced.

(4). Since the sealing jig is a combination of the guide member and the two flat plates, the guide member and the two flat plates can be divided. Thereby, the maintenance of the sealing jig can be easily performed.

Therefore, it is possible to reduce the adverse effect of foreign matter on the electronic components, and as a result, the yield of the electronic components can be improved.

(5). By making the sandwiched member, which is a component of the sealing jig, spherical, the contact area with the flat plate can be reduced.

As a result, the inclination of the electronic component can be controlled with higher accuracy.

(6). By making the flat plate, which is a component of the sealing jig, T-shaped, the area of the flat plate can be reduced.

As a result, it is possible to reduce the heat capacity required to heat the two flat plates together at the time of sealing, and as a result, it is possible to save energy in the semiconductor manufacturing apparatus using the sealing jig. be able to.

(7). A semiconductor manufacturing apparatus using a sealing jig is equipped with a reflow furnace that heats electronic parts and melts a solder preform. The electronic component can be sealed only by housing.

[Brief description of drawings]

FIG. 1 is a plan view showing an embodiment of the structure of a sealing jig according to the present invention.

FIG. 2 is a side view showing an embodiment of the structure of the sealing jig according to the present invention.

FIG. 3 is a partially enlarged sectional view showing an embodiment of the structure of the sealing jig according to the present invention.

FIG. 4 is an enlarged perspective view showing an embodiment of the structure of the ring-shaped guide member of the sealing jig according to the present invention.

FIG. 5 is a structural conceptual view showing an example of the structure of a semiconductor manufacturing apparatus using a sealing jig according to the present invention.

FIG. 6 is a plan view showing an example of the structure of a sealing jig that is another embodiment of the present invention.

FIG. 7 is a side view showing an example of the structure of a sealing jig that is another embodiment of the present invention.

FIG. 8: MC for sealing using the sealing jig according to the present invention
FIG. 4 is a partial cross-sectional view showing an example of the structure of a C type semiconductor integrated circuit device by partially breaking away.

[Explanation of symbols]

1 Semiconductor element 2 substrates 3 Cap (sealing member) 4 Solder preform 5 Semiconductor integrated circuit devices (electronic components) 6 Ring-shaped guide member (guide member) 6a Ring part 7 flat plate 7a inner surface 7b outer surface 8 Flat plate positioning member 9 reflow furnace 10 sandwiched member 10a Guide for clamped member 11 weights 12 electrodes 13 Solder bump 14 Sealing solder 15 Metallized layer 16 Internal wiring

─────────────────────────────────────────────────── ─── Continuation of the front page (56) References JP-A-58-73137 (JP, A) Fukukaihei 5-1240 (JP, U) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 25/00-25/18

Claims (9)

(57) [Claims] 1. A method of encapsulating a semiconductor element using solder, comprising three electronic components in which a solder preform is arranged between a substrate on which the semiconductor element is mounted and an encapsulating member bonded to the substrate. , The electronic parts are supported by being sandwiched between two flat plates while being guided by a guide member that surrounds the outer periphery of each electronic part, and by heating the three electronic parts together with the flat plates, the solder preforms are melted and sealed. A sealing method comprising joining a stop member. 2. A method of encapsulating a semiconductor element using solder, which comprises three electronic components in which a solder preform is arranged between a substrate on which the semiconductor element is mounted and a sealing member bonded to the substrate. , Guided by one guide plate of the two flat plates by a guide member surrounding the outer peripheral portion of each electronic component, and aligned with the one flat plate, the other flat plate on the three electronic components Is placed, and a load is applied from the outer surface of at least one of the flat plates to sandwich and support the three electronic components between the two flat plates, and by heating the three electronic components together with the flat plate, A sealing method comprising melting the solder preform and joining the respective sealing members. 3. A method for sealing a semiconductor element using solder, comprising: a single electronic component having a solder preform arranged between a substrate on which the semiconductor element is mounted and a sealing member bonded to the substrate. The two sandwiched members that are guided to one of the two flat plates by the guide member that surrounds the outer peripheral portion of the electronic component and that have substantially the same height as the electronic component and have high heat resistance are provided. Guide on one flat plate, and place the other flat plate on the one electronic component and the two held members in a state of being aligned with the one flat plate, and at least one of the flat plates By applying a load from the outer side surface, one electronic component and two sandwiched members are supported by being sandwiched between two flat plates, and the electronic components are heated together with the flat plates to melt the solder preform. Before Sealing method characterized by bonding the sealing member. 4. A method of encapsulating a semiconductor element using solder, comprising two electronic components in which a solder preform is arranged between a substrate on which the semiconductor element is mounted and an encapsulating member bonded to the substrate. A single sandwiched member that is guided to one of the two flat plates by a guide member that surrounds the outer peripheral portion of the electronic component and that has substantially the same height as the electronic component and has high heat resistance. One flat plate is guided, and the other flat plate is placed on the two electronic components and one sandwiched member while being aligned with the one flat plate, and at least one of the flat plates is placed. By supporting the two electronic components and one sandwiched member by sandwiching them between two flat plates by applying a load from the outer side surface, and heating the electronic components together with the flat plates, the solder preform is melted. Before Sealing method characterized by bonding the sealing member. 5. A sealing jig for sealing a semiconductor element using solder, wherein a solder preform is arranged between a substrate on which the semiconductor element is mounted and a sealing member bonded to the substrate. And a guide member that surrounds and guides the outer peripheral portion of the electronic component and that has a height slightly lower than the height of the electronic component, and two flat plates that sandwich and support the three electronic components that are guided by the guide member. And a heating jig for heating the three electronic components together with the flat plate, whereby the solder preform is melted and the respective sealing members are joined together. 6. A sealing jig for sealing a semiconductor element using solder, wherein a solder preform is arranged between a substrate on which the semiconductor element is mounted and a sealing member bonded to the substrate. A guide member that surrounds and guides the outer peripheral portion of one or two electronic components and that has a height slightly lower than the height of the electronic components; and a height that is substantially the same as the height of the electronic components and that has high heat resistance. One or two clamped members each having: and two flat plates that sandwich and support a total of three electronic components and clamped members from the one or two electronic components and the clamped members. A sealing jig, wherein the solder preform is melted and the respective sealing members are joined by heating one or two electronic components together with the flat plate. 7. The sealing jig according to claim 6, wherein the held member has a spherical shape. 8. The sealing jig according to claim 5, 6 or 7, wherein the flat plate is T-shaped. 9. A semiconductor manufacturing apparatus using the sealing jig according to claim 5, 6, 7 or 8, wherein a reflow furnace for heating the electronic component to melt the solder preform is installed. Semiconductor manufacturing equipment characterized by the fact that