JP3398819B2 - AGC circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an AGC circuit,
In particular, it relates to improvement of an AGC detection circuit for AGC detecting a demodulated signal in order to perform AGC control in a QPSK demodulator.

[0002]

QP for demodulating a QPSK modulated signal
As an AGC detection circuit for performing AGC control in an SK demodulator, generally, a configuration has been proposed in which a QPSK demodulation signal is AGC detected and an AGC detection signal is output via an averaging circuit. For example, FIG. 3 shows Japanese Patent Laid-Open No. 10-341.
This is the technique described in Japanese Patent No. 267. Multi-valued Q here
This is an example in which the AM demodulator is configured as AGC control. However, after the input multilevel QAM signal is gain-adjusted by the first gain adjustment circuit 101, the orthogonal demodulation signal (I Signal and Q signal), and the amplitude and phase are adjusted by the second and third gain adjusting circuits 103 and 104, respectively, and the phase correction circuit 105 whose phase is controlled based on the phase error obtained by the carrier demodulation circuit 106. The adjusted orthogonal demodulated signal is obtained at the output end. In addition, the level determination circuit 1 outputs the orthogonal demodulated signals.
07 and 108 perform level determination, the phase reverse correction circuit 109 performs phase correction in the opposite direction to the phase correction in the phase correction circuit 105, and the averaging circuit 110 calculates an average of these. Is input to the first gain adjusting circuit 101 to realize AGC control.

When such an AGC circuit is applied to a QPSK demodulator, the level judgment circuits 107 and 108 are used.
Is configured as an AGC detection circuit. For example, a synchronous detector is used as this AGC detection circuit. In this way, by constructing the QPSK demodulator having the AGC circuit configuration in which the phase-inverse correction is performed after the AGC detection of the orthogonal demodulated signal and the average addition output is subjected to the gain adjustment in the gain adjustment circuit, the AGC detection signal is obtained. This is effective in removing the included AC signal.

[0004]

However, in this technique, since the signal after QPSK demodulation is directly AGC-detected, there is a problem that the harmonics generated during AGC detection remain without being removed. . In the conventional example, an averaging circuit such as an LPF is used to remove such harmonics. However, a significant signal delay occurs in the averaging circuit, particularly in the LPF, so that AGC control having high-speed response is realized. There is a problem of becoming an obstacle. Furthermore, LPF
There is also a problem that it is difficult to set the cutoff frequency because the amount of harmonic attenuation is determined by setting the cutoff frequency. Further, in order to perform AGC detection on each of the orthogonal demodulated signals, two independent AGC detection circuits as described above are required, and a phase reverse correction circuit for controlling the reverse phase of each AGC detection circuit and averaging are also provided. There is also a problem that a circuit is required and the circuit scale increases.

A main object of the present invention is to provide an AGC circuit capable of performing AGC control with a high-speed response, without generating a harmonic at the time of AGC detection of a QPSK demodulated signal.

[0006]

According to the present invention, an input Q is input.
A gain adjustment circuit for adjusting the gain of the PSK modulation signal, a first QPSK demodulation circuit for QPSK demodulating the QPSK modulation signal and outputting an I signal and a Q signal, and an AGC for performing gain adjustment in the gain adjustment circuit. An AGC circuit including an AGC detection circuit for obtaining a detection signal,
The AGC detection circuit is 90 degrees in phase with the QPSK signal.
A second QPSK demodulation circuit for QPSK demodulating different signals to obtain an I ′ signal and a Q ′ signal, and the I signal, the Q signal,
It is provided with four squaring circuits for squaring the I ′ signal and the Q ′ signal, and an adding circuit for adding the outputs of the four squaring circuits, and outputting the output of the adding circuit as the AGC detection signal. Characterize.

A preferred embodiment of the present invention is, for example,
Phase shift of QPSK modulated signal into 0 degree signal and 90 degree signal 9
A 0 degree phase shift circuit is provided, and the 0 degree phase shift signal output from the 90 degree phase shift circuit is input to the first QPSK demodulation circuit, and the 90 degree phase shift circuit outputs the 90 degree phase shift signal. The phase signal is input to the second QPSK demodulation circuit. The first QPSK demodulation circuit includes a local oscillation circuit that generates a local signal to be supplied to each mixer, a 0-degree phase shift signal and a 90-degree phase shift signal of the local signal output from the local oscillation circuit. The first QPS
Equipped with a local 90-degree phase shift circuit for supplying to the K demodulation circuit,
The 0-degree phase shift signal and the 90-degree phase shift signal of the local signal are input to the second QPSK demodulation circuit.

Specifically, each of the first QPSK demodulation circuit and the second QPSK demodulation circuit includes an I mixer and a Q mixer, and the I mixer of the first QPSK demodulation circuit includes the QPSK modulation. The 0-degree phase-shifted signal of the signal and the 0-degree phase-shifted signal of the local signal are transferred to the Q mixer of the first QPSK demodulation circuit by the 0-degree phase-shifted signal of the QPSK modulated signal and the 90-degree phase-shifted signal of the local signal. The I-mixer of the second QPSK demodulation circuit receives the 90-degree phase-shifted signal of the QPSK modulated signal and the 0-degree phase-shifted signal of the local signal, and the Q-mixer of the second QPSK demodulation circuit receives the signal. Q
The 90-degree phase-shifted signal of the PSK modulation signal and the 90-degree phase-shifted signal of the local signal are respectively input, and a signal obtained by multiplying each signal by each mixer is output.

According to the AGC circuit of the present invention, the input QPSK modulation signal is phase-shifted by 90 degrees by the 90-degree phase shift circuit, and the QPSK modulation signal is QPSK by the 0-degree phase shift signal.
In addition to obtaining the demodulated signal, the AGC detection circuit
QPSK demodulation is performed with the 90-degree phase-shifted signal of the PSK modulation signal, and the obtained four signals after QPSK demodulation are each squared and added to obtain an AGC detection signal. Therefore, A
It is possible to prevent generation of higher harmonics in the GC detection signal due to the modulation signal or the local signal, and to eliminate the need for a plurality of AGC detection circuits, phase reverse correction circuits, and averaging circuits, thus simplifying the circuit configuration.

[0010]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block circuit diagram of an AGC circuit of the present invention. This AGC circuit uses the input QPS
A gain adjustment circuit 1 that adjusts the gain of a K modulation signal, a 90-degree phase shift circuit 2 that outputs a gain-adjusted QPSK modulation signal as in-phase (0 degrees) and quadrature (90 degrees) phase signals, and A QPSK demodulation circuit (first QPSK demodulation circuit) 3 that demodulates a phase signal and outputs orthogonal QPSK demodulation signals (I signal, Q signal), and AGC detection of the QPSK demodulation signal and AGC detection of the gain adjustment circuit. The AGC detection circuit 4 for adjusting the gain is provided.

FIG. 2 is a circuit diagram showing an example of each circuit of FIG. Referring to FIG. 2, the QPSK demodulation circuit 3 is
The first I mixer 11 and the first I mixer 11 to which the QPSK modulated signal of 0 degree phase shift output from the 90 degree phase shift circuit is input, respectively.
A local oscillator circuit 13 that includes a Q mixer 12 and outputs a local signal of a required frequency, and a local 90-degree shift signal that outputs the local signal in phases of 0 degree and 90 degrees and that is input to each of the mixers 11 and 12. The phase circuit 14 is provided. Then, I which is the QPSK demodulated signal demodulated by the first I mixer 11 and the first Q mixer 12, respectively.
A signal and a Q signal are output from the output terminals 15 and 16.

On the other hand, the AGC detection circuit 4 uses the 90
A second I mixer 21 and a second Q mixer 22 to which the 90-degree phase-shifted QPSK modulated signals output from the phase shift circuit 2 are respectively input are provided, and these constitute a second QPSK demodulation circuit 20. Each of the mixers 21 and 22 has 0 degree and 9 degrees from the local 90 degree phase shift circuit 14, respectively.
A local signal phase-shifted by 0 degree is input. In addition, a first I-square circuit 23 and a first Q-square circuit 24 that square the I signal and the Q signal, which are the QPSK demodulated signals, respectively.
And a second I-square circuit 25 and a second Q-square circuit 26 for squaring the I ′ signal and the Q ′ signal output from the second I mixer 21 and the second Q mixer 22, respectively. Further, there is provided an adder circuit 27 for adding the respective multiplication outputs of the first I square circuit 23, the first Q square circuit 24, the second I square circuit 25, and the second Q square circuit 26.
Is added to the gain adjustment circuit 1 as the AGC detection output of the AGC detection circuit 4.

According to the above configuration, the QPSK modulation signal V
When in is input to the gain adjustment circuit 1, here AGC
Gain adjustment is performed according to the detection output, and the QPSK modulation signal adjusted to the required gain is input to the 90-degree phase shift circuit 2. In the 90-degree phase shift circuit 2, the QPSK modulation signal 0
Degree phase shift signal and 90 degree phase shift signal are output, but only the 0 degree phase shift signal is input to the QPSK demodulation circuit 3 and Q
The signals are input to the first I mixer 11 and the first Q mixer 12 in the PSK demodulation circuit 3, respectively. On the other hand, the local oscillator circuit 1
The local signal generated in 3 is output as a 0 degree phase shifted local signal and a 90 degree phase shifted local signal in the local 90 degree phase shifting circuit 14, and the 0 degree phase shifted local signal is shifted to the first I mixer 11 by 90 degrees. Phase local signal is the 1st Q mixer 1
Entered in 2. As a result, the first I mixer 11 and the first I mixer 11
In the Q mixer 12, the QPSK modulated signal and the local signal are respectively multiplied to perform QPSK demodulation, and the demodulated I signal and Q signal are output from the QPSK demodulation circuit 3 to the output terminals 15 and 16, respectively.

On the other hand, in the AGC detection circuit 4, 9 out of the QPSK modulation signals output from the 90-degree phase shift circuit 2 are used.
Only the 0 degree phase shift signal is input, and the second QPSK
The signals are input to the second I mixer 21 and the second Q mixer 22 that form the demodulation circuit 20. Further, the 0-degree phase-shifting local signal and the 90-degree phase-shifting local signal are input from the local 90-degree phase shifting circuit 14 to the second I mixer 21 and the second Q mixer 22, respectively. As a result, the second I mixer 21
And the second Q mixer 22 demodulates the QPSK signal phase-shifted by 90 degrees, and outputs the demodulated I ′ signal and Q ′ signal, respectively.

Further, in the AGC detection circuit 4, the first
The I signal from the I mixer 11 is squared in the first I square circuit 23, and the Q signal from the first Q mixer 12 is squared in the first Q square circuit 24. Similarly, the I ′ signal from the second I mixer 21 is squared in the second I squaring circuit 25, and the Q ′ from the second Q mixer 22 is also used.
The signal is squared in the second Q-square circuit 26. And
The signals squared by these squaring circuits are added in an adding circuit 27, which is supplied to the level adjusting circuit 1 as the AGC detection signal to execute the level adjustment of the QPSK signal.

Among the above operations, the operation of the AGC detection circuit 4 will be described in detail. Now QP as input signal
When the SK modulation signal is Vin and Vin = Asin ω1t, the 0-degree phase shift signal of the 90-degree phase shift circuit 2 is Vin-0 = Asin ω1t.

On the other hand, when the local signal of the local oscillator circuit 13 is VLOC and VLOC = Bsinω2t, the local signal 0 from the 90 ° phase shift circuit 14 is set.
Degree phase shift signal VLOC-0 becomes VLOC-0 = Bsinω2t, and the 90 degree phase shift signal VLOC-90 from the local 90 degree phase shift circuit 14 becomes VLOC-90 = Bcosω2t.

Therefore, the first I of the QPSK demodulation circuit 3 is
In the mixer 11 and the first Q mixer 12, Vin-0 respectively
Since VLOC-0 and VLOC-90 are multiplied by, each mixer 1
I signal (Iout) and Q signal (Qout), which are QPSK demodulated signals output from 1 and 12, have the following (1),
Equation (2) is obtained. Iout = A / B / sinω1t / sinω2t ... (1) Qout = A / B / sinω1t / cosω2t ... (2)

The AGC detection circuit 4 is also supplied with the 90-degree phase shift signal Vin-90 of the QPSK modulation signal Vin. This 90-degree phase shift signal Vin-90 is Vin-90 = A
cos ω1t. Then, this 90-degree phase shift signal Vi
n-90 is the 0 ° phase shift signal VLO of the local signal in the second I mixer 21 and the second Q mixer 22, respectively.
Since it is multiplied by C-0 and VLOC-90, each mixer 21, 2
The I ′ signal (Iout ′) and the Q ′ signal (Qout ′) output from 2 are given by the following equations (3) and (4). Iout '= A ・ B ・ cosω1t ・ sinω2t ... (3) Qout' = A ・ B ・ cosω1t ・ cosω2t ... (4)

4 outputs Iout after the above QPSK demodulation,
Qout, Iout ', and Qout' are the first I
Square circuit 23, first Q square circuit 24, second I square circuit 2
5, squared in the 2nd Q-square circuit 26, and
The expression (8) is obtained. Iout ² = A ² · B ² · sin ² ω1t · sin ² ω2t (5) Qout ² = A ² · B ² · sin ² ω1t · cos ² ω2t… (6) Iout ′ ² = A ² · B ² · cos ² ω1t · sin ² ω2t ... (7) Qout ′ ² = A ² · B ² · cos ² ω1t · cos ² ω2t… (8)

Further, when the outputs of the respective squaring circuits 23 to 26 are added in the adding circuit 27, the added AGC is performed.
The detection output Vdet is expressed by equation (9). Vdet = Iout ² + Qout ² + Iout ′ ² + Qout ′ ² = A ² · B ² · sin ² ω1t (sin ² ω2t + cos ² ω2t) + A ² · B ² · cos ² ω1t (sin ² ω2t + cos ² ω2t) = A ² · B ² (sin ² ω1t + cos ² ω1t) = A ² · B ²

As described above, the AGC detection output output from the AGC detection circuit 4 is the product of the square of the amplitude A of the QPSK modulated signal and the square of the amplitude B of the local signal. In other words, it is possible to obtain a pure AGC detection output that does not depend on the frequencies of the QPSK modulation signal and the local signal. As a result, the higher harmonic signal at the time of AGC detection is not included in the AGC detection output as in the conventional case, and the AGC control with high-speed response becomes possible. Further, the AGC detection circuit includes two mixers that perform demodulation by using the local signal input to the QPSK demodulation circuit as it is, a circuit that squares the I signal and the Q signal that are QPSK demodulation signals, respectively.
Since it can be configured by a circuit that squares the I ′ signal and the Q ′ signal that are demodulation signals of the 90 ° phase shift signal of the QPSK modulated signal, and an adder circuit that adds the squared outputs of these signals, the conventional circuit shown in FIG. Such a phase shift reverse correction circuit and an averaging circuit are unnecessary, and the circuit can be simplified.

Needless to say, the present invention is not limited to the configuration of the above-described embodiment, and various modifications can be made within the scope of the technical idea of the present invention. In particular, in the above-described embodiment, the description of the concrete circuit configurations of the mixer, the local oscillator circuit, the 90-degree phase shift circuit, the square circuit, and the adder circuit applied to the demodulation circuit and the AGC circuit is omitted. It is possible to employ a mixer, an oscillator circuit, a phase shift circuit, a square circuit, and an adder circuit having various circuit configurations that are currently known.

[0024]

As described above, according to the AGC circuit of the present invention, the QPSK demodulated signal is obtained by the 0-degree phase shift signal of the inputted QPSK modulated signal, and the AGC detection circuit obtains 90% of the QPSK modulated signal. QPSK with phase shift signal
Since the AGC detection signal is obtained by performing demodulation and squaring each of these four signals after QPSK demodulation and adding them, it is possible to prevent generation of harmonics due to the modulation signal or the local signal in the AGC detection signal. At the same time, a plurality of AGC detection circuits, a phase reverse correction circuit, and an averaging circuit are unnecessary, and the circuit configuration can be simplified.

[Brief description of drawings]

FIG. 1 is a block circuit diagram of an embodiment of an AGC circuit of the present invention.

FIG. 2 is a circuit diagram showing details of a QPSK demodulation circuit and an AGC detection circuit in the AGC circuit of FIG.

FIG. 3 is a circuit diagram of an example of a conventional AGC circuit.

[Explanation of symbols]

1 Gain adjustment circuit 2 90 degree phase shift circuit 3 QPSK demodulation circuit (first QPSK demodulation circuit) 4 AGC detection circuit 11 1st I mixer 12 1st Q mixer 13 Local signal oscillator 14 Local 90 degree phase shift circuit 15, 16 output terminals 20 Second QPSK demodulation circuit 21 second I mixer 22 2nd Q mixer 23 First I Square Circuit 24 1st Q-square circuit 25 Second I-square circuit 26 Second Q Square Circuit 27 Adder circuit

─────────────────────────────────────────────────── ─── Continuation of the front page (58) Fields surveyed (Int.Cl. ⁷ , DB name) H04L 27/00-27/38 H03G 3/20

Claims (4)

(57) [Claims] 1. A gain adjusting circuit for adjusting the gain of an input QPSK modulated signal and a QPSK modulated signal for the QPSK modulated signal.
First QPSK that demodulates SK and outputs I and Q signals
An AGC circuit including a demodulation circuit and an AGC detection circuit for obtaining an AGC detection signal for performing gain adjustment in the gain adjustment circuit, wherein the AGC detection circuit is 90 degrees out of phase with the QPSK signal. A second QPSK demodulation circuit for QPSK demodulating a signal to obtain an I ′ signal and a Q ′ signal; four squaring circuits for squaring the I signal, the Q signal, the I ′ signal, and the Q ′ signal respectively; An AGC circuit comprising: an adder circuit that adds outputs of a squaring circuit, and outputs the output of the adder circuit as the AGC detection signal. 2. The QPSK modulated signal is a 0 degree signal and a 90 degree signal.
A 90 degree phase shift circuit that shifts the phase of the 0 degree phase signal to the first QPS signal.
The AGC circuit according to claim 1, wherein the 90-degree phase shift signal output from the 90-degree phase shift circuit is input to the second QPSK demodulation circuit. 3. The first QPSK demodulation circuit includes a local oscillation circuit that generates a local signal to be supplied to each mixer, a 0-degree phase-shifted signal of the local signal output from the local oscillation circuit, and a 90-degree phase shift signal. The phase shift signal is transmitted to the first Q
3. A local 90-degree phase shift circuit for supplying to a PSK demodulation circuit is provided, and the 0-degree phase shift signal and the 90-degree phase shift signal of the local signal are also input to the second QPSK demodulation circuit. The AGC circuit described in 1. 4. The first QPSK demodulation circuit and the second QPSK demodulation circuit.
Each of the QPSK demodulation circuits includes an I mixer and a Q mixer, and the I mixer of the first QPSK demodulation circuit receives the 0 ° phase shift signal of the QPSK modulated signal and the 0 ° phase shift signal of the local signal. A 0 degree phase-shifted signal of the QPSK modulated signal and a 90 degree phase-shifted signal of the local signal are input to the Q mixer of the first QPSK demodulation circuit, and the QPSK modulated signal is input to the I mixer of the second QPSK demodulation circuit. Of the 90 ° phase-shifted signal and the 0-degree phase-shifted signal of the local signal,
The 90-degree phase-shifted signal of the QPSK-modulated signal and the 90-degree phase-shifted signal of the local signal are input to the Q mixer of the QPSK demodulation circuit, and the signal obtained by multiplying each signal is output from each mixer. The AGC circuit according to claim 3, which is characterized in that.