JP2653941B2 - Digital quadrature demodulation circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a quadrature demodulation circuit, and more particularly to a digital quadrature demodulation circuit for performing demodulation processing by digital processing.

[0002]

2. Description of the Related Art Conventionally, as a detection circuit, a superheterodyne system is generally used. As an alternative to this, there is a direct conversion reception system using a quadrature demodulation circuit. According to the direct conversion receiving method, there is an advantage that the circuit configuration can be simplified, and there are few adjustment points and high reliability can be obtained.

In recent years, in particular, there has been an improvement in performance and a reduction in price of a digital signal processor (hereinafter referred to as a DSP) capable of performing complicated filter processing at a high speed. The simplification and the improvement of reliability are achieved. The applicant of the present application
No. 1-273005 proposes a quadrature demodulation circuit which can obtain high reliability with a simple configuration, and FIG. 9 is a diagram showing a basic configuration of the circuit.

In FIG. 9, an oscillation signal from a local oscillation source 11g is mixed with a reception wave by a mixer 3g and, at the same time, the phase is changed by 90 ° by a phase converter 12g.
g mixes with the received wave. Signal from the mixer 2g is the signal * E ₁ of only a predetermined frequency component necessary for demodulation through a band pass filter (BPF) 4g. The same is true for the signal from the mixer 3g, and the BPFs 4g and 5g are usually low-pass filters (LPFs). Two signals * E ₁ and * E
₂ is generally represented by a vector quantity in consideration of the phase component. Here, * represents a vector quantity.

[0005] * E ₁ and * E ₂ are digitally converted by A / D converters 91g and 92g, and then the mean square is obtained by a calculator of 61g to 64g. This is a received wave signal, which is converted into an analog signal by the D / A converter 93g and output. Computing units 61g to 64g are all DSP
In the form of a digital filter. Here, the root-mean-square is calculated by digital processing, but it is of course possible in principle to perform analog processing. However, there is actually a problem in terms of accuracy and the like, and it is necessary to perform digital processing by a DSP.

The circuit shown in FIG. 9 has an advantage that the configuration is simple and can be easily realized. However, in the circuit shown in FIG.
It is necessary that the two paths of the signals * E ₁ and * E ₂ have equal levels and are exactly orthogonal. If the levels of the two paths are different or not orthogonal, distortion will occur in the finally obtained signal. The cause of such a level difference or phase shift is local oscillation 1
There is a shift when the phase of the signal from 1f is changed by 90 °, a difference in characteristics between the LPFs 4f and 5f, and the like.

In any case, if there is a level difference between the two signal paths * E ₁ and * E ₂ or the phase is not 90 °,
Accurate demodulation cannot be performed. Therefore, the square arithmetic units 61g and 6
Before inputting to 2g, the level and phase difference between the two paths are corrected by digital processing.
FIG. 10 is a diagram showing a configuration of a circuit that detects the ratio of the levels of two paths and corrects them so that they have the same level.
The arithmetic unit 7 calculates the absolute values of the signals on the two paths of * E ₁ and * E ₂
It is calculated at 71h and 772h. Since the signal calculated here naturally includes a signal component, LPFs 773h and 77F that pass only frequency components lower than this signal component are passed.
The average of the absolute values of * E ₁ and * E ₂ is calculated in 4 h. This is the level of the two routes. Divider 775h
In calculating the ratio of the two levels, amplified in the multiplier 71h signals * E ₂ routes as the level of the two paths coincide. In this way, the levels of the two paths are kept equal.

Next, correction when the phase difference between the signals of the two paths deviates from 90 ° will be described. The present applicant discloses a quadrature modulation circuit for correcting a phase difference in Japanese Patent Application No. 3-113118, and the circuit will be described as an example. FIG.
1 indicates that the phase difference between the signals * E ₁ and * E ₂ of the two paths is 90 °
FIG. 9 is a diagram showing a relationship in a case where _{θt is} deviated from a two-dimensional manner. To make * E ₂ a vector quantity orthogonal to * E ₁ ,
* Be added E ₂ sin θ _t of the absolute value equal to * E ₁ direction vector in * E _2, perpendicular to the * E ₁ * E ₂₁ is seen to be obtained. However * the size of the E ₂₁ is not equal to the * E _2, it is necessary to obtain a * E ₂₂ performs further magnitude of the correction.

The above-described correction is realized by a circuit shown in FIG. Although a detailed description is omitted here, the multiplier 8
Taking the inner product of vectors * E ₁ and * E ₂ in 31i, the result is a value obtained by multiplying sin [theta _t the product of the absolute value of * E ₁ and * E _2. Of course, since * E ₁ and * E ₂ contain high frequency components, only low frequency components are extracted by the LPF 832i. Since the product of the absolute values of * E ₁ and * E ₂ is output from the adder 63i for calculating the sum of squares, the LPF 84
By obtaining a ratio only by the removed divider 834i low frequency component sin [theta _t it can be calculated by 1i. Constant multiplier 833
i performs coefficient correction. Sin calculated in this way
The multiplier 836i multiplies θ _t by * E ₁ to obtain an adder 835.
By adding i to * E ₂ , * E _{21 in} FIG. 11 is obtained. 83
840i from 7i are partial to correct the * E ₂₁ to * E _22.

[0010]

As shown in FIGS. 10 and 12, the levels of * E ₁ and * E ₂ are matched and the phase is 90 °.
By doing so, a signal without distortion can be reproduced. As shown, these corrections require rather complicated processing, and D
It is practical to use SP. 9 and 11
In the circuit shown in FIG. 7, LPFs 773g, 774g, 8
32h and 841h are used. These low-pass filters need to prevent the modulation components included in the signals * E ₁ and * E _{2 from} being mixed, and the cutoff frequency of the filters needs to be lower than the modulation components. A typical configuration example when a digital filter is formed by a DSP is an infinite impulse filter as shown in FIG. With such a configuration, a sampling frequency of 300
In order to form a filter that can be used in FIGS. 10 and 12 in which the frequency is KHz and the cutoff frequency is 1 Hz, the coefficient of each amplifier needs to be a value as shown in FIG.

It can be seen that in order to realize the coefficient as shown in FIG. 13, the number of significant digits becomes as large as 20. In recent years, the performance of the DSP has been remarkably improved, but it is difficult to completely realize the coefficients as shown in FIG. Even if it could be realized, it would be very expensive. Therefore, in practice, the number of significant digits is reduced, and a part of the coefficients shown in FIG. In other words, the countermeasures are taken out of order. However, if a low-pass filter is realized in this manner, accurate correction cannot be performed, and the output signal will be distorted.

As described above, when a low-pass filter having a cutoff frequency significantly lower than the sampling frequency is formed by digital signal processing to correct a quadrature demodulation circuit, it is difficult to perform accurate correction. There's a problem. SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to realize a quadrature demodulation circuit that enables more accurate correction when quadrature demodulation is performed by digital processing and that can obtain an output with less distortion.

[0013]

In order to solve the above-mentioned problems, the digital quadrature demodulation circuit of the present invention accurately determines whether the signal level is large or small and whether the phase is ahead or behind 90 °. Focusing on the fact that it can be performed, correction is made by a predetermined minute amount based on the determination result. FIG. 1 is a diagram showing a basic configuration of a digital quadrature demodulation circuit according to the present invention. In the drawings relating to all the configurations, the same functional portions are denoted by the same reference numerals, and are denoted by lowercase alphabets in order from FIG.

That is, the digital quadrature demodulation circuit according to the present invention comprises a reference wave generating circuit 1 for generating two reference waves having phases different from each other by 90 °, a first mixer 2 for mixing a received wave and two reference waves, and a second mixer. A first filter 4 and a second filter 5 for passing only predetermined frequency components of respective outputs of the mixer 3, the first mixer 2 and the second mixer 3, and a first filter 4 and a second filter 5 by digital processing; In a digital quadrature demodulation circuit including a demodulation means 6 for calculating a root-mean-square output from the first filter 4 and obtaining a demodulated signal, the absolute values of the intensities of the outputs from the first and second filters 4 and 5 are compared by digital processing, Correction is performed to increase or decrease the intensity of one of the outputs from the first filter or the second filter 5 by a predetermined amount according to the comparison result, and the comparison of the corrected absolute value levels is further performed. It is to repeat the correction to match the absolute value level comprises an absolute value level correction unit 7.

In still another mode, the absolute value level of the intensity of the output from the first filter 4 and the second filter 5 is compared with a reference value, and each is increased or decreased by a predetermined amount according to the comparison result. And an absolute value level correcting means for repeating the correction so as to compare the corrected absolute value level with the reference value and to make the absolute value level coincide with the reference value.

In still another embodiment, a correction is made to advance or delay one of the phases by a predetermined amount depending on whether the phase difference between the outputs of the first filter 4 and the second filter 5 is larger or smaller than 90 °, There is provided a phase difference correction means for further detecting the corrected phase difference and repeating the correction so as to make the phase difference 90 °.

[0017]

[Action] Conventionally, when performing correction of the absolute value level * E ₁ and * to calculate the ratio of the absolute value level of E _2, are amplified or attenuated one of the signals in the ratio.
Similarly, in the case of the phase difference, the phase difference is detected, and the phase is advanced or delayed by the detected phase difference. Therefore, if an error occurs due to the cancellation of the digit, the output was directly affected.

Determination of which of the absolute value levels of * E ₁ and * E ₂ is higher or larger or smaller than the reference value, and whether the phase difference is larger or smaller than 90 ° can be made relatively accurately. . Therefore, correction is performed by a small amount based on the determination result, and if the corrected result is further determined and the correction is repeated, the state gradually approaches a normal state, and thereafter, only changes by the correction amount. If the value is reduced, accurate correction is possible, and a demodulated output without distortion can be obtained. For this reason, even if some of the signal components included in * E ₁ and * E ₂ pass through the low-pass filter, the output does not suddenly be affected. This means that this part also acts as a low-pass filter.

If the deviation is large compared to a single correction amount at the start of the process, it takes a long time to become normal. Since the initial deviation is determined to some extent by the performance of the reference signal generator and the like, the amount of correction at one time is determined in consideration of these performances, the responsiveness of correction, and the allowable distortion rate of the final demodulated signal.

[0020]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The quadrature demodulation circuit can be directly converted into an audible signal by a simple circuit, and therefore is often used for voice radio and the like. Here, an embodiment in which the present invention is applied to voice radio will be described. FIG. 2 is a diagram showing the overall configuration of the embodiment.
In the figure, an oscillation source 11a generates a reference wave having a frequency equal to the carrier frequency of the received wave. Reference numeral 12a denotes a phase shifter for converting the phase of the reference wave into another reference wave whose phase is changed by 90 °. It is necessary that the two reference waves have a phase difference of 90 °, but actually, a slight error occurs in the phase shifter 12a, which causes distortion of the demodulated signal. 2a and 3a are mixers for mixing each of two reference wave received wave, wherein output signal is described above through the LPF4a and 5a for passing only low frequency components * E ₁ and * E It becomes the signal of ₂ .

In the present invention, all demodulation processing is performed by digital processing.
Signal * E ₁And * E_TwoIs A / D
After being digitally converted by the converters 91a and 92a,
Corrected by the correction means 7a and demodulated by the demodulation means 6a
After that, the analog audio signal is converted by the D / A converter 93a.
Is converted. Correction means 7a and demodulation means 6a are all DS
It consists of a digital filter by P100a.
DSP100a is controlled by microcomputer
However, it is not shown here.

Next, an embodiment of the correcting means 7 which is a characteristic part of the present invention will be described. FIG. 3 compares the absolute value levels of the intensity of * E ₁ and * E ₂ , and based on the comparison result, * E 1
FIG. 9 is a diagram showing a configuration of an embodiment for correcting level ₂ ; Absolute value calculator 771b and 772b is outputted to LPF773b and 774b calculates the absolute value of * E ₂₁ and * E _1. *
E ₁ and * E ₂ (* E ₂₁ ) contain signal components,
The signal strength naturally fluctuates. What is corrected is the absolute value level, and only low-frequency components are extracted by the LPFs 773b and 774b. This is equivalent to finding the mean level of * E ₁ and * E _21.

The LPFs 773b and 774b use a filter configuration as shown in FIG. For this reason, an error occurs as described above. However, this error does not pose a problem because only the magnitude determination is performed. Comparator for comparing both the average level E ₁ and E ₂₁ at 775b. When towards E ₁ is large, to select a value for 75b in the switch 74b (1 + a), after multiplied by the multiplier 73b to the coefficients before stored in the delay unit 72b, a multiplier 71b * E ₂ Multiplied by As a result, * E ₂ is amplified by an amount corresponding to the value of a to become * E ₂₁ . And this * E ₁ and * E ₂₁ is Kaee repeated until consistent.

At the start of the operation, 1 is stored in the delay unit 72b. For example the correction amount continuously as the correction value (1 + a) to the the selected * E ₂ is a power of (1 + a). Since a is very small compared to 1, (1 + na) becomes the correction amount substantially at the n-th time. If a is set small, precise correction is possible, but only gradually.

Conversely, when attempting to perform a precise correction by making a very small, the change in the correction amount is 1+ in the circuit of FIG.
Since a is determined by a or a in 1-a, a must be a very small value. However, when a floating point operation is performed by the DSP, since the stored value is 1 + a or 1-a, if a is made much smaller than 1, multiplication to * E ₂ will cause a digit drop. Therefore, the circuit shown in FIG. 4 is slightly more complicated than the circuit shown in FIG.

In FIG. 4, what is stored is + a and -a, and either of them is selected by a switch, and the adder 73c adds it to the previous correction amount stored in the delay unit 72c.
After the product of this value and * E ₂ is calculated by the multiplier 71c, the adder 70c corrects it by adding it to * E ₂ . In this case, digit drop is less likely to occur. As described above, the digital operation circuit shown in FIG. 3 is actually realized using a DSP. FIG. 5 shows a processing procedure for performing the arithmetic circuit of FIG. 3 by the DSP. In step 101, * E ₂ is multiplied by b. At the start, b is 1. In step 102 *
The absolute value of E _1, performs further low-pass processing shown in FIG. 12 (low pass filtering) to calculate the absolute value level E ₁ of * E _1. In step 103 similarly calculates the absolute value level E ₂₁ of * E _21. Step 1
The magnitude of 04 the E ₁ and E ₂₁ are compared, and the b in step 105 if is larger in E ₁ is increased in the (1 + a) times, b in at is less if step 106 towards E ₁ (1-
a) Multiply and reduce. Then, the process returns to step 101, and the above processing is repeated. Thus, the absolute value levels of * E ₁ and E ₂₁ are corrected so as to match.

In the embodiment shown in FIG. 3, correction is made so that both absolute value levels coincide with each other. However, when the signal level is determined to some extent, a certain reference value is set and both absolute value levels are set to this reference value. It is also possible to match both levels by matching. FIG. 6 is a diagram showing the configuration of such an embodiment. Compared to FIG. 3, the comparators 776d and 777d
The two there, and compares the absolute value level and stored reference values to 778d respectively * E ₂₁ and * E _1, and feedback on each system in accordance with the comparison result. By performing correction so as to match the reference value in this way, not only both absolute value levels match but also always match the reference value, so that it also functions as automatic gain control.

Next, a deviation of the phase difference from 90 ° is corrected.
FIG. 7 shows the configuration of the embodiment. * E in multiplier 818e₁When*
E_{twenty one}Calculate the inner product of the low-frequency component only with LPF819e
Take out. The dot product of the vector is 0 when forming 90 °
If it is smaller than 90 °, it will be positive.
Become negative. Therefore, this value is compared with the reference value of zero by the comparator 8.
Whether the phase difference is larger or smaller than 90 ° compared with 20e
Is determined. Also in this case, the LPF 819e is shown in FIG.
Error due to the number of significant digits
However, there is no problem in determining whether it is positive or negative. This judgment
According to the result, switch + 815e selects + a or -a,
The sum with the previous value stored in the delay unit 813e is added to the adder 8
Calculate at 14e. This sum corrects for the sin α of the angle α
Equal. This sinα and * E₁Is multiplied by a multiplier 812e
, And * E in adder 81d. _TwoAdd to

At the start of the process, 0 is stored in the delay unit 813e, and + a continues until the phase shift amount is reached.
Alternatively, when -a is selected, the correction amount is accumulated by the number of times of correction. As shown in FIG. 11, the phase difference between * E ₁ and * E ₂ is 9
When the absolute value of * E ₁ and * E ₂ is equal when shifted from 0 ° by θ _t, * E ₂₁ obtained by adding * E ₁ sin θ _t to * E ₂ becomes * E ₁ and 90 ° Phase difference. However theta _t is negative the larger than 90 °. Here, since the correction angle amount is α, θ _t is equal to α.

As is clear from FIG. 11, * E ₂ is replaced by * E ₁
When added to correct sin theta _t the phase difference to be 90 °, the absolute value of the resultant * E ₂₁ by the correction is smaller than * E _2. To correct this minute, the ratio of the absolute value of * E ₂ and * E ₂₁ is focused to a cos [theta] _t, the adder 81
Calculate cosα from sinα obtained in 4e. First calculate the sin ² alpha squared calculator 94e, this calculator 95e
After subtracting from 1, the square root calculator 96e calculates cos α. Allows the absolute value of the correction if dividing * E ₂₁ in cosα in divider 97 d.

Although the above correction is a circuit for correcting the absolute value level and the phase difference, both corrections are actually required. FIG. 8 is an example of such a circuit. In this circuit, as shown, * E ₁ and * E _{2 in} the circuit of FIG.
Is corrected to a predetermined absolute value level, and then the phase difference is corrected by the circuit of FIG. The error caused by this phase correction is corrected by the last circuit. This correction may be performed for only * E _2.

In the circuit of FIG. 8, the absolute value level is corrected before the phase correction, and the absolute value level is corrected by the phase correction after the phase correction. However, if the phase correction is performed first, the absolute value level is corrected. The correction only needs to be performed once, which simplifies the circuit. However, if the absolute value level is corrected before the phase correction, the accuracy of the phase correction is improved.

[0033]

According to the present invention, a digital quadrature demodulation circuit capable of performing reproduction with less distortion can be realized.

[Brief description of the drawings]

FIG. 1 is a diagram showing a basic configuration of a digital quadrature demodulation circuit of the present invention.

FIG. 2 is a diagram showing an overall configuration of an embodiment of the present invention.

FIG. 3 is a diagram showing a configuration of an embodiment for performing correction for matching absolute value levels.

FIG. 4 is a diagram illustrating another example of a circuit for correcting an absolute value level;

FIG. 5 is a flowchart illustrating a processing example for performing a comparison process in FIG. 3 by a DSP;

FIG. 6 is a diagram showing a configuration of an embodiment for correcting an absolute value level so as to match a reference value.

FIG. 7 is a diagram showing a configuration of an embodiment for correcting a phase difference.

FIG. 8 is a diagram showing a configuration of an embodiment that corrects both the absolute value level and the phase difference.

FIG. 9 is a diagram showing a conventional digital quadrature demodulation circuit.

FIG. 10 is a diagram showing a circuit example for correcting the absolute value level of the circuit of FIG. 9;

11 is a vector diagram showing an occurrence of an error due to a phase difference in the circuit of FIG.

12 is a diagram illustrating a circuit example for correcting a phase difference in the circuit of FIG. 9;

FIG. 13 is a diagram showing a configuration example of a digital low-pass filter used in the circuits of FIGS. 10 and 12;

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 ... Reference wave generation circuit 2 ... First mixer 3 ... Second mixer 4 ... First filter 5 ... Second filter 6 ... Demodulation means 7 ... Absolute value level correction means

Claims (4)

(57) [Claims] 1. A reference wave generating circuit (1) for generating two reference waves having a phase difference of 90 °, a first mixer (2) and a second mixer (2) for mixing a received wave and the two reference waves, respectively. 3) a first filter (4) and a second filter (5) that pass only predetermined frequency components of the respective outputs of the first mixer (2) and the second mixer (3), and digital processing In a digital quadrature demodulation circuit including a demodulation means (6) for calculating a root-mean-square of the outputs from the first filter (4) and the second filter (5) to obtain a demodulated signal, 4) is compared with the absolute value level of the intensity of the output from the second filter (5), and the intensity of one of the outputs from the first filter (4) or the second filter (5) is determined according to the comparison result. Is increased or decreased by a predetermined amount. A digital quadrature demodulation circuit comprising absolute value level correction means (7) for repeating the correction so that the corrected absolute value levels are further compared to match the absolute value levels. 2. A reference wave generating circuit (1) for generating two reference waves having a phase difference of 90 °, a first mixer (2) and a second mixer (2) for mixing a received wave and the two reference waves, respectively. 3) a first filter (4) and a second filter (5) that pass only predetermined frequency components of the respective outputs of the first mixer (2) and the second mixer (3), and digital processing In a digital quadrature demodulation circuit including a demodulation means (6) for calculating a root-mean-square of the outputs from the first filter (4) and the second filter (5) to obtain a demodulated signal, 4) and the absolute value level of the intensity of each output from the second filter (5) is compared with a reference value, and the first filter (4) and the second filter (5) are compared according to the comparison result. Increase or decrease output intensity by a predetermined amount Digital orthogonal correction means for performing correction, comparing the absolute value level after correction with the reference value, and repeating the correction so as to make the absolute value level coincide with the reference value. Demodulation circuit. 3. A reference wave generating circuit (1) for generating two reference waves having a phase difference of 90 °, a first mixer (2) and a second mixer (2) for mixing a received wave and the two reference waves, respectively. 3) a first filter (4) and a second filter (5) that pass only predetermined frequency components of the respective outputs of the first mixer (2) and the second mixer (3), and digital processing In a digital quadrature demodulation circuit including a demodulation means (6) for calculating a root-mean-square of the outputs from the first filter (4) and the second filter (5) to obtain a demodulated signal, 4) and the phase of the output from the second filter (5) is corrected, and the phase difference between the corrected output of the first filter (4) and the output of the second filter (5) is 90 °. a predetermined amount of phase correction amount depending on whether larger or smaller than Only increase or complement to reduce
Repeated positive, complement said first filter (4) and the output of the second filter (5) so that the phase difference of that is 90 °
Digital quadrature demodulation circuit comprising: a phase difference correction means positive for. 4. A reference wave generating circuit (1) for generating two reference waves having phases different by 90 °, a first mixer (2) and a second mixer (2) for mixing a received wave and the two reference waves, respectively. 3) a first filter (4) and a second filter (5) that pass only predetermined frequency components of the respective outputs of the first mixer (2) and the second mixer (3), and digital processing In a digital quadrature demodulation circuit including a demodulation means (6) for calculating a root-mean-square of the outputs from the first filter (4) and the second filter (5) to obtain a demodulated signal, 4) is compared with the absolute value level of the intensity of the output from the second filter (5), and the intensity of one of the outputs from the first filter (4) or the second filter (5) is determined according to the comparison result. Is increased or decreased by a predetermined amount. An absolute value level correcting means (7) for repeating the correction so as to make the absolute value levels equal by further comparing the corrected absolute value levels; and the first filter (4) and the second filter by digital processing. The phase of the output from (5) is corrected, and depending on whether the phase difference between the corrected output of the first filter (4) and the output of the second filter (5) is larger or smaller than 90 °. To increase or decrease the phase correction amount by a predetermined amount.
Repeated positive, complement said first filter (4) and the output of the second filter (5) as the phase difference of 90 °
Digital quadrature demodulation circuit comprising: a phase difference correction means positive for.