JP3385821B2 - Horizontal blanking generation circuit - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a horizontal blanking generation circuit capable of generating a horizontal blanking pulse required for a 16: 9 wide set or the like without adjustment.

[0002]

2. Description of the Related Art A horizontal blanking generation circuit is a circuit necessary for displaying a 4: 3 image on a wide screen, and in recent years, there has been a demand for no adjustment of this circuit.

An example of the above-described conventional horizontal blanking generation circuit will be described below with reference to the drawings.

FIG. 6 shows a circuit configuration diagram of a blanking circuit of a television receiver proposed in Japanese Patent Laid-Open No. 2-48862.

In FIG. 6, reference numeral 601 is an input horizontal synchronizing pulse, 602 is a transistor, 603 is a resistor,
604 is a condenser, 605 is a resistor, 606 is a volume resistor, 607 is a resistor, 608 is a resistor, 609 is a switch element, 609 is a switch element, 610 is an operational amplifier, 611 is a blanking pulse output, 612 is a sawtooth wave input to the operational amplifier 611, 613 is a DC input to the operational amplifier 610
Voltage.

The operation of the horizontal blanking generation circuit configured as described above will be described below with reference to the operation diagram of FIG.

First, the waveform of FIG. 7B is input to the base of the transistor 602, the sawtooth wave 612 is dropped to GND (ground) when this waveform is high, and the resistor 603 and the capacitor 604 are dropped to low. The voltage rises according to the time constant of, and as a result, the sawtooth wave 612 is shown in FIG.
The waveform is as shown in. The sawtooth wave 612 and the DC voltage 613 are input to the operational amplifier 610, and the blanking waveform shown in FIG. 7C is output. In addition, the switch element 609 is O
When turned on, the DC voltage 613 decreases as indicated by A in FIG. 7A, so that the output waveform of the operational amplifier 610 is as shown in FIG.
The blanking position moves as shown in (d).

[0008]

However, in the above-mentioned configuration, the blanking position variation of the output blanking pulse 611 is the amplitude variation of the sawtooth wave 612 (specifically, the variation of the resistor 603 and the capacitor 604). It depends on the variation of the DC voltage 613. In particular, since the capacitor 604 has a large variation, there is a problem that the blanking position of the blanking pulse 611 to be output needs to be adjusted by the volume resistor 606.

In view of the above problems, the present invention provides a horizontal blanking pulse without adjustment.

[0010]

In order to solve the above problems, the horizontal blanking generation circuit of the present invention, in the first embodiment, uses the input horizontal synchronization pulse as a timing signal for the discharge pulse and the comparison period. Pulse for the comparison period
A pulse generating circuit for pulse outputs to occur immediately before the discharge pulse, the discharge as an input the discharge pulse and the horizontal synchronizing pulse output from the pulse generating circuit
When a pulse is input, it is reset and becomes LOW output
A horizontal sawtooth wave generation circuit that outputs a sawtooth waveform, a comparison period pulse output from the pulse generation circuit, an output signal of the horizontal sawtooth wave generation circuit, and an amplitude reference DC voltage are input, and the ratio
The horizontal sawtooth wave is generated during the period in which the comparison period pulse is input.
The output signal of the generation circuit and the amplitude reference DC voltage are compared.
Capacitor with one end connected to ground as a result of comparison
Voltage comparison circuit that obtains an output signal that charges the capacitor, a voltage holding capacitor that receives the output signal of the voltage comparison circuit as an input, an output signal of the horizontal sawtooth wave generation circuit, and a first reference D
A first slicing circuit which receives the C voltage, a second slicing circuit which receives the output signal of the horizontal sawtooth wave generating circuit and a second reference DC voltage, and a first slicing circuit of the first and second slicing circuits. An RS flip-flop circuit having an output signal as an input is provided, and the voltage charged in the voltage holding capacitor is supplied to the horizontal sawtooth wave generation circuit to change the amplitude of the sawtooth waveform generated by the horizontal sawtooth wave generation circuit. The RS blanking pulse is controlled to be equal to the amplitude reference DC voltage, and the horizontal blanking pulse generated from the sawtooth waveform output from the horizontal sawtooth wave generation circuit and the first and second reference DC voltages is the RS flip-flop. In the second embodiment, an OR circuit is provided in place of the RS flip-flop circuit so that a horizontal blanking circuit is provided from the OR circuit. Guparusu in which is to be outputted.

[0011]

The present invention can suppress the amplitude variation of the sawtooth waveform and generate horizontal blanking without adjustment by the above-mentioned configuration.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS A horizontal blanking generation circuit according to an embodiment of the present invention will be described below with reference to the drawings. (Embodiment 1) FIG. 1 is a block diagram of a horizontal blanking generation circuit according to a first embodiment of the present invention. In FIG. 1, 101 is a pulse generation circuit, 102 is a horizontal sawtooth wave generation circuit, 103 is a voltage comparison circuit, 104 is a voltage holding capacitor, 105 is a slice circuit, and 106.
Is a slice circuit, 107 is an RS flip-flop circuit,
Reference numeral 108 is a horizontal synchronization pulse, and 109 is a pulse generation circuit 10.
1 is a discharge pulse which is an output signal of 1; 110 is a pulse for a comparison period which is an output signal of the pulse generation circuit 101;
Is a reference DC voltage, 112 is a voltage holding capacitor 10
4 is a holding voltage, 113 is a sawtooth waveform which is an output signal of the horizontal sawtooth wave generation circuit 102, 114 is a reference DC voltage, 115 is a reference DC voltage, 116 is an output waveform of the slice circuit 105,
117 is an output waveform of the slice circuit 106, and 118 is RS
It is a horizontal blanking waveform output which is an output waveform of the flip-flop circuit 107.

The operation of the horizontal blanking generation circuit configured as described above will be described below with reference to FIGS. 1, 3, and 4. First, FIG. 3 is an operation explanatory diagram of the horizontal blanking generation circuit in the first and second embodiments of the present invention, and FIG. 4 is an operation explanatory diagram of the horizontal blanking generation circuit in the first embodiment of the present invention. is there. The horizontal synchronizing pulse 108 has the timing shown in FIG. 3B, and the discharge pulse 109 generated by the pulse generating circuit 101 is shown in FIG.
The comparison period pulse is shown in (c) of FIG. 3 (d). In the horizontal sawtooth wave generation circuit, the discharge pulse 1 shown in FIG.
The circuit configuration is such that a sawtooth waveform is generated during the period 09 is Low, and is dropped to GND during the period High. Also,
As shown in FIG. 3D, the voltage comparison circuit 103 compares the sawtooth waveform 113 with the reference DC 111 only while the comparison period pulse 110 is High, and charges the voltage holding capacitor 104 with the result. The charged voltage 112 is input to the horizontal saw generation circuit 102, and operates to control the amplitude of the sawtooth waveform 113. That is, the circuit is configured so that the amplitude of the sawtooth waveform 113 becomes equal to the reference DC voltage 111. The sawtooth waveform 113 is input to the slice circuit 105, and if the voltage of the sawtooth waveform 113 is higher than the reference DC voltage 114 as shown in FIG. 4A, the output waveform 116 becomes High as shown in FIG. 4B. Is configured. Further, the sawtooth waveform 113 is input to the slice circuit 106, and when the voltage of the sawtooth waveform 113 is lower than the reference DC voltage 115 as shown in FIG. 4A, the output waveform 117 becomes High as shown in FIG. 4C. Is configured to be.
These waveforms are input to the RS flip-flop circuit 107 (reset, set flip-flop circuit 107), and the output waveform 118 is as shown in FIG.

As described above, according to this embodiment, the sawtooth waveform 1
Since the amplitude variation of 13 can be suppressed to the same as the variation of the reference DC voltage 111, the variation of the horizontal blanking pulse position can be reduced by the reference DC voltages 111, 114, and 11.
It almost depends on the variation of 5. If these reference DCs are configured by resistors having small variations, it is possible to eliminate the need for adjusting the horizontal blanking pulse position.

(Second Embodiment) A second embodiment of the present invention will be described below with reference to the drawings. FIG. 2 is a block diagram of a horizontal blanking generation circuit according to the second embodiment of the present invention. In FIG. 2, 201 is a pulse generation circuit, 202 is a horizontal sawtooth wave generation circuit, 203 is a voltage comparison circuit, 204 is a voltage holding capacitor, and 205 is a voltage holding capacitor.
Is a slice circuit, 206 is a slice circuit, and 207 is an OR
A circuit, 208 is a horizontal synchronizing pulse, 209 is a discharge pulse which is an output signal of the pulse generation circuit 201, 210 is a comparison period pulse which is an output signal of the pulse generation circuit 201,
Reference numeral 211 is a reference DC voltage, 212 is a holding voltage of the voltage holding capacitor 204, and 213 is a horizontal sawtooth wave generation circuit 202.
Sawtooth waveform that is the output signal of the, 214 is the reference DC voltage, 21
5 is a reference DC voltage, 216 is an output waveform of the slice circuit 205, 217 is an output waveform of the slice circuit 206, 218
Is a horizontal blanking waveform output which is an output waveform of the OR circuit 207.

The operation of the horizontal blanking generation circuit configured as described above will be described below with reference to FIGS. 2, 3, and 5. First, FIG. 3 is an operation explanatory diagram of the horizontal blanking generation circuit in the first and second embodiments of the present invention, and FIG. 5 is an operation explanatory diagram of the horizontal blanking generation circuit in the second embodiment of the present invention. is there. The horizontal synchronizing pulse 208 has the timing shown in FIG. 3B, the discharge pulse 209 is shown in FIG. 3C, and the comparison period pulse is shown in FIG.
It is shown in (d). In the horizontal sawtooth wave generation circuit, FIG.
The discharge pulse 209 has a circuit configuration in which a sawtooth waveform is generated in a Low period and dropped to GND in a High period. Further, the voltage comparison circuit 203 compares the sawtooth waveform 213 with the reference DC 211 only while the comparison period pulse 210 shown in FIG. 3D is High, and charges the voltage holding capacitor 204 with the result. Charged voltage 2
12 is input to the horizontal saw generation circuit 202, and sawtooth waveform 213
Operates to control the amplitude of. That is, the sawtooth waveform 21
The circuit is constructed so that the amplitude of 3 becomes equal to the reference DC voltage 211. The sawtooth waveform 213 is input to the slice circuit 205, and as shown in FIG.
If the voltage of the sawtooth waveform 213 is higher than the voltage 214,
As shown in (b), the output waveform 216 is configured to be High. Further, the sawtooth waveform 213 is input to the slice circuit 206, and as shown in FIG.
When the voltage of the sawtooth waveform 213 is lower than the voltage 215, FIG.
As shown in (c), the output waveform 217 is configured to be High. These waveforms shown in FIGS. 5B and 5C are ORed with the horizontal synchronizing pulse 208 shown in FIG. 5D.
The output waveform 218 input to the circuit 207 is shown in FIG.
It becomes like (e).

As described above, according to this embodiment, the sawtooth waveform 2
Since the amplitude variation of the reference DC voltage 211 can be suppressed to the same as the variation of the reference DC voltage 211, the variation of the horizontal blanking pulse position can be suppressed by the reference DC voltages 211, 214, and 21.
It almost depends on the variation of 5. If these reference DCs are configured by resistors having small variations, it is possible to eliminate the need for adjusting the horizontal blanking pulse position.

[0018]

As described above, according to the present invention, a pulse generating circuit which receives a horizontal synchronizing pulse, a horizontal sawtooth wave generating circuit which receives an output signal of the pulse generating circuit and a horizontal synchronizing pulse, and the pulse generating circuit. Of the horizontal sawtooth wave generation circuit, the output signal of the horizontal sawtooth wave generation circuit and a reference DC voltage, a voltage holding capacitor to which the output signal of the voltage comparison circuit is input, and the horizontal sawtooth wave generation circuit. A first slice circuit that receives an output signal and a reference DC voltage, a second slice circuit that receives the output signal of the horizontal sawtooth wave generating circuit and a reference DC voltage, and the first and second slice circuits. By providing an RS flip-flop circuit to which the output signal of 1 is input, it is possible to suppress the amplitude variation of the sawtooth waveform and generate horizontal blanking without adjustment.

[Brief description of drawings]

FIG. 1 is a block configuration diagram of a horizontal blanking generation circuit according to a first embodiment of the present invention.

FIG. 2 is a block configuration diagram of a horizontal blanking generation circuit according to a second embodiment of the present invention.

FIG. 3 is an operation explanatory diagram of a horizontal blanking generation circuit in the first and second embodiments of the present invention.

FIG. 4 is an operation explanatory diagram of the horizontal blanking generation circuit according to the first embodiment of the present invention.

FIG. 5 is an operation explanatory diagram of a horizontal blanking generation circuit according to a second embodiment of the present invention.

FIG. 6 is a block configuration diagram of a conventional horizontal blanking generation circuit.

FIG. 7 is an operation explanatory diagram of a conventional horizontal blanking generation circuit.

[Explanation of symbols]

101 pulse generation circuit 102 Horizontal sawtooth wave generation circuit 103 Voltage comparison circuit 104 Voltage holding capacitor 105 slice circuit 106 slice circuit 107 RS flip-flop circuit 108 Horizontal sync pulse 109 discharge pulse 110 Comparison period pulse 111 Reference DC voltage 112 Holding voltage 113 sawtooth waveform 114 Reference DC voltage 115 Reference DC voltage 116 output waveform 117 output waveform 118 Horizontal blanking waveform output

─────────────────────────────────────────────────── ─── Continuation of the front page (56) Reference JP-A-63-131611 (JP, A) JP-A-61-158271 (JP, A) JP-A-6-105174 (JP, A) JP-A-6- 22164 (JP, A) JP 5-316381 (JP, A) JP 5-72988 (JP, A) JP 4-180363 (JP, A) JP 3-284061 (JP, A) JP-A-1-318423 (JP, A) JP-A-1-141410 (JP, A) (58) Fields investigated (Int.Cl. ⁷ , DB name) H04N 3/24

Claims (2)

(57) [Claims] [Claim 1, wherein the ratio of discharge pulses and the comparison period for the pulse of the inputted horizontal synchronizing pulse as a timing signal
The comparison period pulse is generated immediately before the discharge pulse.
A pulse generating circuit that outputs the previous inputs the discharge pulse and the horizontal synchronizing pulse output from the pulse generating circuit
When the discharge pulse is input, it will be reset and output LOW.
A horizontal sawtooth wave generation circuit that outputs a sawtooth waveform that serves as an input, a comparison period pulse output from the pulse generation circuit, an output signal of the horizontal sawtooth wave generation circuit, and an amplitude reference DC voltage.
In the period when the comparison period pulse is input,
The output signal of the horizontal sawtooth wave generation circuit and the amplitude reference DC voltage
The result of the comparison is the one whose one end is connected to ground.
A voltage comparison circuit that obtains an output signal that charges the capacitor ,
A voltage holding capacitor that receives the output signal of the voltage comparison circuit; an output signal of the horizontal sawtooth wave generation circuit;
A first slice circuit that receives the reference DC voltage as input, a second slice circuit that receives the output signal of the horizontal sawtooth wave generation circuit and a second reference DC voltage, and the first and second slices. An RS flip-flop circuit that receives the output signal of the circuit as an input, and supplies the voltage charged in the voltage holding capacitor to the horizontal sawtooth wave generation circuit to generate a sawtooth waveform generated by the horizontal sawtooth wave generation circuit. The amplitude is controlled so as to be equal to the amplitude reference DC voltage, and the sawtooth waveform output from the horizontal sawtooth wave generation circuit and the first and second reference DCs.
The horizontal blanking pulse generated from the voltage
A horizontal blanking generation circuit characterized by being output from an S flip-flop circuit. Wherein said ratio discharge pulse and the comparison period for the pulse of the inputted horizontal synchronizing pulse as a timing signal
The comparison period pulse is generated immediately before the discharge pulse.
A pulse generating circuit that outputs the previous inputs the discharge pulse and the horizontal synchronizing pulse output from the pulse generating circuit
When the discharge pulse is input, it will be reset and output LOW.
A horizontal sawtooth wave generation circuit that outputs a sawtooth waveform that serves as an input, a comparison period pulse output from the pulse generation circuit, an output signal of the horizontal sawtooth wave generation circuit, and an amplitude reference DC voltage.
In the period when the comparison period pulse is input,
The output signal of the horizontal sawtooth wave generation circuit and the amplitude reference DC voltage
Co the compared result in one end of the comparison are connected to ground
A voltage comparison circuit that obtains an output signal that charges the capacitor ,
A voltage holding capacitor that receives the output signal of the voltage comparison circuit; an output signal of the horizontal sawtooth wave generation circuit;
A first slice circuit that receives the reference DC voltage as input, a second slice circuit that receives the output signal of the horizontal sawtooth wave generation circuit and a second reference DC voltage, and the first and second slices. A saw generated by the horizontal sawtooth wave generation circuit by supplying the voltage charged in the voltage holding capacitor to the horizontal sawtooth wave generation circuit, the OR circuit having an output signal of the circuit and a horizontal synchronizing pulse as an input. The amplitude of the waveform is controlled to be equal to the amplitude reference DC voltage, and the sawtooth waveform output from the horizontal sawtooth wave generation circuit and the first and second reference DCs are controlled.
The horizontal blanking pulse generated from the voltage
A horizontal blanking generation circuit characterized by being output from an R circuit.