JP3384589B2 - Semiconductor device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device, and more particularly to a package in which a semiconductor chip is mounted in a cavity for forming a package body and an opening of the cavity is covered with a cap. The present invention relates to a semiconductor device.

[0002]

2. Description of the Related Art In recent years, with the increase in operating speed of semiconductor devices, etc., semiconductor devices have been developed in order to prevent malfunction of semiconductor devices due to noise generated by the semiconductor device itself and noise generated by other semiconductor devices. the incorporation of <br/> capacitor in a package constituting a is being requested. A package according <br/> capacitor is incorporated, although small capacitor chips can be considered embedded in the package body, there is a drawback that the package size increases. On the other hand, in Japanese Patent Publication No. 4-81860,
A semiconductor device has been proposed in which a thin film capacitor is incorporated in a ceramic package body. In this semiconductor device, a semiconductor chip is mounted on a thin film capacitor formed at the bottom of a cavity for forming the package body, and each of capacitor electrodes forming the thin film capacitor is provided on a predetermined package body. It is electrically connected to the wiring pattern.

[0003]

The semiconductor device in which the thin film capacitor is incorporated in the package body can be made smaller in package size. However, making a thin-film capacitor on the bottom of the cavity in the package body complicates the package manufacturing process,
Because of the narrow portion to fabricate a thin film capacitor, not the dielectric layer constituting the fabricated co <br/> Nden support the extremely thin thin-film of a predetermined capacitance can not be obtained, also involves technical difficulties.
An object of the present invention is to provide a semiconductor device which can be fabricated to facilitate capacitor in the package.

[0004]

As a result of repeated studies to achieve the above-mentioned object, the present inventor found that a cavity is formed in a package body by forming a capacitor in a cap that covers the cavity recess formed in the package body. The present invention has been achieved by finding that the capacitor can be easily formed in the package as compared with the case where the capacitor is formed on the bottom surface. That is, according to the present invention, the semiconductor chip is mounted in the cavity recess of the package body,
In the semiconductor device comprising a and package opening of the cavities is covered by a cap, which is formed through the dielectric layer to form the cap, a pair of capacitor electrodes facing each other, of the dielectric layer one
One of the capacitor electrodes formed on the
Extending to the other side of the dielectric layer on which the den electrode is formed.
There is a gap between the formed overhang and the other capacitor electrode.
Is formed in the cap , and each of the capacitor electrodes is electrically connected to a predetermined wiring pattern formed on the package body. And the semiconductor device.

[0005] In the present invention having such a configuration, con
One protrusion of the capacitor electrode and the other capacitor electrode
Are formed on the same side of the cap ,
Each of the sensor electrodes and the predetermined electrodes formed on the package body.
Easy electrical connection with the wiring pattern
It On the other hand, one protruding part of the capacitor electrode and the other
By forming a gap between the other capacitor electrode
The capacitor electrode on one side and the capacitor on the other side.
Surely insulates the electrode. Also, the capacitor electrode
One of the overhangs and the other of the capacitor electrodes
The specified wiring pattern formed on the package
By electrically connecting via an electrically conductive sealant,
Both can be easily electrically connected. In addition, the capacitor
Each of the poles and the specified wiring pattern formed on the package body.
The turn and the electrically conductive seal material arranged in a ring
By making an air connection, the cavity recess is
It is possible to doubly seal with a rubber material. In addition, the cap is formed
By forming the dielectric layer with barium titanate
Therefore, the capacitance of the formed capacitor can be increased.

[0006]

According to the present invention, since the build in capacitor to the package body is a molded separately and simple shape of the cap, the semiconductor device comprising a package body and a cap on which a semiconductor chip is mounted capacitor it is possible to fabricate a difference in ease. Moreover, since it is possible to widen the area of the capacitor electrodes, it is possible to provide a semiconductor device having a large decoupling con den Sa capacitance.

[0007]

Embodiments will be described in more detail with reference to the drawings. Figure 1
It is a longitudinal section showing an example of a semiconductor device concerning the present invention. In FIG. 1, a ceramic package body 10
Has a wiring pattern 24 and the like formed therein, and a cavity recess 22 in which the semiconductor chip 20 is mounted.
Are formed. The semiconductor chip 20 is connected to the wiring pattern 24 by wires. Also,
Cavities 22 containing the semiconductor chip 20, Conde <br/> cap down service was fabricated 12 and the conductive sealing member 2
It is sealed by 6, 28. This cap 12
A dielectric layer 18 made of barium titanate is mainly formed, and a pair of capacitor electrodes 14 and 16 facing each other with the dielectric layer 18 in between are formed.
Of the capacitor electrodes 14 and 16, the capacitor electrode 16
Is formed on the back surface side of the cap 12, which is the cavity recess 22 side, and a part of the capacitor electrode 14 formed on the front surface side of the cap 12, which is the surface facing the back surface side, also extends to the back surface side of the cap 12. is doing. Capacitor electrode 14
Of the cap 12 of the capacitor to the back side and the capacitor electrode 1
6 is electrically insulated from the back surface side of the cap 12 by the gap 30. The capacitor electrode 1
4, 16 can be formed by depositing or plating a metal on a predetermined portion of the dielectric layer 18.

The capacitor electrode 14 and the capacitor electrode 16 are connected to specific wiring patterns 24 and 25 formed inside the package body 10 through vias or the like. The connection between the via or the like and the capacitor electrodes 14 and 16 is made by using the conductive sealing material 26,
28. The conductive sealing material 26 connects the wiring pattern 24 and the projecting portion of the capacitor electrode 14 and, as shown in FIG.
It is arranged annularly between 0 and. Further, the conductive sealing material 28
2, the wiring pattern 25 and the capacitor electrode 16 are connected to each other, and as shown in FIG. 2, they are annularly arranged inside the annularly arranged conductive sealing material 26 and along the inner peripheral edge of the gap 30. . As described above, in the embodiment shown in FIG. 1, the cavity recess 22 is doubly sealed by the annular conductive seal members 26 and 28, and the cavity recess 22 is double sealed. Can be guaranteed. still,
As the conductive sealing materials 26 and 28, known materials can be used, and for example, a conductive adhesive, a gold-tin alloy, a lead-tin alloy or the like can be preferably used.

In the semiconductor device shown in FIG. 1, the distance between the capacitor electrode 14 and the capacitor electrode 16 (corresponding to the thickness of the cap 12) is set to the above-mentioned Japanese Patent Publication No. 4-818.
This is larger than the semiconductor device in which the thin film capacitor proposed in Japanese Patent Laid-Open No. 60 is incorporated in the bottom surface of the cavity recess of the package body. However, a tantalum oxide or a tantalum oxide having a relative dielectric constant lower than that of barium titanate forming the package of this embodiment is usually used as a dielectric forming the thin film dielectric layer. This is because a dielectric having a high relative dielectric constant such as barium titanate has a poor thin film forming ability. In this respect, in this embodiment, the cap body obtained by firing barium titanate having a high relative permittivity can be used as the dielectric layer, and the capacitor electrode area can be made much wider than the cavity recess bottom surface. it can increase the capacitance of the capacitor. Also, the cap 12
Is molded separately from the package body 10, the molding conditions such as firing temperature can be optimized when the dielectric layer 18 made of barium titanate is molded, and the high-strength cap 12 is obtained. be able to. Further, even when the capacitor electrodes 14 and 16 are formed in the cap 12, the capacitor electrodes 14 and 16 can be easily molded because the surface shape and structure of the cap 12 are simple.

In the cap 12 used in such a semiconductor device shown in FIG. 1, the insulation between the capacitor electrode 14 and the capacitor electrode 16 is such that the back surface of the cap 12 is on the same surface.
Although it was made by the gap 30 formed on the capacitor electrode 14 , as shown in FIG.
As a gap between the capacitor electrodes 14, the capacitor electrode 14 and the capacitor electrode 16 can be reliably insulated by the step provided on the back surface side of the cap 12. Further, in the semiconductor device shown in FIGS. 1 to 3, the conductive sealing material 2 arranged in an annular shape is used.
Although the cavity recess 22 is double-sealed by 6, 28, when double-sealing by the conductive sealing materials 26, 28 is problematic from the viewpoint of workability, etc., as shown in FIG.
Instead of sealing with the conductive sealing materials 26 and 28, the cavity recess 22 can be sealed with silicone gel 34. The rectangular cap 12 used in the semiconductor device shown in FIG. 4 is a dielectric layer 1 made of barium titanate.
8 to form the capacitor electrode 14 on the front surface side of the dielectric layer 18 and the capacitor electrode 16 on the back surface side. The capacitor electrode 14 is partially formed as a projecting portion from one side of the four pieces of the dielectric layer 18 to the back surface side, and a gap 32 is formed between the projecting portion and the capacitor electrode 16. There is. This gap 32 is
As shown in FIG. 5, the cap 12 is formed from one end to the other end. Furthermore, in the other three pieces of the cap 12, the capacitor electrodes 14 and 16 are not formed on the end face side, and the capacitor electrodes 14 and 16 are insulated from each other by the gap 32 and the end face of the cap 12.

The electrodes of the capacitor electrodes 14 and 16 formed in the cap 12 of the semiconductor device of FIG. 4 and the wiring patterns 24 and 25 formed inside the package body 10 are shown.
The connection is made with a conductive sealing material 26 connected to the protruding portion of the capacitor electrode 14 on the back surface side of the cap 12 and a conductive sealing material 28 connected to the capacitor electrode 16. As shown in FIG. 5, the conductive sealing materials 26 and 28 are formed by linearly forming the conductive sealing material 26 along the protruding portion of the capacitor electrode 14.
Are formed in a U shape along the outer peripheral edge of the cap 12.
However, the conductive seal material 26 and the conductive seal material 28 are
A notch is formed at the gap 32 so as to be insulated from each other. Therefore, in the semiconductor device shown in FIG. 4, the notch formed in the gap 32 causes the semiconductor device shown in FIG.
Like the semiconductor device shown in (1), the conductive sealing materials 26 and 28 cannot be formed in an annular shape, and the cavity recess 22 cannot be sealed. In this regard, in the embodiment shown in FIG.
By filling the cavity recess 22 with the silicone gel 34, the semiconductor chip 20 mounted in the cavity recess 22 is sealed. If the notch formed between the conductive sealing material 26 and the conductive sealing material 28 can be filled with a non-conductive adhesive or the like to form a ring-shaped sealing material, the cavity recess 22 is formed by the sealing material. It can be sealed and does not need to be filled with silicone gel 34.

[0012]

[0013]

[0014]

According to the present invention, erroneous operation can be provided a semiconductor device comprising a package which is built is capacitor easily, due to the noise accompanying occurring the operation speed of the semiconductor device Can be prevented. Therefore, the reliability of the semiconductor device can be improved.

[Brief description of drawings]

FIG. 1 is a vertical sectional view according to an embodiment of the present invention.

FIG. 2 is a rear view of a cap 12 which constitutes the semiconductor device of FIG.

FIG. 3 is a vertical cross-sectional view according to another embodiment.

FIG. 4 is a vertical cross-sectional view according to another embodiment.

5 is a rear view of a cap 12 that constitutes the semiconductor device of FIG.

─────────────────────────────────────────────────── --- Continuation of the front page (56) References JP-A-1-108751 (JP, A) JP-A-1-251644 (JP, A) JP-A-2-302061 (JP, A) JP-A-53- 103376 (JP, A) JP-A-2-307255 (JP, A) SAIKAI 51-65663 (JP, U) SEIKO 5-6854 (JP, Y2) (58) Fields investigated (Int.Cl. ⁷ , DB name) H01L 23/02

Claims (6)

(57) [Claims] A semiconductor chip is mounted in the cavity recesses of claim 1] package body, and the opening of the cavity recess in a semiconductor device comprising a package covered by the cap, is formed through the dielectric layer to form the cap In addition, of the pair of capacitor electrodes facing each other , the dielectric
One of the capacitor electrodes formed on one side of the layer is
On the other surface side of the dielectric layer on which the conden electrode is formed.
Between the existing overhang and the other capacitor electrode
A capacitor having a gap formed therein is incorporated in the cap , and each of the capacitor electrodes is electrically connected to a predetermined wiring pattern formed on the package body. Characteristic semiconductor device. 2. One of the protruding portions of the capacitor electrode and the other
2. The semiconductor device according to claim 1, wherein the capacitor electrode is formed on the same surface of the cap . 3. One of the protruding portions of the capacitor electrode and the other
The semiconductor device according to claim 1, wherein the gap between the capacitor electrode and the capacitor electrode is a step . 4. One of the protruding portions of the capacitor electrode and the other thereof.
Formed on the package body with each of the capacitor electrodes
Predetermined wiring pattern with a conductive sealing material
The semiconductor device according to any one of claims 1 to 3, which is electrically connected . 5. Each of the capacitor electrodes and a package book
A predetermined wiring pattern formed on the body is arranged in a ring
The semiconductor device according to claim 1, wherein the semiconductor device is electrically connected via a conductive sealing material . 6. The dielectric layer forming the cap is titanium.
Claim 1-5, which is formed by barium one
The semiconductor device according to the item .