JP2808043B2 - Package for storing semiconductor elements - Google Patents

Description

Description: BACKGROUND OF THE INVENTION The present invention relates to an improvement in a semiconductor device housing package for housing a semiconductor device.

(Prior art and its problems) Conventionally, a package for housing a semiconductor element, particularly a glass-sealed semiconductor element housing package for sealing by welding glass, is made of an electrically insulating material such as alumina ceramics. A concave portion for forming a cavity for accommodating the semiconductor element is formed in the portion, and an insulating base having a sealing glass layer adhered on the upper surface, and also made of an electrically insulating material, and the semiconductor device is accommodated in the center portion Having a concave portion for forming a cavity to be formed, a lid having a lower surface covered with a glass layer for sealing, and an external portion for electrically connecting a semiconductor element housed therein to an external electric circuit. The external lead terminal is temporarily mounted on the insulating base by placing the external lead terminal on the upper surface of the insulating base and melting the sealing glass layer previously applied. Then, a semiconductor element is attached to the concave portion of the insulating base, and each electrode (signal electrode, power supply electrode, ground electrode, etc.) of the semiconductor element is connected to an external REIT terminal via a bonding wire. By melting and integrating a sealing glass layer in which the insulating substrate and the lid are adhered to the opposing main surfaces, and hermetically sealing the container comprising the insulating substrate and the lid. It becomes a semiconductor device as a final product.

Incidentally, such a conventional semiconductor element housing package is usually provided with a capacitance element in order to prevent the semiconductor element housed therein from being affected by the fluctuation of the power supply voltage. In general, the addition of a capacitive element involves arranging a multilayer electrode inside the insulating base constituting the container,
This is performed by forming a constant capacitance between the multi-layered electrodes using the insulating base material as a dielectric, or attaching a capacitive element made of barium titanate porcelain to the bottom surface of the concave part of the insulating base that accommodates the semiconductor element. ing.

However, in this conventional package for accommodating a semiconductor element, when the addition of a capacitive element is performed by arranging a multilayer electrode inside an insulating base constituting a container, the insulating base is generally made of alumina ceramics,
The alumina ceramic has a low dielectric constant (dielectric constant of 9 to 1).
0) Therefore, the capacitance formed between the multilayer electrodes is extremely small, and as a result, there is a disadvantage that a malfunction due to a power supply voltage fluctuation of the semiconductor element cannot be completely prevented.

In order to solve this drawback, it is conceivable to increase the number of layers of the multilayer electrode and the area facing the electrodes to increase the capacitance formed between the multilayer electrodes. In this case, when the semiconductor device is accommodated in the package and the semiconductor device is housed therein, the size of the semiconductor device is disadvantageously increased.

Further, when a capacitance element made of barium titanate porcelain is mounted in a concave part for accommodating a semiconductor element of an insulating base, and the capacitance element is added to the package for accommodating a semiconductor element, the concave part for accommodating the semiconductor element of the insulating base is made of titanium. The size is increased due to the attachment of the capacitive element made of barium oxide porcelain, and as a result, as described above, there is a disadvantage that the semiconductor device as a product is enlarged.

Further, it is conceivable that the outer shape of the insulating base is kept as it is and the shape of only the concave portion for accommodating the semiconductor element is made large enough to allow the capacitive element to be attached. When the inside of the container is hermetically sealed by joining the two, the joint area between the insulating base and the lid is reduced, and the reliability of hermetic sealing of the container is greatly reduced.

Therefore, in order to solve the above-mentioned drawback, a metallized metal layer is applied on the upper surface of the insulating base, and an external lead terminal is fixed on the metallized metal layer via a glass member having a high dielectric constant. It is conceivable to add a capacitive element to the semiconductor element housing package by forming a capacitive element between the terminal and the terminal.

However, the capacitance element formed between the metallized metal layer and the external lead terminal needs to have a large capacitance so that the semiconductor element does not have a fluctuation in the power supply voltage. Must be increased, and when the dielectric constant of the glass member is increased, the following disadvantages are induced.

That is, the electric signals propagating through each of the adjacent external lead terminals greatly influence each other if the dielectric constant of the glass member interposed therebetween is large, causing noise to be generated in each electric signal. The disadvantage is that the light is propagated to the semiconductor element housed therein and causes the semiconductor element to malfunction.

In such a case, the propagation speed of the electric signal from the external lead terminals becomes extremely slow, so that a semiconductor element that performs high-speed driving with a high signal propagation speed inside the package cannot be accommodated.

(Object of the Invention) The present invention has been devised in view of the above-mentioned drawbacks, and an object of the present invention is to make it possible to accommodate a semiconductor element that performs high-speed driving therein,
Another object of the present invention is to provide a small semiconductor element housing package that can stably operate a semiconductor element to be housed without malfunction for a long time.

(Means for Solving the Problems) The present invention relates to a semiconductor element housing package comprising a cover and an insulating base having a recess for housing a semiconductor element, wherein the insulating base is provided with a metallized metal layer on its upper surface. And an external lead terminal is fixed on the metallized metal layer via a glass member having a two-layer structure of a lower glass material having a dielectric constant of 17.0 or more and an upper glass material having a dielectric constant of 14.0 or less, and A terminal connected to a power supply electrode or a ground electrode of the semiconductor element is electrically connected to the metallized metal layer.

(Examples) Next, the present invention will be described in detail based on examples shown in the accompanying drawings.

FIG. 1 is a cross-sectional view showing an embodiment of a package for housing a semiconductor element according to the present invention, wherein 1 is an insulating base made of an electrically insulating material such as alumina ceramics, and 2 is a lid made of the same electrically insulating material. The insulating base 1 and the lid 2 constitute a container for housing the semiconductor element 3.

The insulating base 1 and the lid 2 are each provided with a concave portion for forming a space for accommodating the semiconductor element 3 at the center thereof, and the semiconductor element 3 is provided with an adhesive on the bottom surface of the concave portion 1a of the insulating base 1. It is attached and fixed.

The insulating substrate 1 and the lid 2 are formed by employing a conventionally known press molding method. For example, when the insulating substrate 1 and the lid 2 are made of alumina ceramic, the first
A press die having a shape corresponding to the insulating base 1 or the lid 2 as shown in the figure is filled with alumina ceramic powder and molded by applying a constant pressure. Thereafter, the molded product is heated to a temperature of about 1500 ° C. It is manufactured by firing.

On the upper surface of the insulating substrate 1, a metallized metal layer 4 is adhered, and on the metallized metal layer 4, an external lead terminal 5 has a two-layer structure of an upper glass material 6a and a lower glass material 6b. The capacitor A is fixed between the metallized metal layer 4 and the external lead terminals 5 with the glass member 6 as a dielectric material. The capacitance element A is connected between the power supply electrode and the ground electrode of the semiconductor element 3 and acts so that the semiconductor element 3 is not adversely affected by the fluctuation of the supply power supply voltage.

The metallized metal layer 4 deposited on the upper surface of the insulating base 1 is made of a metal material such as gold (Au), silver-platinum (Ag-Pt), or silver-para-4um (Ag-Pd). A metal paste obtained by adding and mixing an appropriate organic solvent and a solvent is printed and applied on the upper surface of the insulating substrate 1 by employing a conventionally known screen printing method, and then fired at a temperature of about 450 ° C. Then, it is adhered by baking gold powder or the like on the upper surface of the insulating base 1.

The metallized metal layer 4 acts as one electrode of a capacitive element A for smoothing fluctuations in the power supply voltage supplied to the semiconductor element 3 and effectively preventing malfunction of the semiconductor element 3. The power electrode or the ground electrode of the element 3 is electrically connected.

External lead terminals 5 are fixed on the insulating base 1 on which the metallized metal layer 4 is adhered via a glass member 6. The glass members 6 fix the external lead terminals 5 on the insulating base 1. And acts as a dielectric material of the capacitor A.

The glass member 6 has a two-layer structure including a lower glass material 6a and an upper glass material 6b, and the lower glass material 6a has a dielectric constant.
17.0 or more (room temperature 1MHz) glass material and upper glass material
6b is formed of a glass material having a dielectric constant of 14.0 or less (room temperature 1 MHz).

The lower glass material 6a constituting the glass member 6 is, for example,
60.0 to 90.0% by weight of lead oxide, 5.0 to 15.0% by weight of boron oxide, and 5.0 to 50.0% by weight of perovskite type titanate as a filler. A glass paste obtained by adding and mixing a solvent is printed and applied on the upper surface of the insulating substrate 1 by a conventionally well-known screen printing method, and then baked at a temperature of about 500 ° C. to adhere to the upper surface of the insulating substrate 1. Is done.

Since the lower glass material 6a has a high dielectric constant of 17.0 or more, the capacitance value of the capacitance element A formed between the metallized metal layer 4 and the external lead terminal 6 becomes an extremely large value. The element A can effectively prevent the semiconductor element from being adversely affected by the fluctuation of the supply power supply voltage, and can operate the semiconductor element housed therein stably without malfunction.

If the lower glass material 6a has a dielectric constant of less than 17.0, the capacitance of the capacitive element A formed between the metallized metal layer 4 and the external lead terminal 5 does not reduce the thickness of the glass member 6a. As long as it does not reach the desired large value, the glass member
If the thickness of 6a is reduced, the fixing strength of the external lead terminals 5 on the insulating base 1 is greatly reduced. Therefore, the dielectric constant of the glass member 6a is specified to be 17.0 (room temperature 1 MHz) or more.

If the thickness of the lower glass material 6a is less than 0.05 mm, there is a risk that the external lead terminals 5 cannot be firmly fixed to the insulating base 1, and if the thickness exceeds 0.5 mm, the external lead terminals 5 and the metallized metal layer 4 Therefore, there is a risk that the capacitance value of the capacitance element A formed between them becomes small, and the influence of the power supply voltage fluctuation on the semiconductor element 3 cannot be effectively prevented. Therefore, the glass member 6a has a thickness of 0.05 to 0.
It is preferable to set the range to 5 mm.

Further, the upper glass material 6b constituting the glass material 6 is, for example, 50.0 to 80.0% by weight of lead oxide and 5.0 to 15.
A glass comprising 0% by weight, zinc oxide 15.0% by weight or less, silicon oxide 10.0% by weight or less, aluminum oxide 10.0% by weight or less, and a glass obtained by adding an appropriate organic solvent and a solvent to each glass raw material powder and mixing. The paste is printed and applied on the upper surface of the lower glass material 6a by a conventionally known screen printing method,
Thereafter, this is baked at a temperature of about 400 ° C. to be adhered to the upper surface of the lower glass material 6a.

Since the upper glass material 6b has a low dielectric constant of 14.0 or less, the signal propagation speed of the external lead terminal 5 fixed to the upper glass material 6b can be made extremely high. It is also possible to accommodate a semiconductor element that performs high-speed driving with a high propagation speed.

When the thickness of the glass member 6b is less than 0.05 mm, the lower glass member 6a affects the external lead terminals 5 and tends to reduce the propagation speed of signals transmitted through the external lead terminals 5. Therefore, the upper glass material 6b has a thickness of 0.05 mm.
It is preferable to keep the above.

The external lead terminal 5 fixed to the upper portion of the insulating base 1 via the glass member 6 is made of, for example, Kovar metal (Fe
-Ni-Co alloy) and 42Alloy (Fe-Ni alloy), etc., and the ingot (soul) of the Kovar metal or the like is formed into a predetermined plate shape by adopting a conventionally known rolling and punching method. It is formed.

The external lead terminal 5 is a semiconductor element 3 housed inside.
Of the semiconductor element 3 is connected to one end of the semiconductor element 3 via a bonding wire 7 to connect the external lead terminal 5 to the external electric circuit. By connecting, the semiconductor element 3 is connected to an external electric circuit.

The external lead terminal 5 has nickel on its outer surface.
If a metal having good conductivity and excellent corrosion resistance made of gold or the like is layered by plating to a thickness of 2.0 to 20.0 μm, oxidation corrosion of the external lead terminal 5 can be effectively prevented and the external lead terminal 5 Good electrical contact with an external electric circuit can be achieved. Therefore, the external lead terminal 5 is formed by plating nickel, gold, or the like on the outer surface with 2.0 to 20.0 μm.
It is preferable that the layer is layered to a thickness of m.

Since the external lead terminal 5 has a low dielectric constant of 14.0 or less of the upper glass material 6b which is in direct contact with the external lead terminal 5, electric signals transmitted through each of the adjacent external lead terminals 5 greatly affect each other, and The signal does not generate noise, and the noise does not cause a malfunction in the semiconductor element housed therein.

The external lead terminal 5 also functions as one electrode of a capacitive element A for smoothing fluctuations in the power supply voltage supplied to the semiconductor element 3 and effectively preventing malfunction of the semiconductor element 3. Among them, the terminal 5a to which the electrode power supply or the ground electrode of the semiconductor element 3 is connected is electrically connected to the metallized metal layer 4 adhered to the upper surface of the insulating base 1 through the bonding wire 7a, whereby the external lead terminal 5 The capacitance element A formed between the semiconductor element 3 and the metallized metal layer 4 is electrically connected between the power supply electrode and the ground electrode of the semiconductor element 3.

The capacitive element A connected between the power supply electrode and the ground electrode of the semiconductor element 3 has a structure in which an external lead terminal 5 has a high dielectric constant lower glass material 6a on an insulating substrate 1 on which a metallized metal layer 4 is applied. The size of the concave portion 1a for attaching the semiconductor element 3 of the insulating base 1 does not need to be particularly large in order to attach the capacitive element A at all. Therefore, when a semiconductor device is formed by bonding an insulating base 1 and a lid 2 to be described later and hermetically sealing the container, the insulating base 1 and the lid 2 can be bonded to each other without increasing their external shapes. As a result, the reliability of hermetic sealing of the container can be increased, and the size of the semiconductor device can be reduced.

In addition, since the capacitance element A connected between the power supply electrode and the ground electrode of the semiconductor element 3 has a large capacitance value, it is necessary to effectively prevent the semiconductor element 3 from being affected by fluctuations in the supply power supply voltage. Thus, the semiconductor element 3 can operate stably without being affected by the fluctuation of the supply power supply voltage.

The insulating base 1 to which the external lead terminals 5 are fixed is also joined to the upper surface thereof with a lid 2 via a glass material 6c, whereby the semiconductor element 3 is hermetically sealed inside a container formed of the insulating base 1 and the lid 2. Sealed.

The glass material 6c for joining the lid 2 to the insulating substrate 1 is made of a low-melting glass material.
Is attached to the lower surface.

The glass material 6c contains 50.0 to 80.0% by weight of lead oxide, 5.0 to 15.0% by weight of boron oxide, 15.0% by weight or less of zinc oxide, 10.0% by weight or less of silicon oxide, and 10.0% by weight of aluminum oxide.
A glass paste containing an appropriate organic solvent and a solvent is added to each glass raw material powder, and a glass paste obtained by mixing is printed on the lower surface of the lid 2 by a conventionally known screen printing method. It is attached to the lower surface of the lid 2 by firing at a temperature of about 400 ° C.

Thus, according to the package for accommodating the semiconductor element, the semiconductor element 3 is attached to the bottom surface of the concave portion 1a of the insulating base 1, and each electrode of the semiconductor element 3 is connected to the external lead terminal 4 by the bonding wire 7 and the semiconductor element 3
The external lead terminal 5a to which the power supply electrode or the ground electrode is connected is connected to the metallized metal layer 4 adhered to the upper surface of the insulating base 1 via the bonding wire 7a. Thereafter, the insulating base 1 and the lid 2 are connected. The glass material 6c previously applied to the lower surface of the lid 2 is heated and melted and joined to hermetically seal the semiconductor element 3 therein, thereby completing a semiconductor device as a final product.

(Effects of the Invention) As described above, according to the package for housing a semiconductor element of the present invention, a metallized metal layer is deposited on the upper surface of the insulating base,
Further, an external lead terminal is fixed thereon via a glass member having a two-layer structure of a lower glass material having a dielectric constant of 17.0 or more and an upper glass material having a dielectric constant of 14.0 or less, and a semiconductor element among the external lead terminals. Since the terminal to which the power electrode or the ground electrode is connected is electrically connected to the metallized metal layer, a capacitor having a large capacitance can be formed between the metallized metal layer and the external lead terminal. As a result, the capacitive element effectively prevents the semiconductor element from being adversely affected by the fluctuation of the power supply voltage,
The semiconductor element can be operated normally and stably for a long time.

Also, since the dielectric constant of the glass material in contact with the external lead terminal is low, electric signals propagating through each of the adjacent external lead terminals do not greatly affect each other to generate noise, and the semiconductor contained inside by the noise is not generated. There is no malfunction of the device.

Further, since the capacitive element is formed by fixing an external lead terminal on the upper part of the insulating base on which the metallized metal layer is applied via a glass member having a dielectric constant of 17.0 or more, the semiconductor element of the insulating base is attached. There is no need to make the size of the recess particularly large in order to mount the capacitive element.
Therefore, when a semiconductor device is formed by joining the insulating base and the lid and hermetically sealing the container, the joining area between the insulating base and the lid can be increased without enlarging the external shape thereof, As a result, the reliability of hermetic sealing of the container can be increased, and the size of the semiconductor device can be reduced.

[Brief description of the drawings]

FIG. 1 is a sectional view showing one embodiment of a package for housing a semiconductor element according to the present invention. DESCRIPTION OF SYMBOLS 1 ... Insulating base 2 ... Lid 4 ... Metallized metal layer 5 ... External lead terminal 6 ... Glass member 6a ... Lower glass material 6b ... Upper glass material

──────────────────────────────────────────────────続 き Continued on the front page (58) Fields surveyed (Int.Cl. ⁶ , DB name) H01L 23/10 H01L 23/50

Claims (1)

(57) [Claims] 1. A semiconductor device housing package comprising a cover and an insulating base having a concave portion for housing a semiconductor element, wherein the insulating base has a metallized metal layer attached on an upper surface thereof, and An external lead terminal is fixed thereon via a glass member having a two-layer structure of a lower glass material having a dielectric constant of 17.0 or more and an upper glass material having a dielectric constant of 14.0 or less, and a power supply electrode or a ground of a semiconductor element among the external lead terminals. A package for housing a semiconductor element, wherein a terminal connected to an electrode is electrically connected to the metallized metal layer.