JP3381286B2 - Viterbi decoding method and device - Google Patents

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Viterbi decoding method and apparatus capable of removing a phase indeterminate state of a reproduced carrier signal.

[0002]

2. Description of the Related Art In a communication system on a communication path with severe power limitation, power is generally reduced by using an error correction code to obtain a coding gain. In such a communication system, it is common to perform convolutional coding on the transmitter side and Viterbi decoding on the receiver side, but especially the trellis coding modulation method that fuses the coding method and the modulation method Has been done.

This trellis coded modulation system convolutionally codes input data, and also uses this convolutional code as a user code.
This is a method of allocating to modulation signal points so that the maximum Crid distance is maximized, and the receiver side uses the Viterbi algorithm for decoding. Specific trellis coded modulation methods include, for example, the coded 8PSK method, the coded 16QAM method, the coded 32QAM method, and the coded 64QAM method.

Data transmission and reception by the conventional trellis coded modulation method will be described below. Here, description will be made by taking the coded 16QAM system as an example. On the transmitter side, convolutional coding is performed on the data to be transmitted to the receiver side,
Furthermore, signal assignment is performed on the convolutionally encoded data,
I signal (cos axis signal) and Q signal (sin axis signal)
Is input to the quadrature modulation circuit.

In the quadrature modulation circuit, the carrier signal and I
The signal and the carrier signal are phase-shifted by 90 ° and the Q signal are respectively multiplied, the multiplication results are added, and the band is limited by a band pass filter (BPF) and sent to the receiver side.

On the receiver side, the received signal sent from the transmitter is subjected to quadrature detection and input to the Viterbi decoding circuit as digital I and Q signals. Quadrature detection on the receiver side is performed as follows. The receiver regenerates the carrier signal based on the I and Q signals obtained as a result of the quadrature detection. This reproduced carrier signal, a signal obtained by phase-shifting the reproduced carrier signal by 90 °, and the received signal are multiplied, and the multiplication results are filtered by a low-pass filter (LPF), respectively, and further analog / digital (A
/ D) convert to reproduce digital I and Q signals.

In the Viterbi decoding circuit, a branch metric is calculated based on the I signal and the Q signal, a maximum likelihood path is further obtained, and output data of the maximum likelihood path is subjected to parallel / serial (P / S) conversion. Output as decrypted data.

In the Viterbi decoding circuit on the receiver side described above, even if the signal is disturbed by the influence of noise or the like on the transmission line between the transmitter and the receiver, the sequence closest to the transmitted signal sequence is searched for. It is possible to decrypt the data. However, in order to decode the data by the Viterbi decoding circuit, it is necessary to calculate the square of the Euclidean distance between the received signal and each signal point.

In the receiver described above, it is necessary to accurately reproduce the frequency and phase of the carrier signal sent from the transmitter for accurate data decoding. Generally, it is easy to accurately reproduce the carrier signal in terms of frequency. However, it is difficult to accurately reproduce the phase, and it is general that uncertainty remains in the phase of the reproduced carrier signal.

When the phase of the carrier signal is not accurately reproduced, the square of the Euclidean distance from the signal point which is assumed to be the received signal is also different from the original, and it is necessary to correct it by some means.

FIG. 9 is a diagram showing the configuration of a conventional Viterbi decoding circuit 7 having a carrier wave phase correction circuit 71. The conventional Viterbi decoding circuit 7 is preceded by the general quadrature detection circuit as described above, and performs data decoding on the I signal and the Q signal input from the quadrature detection circuit. In FIG. 9, a carrier phase correction circuit 71 is a carrier phase control circuit 7
Based on the phase control signal (SO _i ) of No. 6, the phase correction of the I signal and the Q signal input from the quadrature detection circuit is performed.

The branch metric generation circuit 72 is the square of the Euclidean distance (branch metric) from the signal point which is assumed to be the received signal based on the I signal and the Q signal whose phase is corrected by the carrier phase correction circuit 71. To calculate.
The ACS circuit 73 calculates the maximum likelihood path (path metric) from the branch metric calculated by the branch metric generation circuit 72, and controls the path memory 74.
The path memory 74 stores the maximum likelihood path for a predetermined number of stages under the control of the ACS circuit 73.

P / S (parallel / serial) conversion circuit 7
Reference numeral 5 converts the parallel format decoding result output from the path memory 74 into serial format data and outputs the data as decoded data. The carrier wave phase control circuit 76 includes the ACS circuit 7
The carrier phase correction circuit 71 is controlled based on the cumulative addition value of the normalized minimum state metric calculated in 3.

FIG. 10 is a diagram showing the configuration of a conventional first carrier phase correction circuit 71. Polarity inversion circuit (INV)
711a and 711b invert the polarities of the input I signal and Q signal. The multiplexing circuits 712a and 712b are configured to control the phase control signal SO ₀₁ of the carrier wave phase control circuit 76,
According to the control of SO _{02, one} of the non-inverted I signal and the inverted I signal which are respectively input is selected and output, and one of the non-inverted Q signal and the inverted Q signal is selected and output.

By configuring the carrier wave phase correction circuit 71 in this way, the output of the carrier wave phase correction circuit 71 is a non-inverted I signal and a non-inverted Q signal, an inverted I signal and a non-inverted Q signal, and a non-inverted I signal. It is the inverted I signal or one of the inverted I signal and the inverted I signal. With the combination of these four sets, the phase difference between the carrier signal and the reproduced carrier signal that causes the phase indeterminate state in the encoded 16QAM system is 0 °,
Corresponds to 90 °, 180 °, and 270 ° phase states.

FIG. 13 is a diagram showing a 16QAM signal. That is, when the 16QAM signal shown in FIG. 13A is different from the phase of the carrier signal of the transmitter by 90 ° in the 16QAM signal shown in FIG. In the case of 180 ° difference as shown in (C) and the case of 270 ° difference as shown in (D), they are decoded as signals different from the original I signal and Q signal as shown in the figure. Become.

However, the phase correction for obtaining the original I and Q signals can be realized by simply changing the polarities or combinations of the I and Q axes. The conventional first carrier wave phase correction circuit 71 is based on such a principle.

In addition to the above, a carrier phase correction circuit as described below has been conventionally known. FIG. 11 is a diagram showing a configuration of a conventional second carrier phase correction circuit 81. The conventional second carrier wave phase correction circuit 81 is not possible by using the conventional first carrier wave phase correction circuit 71, for example, 4 corresponding to the coded 8PSK system.
It is configured to be capable of phase correction of 5 °, 135 °, 225 °, and 315 °. The conventional second carrier phase correction circuit 81 is used by replacing it with the conventional first carrier phase correction circuit 71 in the conventional Viterbi decoding circuit 7.

In FIG. 11, a 45 ° correction circuit 710 is provided.
Shifts the input I and Q signals by 45 °. The multiplexing circuits 713a and 713b receive the 45 ° correction control signal (S) input from the carrier wave phase control circuit 76.
Controlled by O ₁₃ ), the I signal and the Q signal which are phase-shifted by 45 ° and the I signal and the Q signal which are not phase-shifted are selected and output. The carrier wave phase correction circuit 71 has the same configuration as the above-described first conventional carrier wave phase correction circuit 71, and similarly performs the phase correction.

That is, in the second conventional carrier wave phase correction circuit 81, it is selected by the multiplexing circuits 713a and 713b whether or not to perform the phase correction in 45 ° units, and the conventional first carrier wave phase correction circuit 71 is further selected. By performing the same phase correction as above, 45 °, 90 °, 135 °, 180 °,
Corrections corresponding to eight phase states of 225 °, 270 °, and 315 ° are performed.

FIG. 12 is a diagram showing the configuration of the 45 ° correction circuit 710. The 45 ° correction circuit 710 includes the addition circuit 71.
10, a subtraction circuit 7111, and a multiplication circuit 7112a,
7112b. The addition circuit 7110 calculates the sum of the I signal and the Q signal input to the 45 ° correction circuit 710, and the subtraction circuit 7111 calculates the difference. The respective calculation results are the polarity inversion circuits 7112a and 7112b.
Is multiplied by (1 / √2) and output. Since the I signal and the Q signal have a phase difference of 90 ° with each other, a phase shift of 45 ° is possible by the above processing.

[0022]

According to the first conventional carrier wave phase correction circuit described above, a reproduced carrier wave signal is generated for a signal in which a phase indeterminate state occurs every 90 °, such as a signal by the coded 16QAM system. It is possible to correct the phase. However, in the case of using the first conventional carrier wave phase correction circuit, although it is possible to cope with a coding method in which the phase indeterminacy of the reproduced carrier wave signal is up to four states like the QAM coding method, for example, 8PSK As described above, it is not possible to cope with an encoding method in which the phase indeterminate state of the reproduced carrier signal is eight states.

For a coded 8PSK system in which the phase indeterminacy of the reproduced carrier signal is in eight states, a device configuration such as a conventional second carrier phase correction circuit is used to correct the phase of the reproduced carrier signal. Need to take. Conventionally, a phase correction circuit having a complicated circuit configuration and a large circuit scale, which has an addition circuit, a subtraction circuit, a multiplication circuit, and the like, has been required to cope with an encoding method in which the phase indeterminacy is four states or more. .

The present invention has been made in view of the above-mentioned problems of the prior art, and has a phase uncertain state of four states or more, although the circuit configuration is not complicated and the circuit scale is small. It is an object of the present invention to provide a Viterbi decoding method and an apparatus therefor capable of coping with a coded modulation method.

[0025]

In order to achieve the above object, a Viterbi decoding method and apparatus according to the present invention provide a received signal coded and modulated by trellis coded modulation,
A branch metric is calculated for each of the received signals based on the coded modulation system, a maximum likelihood path is calculated based on the branch metric, and a predetermined minimum number of state metrics are cumulatively added to calculate a cumulative addition value. Then, each branch metric is associated with the signal point of the received signal based on the cumulative addition value.

Further, the association is performed by replacing the branch metrics.

The Viterbi decoding method according to claim 1 or 2, wherein the associating is performed on condition that the cumulative addition value is equal to or larger than a predetermined reference value.

The association is performed until the cumulative addition value becomes equal to or less than the reference value.

Further, with respect to the received signal coded and modulated by the trellis coded modulation, branch metric calculating means for calculating a branch metric of the received signal based on the coded modulation method, and a maximum likelihood path based on the branch metric. And cumulative addition means for calculating a cumulative addition value by cumulatively adding a predetermined number of normalized minimum state metrics, and branch metric replacement means for replacing each branch metric based on the cumulative addition value. .

Further, the branch metric replacement means has a barrel shifter, and the branch metric replacement is performed by shifting the order of the one set of branch metrics by the barrel shifter.

Further, the branch metric replacement means has a selector, and the branch metric replacement is performed by shifting the order of the one set of branch metrics by the selector.

Further, the replacement is performed on condition that the cumulative addition value is equal to or more than a predetermined reference value.

The replacement is performed until the cumulative addition value becomes equal to or less than the reference value.

[0034]

Operation: The square of the Euclidean distance between the received signal and the modulation signal point is generated as a temporary branch metric regardless of whether the reproduced carrier signal is phase-correctly reproduced from the carrier signal of the transmitter. Then, based on this temporary branch metric, it is discriminated whether or not the reproduced carrier signal and the carrier signal of the transmitter are in phase synchronization. Furthermore, by replacing the provisional branch metrics by deciding which original signal point each provisional branch metric corresponds to, the same original branch as when the reproduced carrier signal was reproduced exactly in phase. Get the metric.

[0035]

Embodiments of the Viterbi decoding method and apparatus according to the present invention will be described below. The configurations of the transmitter 5 and the receiver 1 that implement the Viterbi decoding method and apparatus of the present invention will be described. FIG. 1 is a diagram showing a configuration of a general transmitter 5 that transmits data by a trellis coded modulation method. FIG. 2 is a diagram showing the configuration of a receiver 1 to which the Viterbi decoding method and apparatus of the present invention are applied. Figure 3
FIG. 3 is a diagram showing a configuration of a Viterbi decoding circuit 20 of the receiver 1.

In FIG. 1, a convolutional encoder 51 performs parallel convolutional encoding on a data input to be transmitted at a rate corresponding to a coded modulation method set from the outside, and inputs it to a signal allocation circuit 52. Hereinafter, convolutional coding in the convolutional encoder 51 and signal allocation in the signal allocation circuit 52 will be described by taking 8PSK as an example. FIG. 4 is a diagram showing the Euclidean distance between 8PSK signals. As shown in FIG. 4, the Euclidean distance Δ ₀ = Δ ₂ sin (π / 8) ≈0.3
827 Δ ₂ Euclidean distance Δ ₁ = Δ ₂ / √2 ≈0.7
071 Δ ₂ Euclidean distance Δ ₀ = Δ ₂ cos (π / 8) ≈0.9
The relationship is 239Δ ₂ .

FIG. 5 is a diagram showing an example of the trellis representation of the convolutional encoder 51 when the constraint length is 3 and the number of registers ν is 2. The convolutional encoder 51 has a 2-bit input signal (x
_1, x ₀₎ 3-bit output signal to the (y _2, y _1,
y ₀ ) is output. This output signal (y ₂ , y ₁ , y ₀ )
Correspond to the signals S _{0 to} S ₇ in FIG. In FIG. 5, the path (0-0) that rejoins from the register state (0,0,0) to (0,0,0) in the third time slot.
The inter-signal distance is obtained for two paths of (−0) and path (6-7-6). Here, as for the Euclidean distance of the path (6-7-6), referring to FIG. 5, one signal point is S ₀ and the other signal point is S ₆ in the first branch. The distance is Δ ₁ .

Similarly, the Euclidean distance of the second branch is Δ ₀ , and the Euclidean distance of the second branch is Δ ₁ . Therefore, the square of the Euclidean distance of the path (6-7-6) is d ₀ ² = Δ ₂ (6−√2) / 2.

In addition to this path (6-7-6), the path from the register state (0,0,0) to the register state (0,0,0) after 3 time slots is the path (0-0-0). ),
There are a path (6-5-2), a path (4-1-2), and a path (4-3-6), and the square of the Euclidean distance of each of these paths is larger than d ₀ ² . Coding is performed by allocating to each signal point in FIG. 4 so that the minimum value of the square of the minimum Euclidean distance obtained in this way becomes maximum.

The signal allocation circuit 52 is a convolutional encoder 51.
A signal is assigned to the parallel convolutional code output of and is input to the PSK modulation circuit 6 as an I signal and a Q signal. The local oscillator circuit 64 generates a carrier signal and inputs it to the hybrid circuit 65 and the mixer 61a. The hybrid circuit 65 delays the phase of the carrier signal generated by the local oscillation circuit 64 by 90 ° and inputs it to the mixer 61b.

The mixers 61a and 61b perform multiplication of the I signal and the carrier signal, and multiplication of the Q signal and the carrier signal delayed in phase by 90 ° in the hybrid circuit 65.
The adder circuit 62 adds the output signals of the mixers 61a and 61b and inputs them to the BPF 63. The BPF 63 filters a predetermined frequency component of the output signal of the adder circuit 62 to obtain a modulated output signal.

The configuration of the receiver 1 will be described below with reference to FIG. The receiver 1 is composed of a QAM demodulation circuit 10 and a Viterbi demodulation circuit 20.

In the QAM demodulation circuit 10, the carrier wave reproduction circuit 15 reproduces the carrier wave signal based on the output signals of the A / D conversion circuits 13a and 13b, and inputs it to the mixer 11a and the hybrid circuit 14. The hybrid circuit 14 phase-shifts the carrier signal reproduced by the carrier reproducing circuit 15 by 90 ° and inputs the carrier signal to the mixer 11b.

Each of the mixers 11a and 11b multiplies the carrier signal regenerated by the carrier regenerating circuit 15 by the modulated output signal of the transmitter 5 and inputs the result into the LPF 12a, and the regenerated carrier shifted by 90 ° in the hybrid circuit 14. The signal and the modulated output signal of the transmitter 5 are multiplied to be converted into a base band, and the result is input to the LPF 12b.

The LPFs 12a and 12b filter the frequency components below a predetermined high cutoff frequency of the output signals of the mixers 11a and 11b, respectively, and the A / D conversion circuit 13
a and 13b. A / D conversion circuits 13a and 13b
Respectively perform analog / digital (A / D) conversion on the output signals of the LPFs 12a and 12b, and input them to the Viterbi demodulation circuit 20 as digital I and Q signals.

The Viterbi demodulation circuit 20 will be described below with reference to FIG.
The configuration of will be described. Branch metric generation circuit 21
Is the I signal and Q input from the QAM demodulation circuit 10.
The square of the Euclidean distance (branch metric) is calculated based on the signal.

The branch metric correction circuit 22 is shown in FIG.
It is composed of a barrel shifter 220 as shown in (A), and based on a control signal from the carrier phase control circuit 26, input data (I1k) and output data (O2k) (k =
1 to xx) and the phase compensation of the reproduced carrier is equivalently performed.

In FIG. 6B, here, I101 to I
1XX indicates a branch metric input from the branch metric generation circuit 21. Under the control of the carrier wave phase control circuit 26, the barrel shifter 220 gives a specified shift amount to the input branch metrics (I101 to I1XX) and outputs the output data (O201).
~ O2xx).

FIG. 6B shows the case where the shift amount is 1. Assuming that the input data is shifted by 1 bit by the control signal given to the barrel shifter 220, the output data O201 outputs the input data I102 and the output data O202 outputs the input data I103 as the corrected branch metrics. Such a relationship also holds between input and output data (not shown). Also, for different shift amounts, similarly, a shift corresponding to the shift amount is given to the input data and given to be output.

In this way, the set of branch metrics, which is the square of the Euclidean distance between the received signal and each signal point, is sequentially shifted according to the phase state of the signal point. The phase of the reproduced carrier signal is corrected by. A circuit such as a multiplexer may be used instead of the barrel shifter 220.

The ACS circuit 23 calculates the maximum likelihood path based on the input branch metric, calculates the branch with the highest likelihood, controls the path memory 24, and stores this branch metric and the state already stored. A metric is added, the minimum value of the state metric is subtracted from the added value and normalized, and this value is stored as a new state metric.

The path memory 24 stores the paths selected under the control of the ACS circuit 23 for a predetermined number of stages.
The P / S conversion circuit 25 performs parallel / serial conversion on the maximum likelihood path output data in parallel format output from the path memory 24 and outputs the data in serial data format. Carrier wave phase control circuit 2
6 identifies that the phase of the reproduced carrier signal is out of phase with the carrier signal of the transmitter on the basis of the normalized minimum state metric output from the ACS circuit 23. Control to perform phase shift compensation.

The operation of the transmitter 5 and the receiver 1 will be described below. The transmitter 5 performs convolutional coding on the data input by the convolutional encoder 51 at a rate corresponding to the coded 8PSK method, and the signal allocation circuit 52 determines the minimum Euclidean distance between the signals on the convolutional coded data. Signal allocation corresponding to the coded modulation scheme set so as to be maximum is performed and input to the PSK modulation circuit 6 as an I signal and a Q signal.

Further, the PSK modulation circuit 6 modulates the I signal and the Q signal input from the signal allocation circuit 52 and sends them to the receiver 1. In the PSK modulation circuit 6, the local oscillator circuit 64 generates a carrier signal. This carrier signal is directly input to the mixer 61a and the hybrid circuit 65.

The carrier signal input to the hybrid circuit 65 is phase-shifted by 90 ° and input to the mixer 61b. The mixers 61a and 61b multiply the carrier signals having different phase shifts by the I signal and the Q signal output from the signal allocation circuit 52, respectively. The two multiplication results are added by the adding circuit 55, band-limited by the filtering in the BPF 63, and sent to the receiver 1.

The receiver 1, which receives the signal from the transmitter 5,
The mixers 11a and 11b multiply the carrier wave signal reproduced by the carrier wave reproducing circuit 11 and the signal obtained by phase-shifting the carrier wave signal by 90 degrees in the hybrid circuit 14, respectively. The multiplication results are filtered by the LPFs 12a and 12b, respectively, and further, the A / D conversion circuit 13
A / D conversion is performed by a and 13b. The output signals of the A / D conversion circuits 13a and 13b are input to the Viterbi demodulation circuit 20 as an I signal and a Q signal, respectively.

The operation of the Viterbi demodulation circuit 20 will be described below. First, as a premise, the reproduced carrier signal and the transmitter 5
Described below is how the decoded data will be affected if the carrier signal has a phase difference and no phase correction is performed, and the nature of the branch metric at that time. Figure 7
FIG. 6 is a diagram showing an 8PSK signal when the phase difference between the reproduced carrier signal of the receiver 1 and the carrier signal of the transmitter 5 is 0 ° and 45 ° in order to explain the operation of the Viterbi demodulation circuit 20.

When the phase difference between the reproduced carrier signal of the receiver 1 and the carrier signal of the transmitter 5 is 0 °, that is, when the reproduced carrier signal is accurately reproduced in phase, each signal point S
_{0 to} S ₇ match between the receiver 1 and the transmitter 5. For this reason,
Correct decoded data can be obtained.

On the other hand, as can be seen by comparing FIGS. 7 (A) and 7 (B), the reproduced carrier signal and the carrier signal of the transmitter 5 have 4
When there is a phase difference of 5 °, even if the transmitter 5 transmits S ₀ , the receiver 1 outputs S ₇ as decoded data. When there is a phase difference between them, the value calculated as the branch metric between the received signal and the signal point S _{7 by} the receiver 1 is actually the branch metric between the signal point S _0. .

However, a set of branch metrics calculated at the same time is composed of the same elements regardless of the phase shift between the reproduced carrier signal and the reproduced carrier signal of the transmitter 5. That is, the branch metric calculation value differs only in which signal point is calculated corresponding to the phase difference. This is because the signal point that gives the uncertain phase of the reproduced carrier signal is axially symmetric or point symmetric with respect to the carrier signal.

From the above, since the branch metric which is the square of the Euclidean distance between the signal point and the received signal is also axially symmetric or point symmetric with respect to the carrier signal, the set of branch metrics found there is It is possible to correct the uncertainty of the phase of the reproduced carrier signal by shifting whether or not the signal point in the phase state is shifted.

The operation of correcting the phase of the reproduced carrier signal in the Viterbi demodulation circuit 20 and the carrier signal of the transmitter 5 will be described below. The branch metric generation circuit 21 generates, as a branch metric, the square of the Euclidean distance between the received I signal and Q signal and each signal point in the currently assumed coding method.

However, in this case, it is assumed that the phase of the reproduced carrier signal matches the phase of the carrier signal of the transmitter 5. In the branch metric correction circuit 22,
Based on the branch metric input from the branch metric generation circuit 21 and the control signal from the carrier signal phase control circuit 26, which branch metric is assigned to each signal point is determined.

The branch metric correction circuit 22 removes the phase uncertainty of the reproduced carrier signal and inputs the corrected branch metric to the ACS circuit 23 as a correct branch metric. The ACS circuit 23 calculates the maximum likelihood path based on the branch metric calculated by the branch metric generation circuit 21, and controls the path memory circuit 24 by the branch selection signal and the path selection signal. Since the output data of the path memory 24 is in parallel format, it is converted into a serial format signal by the P / S conversion circuit 25 and output as decoded data.

The carrier wave phase control circuit 26 is the ACS circuit 2
The branch metric correction circuit 22 is controlled on the basis of the normalized minimum state metric input from the controller 3. That is, the carrier wave phase control circuit 26 cumulatively adds the normalized minimum state metric a predetermined number of times, and if the cumulative addition result is greater than or equal to a predetermined reference value, the shift amount of the barrel shifter 220 of the branch metric correction circuit 22 is reproduced. If there is a phase difference between the carrier wave signal and the carrier wave signal of the transmitter 5, it is incremented by one, and if it is below the reference value, it is discriminated that there is no phase difference between the two and the shift amount of the barrel shifter 220 is held at that value.

FIG. 8 is a flowchart showing the processing performed by the Viterbi demodulation circuit 20. The processing in the Viterbi demodulation circuit 20, particularly the carrier phase control circuit 26 will be described below with reference to FIG. In FIG. 8, step 01
In (S01), the branch metric generation circuit 21
Calculates the branch metric. Step 02 (S0
In 2), the ACS circuit 23 calculates a normalized minimum state metric based on the branch metric calculated by the branch metric generation circuit 21.

The process in step 03 (S03) and subsequent steps is the process in the carrier wave phase control circuit 26. Step 03 (S03)
At, the carrier wave phase control circuit 26 cumulatively adds the normalized minimum state metric calculated in the ACS circuit. In step 04 (S04), the carrier phase control circuit 26 determines whether or not the normalized minimum state metric has been cumulatively added a prescribed number of times. If the specified number of times has been cumulatively added, the process proceeds to S01. If the specified number of times has not been cumulatively added, the process proceeds to S05.

In step 05 (S05), the carrier phase control circuit 26 determines whether or not the result of cumulative addition of the normalized minimum state metric is less than or equal to the reference value. If it is equal to or less than the reference value, the cumulative addition value is reset (S06) and the process proceeds to S01. If it is not less than the reference value, the cumulative addition value is reset (S07), and the shift amount of the branch metric correction circuit 22 is increased by 1 (S08).

As described above, the determination in S05 is a determination regarding the cumulative value of the normalized minimum state metric. Here, when the retransmitted carrier signal and the carrier signal of the transmitter 5 are in phase synchronization, this cumulative addition value represents the level of noise, distortion, and interference in the transmission path. On the other hand, when the retransmitted carrier signal and the carrier signal of the transmitter 5 are not phase-synchronized, the cumulative addition value of this path metric becomes a certain value or more irrespective of the levels of noise, distortion, and interference in the transmission path. There is.

Generally, the cumulative addition value when the retransmitted carrier signal and the carrier signal of the transmitter 5 are in phase synchronization is about (1/1) compared to the cumulative addition value when the carrier signal is not synchronized.
The value is about 2). The standard value for cumulative value is 2
The cumulative addition value in one case is set to a value that can be clearly identified.

In addition to the above description, the Viterbi decoding method and apparatus of the present invention can have various configurations such as those shown as modifications in the embodiments. The embodiments described above are merely examples.

[0072]

As described above, according to the present invention, a coded modulation system having a phase uncertain state of four states or more is supported even though the circuit configuration is not complicated and the circuit scale is small. It is possible to provide a possible Viterbi decoding method and its apparatus.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a general transmitter that transmits data by a trellis coded modulation method.

FIG. 2 is a diagram showing a configuration of a receiver to which the Viterbi decoding method and apparatus of the present invention are applied.

FIG. 3 is a diagram showing a configuration of a Viterbi decoding circuit of a receiver.

FIG. 4 is a diagram showing a Euclidean distance between 8PSK signals.

FIG. 5 is a diagram showing an example of a trellis representation of a convolutional encoder when the constraint length is 3 and the number of registers ν is 2.

FIG. 6 is a view showing a barrel shifter.

FIG. 7 illustrates a phase difference between a reproduced carrier signal of a receiver and a carrier signal of a transmitter to explain the operation of a Viterbi demodulation circuit.
It is a figure which shows 8PSK signal in the case of (degrees) and 45 degrees.

FIG. 8 is a flowchart showing processing performed by a Viterbi demodulation circuit.

FIG. 9 is a diagram showing a configuration of a conventional Viterbi decoding circuit having a carrier wave phase correction circuit.

FIG. 10 is a diagram showing a configuration of a first conventional carrier wave phase correction circuit.

FIG. 11 is a diagram showing a configuration of a second conventional carrier wave phase correction circuit.

FIG. 12 is a diagram showing a configuration of a 45 ° correction circuit.

FIG. 13 is a diagram showing a 16QAM signal.

[Explanation of symbols]

1 ... Receiver 10 ... QAM demodulation circuit 11 ... Multiplier circuit 12 ... LPF 13 ... A / D conversion circuit 14 ... Hybrid circuit 15 ... Carrier recovery circuit 20: Viterbi demodulation circuit 21 ... Branch metric generation circuit 22 ... Branch metric correction circuit 220 ... Barrel shifter 23 ... ACS circuit 24: Path memory 25 ... P / S conversion circuit 5 ... Transmitter 51 ... Convolutional encoder 52 ... Signal allocation circuit 6 ... PSK modulation circuit 61 ... Multiplier circuit 62 ... Adder circuit 63 ... BPF 64 ... Local oscillator circuit 65 ... Hybrid circuit

─────────────────────────────────────────────────── --- Continuation of the front page (56) Reference JP-A-4-291552 (JP, A) JP-A-4-354422 (JP, A) JP-A-1-198846 (JP, A) JP-A-59- 12654 (JP, A) JP 4-335718 (JP, A) JP 4-291552 (JP, A) JP 63-153923 (JP, A) (58) Fields investigated (Int. ⁷ , DB name) H04L 25/08 H04L 27/00-27/38 H03M 13/23

Claims (9)

(57) [Claims] 1. A received signal coded and modulated by trellis coded modulation, a branch metric is calculated for each received signal based on a coded modulation method, and a maximum likelihood path is calculated based on the branch metric.
A Viterbi decoding method for calculating a cumulative addition value by cumulatively adding a predetermined number of normalized minimum state metrics, and associating each branch metric with a signal point of the received signal based on the cumulative addition value. 2. The association is performed by replacing each of the branch metrics.
The Viterbi decoding method described in. 3. The Viterbi decoding method according to claim 1, wherein the associating is performed on condition that the cumulative addition value is equal to or larger than a predetermined reference value. 4. The Viterbi decoding method according to claim 3, wherein the associating is performed until the cumulative addition value becomes equal to or less than the reference value. 5. A branch metric calculating unit for calculating a branch metric of a received signal coded and modulated by trellis coded modulation based on a coded modulation method, and a maximum likelihood path based on the branch metric. And calculate
A Viterbi decoding device comprising: a cumulative addition unit that cumulatively adds a predetermined number of normalized minimum state metrics to calculate a cumulative addition value; and a branch metric replacement unit that replaces each branch metric based on the cumulative addition value. 6. The branch metric replacement means has a barrel shifter, and the branch metric replacement is performed by shifting the order of the set of branch metrics by the barrel shifter. Viterbi decoding device. 7. The branch metric replacement means has a selector, and the branch metric replacement is performed by shifting the order of the set of branch metrics by the selector. Viterbi decoding device. 8. The Viterbi decoding device according to claim 5, wherein the replacement is performed on condition that the cumulative addition value is equal to or larger than a predetermined reference value. 9. The replacement is performed until the cumulative addition value becomes equal to or less than the reference value.
8. The Viterbi decoding device according to any one of 8.