JPH06232921A - Method and device for viterbi decoding - Google Patents

Abstract

PURPOSE:To obtain the Viterbi decoding and its device in which a receiver makes demodulation of data corresponding to a code modulation system of a transmitter and the phase is coincident with a phase of a recovered carrier signal. CONSTITUTION:A phase shift circuit 200 shifts the phase of I and Q signals according to the control from a control circuit 207. An Euclidean distance calculation circuit 201 calculates a branch metric based on the assumed coding system as to a reception signal. An ACS circuit 202 makes maximum likelihood path calculation based on the inputted branch metric. The path memory 203 is controlled by the ACS circuit 202 and stores a prescribed stage number of selected paths. A path metric accumulation circuit 206 accumulates a minimum state metric calculated by the ACS circuit 202 by a prescribed number and calculates the result. The control circuit 207 controls the phase shift circuit 200 and the Euclidean distance calculation circuit 201 based on the result of accumulation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Viterbi decoding method and apparatus for automatically receiving a trellis-coded received signal and automatically following the modulation method to remove the phase uncertainty of the reproduced carrier signal.

[0002]

2. Description of the Related Art In a communication system used in a communication path with severe power limitation, an error correction code is generally used to obtain a coding gain to reduce power. In such a communication system, convolutional coding is generally performed on the transmission side, and Viterbi decoding is generally performed at the receiver. In particular, a trellis-coded modulation system, which is a combination of a modulation system and a coding system, is receiving attention. Hereinafter, transmission and reception of data by trellis coding which has been conventionally used will be described.

In the trellis coded modulation method, input data is convolutionally coded on the transmission side, and this convolutionally coded signal (convolutional code) is converted into modulation signal points so that the Euclidean distance is maximized. It is a method of allocation.
As a specific trellis modulation method, for example, coded 8P
There are SK, coded 16QAM, coded 32QAM, coded 64QAM, and the like.

FIG. 2 is a diagram showing the configuration of a general transmitter 5 for transmitting data by the trellis coding method. The transmitter 5 modulates the carrier wave with 16QAM with the input data and sends the modulated output signal to the receiver 1.

FIG. 3 is a diagram showing the configuration of a receiver 1 for decoding data encoded by trellis encoding. The receiver 1 includes a 16QAM demodulation circuit 14 and a Viterbi decoding circuit 2
It consists of two. The 16QAM demodulation circuit 14 demodulates the modulated output signal from the transmitter 5 and inputs it to the Viterbi decoding circuit 22 as digital I and Q signals.

FIG. 7 is a diagram showing the configuration of a conventional Viterbi decoding circuit 22. The Viterbi decoding circuit 22 performs error correction based on the I (cos axis signal) signal and the Q signal (sin axis signal) input from the 16QAM demodulation circuit 14,
Decrypt the data. Euclidean distance calculation circuit 201
Is the Euclidean distance from each signal point of the modulation method used in the receiver 1 and the transmitter 5 based on the input digital I signal and Q signal, and the ACS circuit 202 as a so-called branch metric. To enter.

The ACS circuit 202 performs maximum likelihood path calculation based on the input branch metric, calculates the branch with the highest likelihood and controls the path memory 203, and the branch metric already stored in this branch metric. The state metric is added, the minimum value of the state metric is subtracted from the added value, and the normalized value is stored as a new state metric.

The path memory 203 stores paths selected under the control of the ACS circuit 202 for a predetermined number of stages. The P / S conversion circuit 204 outputs the maximum likelihood path output of the parallel format, which is the output from the path memory 203, to the parallel / parallel
Convert to serial and output in serial data format.

[0009]

In transmitting and receiving data using the conventional trellis coding described above, the precondition is that the coding systems of the transmitter and the receiver are the same. In other words, in order for the receiver of the above system to decode correct data, the modulation method premised on the decoding by the receiver must be exactly the same as the modulation method of the transmitter.

When the modulation system of the transmitter is constant, the receiver may perform decoding corresponding to the modulation system.
There is no problem that a data error occurs due to a mismatch between the transmitter, the modulation system, and the decoding system of the receiver. However, if the transmitter can use various modulation schemes such as 16QAM, 32QAM, and 64QAM, there is a problem that a data error occurs due to a mismatch between the transmitter, the modulation scheme, and the decoding scheme of the receiver. In addition, even if the modulation method of the transmitter is not constant, the receiver automatically performs decoding corresponding to the coding method of the transmitter, and always obtains the correct decoded data regardless of the change of the coding method of the transmitter. There is a request to get it.

Further, even when the transmitter's modulation system presupposed in the receiver matches the transmitter's modulation system, in order to obtain correct decoding data, the frequency and phase of the regenerated carrier signal in the receiver are obtained. Must match the frequency and phase shift of the carrier signal on the transmitting side. However, generally, in a receiver, only the frequency can be accurately reproduced, and even if a carrier wave recovery circuit is usually used, uncertainty remains in the phase recovery.

For example, the transmitter encoding system is 16QAM.
In the case of, the uncertain state is 0 °, 90 °, 180 °,
And 270 ° phase states and these phase shift states cannot be distinguished. Conventionally, a so-called differential code is used for eliminating this phase uncertainty. However, a complicated processing circuit is required for encoding and decoding using the differential code. There is a problem that the configurations of the transmitter and the receiver are complicated.

The present invention has been made in view of the above-mentioned problems of the prior art. Even when the coding system of the transmitter is changed, the receiver automatically codes the coding system of the transmitter. It is possible to decode data corresponding to, and it is possible to match the phase of the carrier wave signal reproduced by the receiver with the carrier wave signal at the transmitter without using a differential code. An object of the present invention is to provide a Viterbi decoding method and an apparatus thereof capable of preventing the configuration of a receiver from becoming complicated.

[0014]

To achieve the above object, a Viterbi decoding method and apparatus according to the present invention determine a received signal coded by trellis coding based on an assumed coded modulation method. When the cumulative addition value of the minimum state metric of the number of times is calculated, and the cumulative addition value of the minimum state metric is equal to or more than a predetermined reference value,
The phase relationship between the regenerated carrier signal and the input received signal is sequentially changed, and if the cumulative addition value is not greater than or equal to the predetermined reference value, the data of the received signal is decoded.

Further, when the cumulative addition value of the minimum state metric is equal to or more than the reference value in all of the phase relationships corresponding to the assumed coding method, the assumed coding modulation method is sequentially changed. It is characterized by doing.

Further, the phase relation is changed and the assumed coded modulation method is changed until the cumulative addition value of the minimum state metric becomes equal to or less than the predetermined reference value.

Further, the reference value is set for each of the assumed coded modulation methods.

Also, phase shifting means for changing the phase relationship between the reproduced carrier signal and the received signal, and the minimum state metric for calculating the cumulative addition value of the minimum state metric of the received signal based on the assumed coding and modulation method. Cumulative addition value calculation means and phase shift control means for sequentially controlling the phase shift means to change the phase relationship when the cumulative addition value of the minimum state metric is larger than a predetermined reference value. Have.

Further, the phase shift control means is assumed when the cumulative addition value of the minimum state metric is equal to or more than the reference value in all of the phase relationships corresponding to the assumed encoding method. It is characterized in that the coding and modulation scheme is changed sequentially.

Further, the phase shift control means changes the phase relationship and the assumed coded modulation method until the cumulative addition value of the minimum state metric becomes equal to or less than the predetermined reference value. It is characterized by performing.

Further, the reference value is set for each of the assumed coded modulation methods.

The phase shift control means is composed of a microcomputer.

[0023]

The minimum state metric of the received signal is calculated based on the assumed coded modulation system and the phase of the reproduced carrier signal, and the cumulative addition value of the predetermined number of times is set as the reference value corresponding to each coding system. By comparing, it is determined whether the encoding methods match and the reproduced carrier signal phases match. When the encoding method and the phase of the reproduced carrier signal do not match, the phase shift amount of the I signal and the Q signal input to the Viterbi decoding circuit is changed by a predetermined value,
Further, in the case where the cumulative addition result does not become equal to or less than the standard value in all the phase shift amounts corresponding to the assumed coding scheme, the coding modulation scheme is changed and the cumulative addition value of the path metric in the coding modulation scheme is changed. Judge and change the amount of phase shift. By such an operation, the receiver side can automatically follow the encoding method on the transmitter side, and the phase indeterminate state can be removed.

[0024]

Embodiments of the Viterbi decoding method and apparatus of the present invention will be described below. In the Viterbi decoding method and the apparatus thereof according to the present invention, the receiver 1 calculates the cumulative addition value of the minimum state metrics of the data trellis-encoded and transmitted in the transmitter 5, and accumulates the minimum value of the state metrics. The phases of the I signal (cos axis signal) and the Q signal (sin axis signal) input to the Viterbi decoding circuit 22 are sequentially changed until the added value becomes a predetermined value or less.

In this way, the receiver 1 side finds the modulation method (modulation method) of the transmitter 5, and the phase of the carrier signal of the transmitter 5 and the phase of the reproduced carrier signal of the receiver 1 are made to coincide with each other to obtain correct data. Is to be decrypted.

FIG. 1 is a diagram showing the configuration of the Viterbi decoding circuit 22 of the present invention. The phase shift circuit 200 includes a control circuit 207.
According to the control from 1), the phases of the I signal and the Q signal input from the QAM demodulation circuit 14 described later are respectively shifted. The Euclidean distance calculation circuit 201 obtains the Euclidean distance from each signal point of the signal system of the modulation system (encoding system) assumed in the receiver 1 based on the input digital I signal and Q signal, The so-called branch metric is input to the ACS circuit 202.

The ACS circuit 202 performs maximum likelihood path calculation based on the input branch metric, calculates the branch with the highest likelihood, controls the path memory 203, and stores the state already stored in this branch metric. A metric is added, the minimum value of the state metric is subtracted from the added value, and the normalized value is set as a new state metric.

The path memory 203 stores a predetermined number of paths selected under the control of the ACS circuit 202. The P / S conversion circuit 204 outputs the maximum likelihood path output of the parallel format, which is the output from the path memory 203, in parallel / parallel
Convert to serial and output in serial data format.

The path metric accumulator circuit 206 outputs the ACS
The minimum state metric calculated by the circuit 202 is cumulatively added by a fixed number to calculate the minimum value. Control circuit 207
Generates a modulation control signal and a phase control signal based on the cumulative addition result of the path metric accumulation circuit 206, and controls the phase shift circuit 200 and the Euclidean distance calculation circuit 201. Each part of the Viterbi decoding circuit 22 of the present invention is
This corresponds to a part to which the same reference numeral as that of the Viterbi decoding circuit shown in FIG.

Next, the configurations of the transmitter 5 and the receiver 1 will be described. FIG. 2 is a diagram showing the configuration of a general transmitter 5 that transmits data by the trellis coding method. In this embodiment, unlike the one shown as the prior art,
The transmitter 5 does not perform modulation using only 16QAM, but may use 8PSK, 16QAM, 32
Data input by either the QAM or 64QAM modulation method is encoded and transmitted to the receiver 1.

In FIG. 2, a convolutional encoder 51 performs parallel convolutional encoding on a data input to be transmitted at a rate corresponding to a coded modulation method set from the outside, and inputs it to a signal allocation circuit 52.

The convolutional coding in the convolutional encoder 51 and the signal allocation in the signal allocation circuit 52 will be described below by taking 8PSK as an example. FIG. 4 is a diagram showing the Euclidean distance between 8PSK signals. As shown in FIG. 4, the Euclidean distance Δ ₀ = Δ ₂ sin (π / 8) ≈0.3
827 Δ ₂ Euclidean distance Δ ₁ = Δ ₂ / √2 ≈0.7
071 Δ ₂ Euclidean distance Δ ₀ = Δ ₂ cos (π / 8) ≈0.9
The relationship is 239Δ ₂ .

FIG. 5 is a diagram showing an example of the trellis representation of the convolutional encoder 51 when the constraint length is 3 and the number of registers ν is 2. The convolutional encoder 51 has a 2-bit input signal (x
_1, x ₀₎ 3-bit output signal to the (y _2, y _1,
y ₀ ) is output. This output signal (y ₂ , y ₁ , y ₀ )
Correspond to the signals S _{0 to} S ₇ in FIG.

In FIG. 5, register states (0, 0,
0) to the third time slot again (0,0,0)
Rejoining path (0-0-0), and path (6-7
-6) Find the inter-signal distance for the two paths. Here, as to the Euclidean distance of the path (6-7-6), referring to FIG. 4, one signal point is S ₀ and the other signal point is S ₆ in the first branch. The distance is Δ ₁ .

Similarly, the Euclidean distance of the second branch is Δ ₀ , and the Euclidean distance of the second branch is Δ ₁ . Therefore, the sum of squares of the Euclidean distance of the path (6-7-6) is d ₀ ² = Δ ₂ (6−√2) / 2.

In addition to this path (6-7-6), the path from the register state (0,0,0) to the register state (0,0,0) after 3 time slots is the path (0-0-0). ),
Although there are paths (6-5-2), paths (4-1-2), and paths (4-3-6), the sum of squares of the Euclidean distances of these paths is larger than d ₀ ^2. . Coding is performed by assigning to each signal point in FIG. 4 so that the minimum value of the sum of squares of the minimum Euclidean distance obtained in this way becomes maximum.

The signal allocation circuit 52 is a convolutional encoder 51.
A signal is assigned to the parallel convolutional code output of and is input to the QAM modulation circuit 6 as an I signal and a Q signal. The local oscillation circuit 54 generates a carrier signal and inputs it to the hybrid circuit 56 and the mixer 53a. The hybrid circuit 56 delays the phase of the carrier signal generated by the local oscillation circuit 54 by 90 ° and inputs it to the mixer 53b.

The mixers 53a and 53b respectively perform multiplication of the I signal and the carrier signal, and multiplication of the Q signal and the carrier signal delayed in phase by 90 ° in the hybrid circuit 56.
The adder circuit 55 adds the output signals of the mixers 53a and 53b and inputs them to the BPF 57. The BPF 57 filters a predetermined frequency component of the output signal of the adding circuit 55 to obtain a modulated output signal.

FIG. 3 is a diagram showing the configuration of the receiver 1 which decodes data encoded by trellis encoding. The receiver 1 includes a QAM demodulation circuit 14 and a Viterbi decoding circuit 22. The QAM demodulation circuit 14 has the same configuration as that described as the conventional technique, but the Viterbi decoding circuit 22 has the configuration shown in FIG.

In the QAM demodulation circuit 14, the carrier wave reproduction circuit 16 reproduces the carrier wave signal based on the output signals of the A / D conversion circuits 19a and 19b, and inputs it to the mixer 15a and the hybrid circuit 17. The hybrid circuit 17 phase-shifts the carrier signal reproduced by the carrier reproducing circuit 16 by 90 ° and inputs the carrier signal to the mixer 15b.

Each of the mixers 15a and 15b multiplies the carrier signal regenerated by the carrier regenerating circuit 16 by the modulated output signal of the transmitter 5 and inputs the result to the LPF 18a. The signal is multiplied by the modulated output signal of the transmitter 5 to be converted into the base band, and the result is input to the LPF 18b.

The LPFs 18a and 18b filter the frequency components below a predetermined high cutoff frequency of the output signals of the mixers 15a and 15b, respectively, and the A / D conversion circuit 19
a and 19b. A / D conversion circuits 19a and 19b
Respectively perform analog / digital (A / D) conversion on the output signals of the LPFs 18a and 18b, and input them to the Viterbi decoding circuit 22 as digital I and Q signals.

The operation of the transmitter 5 and the receiver 1 will be described below. The transmitter 5 uses an externally set encoding method, for example, 8PSK, 16QAM, 32QAM, or 64
The convolutional encoder 51 performs convolutional encoding on the data input at a rate corresponding to any of QAM, and the signal allocation circuit 52 maximizes the minimum Euclidean distance between the signals for the convolutionally encoded data. Signals corresponding to the set encoding method are assigned and input to the QAM modulation circuit 6 as I and Q signals.

Further, the QAM modulation circuit 6 encodes the I signal and the Q signal input from the signal allocation circuit 52 and sends them to the receiver 1. In the QAM modulation circuit 6, the local oscillation circuit 54 generates a carrier signal. This carrier signal is directly input to the mixer 51a and the hybrid circuit 56.

The carrier signal input to the hybrid circuit 56 is phase-shifted by 90 ° and input to the mixer 51b. The mixers 51a and 51b multiply the carrier signals having different phase shifts by the I signal and the Q signal output from the signal allocation circuit 52, respectively.

The results of these two multiplications are added by the adder circuit 55, band-limited by the filtering in the BPF 57, and sent to the receiver 1. Here, the coding and modulation method used by the transmitter 5 can be changed every time communication is performed, and in particular, the coding method used for the communication from the transmitter 5 to the receiver 1 in advance is changed. There is no notification.

The receiver 1, which receives the signal from the transmitter 5,
The mixers 15a and 15b multiply the carrier signal regenerated by the carrier regenerating circuit 16 and this carrier signal by the signal whose phase is shifted by 90 ° by the hybrid circuit 17, respectively. The multiplication results are filtered by the LPFs 18a and 18b, respectively, and further, the A / D conversion circuit 19
A / D conversion is performed by a and 19b. The output signals of the A / D conversion circuits 19a and 19b are input to the Viterbi decoding circuit 22 as an I signal and a Q signal, respectively.

The operation of the Viterbi decoding circuit 22 will be described below. The control circuit 207 controls the Euclidean distance calculation circuit 201 and the phase shift circuit 200 by the modulation control signal and the phase shift control signal, respectively, assuming the encoding method and the phase of the reproduced carrier signal, and performs initial setting. For example, this initial setting is 16QAM as the coded modulation method of the transmitter 5.
, The Euclidean distance calculation circuit 201 is set so as to perform decoding corresponding thereto, and it is assumed that the phase shift of the reproduced carrier signal at that time is in the optimum state for data decoding. The phase shift circuit 200 is set so that the amount of phase shift is 0 °.

First, in the initial state of the phase shift circuit 200 and the Euclidean distance calculation circuit 201 as described above,
Decrypt the data. The phase shift circuit 200 receives the input Q
The phase of the I and Q signals from the AM demodulation circuit 14 is set to 0.
The phase is shifted, that is, the phase is directly passed to the Euclidean distance calculation circuit 201.

In this state, the Euclidean distance calculation circuit 20
Reference numeral 1 calculates the so-called branch metric based on the input digital I and Q signals in accordance with the assumed 16QAM coding method.
The ACS circuit 202 is the Euclidean distance calculation circuit 201.
The maximum likelihood path is calculated based on the branch metric calculated in step 1, and the minimum state metric is calculated as the path metric.

In the path metric accumulator circuit 206, the AC
A certain number of path metrics calculated by the S circuit 202 are cumulatively added. In the control circuit 207, when the cumulative addition result calculated by the path metric accumulation circuit 206 is smaller than the reference value set in advance corresponding to the 16QAM coding method, the control circuit 207 makes an assumption at that time. The state of the phase shift control signal and the modulation control signal is held, assuming that both the encoding method and the phase of the reproduced carrier signal are correct.

On the contrary, when the cumulative addition result calculated by the path metric accumulating circuit 206 is larger than the preset reference value corresponding to the 16QAM coding method, the control circuit 207 makes an assumption at that time. The state of the phase shift control signal is updated assuming that the phase of the reproduced carrier signal is wrong and the encoding method used. That is, the QAM demodulation circuit 14
Phase shift circuit 200 for I and Q signals input from
The setting of the amount of phase shift given by is increased by, for example, Δθ = 90 °.

At this stage, only the amount of phase shift given to the I signal and the Q signal in the phase shift circuit 200 is changed, and the setting of the coding system is not changed. In this way, the phase shift amount is sequentially changed, and the path metric accumulation circuit 2
The cumulative value of the path metric obtained in 06 is determined. The phase shift amount is continuously changed until the cumulative value of the path metric becomes equal to or less than the standard value corresponding to the 16QAM coding method.

Since the uncertain number of reproduced carrier signals for the coding system assumed at that time is known in advance, the cumulative value of the path metric is 16 at any phase shift amount.
When it is equal to or higher than the standard value of QAM, that is, when it is determined that the synchronization is not achieved, it can be determined that the encoding method assumed at that time is incorrect.

Here, according to the computer simulation result, when the coding method does not match between the transmitter 5 and the receiver 1, or when the phase of the reproduced carrier signal is rotated, the cumulative addition value of the path metric is the sign. The same method,
And about 2 compared to the case where the phases of the reproduced carrier signals match.
It is about double the value. Therefore, by properly setting the reference value of the cumulative addition value of the path metric corresponding to the number of cumulative additions and each encoding method, it is possible to easily determine whether or not the synchronization is achieved.

Therefore, in such a case, the control circuit 207 determines that the transmitter 5 is not performing 16QAM coding, assumes a 32QAM coding method as the next coding method, and performs modulation control based on this assumption. The Euclidean distance calculation circuit 201 is set via the signal, the phase shift control signal is also changed to the initial value, and again the judgment of the cumulative addition value of the path metric and the change of the phase shift amount are sequentially performed as in the case of 16QAM. , Until the cumulative addition value of the path metric becomes less than or equal to a reference value preset for 32QAM.

When the cumulative addition value of the path metric does not fall below the standard value of 32QAM for all the phase shift amounts corresponding to the 32QAM coding method, the coding method is set to 64QAM.
As in the case of the 16QAM coding method and the 32QAM coding method, the cumulative addition value of the path metric is sequentially determined and the phase shift amount is changed, and the cumulative addition value of the path metric is preset for 64QAM. Continue until it falls below the specified value. Further, even when the cumulative addition value of the path metric does not fall below the reference value even in the 64QAM coding system, the above-mentioned processing is further performed for the 8PSK coding system. However, in the 8PSK encoding method, Δθ = 45 °.

By performing the operation as described above,
Transmitter 5 is 16QAM, 32QAM, or 64QAM
When data is encoded by any one of the above encoding methods, it is possible to automatically follow the encoding method of the transmitter 5 by the processing on the receiver 1 side, and the phase of the reproduced carrier wave. Uncertainties can be removed automatically.

After the coding system of the transmitter 5 and the phase of the reproduced carrier signal are determined as described above, the receiver 1 decodes the data based on the coding system and the phase of the reproduced carrier signal. That is, the phase shift circuit 200 applies the determined phase amount to the I signal and the Q signal. The Euclidean distance calculation circuit 201 calculates a branch metric for the I signal and the Q signal phase-shifted by the phase shift circuit 200 based on the confirmed coding method.

Based on this branch metric, AC
The S circuit 202 calculates the maximum likelihood branch to calculate the path memory 20.
The output of 3 is the parallel format decoded data. This output data is converted into serial data by the P / S conversion circuit 204 and output from the receiver 1 as decoded data output.

In the present embodiment, the case where the receiver 1 assumes 16QAM, 32QAM, and 64QAM as the coding system has been described, but the coding system is not limited to this, and may be 128QAM, for example. Also, the number of encoding methods is not limited to three. The step (Δθ) for changing the phase amount is not limited to the value shown in this embodiment.

Further, each part of the Viterbi decoding circuit 22 of the present invention shown in FIG. 1 is configured by independent hardware for each part, or all or part suitable for software processing. Does not matter whether they are commonly configured as software on the same computer (microcomputer). By configuring each part of the Viterbi decoding circuit 22 by software, the scale of the device of the receiver 1 can be reduced. Further, the cumulative addition value of the path metric may be appropriately normalized.

The processing of the control circuit 207 described above will be described below with reference to the flowchart. FIG. 6 is a flowchart showing the processing of each part of the Viterbi decoding circuit 22 of the present invention. In FIG. 6, in step 01 (S01), the control circuit 207 sets the phase shift circuit 200 and the Euclidean distance calculation circuit 201 assuming the encoding method and the initial value of the phase.

In step 02 (S02), the Euclidean distance calculation circuit 201, the control circuit 207, the I signal and the Q signal input from the QAM demodulation circuit 14 are the Euclidean distances between the I signal and the Q signal and the received signal for the assumed coding method. Compute the square of (branch metric).
In step 03 (S03), the ACS circuit 202 calculates the path metric which is the minimum state metric.

In step 04 (S04), the path metric accumulation circuit 206 calculates the cumulative addition value of the path metric. In step 05 (S05), the control circuit 207 determines whether or not the path metric accumulating circuit 206 has cumulatively added the path metric a predetermined number of times. If the process has been performed a predetermined number of times, the process proceeds to S06, and if not, the process proceeds to S02.

The determination at S05 is made to determine whether the cumulative addition of the path metric has been performed a predetermined number of times. When the number of cumulative additions is less than the predetermined number, the branch metric is calculated for the next received signal, the path metric is further calculated by the ACS circuit 202, and cumulative addition is further performed. If the cumulative addition is more than the predetermined number of times, the determination regarding the cumulative addition value of the path metric is performed, and the processing according to this value is performed.

In step 06 (S06), the control circuit 207 determines whether or not the cumulative addition value of the path metric is less than or equal to the reference value corresponding to the assumed coding method.
When it is below the reference value, the process proceeds to S07, and when it is not below the reference value, the process proceeds to S09. In the determination of S06, the cumulative addition value of the path metric is used to determine whether the currently assumed modulation method and the I signal and the Q signal are synchronized. That is, the cumulative addition value is less than or equal to the reference value when synchronized. On the other hand, when not synchronized, the cumulative addition value is a number larger than this specified value.

At step 07 (S07), the control circuit 207 resets the cumulative addition value of the path metrics calculated by the path metric accumulation circuit 206.

At step 09 (S09), the control circuit 207 resets the cumulative addition value of the path metrics calculated by the path metric accumulation circuit 206. Step 1
At 0 (S10), it is determined whether or not the cumulative addition value of the path metric has been checked for all the phase shift amounts corresponding to the assumed coding method. If it has been performed for all, the process proceeds to S12, and if it has not been performed for all, the process proceeds to S11.

In the determination of S10, it is determined whether the cause of the lack of synchronization is that the phase of the reproduced carrier is different from that on the transmitting side or the assumed encoding method is different. For example, in the case of 64QAM, there are four states of uncertain phase of the reproduced carrier wave. Therefore, the phase is sequentially shifted and this 4
By checking all the states, if the encoding methods match, the cumulative addition value of the path metric becomes less than or equal to the reference value within 4 times, and it can be determined that synchronization has been achieved.

In step 11 (S11), the control circuit 207 controls the phase shift circuit 200 to change the amount of phase shift of the I signal and the Q signal input from the QAM demodulation circuit 14 (perform phase shift). In step 12 (S12), the control circuit 207 assumes the next coded modulation method, and sets the phase shift circuit 20 according to the coded modulation method.
0 and the Euclidean distance calculation circuit 201.

In the description of the present embodiment, exceptional processing is omitted when the coding scheme of the transmitter 5 does not apply to any of the schemes planned for the receiver 1. The Viterbi decoding method and apparatus according to the present invention can have various configurations other than the configurations described above, for example, as shown as a modified example. The embodiments described above are merely examples.

[0073]

As described above, according to the present invention, even when the coding and modulation method of the transmitter is changed, the receiver automatically decodes the data corresponding to the coding method of the transmitter. In addition, it is possible to match the phase of the regenerated carrier wave signal of the receiver with the carrier wave signal of the transmitter without using a differential code, and the transmitter and the receiver are complicated in configuration. It is possible to provide a Viterbi decoding method and apparatus capable of preventing the above.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of a Viterbi decoding circuit of the present invention.

FIG. 2 is a diagram showing a configuration of a general transmitter that transmits data by a trellis coding method.

FIG. 3 is a diagram showing a configuration of a receiver that decodes data encoded by trellis encoding.

FIG. 4 is a diagram showing a Euclidean distance between 8PSK signals.

FIG. 5 is a diagram showing an example of a trellis representation of a convolutional encoder when the constraint length is 3 and the number of registers ν is 2.

FIG. 6 is a flowchart showing the processing of each part of the Viterbi decoding circuit of the present invention.

FIG. 7 is a diagram showing a configuration of a conventional Viterbi decoding circuit.

[Explanation of symbols]

 1 ... Receiver 14 ... QAM demodulation circuit 15 ... Mixer 16 ... Carrier regeneration circuit 17 ... Hybrid circuit 18 ... LPF 19 ... A / D conversion circuit 22 ... Viterbi Decoding circuit 200 ... Phase shift circuit 201 ... Euclidean distance calculation circuit 202 ... ACS circuit 203 ... Path memory 204 ... P / S conversion circuit 206 ... Path metric accumulation circuit 207 ... Control circuit 5 ... Transmitter 51 ... Convolutional encoder 52 ... Signal allocation circuit 6 ... QAM modulation circuit 53 ... Mixer 54 ... Local oscillation circuit 55 ... Addition circuit 56 ...・ Hybrid circuit 57 ・ ・ ・ BPF

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Claims (9)

[Claims] 1. A cumulative addition value of a minimum number of state metrics of a predetermined number of times is calculated for a received signal coded by trellis coding based on an assumed code modulation method, and a cumulative value of the minimum state metrics is calculated. If the added value is equal to or greater than a predetermined reference value, the phase relationship between the reproduced carrier signal and the input received signal is sequentially changed, and if the cumulative addition value is not equal to or greater than the predetermined reference value, the received signal Viterbi decoding method for decoding data. 2. When the cumulative addition value of the minimum state metric is equal to or more than the reference value in all of the phase relationships corresponding to the assumed coding method, the assumed coding modulation method is sequentially changed. The Viterbi decoding method according to claim 1, wherein 3. The phase relationship is changed and the assumed coded modulation method is changed until the cumulative addition value of the minimum state metric becomes equal to or less than the predetermined reference value. Item 2. The Viterbi decoding method according to Item 2. 4. The Viterbi decoding method according to claim 1, wherein the reference value is set for each of the assumed coded modulation methods. 5. A phase shift means for changing a phase relationship between a reproduced carrier signal and a received signal, and a minimum state metric for calculating a cumulative addition value of the minimum state metric of the received signal based on an assumed coding and modulation method. Cumulative addition value calculation means and phase shift control means for sequentially controlling the phase shift means to change the phase relationship when the cumulative addition value of the minimum state metric is larger than a predetermined reference value. Viterbi decoding device having. 6. The phase shift control means is assumed when the cumulative addition value of the minimum state metric is greater than or equal to the reference value in all of the phase relationships corresponding to the assumed encoding method. The Viterbi decoding apparatus according to claim 5, wherein the coding and modulation scheme is sequentially changed. 7. The phase shift control means changes the phase relationship and changes the assumed coded modulation method until the cumulative addition value of the minimum state metric becomes equal to or less than the predetermined reference value. The Viterbi decoding method according to claim 6, which is performed. 8. The Viterbi decoding apparatus according to claim 5, wherein the reference value is set for each of the assumed coded modulation methods. 9. The Viterbi decoding apparatus according to claim 5, wherein the phase shift control means comprises a microcomputer.