JP3356748B2 - Method for manufacturing thin film transistor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a method of manufacturing a thin film transistor, and more particularly to a method of manufacturing a reverse staggered channel etch type thin film transistor array, and more particularly to a method of improving display unevenness at Vgoff.

[0002]

2. Description of the Related Art Conventionally, in a method of manufacturing an inverted staggered channel etch type thin film transistor array using this kind of amorphous silicon (hereinafter abbreviated as a-Si), the movement of charges is controlled by a front channel. In order to improve the mobility, low-power film formation of amorphous silicon is performed.

[0003]

However, when amorphous silicon is formed at a low power to improve the mobility, a phenomenon occurs in which the front channel is excessively controlled and the hole current also deteriorates, and Vgoff is displayed in a halftone display. There is a drawback that display unevenness depending on is generated.

An object of the present invention is to provide a method of manufacturing a thin film transistor which can improve the mobility of charges in the thin film transistor without deteriorating the Vgoff characteristic.

[0005]

According to a method of manufacturing a thin film transistor of the present invention, a gate electrode and a gate wiring are formed on a substrate, and an insulating film, a semiconductor film, and an ohmic contact are formed on the substrate including the gate electrode and the gate wiring. A method of manufacturing a thin film transistor for sequentially depositing semiconductor films for use, wherein the step of depositing the insulating film and the step of depositing the semiconductor film include, after starting the deposition of the insulating film, the surface of the insulating film. Is etched with a fluorine-based etching gas to form irregularities on the surface of the insulating film, and the etching is performed after the deposition of the insulating film is completed, or the deposition of the insulating film is performed. Insert it halfway.

In the method of manufacturing a thin film transistor, the insulating film is a silicon oxide film or a silicon nitride film (SiNx), and the fluorine-based etching gas is an etching gas made of SF ₆ or NF ₃ ; The etching process includes: when the fluorine-based etching gas is NF ₃ , an RF power of 1000 to 2000 W;
The etching is performed under the conditions of a pressure of 45 to 55 Pa and a distance between the electrodes of 28 to 32 mm.

Further, in the method of manufacturing a thin film transistor, the steps of forming the irregularities in the range of 0.5 to 1.0 nm and depositing the insulating film to depositing the semiconductor film are performed at least in the same chamber. Is performed continuously.

[0008]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS In a method of manufacturing a thin film transistor according to the present invention, a gate insulating film after formation of a gate wiring, a-Si
When forming a three-layer film of a film and an n ⁺ -type a-Si film, the film surface of the gate insulating film is plasma-etched with a fluorine-based gas to make the film surface uneven, and thereafter, the a-Si film and the n ⁺ -type film are formed. a-S
It is characterized in that an i-film is continuously formed.

Next, as an embodiment of the present invention, a case of forming an inverted staggered channel etch type TFT will be described with reference to FIG.

First, after cleaning the glass substrate 1 with an alkaline cleaning liquid, a metal film of Cr, Al, Mo or the like is formed by an argon sputtering method, and the metal film is patterned by a photolithography technique to form a gate wiring 2. I do.

Next, the silicon oxide film 3 (or SiNx
Film) is formed by the argon sputtering method or the thermal decomposition method, and thereafter, the SiNx film 4, the a-Si film 5, and the n ⁺ -type a-Si film 6
(Hereinafter abbreviated as three-layer film formation) is continuously formed by a plasma CVD method.

Next, after forming a three-layer film, a photolithography
N with F-based gas by photographic technology ⁺Type a-Si film 6,
After etching the a-Si film 5, the photoresist is removed.
Then, a thin film transistor portion is formed.

Next, a metal film is formed, and source / drain wirings 7 are formed by photolithography.

Next, using the source / drain wiring 7 as a mask, the n ⁺ -type a-Si film 6 on the a-Si film 5 is etched with an F-based gas to form a channel 8 and serve as a protective insulating film. A SiNx film 9 is formed, and a contact hole 10 is opened in the SiNx film 9.

Finally, an ITO film serving as a transparent electrode is formed, a pixel electrode 11 is formed by a photolithography technique, and the pixel electrode 11 and the source / drain wiring 7 are connected via a contact hole 10. Through the above steps, a thin film transistor was formed.

In the process of fabricating the above-mentioned thin film transistor, after forming a SiNx film with three layers, an F-based gas (SF ₆ ,
After plasma etching the surface of the SiNx film with NF ₃ or the like, the a-Si film 5 as a semiconductor layer is formed in the same chamber, and the n ⁺ -type a-Si film 6 (ohmic contact layer) is formed. did.

At this time, the n ⁺ -type a-Si film 6 (ohmic contact layer) can be moved to another chamber and formed.

The features of the present invention can be summarized as follows. Since the semiconductor film is formed continuously, it is not affected by the underlayer. Both etching and film formation can be performed in the same chamber.

The film forming method in the three-layer film forming process will be described in more detail. The film formation was performed using a single wafer CVD apparatus.

First, the glass substrate 1 is transferred from the cassette to the load lock chamber and evacuated. After the chamber is evacuated, the glass substrate 1 moves to the heat chamber, where it is held and heated, and then moves to the process chamber.

When the glass substrate 1 enters the process chamber, SiH ₄ , NH ₃ , and N ₂ gases are introduced, and after confirming pressure stability, RF is applied to form a SiNx film.

When the formation of the SiNx film is completed, the RF is stopped and gas is exhausted. When gas exhaust is completed, NF
_After introducing ₃ gases and confirming the pressure stability, RF is applied and plasma etching is performed.

When the plasma etching is completed, the RF is stopped and the gas is exhausted. After exhausting the gas, SiH ₄ and H ₂ gases are introduced, and after confirming the pressure stability, RF is applied to form an a-Si film.

When the formation of the a-Si film is completed, PH ₃ gas is introduced, the flow rate and pressure of SiH ₄ / H ₂ are adjusted, and an n ⁺ -type a-Si film is continuously formed while RF is applied. I do.

When the formation of the n ⁺ -type a-Si film is completed, the RF is stopped and the gas is exhausted.

When the three-layer film formation is completed, the glass substrate 1 is transferred to the load lock chamber and returned to the cassette.

The conditions of the above plasma etching are as follows:
It is as follows. _{· NF 3: 500~1500SCCM · RF:} 1000~2000W · distance between electrodes: 28～32Mm · Pressure: Under 45~55Pa above etching conditions, by selecting the etching time, or the etching conditions Gas By changing the seed, the irregular shape of the SiNx film surface can be changed.

By forming the gate insulating film by the above method, it is possible to suppress the hole current by forming irregularities at the interface between the SiNx film and the a-Si film, and as shown in FIG. In addition, the leak current when Vgoff is deepened can be lower than that of the conventional product not subjected to the NF ₃ treatment in the dark,
Display unevenness can be suppressed.

Incidentally, the unevenness is expressed by Ra assuming that the average value is Ra.
= 0.5 to 0.7 nm and the standard deviation is Rms, R
ms = 0.5 to 1.0 nm can be controlled.

Although the present invention describes the plasma treatment of the surface of the SiNx film during the formation of the three layers, the same effect can be obtained even during the formation of the silicon oxide film and the SiNx film.

Regarding the gas type, in the above,
Although the description has been made using NF ₃ , it goes without saying that the same effects as those of the present invention can be obtained by using other gases as long as they are fluorine-based gases such as SF ₆ .

[0032]

As described above, the thin film transistor of the present invention is
According to the method of manufacturing the SiNx
Film, a-Si film, n⁺When forming a three-layer film of the type a-Si film,
Plasma etching of SiNx film surface with fluorine-based gas
And then an a-Si film, n ⁺Continuous type a-Si film
By forming the film, the interface between the SiNx film and the a-Si film
The hole current can be suppressed by forming irregularities on the
Vgo than conventional products without surface treatment with elemental gas
The leakage current when ff is increased can be reduced, and display unevenness can be reduced.
The effect of being able to suppress is obtained.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a thin film transistor obtained by a method for manufacturing a thin film transistor according to an embodiment of the present invention.

FIG. 2 is a graph showing a Vgoff characteristic of a drain current of a thin film transistor obtained by a method for manufacturing a thin film transistor according to an embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 Glass substrate 2 Gate wiring 3 Silicon oxide film 4, 9 SiNx film 5 a-Si film 6 n ⁺ type a-Si film 7 Source / drain wiring 8 Channel 10 Contact hole 11 Pixel electrode

Claims (8)

(57) [Claims] 1. A method of manufacturing a thin film transistor, comprising: forming a gate electrode and a gate wiring on a substrate; and sequentially depositing an insulating film, a semiconductor film, and a semiconductor film for ohmic contact on the substrate including the gate electrode and the gate wiring. hand,
Between the step of depositing the insulating film and the step of depositing the semiconductor film, after starting the deposition of the insulating film,
A method for manufacturing a thin film transistor, characterized in that the surface of the insulating film is etched with a fluorine-based etching gas to make the surface of the insulating film uneven. 2. The method of manufacturing a thin film transistor according to claim 1, wherein the etching is performed after the deposition of the insulating film is completed. 3. The method of manufacturing a thin film transistor according to claim 1, wherein the etching process is inserted in the middle of the deposition of the insulating film. 4. The method according to claim 1, wherein the insulating film is a silicon oxide film or a silicon nitride film (SiNx). 5. The fluorine-based etching gas is SF
_{6. An} etching gas comprising ₆ or NF ₃ .
5. The method for producing a thin film transistor according to 2, 3, or 4. 6. The etching process according to claim 1, wherein said fluorine-based etching gas is NF ₃ ,
0 to 2000 W, pressure 45 to 55 Pa, distance between electrodes 28
6. The method according to claim 5, wherein the etching is performed under an etching condition of about 32 mm. 7. The method of manufacturing a thin film transistor according to claim 1, wherein the irregularities are formed in a range of 0.5 to 1.0 nm. 8. The method according to claim 1, wherein the step of depositing the insulating film and the step of depositing the semiconductor film are continuously performed at least in the same chamber.
Or a method for manufacturing a thin film transistor according to 7.